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Laurent Carlier749294b2020-06-01 09:03:17 +01001//
telsoa014fcda012018-03-09 14:13:49 +00002// Copyright © 2017 Arm Ltd. All rights reserved.
David Beckecb56cd2018-09-05 12:52:57 +01003// SPDX-License-Identifier: MIT
telsoa014fcda012018-03-09 14:13:49 +00004//
5
6#pragma once
7
Aron Virginas-Tarc9cc8042018-11-01 16:15:57 +00008#include <backendsCommon/Workload.hpp>
9#include <backendsCommon/WorkloadData.hpp>
telsoa014fcda012018-03-09 14:13:49 +000010
Teresa Charlina3b20472019-06-06 11:12:32 +010011#include "Decoders.hpp"
12#include "Encoders.hpp"
13
telsoa014fcda012018-03-09 14:13:49 +000014namespace armnn
15{
Teresa Charlina3b20472019-06-06 11:12:32 +010016class RefPooling2dWorkload : public BaseWorkload<Pooling2dQueueDescriptor>
telsoa014fcda012018-03-09 14:13:49 +000017{
18public:
Teresa Charlina3b20472019-06-06 11:12:32 +010019 using BaseWorkload<Pooling2dQueueDescriptor>::BaseWorkload;
20
Finn Williamsb8181f72021-04-07 10:23:21 +010021 void Execute() const override;
22 void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override;
23private:
24 void Execute(std::vector<ITensorHandle*> inputs, std::vector<ITensorHandle*> outputs) const;
telsoa014fcda012018-03-09 14:13:49 +000025};
telsoa014fcda012018-03-09 14:13:49 +000026} //namespace armnn