telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2017 Arm Ltd. All rights reserved. |
David Beck | ecb56cd | 2018-09-05 12:52:57 +0100 | [diff] [blame] | 3 | // SPDX-License-Identifier: MIT |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 4 | // |
| 5 | |
| 6 | #include "backends/CpuTensorHandle.hpp" |
| 7 | #include "backends/ArmComputeTensorUtils.hpp" |
| 8 | #include "backends/NeonLayerSupport.hpp" |
| 9 | |
| 10 | #include "NeonConvolution2dBaseWorkload.hpp" |
| 11 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 12 | #include "armnn/Types.hpp" |
| 13 | #include "Half.hpp" |
| 14 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 15 | namespace armnn |
| 16 | { |
| 17 | |
surmeh01 | 3537c2c | 2018-05-18 16:31:43 +0100 | [diff] [blame] | 18 | using namespace armcomputetensorutils; |
| 19 | |
| 20 | arm_compute::Status NeonConvolution2dWorkloadValidate(const TensorInfo& input, |
| 21 | const TensorInfo& output, |
| 22 | const Convolution2dDescriptor& descriptor, |
| 23 | const TensorInfo& weights, |
arovir01 | a682410 | 2018-08-28 17:40:45 +0100 | [diff] [blame] | 24 | const boost::optional<TensorInfo>& biases) |
surmeh01 | 3537c2c | 2018-05-18 16:31:43 +0100 | [diff] [blame] | 25 | { |
Francis Murtagh | 351d13d | 2018-09-24 15:01:18 +0100 | [diff] [blame] | 26 | const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout); |
| 27 | const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout); |
| 28 | const arm_compute::TensorInfo aclWeightsInfo = BuildArmComputeTensorInfo(weights, descriptor.m_DataLayout); |
arovir01 | a682410 | 2018-08-28 17:40:45 +0100 | [diff] [blame] | 29 | |
surmeh01 | 3537c2c | 2018-05-18 16:31:43 +0100 | [diff] [blame] | 30 | arm_compute::TensorInfo aclBiasesInfo; |
| 31 | arm_compute::TensorInfo *optionalAclBiasesInfo = nullptr; |
| 32 | |
| 33 | if (descriptor.m_BiasEnabled) |
| 34 | { |
arovir01 | a682410 | 2018-08-28 17:40:45 +0100 | [diff] [blame] | 35 | BOOST_ASSERT(biases.is_initialized()); |
| 36 | |
Francis Murtagh | 351d13d | 2018-09-24 15:01:18 +0100 | [diff] [blame] | 37 | aclBiasesInfo = BuildArmComputeTensorInfo(biases.get(), descriptor.m_DataLayout); |
surmeh01 | 3537c2c | 2018-05-18 16:31:43 +0100 | [diff] [blame] | 38 | optionalAclBiasesInfo = &aclBiasesInfo; |
| 39 | } |
| 40 | |
| 41 | arm_compute::PadStrideInfo layerInfo = BuildArmComputePadStrideInfo(descriptor); |
| 42 | |
| 43 | return arm_compute::NEConvolutionLayer::validate(&aclInputInfo, |
| 44 | &aclWeightsInfo, |
| 45 | optionalAclBiasesInfo, |
| 46 | &aclOutputInfo, |
| 47 | layerInfo); |
| 48 | } |
| 49 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 50 | template<armnn::DataType... dataTypes> |
| 51 | NeonConvolution2dBaseWorkload<dataTypes...>::NeonConvolution2dBaseWorkload( |
| 52 | const Convolution2dQueueDescriptor& descriptor, const WorkloadInfo& info, |
| 53 | std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager) |
| 54 | : TypedWorkload<Convolution2dQueueDescriptor, dataTypes...>(descriptor, info) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 55 | { |
| 56 | using arm_compute::NEDirectConvolutionLayer; |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 57 | |
| 58 | ValidateData(); |
| 59 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 60 | // todo: check tensor shapes match. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 61 | |
| 62 | arm_compute::ITensor& input = boost::polymorphic_downcast<INeonTensorHandle*>(m_Data.m_Inputs[0])->GetTensor(); |
| 63 | arm_compute::ITensor& output = boost::polymorphic_downcast<INeonTensorHandle*>(m_Data.m_Outputs[0])->GetTensor(); |
| 64 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 65 | m_KernelTensor = std::make_unique<arm_compute::Tensor>(); |
Francis Murtagh | 351d13d | 2018-09-24 15:01:18 +0100 | [diff] [blame] | 66 | BuildArmComputeTensor(*m_KernelTensor, m_Data.m_Weight->GetTensorInfo(), descriptor.m_DataLayout); |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 67 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 68 | if (m_Data.m_Parameters.m_BiasEnabled) |
| 69 | { |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 70 | m_BiasTensor = std::make_unique<arm_compute::Tensor>(); |
Francis Murtagh | 351d13d | 2018-09-24 15:01:18 +0100 | [diff] [blame] | 71 | BuildArmComputeTensor(*m_BiasTensor, m_Data.m_Bias->GetTensorInfo(), descriptor.m_DataLayout); |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 72 | } |
| 73 | |
| 74 | arm_compute::PadStrideInfo padStrideInfo(m_Data.m_Parameters.m_StrideX, |
| 75 | m_Data.m_Parameters.m_StrideY, |
| 76 | m_Data.m_Parameters.m_PadLeft, |
| 77 | m_Data.m_Parameters.m_PadRight, |
| 78 | m_Data.m_Parameters.m_PadTop, |
| 79 | m_Data.m_Parameters.m_PadBottom, |
| 80 | arm_compute::DimensionRoundingType::FLOOR); |
| 81 | |
| 82 | const bool preferDirectConvolution = |
| 83 | IsNeonDirectConvolutionPreferred(m_Data.m_Weight->GetTensorInfo(), |
| 84 | m_Data.m_Parameters); |
| 85 | |
| 86 | if (preferDirectConvolution) |
| 87 | { |
surmeh01 | 3537c2c | 2018-05-18 16:31:43 +0100 | [diff] [blame] | 88 | auto directConvolutionLayer = std::make_unique<arm_compute::NEDirectConvolutionLayer>(memoryManager); |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 89 | directConvolutionLayer->configure(&input, |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 90 | m_KernelTensor.get(), |
| 91 | m_BiasTensor.get(), |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 92 | &output, |
| 93 | padStrideInfo); |
| 94 | m_ConvolutionLayer.reset(directConvolutionLayer.release()); |
| 95 | } |
| 96 | else |
| 97 | { |
surmeh01 | 3537c2c | 2018-05-18 16:31:43 +0100 | [diff] [blame] | 98 | auto convolutionLayer = std::make_unique<arm_compute::NEConvolutionLayer>(memoryManager); |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 99 | convolutionLayer->configure(&input, |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 100 | m_KernelTensor.get(), |
| 101 | m_BiasTensor.get(), |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 102 | &output, |
| 103 | padStrideInfo); |
| 104 | m_ConvolutionLayer.reset(convolutionLayer.release()); |
| 105 | } |
| 106 | BOOST_ASSERT(m_ConvolutionLayer); |
| 107 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 108 | armnn::DataType dataType = m_Data.m_Weight->GetTensorInfo().GetDataType(); |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 109 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 110 | switch (dataType) |
| 111 | { |
| 112 | case DataType::Float16: |
| 113 | { |
| 114 | InitialiseArmComputeTensorData(*m_KernelTensor, m_Data.m_Weight->template GetConstTensor<Half>()); |
| 115 | break; |
| 116 | } |
| 117 | case DataType::Float32: |
| 118 | { |
| 119 | InitialiseArmComputeTensorData(*m_KernelTensor, m_Data.m_Weight->template GetConstTensor<float>()); |
| 120 | break; |
| 121 | } |
| 122 | case DataType::QuantisedAsymm8: |
| 123 | { |
| 124 | InitialiseArmComputeTensorData(*m_KernelTensor, m_Data.m_Weight->template GetConstTensor<uint8_t>()); |
| 125 | break; |
| 126 | } |
| 127 | default: |
| 128 | { |
| 129 | BOOST_ASSERT_MSG(false, "Unknown DataType."); |
| 130 | } |
| 131 | } |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 132 | } |
| 133 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 134 | template<armnn::DataType... dataTypes> |
| 135 | void NeonConvolution2dBaseWorkload<dataTypes...>::FreeUnusedTensors() |
| 136 | { |
| 137 | FreeTensorIfUnused(m_KernelTensor); |
| 138 | FreeTensorIfUnused(m_BiasTensor); |
| 139 | } |
| 140 | |
| 141 | // Generates known implementations for linker. |
| 142 | template class NeonConvolution2dBaseWorkload<armnn::DataType::Float16, armnn::DataType::Float32>; |
| 143 | template class NeonConvolution2dBaseWorkload<armnn::DataType::QuantisedAsymm8>; |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 144 | |
| 145 | } //namespace armnn |
| 146 | |