Tianle Cheng | 21a9f33 | 2023-11-09 13:56:53 +0000 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2023 Arm Ltd and Contributors. All rights reserved. |
| 3 | // SPDX-License-Identifier: MIT |
| 4 | // |
| 5 | |
| 6 | #include "NeonReverseV2Workload.hpp" |
| 7 | #include "NeonWorkloadUtils.hpp" |
| 8 | #include <armnn/utility/PolymorphicDowncast.hpp> |
| 9 | #include <aclCommon/ArmComputeUtils.hpp> |
| 10 | #include <backendsCommon/WorkloadUtils.hpp> |
| 11 | |
| 12 | namespace armnn |
| 13 | { |
| 14 | arm_compute::Status NeonReverseV2WorkloadValidate(const TensorInfo& input, |
| 15 | const TensorInfo& axis, |
| 16 | const TensorInfo& output) |
| 17 | { |
| 18 | const arm_compute::TensorInfo aclInput = BuildArmComputeTensorInfo(input); |
| 19 | const arm_compute::TensorInfo aclAxis = BuildArmComputeTensorInfo(axis); |
| 20 | const arm_compute::TensorInfo aclOutput = BuildArmComputeTensorInfo(output); |
| 21 | |
| 22 | return arm_compute::NEReverse::validate(&aclInput, &aclOutput, &aclAxis, true); |
| 23 | } |
| 24 | |
| 25 | NeonReverseV2Workload::NeonReverseV2Workload(const ReverseV2QueueDescriptor& descriptor, |
| 26 | const WorkloadInfo& info) |
| 27 | : BaseWorkload<ReverseV2QueueDescriptor>(descriptor, info) |
| 28 | { |
| 29 | m_Data.ValidateInputsOutputs("NeonReverseV2Workload", 2, 1); |
| 30 | |
| 31 | arm_compute::ITensor& input = PolymorphicDowncast<IAclTensorHandle*>(m_Data.m_Inputs[0])->GetTensor(); |
| 32 | arm_compute::ITensor& axis = PolymorphicDowncast<IAclTensorHandle*>(m_Data.m_Inputs[1])->GetTensor(); |
| 33 | arm_compute::ITensor& output = PolymorphicDowncast<IAclTensorHandle*>(m_Data.m_Outputs[0])->GetTensor(); |
| 34 | |
| 35 | m_Layer.configure(&input, &output, &axis, true); |
| 36 | } |
| 37 | |
| 38 | void NeonReverseV2Workload::Execute() const |
| 39 | { |
| 40 | ARMNN_SCOPED_PROFILING_EVENT_NEON_NAME_GUID("NeonReverseV2Workload_Execute"); |
| 41 | m_Layer.run(); |
| 42 | } |
| 43 | |
| 44 | } // namespace armnn |