Laurent Carlier | 749294b | 2020-06-01 09:03:17 +0100 | [diff] [blame] | 1 | // |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 2 | // Copyright © 2017 Arm Ltd. All rights reserved. |
David Beck | ecb56cd | 2018-09-05 12:52:57 +0100 | [diff] [blame] | 3 | // SPDX-License-Identifier: MIT |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 4 | // |
| 5 | #pragma once |
| 6 | |
Matteo Martincigh | e5b8eb9 | 2019-11-28 15:45:42 +0000 | [diff] [blame] | 7 | #include <armnn/backends/CpuTensorHandleFwd.hpp> |
| 8 | #include <armnn/backends/ITensorHandle.hpp> |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 9 | |
Aron Virginas-Tar | c9cc804 | 2018-11-01 16:15:57 +0000 | [diff] [blame] | 10 | #include <InternalTypes.hpp> |
| 11 | |
Jim Flynn | e242f2d | 2019-05-22 14:24:13 +0100 | [diff] [blame] | 12 | #include <armnn/Deprecated.hpp> |
David Beck | 0dbe0ee | 2018-09-24 15:59:27 +0100 | [diff] [blame] | 13 | #include <armnn/Descriptors.hpp> |
| 14 | #include <armnn/Exceptions.hpp> |
Aron Virginas-Tar | c9cc804 | 2018-11-01 16:15:57 +0000 | [diff] [blame] | 15 | #include <armnn/Types.hpp> |
| 16 | #include <armnn/Tensor.hpp> |
David Beck | 0dbe0ee | 2018-09-24 15:59:27 +0100 | [diff] [blame] | 17 | |
Aron Virginas-Tar | c9cc804 | 2018-11-01 16:15:57 +0000 | [diff] [blame] | 18 | #include <backendsCommon/WorkloadInfo.hpp> |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 19 | |
| 20 | namespace armnn |
| 21 | { |
| 22 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 23 | //A helper function that returns the bias data type required for given input data type. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 24 | DataType GetBiasDataType(DataType inputDataType); |
| 25 | |
| 26 | struct WorkloadInfo; |
| 27 | |
| 28 | struct QueueDescriptor |
| 29 | { |
| 30 | std::vector<ITensorHandle*> m_Inputs; |
| 31 | std::vector<ITensorHandle*> m_Outputs; |
| 32 | |
| 33 | void ValidateInputsOutputs(const std::string& descName, |
Narumol Prangnawarat | 867eba5 | 2020-02-03 12:29:56 +0000 | [diff] [blame] | 34 | unsigned int numExpectedIn, |
| 35 | unsigned int numExpectedOut) const; |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 36 | |
| 37 | |
| 38 | protected: |
| 39 | ~QueueDescriptor() = default; |
| 40 | QueueDescriptor() = default; |
| 41 | QueueDescriptor(QueueDescriptor const&) = default; |
| 42 | QueueDescriptor& operator=(QueueDescriptor const&) = default; |
| 43 | }; |
| 44 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 45 | // Base class for queue descriptors which contain parameters. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 46 | template <typename LayerDescriptor> |
| 47 | struct QueueDescriptorWithParameters : public QueueDescriptor |
| 48 | { |
| 49 | LayerDescriptor m_Parameters; |
| 50 | |
| 51 | protected: |
| 52 | ~QueueDescriptorWithParameters() = default; |
| 53 | QueueDescriptorWithParameters() = default; |
| 54 | QueueDescriptorWithParameters(QueueDescriptorWithParameters const&) = default; |
| 55 | QueueDescriptorWithParameters& operator=(QueueDescriptorWithParameters const&) = default; |
| 56 | }; |
| 57 | |
Jim Flynn | 68db06f | 2020-10-06 10:14:50 +0100 | [diff] [blame] | 58 | struct MapQueueDescriptor : QueueDescriptor |
| 59 | { |
| 60 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 61 | }; |
| 62 | |
Jim Flynn | 3a40ea5 | 2020-10-08 11:42:30 +0100 | [diff] [blame] | 63 | struct UnmapQueueDescriptor : QueueDescriptor |
| 64 | { |
| 65 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 66 | }; |
| 67 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 68 | struct MemCopyQueueDescriptor : QueueDescriptor |
| 69 | { |
| 70 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 71 | }; |
| 72 | |
| 73 | using InputQueueDescriptor = MemCopyQueueDescriptor; |
| 74 | using OutputQueueDescriptor = MemCopyQueueDescriptor; |
| 75 | |
Derek Lamberti | f674aa0 | 2019-08-01 15:56:25 +0100 | [diff] [blame] | 76 | struct MemImportQueueDescriptor : QueueDescriptor |
| 77 | { |
| 78 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 79 | }; |
| 80 | |
| 81 | struct MemSyncQueueDescriptor : QueueDescriptor |
| 82 | { |
| 83 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 84 | }; |
| 85 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 86 | // Softmax layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 87 | struct SoftmaxQueueDescriptor : QueueDescriptorWithParameters<SoftmaxDescriptor> |
| 88 | { |
| 89 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 90 | }; |
| 91 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 92 | // Splitter layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 93 | struct SplitterQueueDescriptor : QueueDescriptorWithParameters<ViewsDescriptor> |
| 94 | { |
| 95 | struct ViewOrigin |
| 96 | { |
| 97 | ViewOrigin() {} |
| 98 | ViewOrigin(std::vector<unsigned int> const& origin) : m_Origin(origin) {} |
| 99 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 100 | //View origin (size of the vector is the same as number of dimensions of the view). |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 101 | std::vector<unsigned int> m_Origin; |
| 102 | }; |
| 103 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 104 | //View defines a tensor that will be carved from the input tensor. |
| 105 | //View origins are stored here, the extents are defined by sizes of the output tensors. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 106 | std::vector<ViewOrigin> m_ViewOrigins; |
| 107 | |
| 108 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 109 | }; |
| 110 | |
Jim Flynn | e242f2d | 2019-05-22 14:24:13 +0100 | [diff] [blame] | 111 | // Concat layer workload data. |
| 112 | struct ConcatQueueDescriptor : QueueDescriptorWithParameters<OriginsDescriptor> |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 113 | { |
| 114 | struct ViewOrigin |
| 115 | { |
| 116 | ViewOrigin() {} |
| 117 | ViewOrigin(const std::vector<unsigned int>& origin) : m_Origin(origin) {} |
| 118 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 119 | //View origin (size of the vector is the same as number of dimensions of the view). |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 120 | std::vector<unsigned int> m_Origin; |
| 121 | }; |
| 122 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 123 | //View defines a sub-area of the output tensor that will be filled with the corresponding input tensor. |
| 124 | //View origins are stored here, the extents are defined by sizes of the input tensors. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 125 | std::vector<ViewOrigin> m_ViewOrigins; |
| 126 | |
| 127 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 128 | }; |
| 129 | |
Jim Flynn | e242f2d | 2019-05-22 14:24:13 +0100 | [diff] [blame] | 130 | // Deprecated. Use ConcatQueueDescriptor instead |
| 131 | using MergerQueueDescriptor = ConcatQueueDescriptor; |
| 132 | |
Matthew Jackson | 2b8c1da | 2019-07-04 14:59:16 +0100 | [diff] [blame] | 133 | // Stack layer workload data. |
| 134 | struct StackQueueDescriptor : QueueDescriptorWithParameters<StackDescriptor> |
| 135 | { |
| 136 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 137 | }; |
| 138 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 139 | // Activation layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 140 | struct ActivationQueueDescriptor : QueueDescriptorWithParameters<ActivationDescriptor> |
| 141 | { |
| 142 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 143 | }; |
| 144 | |
Nikhil Raj | ee391d5 | 2019-09-05 17:50:44 +0100 | [diff] [blame] | 145 | struct ArgMinMaxQueueDescriptor : QueueDescriptorWithParameters<ArgMinMaxDescriptor> |
| 146 | { |
| 147 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 148 | }; |
| 149 | |
Ryan OShea | ec6c680 | 2020-06-05 17:17:06 +0100 | [diff] [blame] | 150 | // Fill layer workload data. |
| 151 | struct FillQueueDescriptor : QueueDescriptorWithParameters<FillDescriptor> |
| 152 | { |
Ryan OShea | ec6c680 | 2020-06-05 17:17:06 +0100 | [diff] [blame] | 153 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 154 | }; |
| 155 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 156 | // Fully connected layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 157 | struct FullyConnectedQueueDescriptor : QueueDescriptorWithParameters<FullyConnectedDescriptor> |
| 158 | { |
| 159 | FullyConnectedQueueDescriptor() |
| 160 | : m_Weight(nullptr) |
| 161 | , m_Bias(nullptr) |
| 162 | { |
| 163 | } |
| 164 | |
| 165 | const ConstCpuTensorHandle* m_Weight; |
| 166 | const ConstCpuTensorHandle* m_Bias; |
| 167 | |
| 168 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 169 | }; |
| 170 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 171 | // Permute layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 172 | struct PermuteQueueDescriptor : QueueDescriptorWithParameters<PermuteDescriptor> |
| 173 | { |
| 174 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 175 | }; |
| 176 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 177 | // Pooling 2D layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 178 | struct Pooling2dQueueDescriptor : QueueDescriptorWithParameters<Pooling2dDescriptor> |
| 179 | { |
| 180 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 181 | }; |
| 182 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 183 | // Convolution 2D layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 184 | struct Convolution2dQueueDescriptor : QueueDescriptorWithParameters<Convolution2dDescriptor> |
| 185 | { |
| 186 | Convolution2dQueueDescriptor() |
| 187 | : m_Weight(nullptr) |
| 188 | , m_Bias(nullptr) |
| 189 | { |
| 190 | } |
| 191 | |
| 192 | const ConstCpuTensorHandle* m_Weight; |
| 193 | const ConstCpuTensorHandle* m_Bias; |
| 194 | |
| 195 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 196 | }; |
| 197 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 198 | // Depthwise Convolution 2D layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 199 | struct DepthwiseConvolution2dQueueDescriptor : QueueDescriptorWithParameters<DepthwiseConvolution2dDescriptor> |
| 200 | { |
| 201 | DepthwiseConvolution2dQueueDescriptor() |
| 202 | : m_Weight(nullptr) |
| 203 | , m_Bias(nullptr) |
| 204 | { |
| 205 | } |
| 206 | |
| 207 | const ConstCpuTensorHandle* m_Weight; |
| 208 | const ConstCpuTensorHandle* m_Bias; |
| 209 | |
| 210 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 211 | }; |
| 212 | |
Narumol Prangnawarat | 94dd5d8 | 2019-01-23 18:06:26 +0000 | [diff] [blame] | 213 | struct DetectionPostProcessQueueDescriptor : QueueDescriptorWithParameters<DetectionPostProcessDescriptor> |
| 214 | { |
Narumol Prangnawarat | bc67cef | 2019-01-31 15:31:54 +0000 | [diff] [blame] | 215 | DetectionPostProcessQueueDescriptor() |
| 216 | : m_Anchors(nullptr) |
| 217 | { |
| 218 | } |
| 219 | |
| 220 | const ConstCpuTensorHandle* m_Anchors; |
| 221 | |
Narumol Prangnawarat | 94dd5d8 | 2019-01-23 18:06:26 +0000 | [diff] [blame] | 222 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 223 | }; |
| 224 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 225 | // Normalization layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 226 | struct NormalizationQueueDescriptor : QueueDescriptorWithParameters<NormalizationDescriptor> |
| 227 | { |
| 228 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 229 | }; |
| 230 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 231 | // Add layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 232 | struct AdditionQueueDescriptor : QueueDescriptor |
| 233 | { |
| 234 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 235 | }; |
| 236 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 237 | // Multiplication layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 238 | struct MultiplicationQueueDescriptor : QueueDescriptor |
| 239 | { |
| 240 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 241 | }; |
| 242 | |
Francis Murtagh | e7a86a4 | 2018-08-29 12:42:10 +0100 | [diff] [blame] | 243 | // Division layer workload data. |
| 244 | struct DivisionQueueDescriptor : QueueDescriptor |
| 245 | { |
| 246 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 247 | }; |
| 248 | |
David Beck | c2044fe | 2018-09-05 15:00:38 +0100 | [diff] [blame] | 249 | // Subtraction layer workload data. |
| 250 | struct SubtractionQueueDescriptor : QueueDescriptor |
| 251 | { |
| 252 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 253 | }; |
| 254 | |
Nattapat Chaimanowong | 5a4304a | 2018-11-28 10:44:37 +0000 | [diff] [blame] | 255 | // Maximum layer workload data. |
| 256 | struct MaximumQueueDescriptor : QueueDescriptor |
| 257 | { |
| 258 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 259 | }; |
| 260 | |
narpra01 | a6bf912 | 2018-09-10 09:50:09 +0100 | [diff] [blame] | 261 | // Mean layer workload data. |
narpra01 | 32b9046 | 2018-09-13 11:07:48 +0100 | [diff] [blame] | 262 | struct MeanQueueDescriptor : QueueDescriptorWithParameters<MeanDescriptor> |
narpra01 | a6bf912 | 2018-09-10 09:50:09 +0100 | [diff] [blame] | 263 | { |
| 264 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 265 | }; |
| 266 | |
jimfly01 | 2c9322a | 2018-09-19 10:59:49 +0100 | [diff] [blame] | 267 | // Pad layer workload data |
| 268 | struct PadQueueDescriptor : QueueDescriptorWithParameters<PadDescriptor> |
| 269 | { |
| 270 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 271 | }; |
| 272 | |
Derek Lamberti | a9cca6a | 2019-03-25 15:41:58 +0000 | [diff] [blame] | 273 | struct QuantizeQueueDescriptor : QueueDescriptor |
| 274 | { |
| 275 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 276 | }; |
| 277 | |
Teresa Charlin | cedd34f | 2020-03-30 11:17:30 +0100 | [diff] [blame] | 278 | // Deprecated use ComparisonQueueDescriptor instead |
FrancisMurtagh | 2099595 | 2018-12-17 12:11:36 +0000 | [diff] [blame] | 279 | struct EqualQueueDescriptor : QueueDescriptor |
| 280 | { |
| 281 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 282 | }; |
| 283 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 284 | // Batch norm layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 285 | struct BatchNormalizationQueueDescriptor : QueueDescriptorWithParameters<BatchNormalizationDescriptor> |
| 286 | { |
| 287 | BatchNormalizationQueueDescriptor() |
| 288 | : m_Mean(nullptr) |
| 289 | , m_Variance(nullptr) |
| 290 | , m_Beta(nullptr) |
| 291 | , m_Gamma(nullptr) |
| 292 | { |
| 293 | } |
| 294 | |
| 295 | const ConstCpuTensorHandle* m_Mean; |
| 296 | const ConstCpuTensorHandle* m_Variance; |
| 297 | const ConstCpuTensorHandle* m_Beta; |
| 298 | const ConstCpuTensorHandle* m_Gamma; |
| 299 | |
| 300 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 301 | }; |
| 302 | |
Finn Williams | 2605b23 | 2020-06-10 15:53:46 +0100 | [diff] [blame] | 303 | struct RankQueueDescriptor : QueueDescriptor |
| 304 | { |
| 305 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 306 | }; |
| 307 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 308 | struct ResizeBilinearQueueDescriptor : QueueDescriptorWithParameters<ResizeBilinearDescriptor> |
| 309 | { |
| 310 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 311 | }; |
| 312 | |
Teresa Charlin | a9075df | 2019-06-27 15:41:57 +0100 | [diff] [blame] | 313 | struct ResizeQueueDescriptor : QueueDescriptorWithParameters<ResizeDescriptor> |
| 314 | { |
| 315 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 316 | }; |
| 317 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 318 | struct FakeQuantizationQueueDescriptor : QueueDescriptorWithParameters<FakeQuantizationDescriptor> |
| 319 | { |
| 320 | FakeQuantizationQueueDescriptor() |
| 321 | : m_Min(nullptr) |
| 322 | , m_Max(nullptr) |
| 323 | { |
| 324 | } |
| 325 | |
| 326 | const ConstCpuTensorHandle* m_Min; |
| 327 | const ConstCpuTensorHandle* m_Max; |
| 328 | |
| 329 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 330 | }; |
| 331 | |
Kevin May | ce5045a | 2019-10-02 14:07:47 +0100 | [diff] [blame] | 332 | struct InstanceNormalizationQueueDescriptor : QueueDescriptorWithParameters<InstanceNormalizationDescriptor> |
| 333 | { |
Kevin May | ce5045a | 2019-10-02 14:07:47 +0100 | [diff] [blame] | 334 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 335 | }; |
| 336 | |
Matteo Martincigh | bcd3c85 | 2018-09-28 14:14:12 +0100 | [diff] [blame] | 337 | struct L2NormalizationQueueDescriptor : QueueDescriptorWithParameters<L2NormalizationDescriptor> |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 338 | { |
| 339 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 340 | }; |
| 341 | |
Aron Virginas-Tar | f982dea | 2019-10-11 14:07:53 +0100 | [diff] [blame] | 342 | struct LogSoftmaxQueueDescriptor : QueueDescriptorWithParameters<LogSoftmaxDescriptor> |
| 343 | { |
| 344 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 345 | }; |
| 346 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 347 | struct ConstantQueueDescriptor : QueueDescriptor |
| 348 | { |
| 349 | ConstantQueueDescriptor() |
| 350 | : m_LayerOutput(nullptr) |
| 351 | { |
| 352 | } |
| 353 | |
| 354 | const ConstCpuTensorHandle* m_LayerOutput; |
| 355 | |
| 356 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 357 | }; |
| 358 | |
| 359 | struct ReshapeQueueDescriptor : QueueDescriptorWithParameters<ReshapeDescriptor> |
| 360 | { |
| 361 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 362 | }; |
| 363 | |
Nattapat Chaimanowong | 207ef9a | 2018-11-02 10:57:25 +0000 | [diff] [blame] | 364 | struct SpaceToBatchNdQueueDescriptor : QueueDescriptorWithParameters<SpaceToBatchNdDescriptor> |
| 365 | { |
| 366 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 367 | }; |
| 368 | |
Aron Virginas-Tar | 972af15 | 2019-06-11 14:14:03 +0100 | [diff] [blame] | 369 | struct SpaceToDepthQueueDescriptor : QueueDescriptorWithParameters<SpaceToDepthDescriptor> |
| 370 | { |
| 371 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 372 | }; |
| 373 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 374 | struct FloorQueueDescriptor : QueueDescriptor |
| 375 | { |
| 376 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 377 | }; |
| 378 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 379 | struct LstmQueueDescriptor : QueueDescriptorWithParameters<LstmDescriptor> |
| 380 | { |
| 381 | LstmQueueDescriptor() |
| 382 | : m_InputToInputWeights(nullptr) |
| 383 | , m_InputToForgetWeights(nullptr) |
| 384 | , m_InputToCellWeights(nullptr) |
| 385 | , m_InputToOutputWeights(nullptr) |
| 386 | , m_RecurrentToInputWeights(nullptr) |
| 387 | , m_RecurrentToForgetWeights(nullptr) |
| 388 | , m_RecurrentToCellWeights(nullptr) |
| 389 | , m_RecurrentToOutputWeights(nullptr) |
| 390 | , m_CellToInputWeights(nullptr) |
| 391 | , m_CellToForgetWeights(nullptr) |
| 392 | , m_CellToOutputWeights(nullptr) |
| 393 | , m_InputGateBias(nullptr) |
| 394 | , m_ForgetGateBias(nullptr) |
| 395 | , m_CellBias(nullptr) |
| 396 | , m_OutputGateBias(nullptr) |
| 397 | , m_ProjectionWeights(nullptr) |
| 398 | , m_ProjectionBias(nullptr) |
Jan Eilers | 38e05bd | 2019-06-26 13:10:09 +0100 | [diff] [blame] | 399 | , m_InputLayerNormWeights(nullptr) |
| 400 | , m_ForgetLayerNormWeights(nullptr) |
| 401 | , m_CellLayerNormWeights(nullptr) |
| 402 | , m_OutputLayerNormWeights(nullptr) |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 403 | { |
| 404 | } |
| 405 | |
| 406 | const ConstCpuTensorHandle* m_InputToInputWeights; |
| 407 | const ConstCpuTensorHandle* m_InputToForgetWeights; |
| 408 | const ConstCpuTensorHandle* m_InputToCellWeights; |
| 409 | const ConstCpuTensorHandle* m_InputToOutputWeights; |
| 410 | const ConstCpuTensorHandle* m_RecurrentToInputWeights; |
| 411 | const ConstCpuTensorHandle* m_RecurrentToForgetWeights; |
| 412 | const ConstCpuTensorHandle* m_RecurrentToCellWeights; |
| 413 | const ConstCpuTensorHandle* m_RecurrentToOutputWeights; |
| 414 | const ConstCpuTensorHandle* m_CellToInputWeights; |
| 415 | const ConstCpuTensorHandle* m_CellToForgetWeights; |
| 416 | const ConstCpuTensorHandle* m_CellToOutputWeights; |
| 417 | const ConstCpuTensorHandle* m_InputGateBias; |
| 418 | const ConstCpuTensorHandle* m_ForgetGateBias; |
| 419 | const ConstCpuTensorHandle* m_CellBias; |
| 420 | const ConstCpuTensorHandle* m_OutputGateBias; |
| 421 | const ConstCpuTensorHandle* m_ProjectionWeights; |
| 422 | const ConstCpuTensorHandle* m_ProjectionBias; |
Jan Eilers | 38e05bd | 2019-06-26 13:10:09 +0100 | [diff] [blame] | 423 | const ConstCpuTensorHandle* m_InputLayerNormWeights; |
| 424 | const ConstCpuTensorHandle* m_ForgetLayerNormWeights; |
| 425 | const ConstCpuTensorHandle* m_CellLayerNormWeights; |
| 426 | const ConstCpuTensorHandle* m_OutputLayerNormWeights; |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 427 | |
| 428 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 429 | }; |
| 430 | |
Narumol Prangnawarat | 7ddbbae | 2020-03-13 10:26:05 +0000 | [diff] [blame] | 431 | struct ConvertBf16ToFp32QueueDescriptor : QueueDescriptor |
| 432 | { |
| 433 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 434 | }; |
| 435 | |
Narumol Prangnawarat | ea54a01 | 2020-03-16 16:36:10 +0000 | [diff] [blame] | 436 | struct ConvertFp32ToBf16QueueDescriptor : QueueDescriptor |
| 437 | { |
| 438 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 439 | }; |
| 440 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 441 | struct ConvertFp16ToFp32QueueDescriptor : QueueDescriptor |
| 442 | { |
| 443 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 444 | }; |
| 445 | |
| 446 | struct ConvertFp32ToFp16QueueDescriptor : QueueDescriptor |
| 447 | { |
| 448 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 449 | }; |
| 450 | |
Éanna Ó Catháin | 4e1e136 | 2018-11-12 11:36:34 +0000 | [diff] [blame] | 451 | struct BatchToSpaceNdQueueDescriptor : QueueDescriptorWithParameters<BatchToSpaceNdDescriptor> |
| 452 | { |
| 453 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 454 | }; |
Conor Kennedy | 430b5d8 | 2018-11-14 15:28:28 +0000 | [diff] [blame] | 455 | |
| 456 | struct StridedSliceQueueDescriptor : QueueDescriptorWithParameters<StridedSliceDescriptor> |
| 457 | { |
| 458 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 459 | }; |
| 460 | |
Éanna Ó Catháin | 20e5880 | 2018-12-04 10:29:06 +0000 | [diff] [blame] | 461 | // Minimum layer workload data. |
kevmay01 | 9053969 | 2018-11-29 08:40:19 +0000 | [diff] [blame] | 462 | struct MinimumQueueDescriptor : QueueDescriptor |
| 463 | { |
| 464 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 465 | }; |
| 466 | |
Teresa Charlin | 2b030d9 | 2020-03-27 16:40:56 +0000 | [diff] [blame] | 467 | // Deprecated use ComparisonQueueDescriptor instead |
Matteo Martincigh | 59a950c | 2018-12-13 12:48:25 +0000 | [diff] [blame] | 468 | struct GreaterQueueDescriptor : QueueDescriptor |
| 469 | { |
| 470 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 471 | }; |
| 472 | |
Nattapat Chaimanowong | 964e955 | 2019-03-26 11:03:26 +0000 | [diff] [blame] | 473 | struct DebugQueueDescriptor : QueueDescriptor |
Nattapat Chaimanowong | a9a1cf1 | 2018-12-03 16:06:49 +0000 | [diff] [blame] | 474 | { |
janeil01 | 3fec1ea | 2019-11-07 09:47:20 +0000 | [diff] [blame] | 475 | DebugQueueDescriptor() : m_Guid(0) {} |
| 476 | |
Nattapat Chaimanowong | a9a1cf1 | 2018-12-03 16:06:49 +0000 | [diff] [blame] | 477 | void Validate(const WorkloadInfo& workloadInfo) const; |
Nattapat Chaimanowong | 964e955 | 2019-03-26 11:03:26 +0000 | [diff] [blame] | 478 | |
| 479 | LayerGuid m_Guid; |
| 480 | std::string m_LayerName; |
| 481 | unsigned int m_SlotIndex; |
Nattapat Chaimanowong | a9a1cf1 | 2018-12-03 16:06:49 +0000 | [diff] [blame] | 482 | }; |
| 483 | |
Mohamed Nour Abouelseoud | a1d3c6a | 2018-12-27 12:39:16 +0000 | [diff] [blame] | 484 | struct RsqrtQueueDescriptor : QueueDescriptor |
| 485 | { |
| 486 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 487 | }; |
| 488 | |
Teresa Charlin | 5266473 | 2020-06-29 16:27:03 +0100 | [diff] [blame] | 489 | struct GatherQueueDescriptor : QueueDescriptorWithParameters<GatherDescriptor> |
narpra01 | b89b05f | 2019-01-16 09:53:09 +0000 | [diff] [blame] | 490 | { |
| 491 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 492 | }; |
| 493 | |
Matteo Martincigh | 4912402 | 2019-01-11 13:25:59 +0000 | [diff] [blame] | 494 | struct PreCompiledQueueDescriptor : QueueDescriptorWithParameters<PreCompiledDescriptor> |
| 495 | { |
| 496 | PreCompiledQueueDescriptor() |
| 497 | : m_PreCompiledObject(nullptr) |
| 498 | { |
| 499 | } |
| 500 | |
Matteo Martincigh | 7997a35 | 2019-04-17 15:37:30 +0100 | [diff] [blame] | 501 | void* m_PreCompiledObject; |
Matteo Martincigh | 4912402 | 2019-01-11 13:25:59 +0000 | [diff] [blame] | 502 | |
| 503 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 504 | }; |
| 505 | |
Nattapat Chaimanowong | e4294fd | 2019-03-28 09:56:53 +0000 | [diff] [blame] | 506 | struct DequantizeQueueDescriptor : QueueDescriptor |
| 507 | { |
| 508 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 509 | }; |
| 510 | |
Nattapat Chaimanowong | 1f88630 | 2019-04-05 13:37:19 +0100 | [diff] [blame] | 511 | struct MergeQueueDescriptor : QueueDescriptor |
| 512 | { |
| 513 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 514 | }; |
| 515 | |
Sadik Armagan | eff363d | 2019-04-05 15:25:46 +0100 | [diff] [blame] | 516 | struct SwitchQueueDescriptor : QueueDescriptor |
| 517 | { |
| 518 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 519 | }; |
| 520 | |
Matteo Martincigh | 0e406ee | 2019-06-12 15:42:18 +0100 | [diff] [blame] | 521 | struct PreluQueueDescriptor : QueueDescriptor |
| 522 | { |
| 523 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 524 | }; |
| 525 | |
Aron Virginas-Tar | 639fb04 | 2019-06-20 14:28:19 +0100 | [diff] [blame] | 526 | struct TransposeConvolution2dQueueDescriptor : QueueDescriptorWithParameters<TransposeConvolution2dDescriptor> |
| 527 | { |
| 528 | TransposeConvolution2dQueueDescriptor() : |
| 529 | m_Weight(nullptr), |
| 530 | m_Bias(nullptr) |
| 531 | {} |
| 532 | |
| 533 | const ConstCpuTensorHandle* m_Weight; |
| 534 | const ConstCpuTensorHandle* m_Bias; |
| 535 | |
| 536 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 537 | }; |
| 538 | |
Mike Kelly | c9ea45a | 2020-02-28 18:11:58 +0000 | [diff] [blame] | 539 | struct TransposeQueueDescriptor : QueueDescriptorWithParameters<TransposeDescriptor> |
| 540 | { |
| 541 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 542 | }; |
| 543 | |
James Conroy | 586a9aa | 2020-03-20 08:49:33 +0000 | [diff] [blame] | 544 | struct QLstmQueueDescriptor : QueueDescriptorWithParameters<QLstmDescriptor> |
| 545 | { |
| 546 | QLstmQueueDescriptor() |
| 547 | : m_InputToInputWeights(nullptr) |
| 548 | , m_InputToForgetWeights(nullptr) |
| 549 | , m_InputToCellWeights(nullptr) |
| 550 | , m_InputToOutputWeights(nullptr) |
| 551 | , m_RecurrentToInputWeights(nullptr) |
| 552 | , m_RecurrentToForgetWeights(nullptr) |
| 553 | , m_RecurrentToCellWeights(nullptr) |
| 554 | , m_RecurrentToOutputWeights(nullptr) |
| 555 | , m_CellToInputWeights(nullptr) |
| 556 | , m_CellToForgetWeights(nullptr) |
| 557 | , m_CellToOutputWeights(nullptr) |
| 558 | , m_InputGateBias(nullptr) |
| 559 | , m_ForgetGateBias(nullptr) |
| 560 | , m_CellBias(nullptr) |
| 561 | , m_OutputGateBias(nullptr) |
| 562 | , m_ProjectionWeights(nullptr) |
| 563 | , m_ProjectionBias(nullptr) |
| 564 | , m_InputLayerNormWeights(nullptr) |
| 565 | , m_ForgetLayerNormWeights(nullptr) |
| 566 | , m_CellLayerNormWeights(nullptr) |
| 567 | , m_OutputLayerNormWeights(nullptr) |
| 568 | { |
| 569 | } |
| 570 | |
| 571 | const ConstCpuTensorHandle* m_InputToInputWeights; |
| 572 | const ConstCpuTensorHandle* m_InputToForgetWeights; |
| 573 | const ConstCpuTensorHandle* m_InputToCellWeights; |
| 574 | const ConstCpuTensorHandle* m_InputToOutputWeights; |
| 575 | const ConstCpuTensorHandle* m_RecurrentToInputWeights; |
| 576 | const ConstCpuTensorHandle* m_RecurrentToForgetWeights; |
| 577 | const ConstCpuTensorHandle* m_RecurrentToCellWeights; |
| 578 | const ConstCpuTensorHandle* m_RecurrentToOutputWeights; |
| 579 | const ConstCpuTensorHandle* m_CellToInputWeights; |
| 580 | const ConstCpuTensorHandle* m_CellToForgetWeights; |
| 581 | const ConstCpuTensorHandle* m_CellToOutputWeights; |
| 582 | const ConstCpuTensorHandle* m_InputGateBias; |
| 583 | const ConstCpuTensorHandle* m_ForgetGateBias; |
| 584 | const ConstCpuTensorHandle* m_CellBias; |
| 585 | const ConstCpuTensorHandle* m_OutputGateBias; |
| 586 | const ConstCpuTensorHandle* m_ProjectionWeights; |
| 587 | const ConstCpuTensorHandle* m_ProjectionBias; |
| 588 | const ConstCpuTensorHandle* m_InputLayerNormWeights; |
| 589 | const ConstCpuTensorHandle* m_ForgetLayerNormWeights; |
| 590 | const ConstCpuTensorHandle* m_CellLayerNormWeights; |
| 591 | const ConstCpuTensorHandle* m_OutputLayerNormWeights; |
| 592 | |
| 593 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 594 | }; |
| 595 | |
James Conroy | ee18dc8 | 2019-07-17 11:27:46 +0100 | [diff] [blame] | 596 | struct QuantizedLstmQueueDescriptor : QueueDescriptor |
| 597 | { |
| 598 | QuantizedLstmQueueDescriptor() |
| 599 | : m_InputToInputWeights(nullptr) |
| 600 | , m_InputToForgetWeights(nullptr) |
| 601 | , m_InputToCellWeights(nullptr) |
| 602 | , m_InputToOutputWeights(nullptr) |
| 603 | |
| 604 | , m_RecurrentToInputWeights(nullptr) |
| 605 | , m_RecurrentToForgetWeights(nullptr) |
| 606 | , m_RecurrentToCellWeights(nullptr) |
| 607 | , m_RecurrentToOutputWeights(nullptr) |
| 608 | |
| 609 | , m_InputGateBias(nullptr) |
| 610 | , m_ForgetGateBias(nullptr) |
| 611 | , m_CellBias(nullptr) |
| 612 | , m_OutputGateBias(nullptr) |
| 613 | {} |
| 614 | |
| 615 | const ConstCpuTensorHandle* m_InputToInputWeights; |
| 616 | const ConstCpuTensorHandle* m_InputToForgetWeights; |
| 617 | const ConstCpuTensorHandle* m_InputToCellWeights; |
| 618 | const ConstCpuTensorHandle* m_InputToOutputWeights; |
| 619 | |
| 620 | const ConstCpuTensorHandle* m_RecurrentToInputWeights; |
| 621 | const ConstCpuTensorHandle* m_RecurrentToForgetWeights; |
| 622 | const ConstCpuTensorHandle* m_RecurrentToCellWeights; |
| 623 | const ConstCpuTensorHandle* m_RecurrentToOutputWeights; |
| 624 | |
| 625 | const ConstCpuTensorHandle* m_InputGateBias; |
| 626 | const ConstCpuTensorHandle* m_ForgetGateBias; |
| 627 | const ConstCpuTensorHandle* m_CellBias; |
| 628 | const ConstCpuTensorHandle* m_OutputGateBias; |
| 629 | |
| 630 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 631 | }; |
| 632 | |
Kevin May | 868eb14 | 2019-09-04 17:29:31 +0100 | [diff] [blame] | 633 | struct AbsQueueDescriptor : QueueDescriptor |
| 634 | { |
| 635 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 636 | }; |
| 637 | |
Aron Virginas-Tar | 636ab40 | 2019-09-16 14:27:45 +0100 | [diff] [blame] | 638 | struct SliceQueueDescriptor : QueueDescriptorWithParameters<SliceDescriptor> |
| 639 | { |
| 640 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 641 | }; |
| 642 | |
Aron Virginas-Tar | dd6247f | 2019-09-19 14:31:17 +0100 | [diff] [blame] | 643 | struct DepthToSpaceQueueDescriptor : QueueDescriptorWithParameters<DepthToSpaceDescriptor> |
| 644 | { |
| 645 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 646 | }; |
| 647 | |
Aron Virginas-Tar | 77bfb5e | 2019-10-16 17:45:38 +0100 | [diff] [blame] | 648 | struct ComparisonQueueDescriptor : QueueDescriptorWithParameters<ComparisonDescriptor> |
| 649 | { |
| 650 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 651 | }; |
| 652 | |
josh minor | 4a3c610 | 2020-01-06 16:40:46 -0600 | [diff] [blame] | 653 | struct ElementwiseUnaryQueueDescriptor : QueueDescriptorWithParameters<ElementwiseUnaryDescriptor> |
| 654 | { |
| 655 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 656 | }; |
| 657 | |
Aron Virginas-Tar | 636ab40 | 2019-09-16 14:27:45 +0100 | [diff] [blame] | 658 | } // namespace armnn |