Kevin May | 8ab2d7a | 2021-05-07 09:32:51 +0100 | [diff] [blame] | 1 | // |
Teresa Charlin | ad1b3d7 | 2023-03-14 12:10:28 +0000 | [diff] [blame] | 2 | // Copyright © 2021,2023 Arm Ltd and Contributors. All rights reserved. |
Kevin May | 8ab2d7a | 2021-05-07 09:32:51 +0100 | [diff] [blame] | 3 | // SPDX-License-Identifier: MIT |
| 4 | // |
| 5 | |
| 6 | #include "UnpackTestHelper.hpp" |
| 7 | |
| 8 | #include <armnn_delegate.hpp> |
| 9 | |
| 10 | #include <flatbuffers/flatbuffers.h> |
Kevin May | 8ab2d7a | 2021-05-07 09:32:51 +0100 | [diff] [blame] | 11 | |
| 12 | #include <doctest/doctest.h> |
| 13 | |
| 14 | namespace armnnDelegate |
| 15 | { |
| 16 | |
| 17 | template <typename T> |
| 18 | void UnpackAxis0Num4Test(tflite::TensorType tensorType, std::vector<armnn::BackendId>& backends) |
| 19 | { |
| 20 | std::vector<int32_t> inputShape { 4, 1, 6 }; |
| 21 | std::vector<int32_t> expectedOutputShape { 1, 6 }; |
| 22 | |
| 23 | std::vector<T> inputValues { 1, 2, 3, 4, 5, 6, |
| 24 | 7, 8, 9, 10, 11, 12, |
| 25 | 13, 14, 15, 16, 17, 18, |
| 26 | 19, 20, 21, 22, 23, 24 }; |
| 27 | |
| 28 | std::vector<T> expectedOutputValues0 { 1, 2, 3, 4, 5, 6 }; |
| 29 | std::vector<T> expectedOutputValues1 { 7, 8, 9, 10, 11, 12 }; |
| 30 | std::vector<T> expectedOutputValues2 { 13, 14, 15, 16, 17, 18 }; |
| 31 | std::vector<T> expectedOutputValues3 { 19, 20, 21, 22, 23, 24 }; |
| 32 | |
| 33 | std::vector<std::vector<T>> expectedOutputValues{ expectedOutputValues0, |
| 34 | expectedOutputValues1, |
| 35 | expectedOutputValues2, |
| 36 | expectedOutputValues3 }; |
| 37 | |
| 38 | UnpackTest<T>(tflite::BuiltinOperator_UNPACK, |
| 39 | tensorType, |
| 40 | backends, |
| 41 | inputShape, |
| 42 | expectedOutputShape, |
| 43 | inputValues, |
| 44 | expectedOutputValues, |
| 45 | 0); |
| 46 | } |
| 47 | |
| 48 | template <typename T> |
| 49 | void UnpackAxis2Num6Test(tflite::TensorType tensorType, std::vector<armnn::BackendId>& backends) |
| 50 | { |
| 51 | std::vector<int32_t> inputShape { 4, 1, 6 }; |
| 52 | std::vector<int32_t> expectedOutputShape { 4, 1 }; |
| 53 | |
| 54 | std::vector<T> inputValues { 1, 2, 3, 4, 5, 6, |
| 55 | 7, 8, 9, 10, 11, 12, |
| 56 | 13, 14, 15, 16, 17, 18, |
| 57 | 19, 20, 21, 22, 23, 24 }; |
| 58 | |
| 59 | std::vector<T> expectedOutputValues0 { 1, 7, 13, 19 }; |
| 60 | std::vector<T> expectedOutputValues1 { 2, 8, 14, 20 }; |
| 61 | std::vector<T> expectedOutputValues2 { 3, 9, 15, 21 }; |
| 62 | std::vector<T> expectedOutputValues3 { 4, 10, 16, 22 }; |
| 63 | std::vector<T> expectedOutputValues4 { 5, 11, 17, 23 }; |
| 64 | std::vector<T> expectedOutputValues5 { 6, 12, 18, 24 }; |
| 65 | |
| 66 | std::vector<std::vector<T>> expectedOutputValues{ expectedOutputValues0, |
| 67 | expectedOutputValues1, |
| 68 | expectedOutputValues2, |
| 69 | expectedOutputValues3, |
| 70 | expectedOutputValues4, |
| 71 | expectedOutputValues5 }; |
| 72 | |
| 73 | UnpackTest<T>(tflite::BuiltinOperator_UNPACK, |
| 74 | tensorType, |
| 75 | backends, |
| 76 | inputShape, |
| 77 | expectedOutputShape, |
| 78 | inputValues, |
| 79 | expectedOutputValues, |
| 80 | 2); |
| 81 | } |
| 82 | |
| 83 | TEST_SUITE("Unpack_CpuRefTests") |
| 84 | { |
| 85 | |
| 86 | // Fp32 |
| 87 | TEST_CASE ("Unpack_Fp32_Axis0_Num4_CpuRef_Test") |
| 88 | { |
| 89 | std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef}; |
| 90 | UnpackAxis0Num4Test<float>(tflite::TensorType_FLOAT32, backends); |
| 91 | } |
| 92 | |
| 93 | TEST_CASE ("Unpack_Fp32_Axis2_Num6_CpuRef_Test") |
| 94 | { |
| 95 | std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef}; |
| 96 | UnpackAxis2Num6Test<float>(tflite::TensorType_FLOAT32, backends); |
| 97 | } |
| 98 | |
| 99 | // Uint8 |
| 100 | TEST_CASE ("Unpack_Uint8_Axis0_Num4_CpuRef_Test") |
| 101 | { |
| 102 | std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef}; |
| 103 | UnpackAxis0Num4Test<uint8_t>(tflite::TensorType_UINT8, backends); |
| 104 | } |
| 105 | |
| 106 | TEST_CASE ("Unpack_Uint8_Axis2_Num6_CpuRef_Test") |
| 107 | { |
| 108 | std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef}; |
| 109 | UnpackAxis2Num6Test<uint8_t>(tflite::TensorType_UINT8, backends); |
| 110 | } |
| 111 | |
| 112 | } // End of Unpack_CpuRefTests |
| 113 | |
| 114 | TEST_SUITE("Unpack_CpuAccTests") |
| 115 | { |
| 116 | |
| 117 | // Fp32 |
| 118 | TEST_CASE ("Unpack_Fp32_Axis0_Num4_CpuAcc_Test") |
| 119 | { |
| 120 | std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc}; |
| 121 | UnpackAxis0Num4Test<float>(tflite::TensorType_FLOAT32, backends); |
| 122 | } |
| 123 | |
Kevin May | 4cad860 | 2021-05-18 09:57:43 +0100 | [diff] [blame] | 124 | TEST_CASE ("Unpack_Fp32_Axis2_Num6_CpuAcc_Test") |
| 125 | { |
| 126 | std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc}; |
| 127 | UnpackAxis2Num6Test<float>(tflite::TensorType_FLOAT32, backends); |
| 128 | } |
| 129 | |
Kevin May | 8ab2d7a | 2021-05-07 09:32:51 +0100 | [diff] [blame] | 130 | // Uint8 |
| 131 | TEST_CASE ("Unpack_Uint8_Axis0_Num4_CpuAcc_Test") |
| 132 | { |
| 133 | std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc}; |
| 134 | UnpackAxis0Num4Test<uint8_t>(tflite::TensorType_UINT8, backends); |
| 135 | } |
| 136 | |
Kevin May | 4cad860 | 2021-05-18 09:57:43 +0100 | [diff] [blame] | 137 | TEST_CASE ("Unpack_Uint8_Axis2_Num6_CpuAcc_Test") |
| 138 | { |
| 139 | std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc}; |
| 140 | UnpackAxis2Num6Test<uint8_t>(tflite::TensorType_UINT8, backends); |
| 141 | } |
| 142 | |
Kevin May | 8ab2d7a | 2021-05-07 09:32:51 +0100 | [diff] [blame] | 143 | } // End of Unpack_CpuAccTests |
| 144 | |
| 145 | TEST_SUITE("Unpack_GpuAccTests") |
| 146 | { |
| 147 | |
| 148 | // Fp32 |
| 149 | TEST_CASE ("Unpack_Fp32_Axis0_Num4_GpuAcc_Test") |
| 150 | { |
| 151 | std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc}; |
| 152 | UnpackAxis0Num4Test<float>(tflite::TensorType_FLOAT32, backends); |
| 153 | } |
| 154 | |
Kevin May | 4cad860 | 2021-05-18 09:57:43 +0100 | [diff] [blame] | 155 | TEST_CASE ("Unpack_Fp32_Axis2_Num6_GpuAcc_Test") |
| 156 | { |
| 157 | std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc}; |
| 158 | UnpackAxis2Num6Test<float>(tflite::TensorType_FLOAT32, backends); |
| 159 | } |
| 160 | |
Kevin May | 8ab2d7a | 2021-05-07 09:32:51 +0100 | [diff] [blame] | 161 | // Uint8 |
| 162 | TEST_CASE ("Unpack_Uint8_Axis0_Num4_GpuAcc_Test") |
| 163 | { |
| 164 | std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc}; |
| 165 | UnpackAxis0Num4Test<uint8_t>(tflite::TensorType_UINT8, backends); |
| 166 | } |
| 167 | |
Kevin May | 4cad860 | 2021-05-18 09:57:43 +0100 | [diff] [blame] | 168 | TEST_CASE ("Unpack_Uint8_Axis2_Num6_GpuAcc_Test") |
| 169 | { |
| 170 | std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc}; |
| 171 | UnpackAxis2Num6Test<uint8_t>(tflite::TensorType_UINT8, backends); |
| 172 | } |
| 173 | |
Kevin May | 8ab2d7a | 2021-05-07 09:32:51 +0100 | [diff] [blame] | 174 | } // End of Unpack_GpuAccTests |
| 175 | |
| 176 | // End of Unpack Test Suite |
| 177 | |
| 178 | } // namespace armnnDelegate |