blob: df82abb02e4f2d4c3b855c6862837799d854b1b4 [file] [log] [blame]
Francis Murtagh9270d9e2022-08-12 13:54:17 +01001//
2// Copyright © 2022 Arm Ltd and Contributors. All rights reserved.
3// SPDX-License-Identifier: MIT
4//
5
6#pragma once
7
8#include <armnn/backends/Workload.hpp>
9
10namespace armnn
11{
12
13template <typename QueueDescriptor>
14class TosaRefBaseWorkload : public BaseWorkload<QueueDescriptor>
15{
16public:
17 TosaRefBaseWorkload(const QueueDescriptor& descriptor, const WorkloadInfo& info)
18 : BaseWorkload<QueueDescriptor>(descriptor, info)
19 {}
20
21 virtual bool SupportsTensorHandleReplacement() const override
22 {
23 return true;
24 }
25
26 // Replace input tensor handle with the given TensorHandle
27 void ReplaceInputTensorHandle(ITensorHandle* tensorHandle, unsigned int slot) override
28 {
29 this->m_Data.m_Inputs[slot] = tensorHandle;
30 }
31
32 // Replace output tensor handle with the given TensorHandle
33 void ReplaceOutputTensorHandle(ITensorHandle* tensorHandle, unsigned int slot) override
34 {
35 this->m_Data.m_Outputs[slot] = tensorHandle;
36 }
37};
38
39} //namespace armnn