telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2017 Arm Ltd. All rights reserved. |
David Beck | ecb56cd | 2018-09-05 12:52:57 +0100 | [diff] [blame] | 3 | // SPDX-License-Identifier: MIT |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 4 | // |
| 5 | #pragma once |
| 6 | |
Aron Virginas-Tar | c9cc804 | 2018-11-01 16:15:57 +0000 | [diff] [blame] | 7 | #include "CpuTensorHandleFwd.hpp" |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 8 | #include "WorkloadDataFwd.hpp" |
| 9 | |
Aron Virginas-Tar | c9cc804 | 2018-11-01 16:15:57 +0000 | [diff] [blame] | 10 | #include <InternalTypes.hpp> |
| 11 | |
Jim Flynn | e242f2d | 2019-05-22 14:24:13 +0100 | [diff] [blame] | 12 | #include <armnn/Deprecated.hpp> |
David Beck | 0dbe0ee | 2018-09-24 15:59:27 +0100 | [diff] [blame] | 13 | #include <armnn/Descriptors.hpp> |
| 14 | #include <armnn/Exceptions.hpp> |
Aron Virginas-Tar | c9cc804 | 2018-11-01 16:15:57 +0000 | [diff] [blame] | 15 | #include <armnn/Types.hpp> |
| 16 | #include <armnn/Tensor.hpp> |
David Beck | 0dbe0ee | 2018-09-24 15:59:27 +0100 | [diff] [blame] | 17 | |
Aron Virginas-Tar | c9cc804 | 2018-11-01 16:15:57 +0000 | [diff] [blame] | 18 | #include <backendsCommon/OutputHandler.hpp> |
| 19 | #include <backendsCommon/WorkloadInfo.hpp> |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 20 | |
| 21 | namespace armnn |
| 22 | { |
| 23 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 24 | //A helper function that returns the bias data type required for given input data type. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 25 | DataType GetBiasDataType(DataType inputDataType); |
| 26 | |
| 27 | struct WorkloadInfo; |
| 28 | |
| 29 | struct QueueDescriptor |
| 30 | { |
| 31 | std::vector<ITensorHandle*> m_Inputs; |
| 32 | std::vector<ITensorHandle*> m_Outputs; |
| 33 | |
| 34 | void ValidateInputsOutputs(const std::string& descName, |
| 35 | unsigned int numExpectedIn, unsigned int numExpectedOut) const; |
| 36 | |
| 37 | |
| 38 | protected: |
| 39 | ~QueueDescriptor() = default; |
| 40 | QueueDescriptor() = default; |
| 41 | QueueDescriptor(QueueDescriptor const&) = default; |
| 42 | QueueDescriptor& operator=(QueueDescriptor const&) = default; |
| 43 | }; |
| 44 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 45 | // Base class for queue descriptors which contain parameters. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 46 | template <typename LayerDescriptor> |
| 47 | struct QueueDescriptorWithParameters : public QueueDescriptor |
| 48 | { |
| 49 | LayerDescriptor m_Parameters; |
| 50 | |
| 51 | protected: |
| 52 | ~QueueDescriptorWithParameters() = default; |
| 53 | QueueDescriptorWithParameters() = default; |
| 54 | QueueDescriptorWithParameters(QueueDescriptorWithParameters const&) = default; |
| 55 | QueueDescriptorWithParameters& operator=(QueueDescriptorWithParameters const&) = default; |
| 56 | }; |
| 57 | |
| 58 | struct MemCopyQueueDescriptor : QueueDescriptor |
| 59 | { |
| 60 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 61 | }; |
| 62 | |
| 63 | using InputQueueDescriptor = MemCopyQueueDescriptor; |
| 64 | using OutputQueueDescriptor = MemCopyQueueDescriptor; |
| 65 | |
Derek Lamberti | f674aa0 | 2019-08-01 15:56:25 +0100 | [diff] [blame] | 66 | struct MemImportQueueDescriptor : QueueDescriptor |
| 67 | { |
| 68 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 69 | }; |
| 70 | |
| 71 | struct MemSyncQueueDescriptor : QueueDescriptor |
| 72 | { |
| 73 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 74 | }; |
| 75 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 76 | // Softmax layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 77 | struct SoftmaxQueueDescriptor : QueueDescriptorWithParameters<SoftmaxDescriptor> |
| 78 | { |
| 79 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 80 | }; |
| 81 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 82 | // Splitter layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 83 | struct SplitterQueueDescriptor : QueueDescriptorWithParameters<ViewsDescriptor> |
| 84 | { |
| 85 | struct ViewOrigin |
| 86 | { |
| 87 | ViewOrigin() {} |
| 88 | ViewOrigin(std::vector<unsigned int> const& origin) : m_Origin(origin) {} |
| 89 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 90 | //View origin (size of the vector is the same as number of dimensions of the view). |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 91 | std::vector<unsigned int> m_Origin; |
| 92 | }; |
| 93 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 94 | //View defines a tensor that will be carved from the input tensor. |
| 95 | //View origins are stored here, the extents are defined by sizes of the output tensors. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 96 | std::vector<ViewOrigin> m_ViewOrigins; |
| 97 | |
| 98 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 99 | }; |
| 100 | |
Jim Flynn | e242f2d | 2019-05-22 14:24:13 +0100 | [diff] [blame] | 101 | // Concat layer workload data. |
| 102 | struct ConcatQueueDescriptor : QueueDescriptorWithParameters<OriginsDescriptor> |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 103 | { |
| 104 | struct ViewOrigin |
| 105 | { |
| 106 | ViewOrigin() {} |
| 107 | ViewOrigin(const std::vector<unsigned int>& origin) : m_Origin(origin) {} |
| 108 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 109 | //View origin (size of the vector is the same as number of dimensions of the view). |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 110 | std::vector<unsigned int> m_Origin; |
| 111 | }; |
| 112 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 113 | //View defines a sub-area of the output tensor that will be filled with the corresponding input tensor. |
| 114 | //View origins are stored here, the extents are defined by sizes of the input tensors. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 115 | std::vector<ViewOrigin> m_ViewOrigins; |
| 116 | |
| 117 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 118 | }; |
| 119 | |
Jim Flynn | e242f2d | 2019-05-22 14:24:13 +0100 | [diff] [blame] | 120 | // Deprecated. Use ConcatQueueDescriptor instead |
| 121 | using MergerQueueDescriptor = ConcatQueueDescriptor; |
| 122 | |
Matthew Jackson | 2b8c1da | 2019-07-04 14:59:16 +0100 | [diff] [blame] | 123 | // Stack layer workload data. |
| 124 | struct StackQueueDescriptor : QueueDescriptorWithParameters<StackDescriptor> |
| 125 | { |
| 126 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 127 | }; |
| 128 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 129 | // Activation layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 130 | struct ActivationQueueDescriptor : QueueDescriptorWithParameters<ActivationDescriptor> |
| 131 | { |
| 132 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 133 | }; |
| 134 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 135 | // Fully connected layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 136 | struct FullyConnectedQueueDescriptor : QueueDescriptorWithParameters<FullyConnectedDescriptor> |
| 137 | { |
| 138 | FullyConnectedQueueDescriptor() |
| 139 | : m_Weight(nullptr) |
| 140 | , m_Bias(nullptr) |
| 141 | { |
| 142 | } |
| 143 | |
| 144 | const ConstCpuTensorHandle* m_Weight; |
| 145 | const ConstCpuTensorHandle* m_Bias; |
| 146 | |
| 147 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 148 | }; |
| 149 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 150 | // Permute layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 151 | struct PermuteQueueDescriptor : QueueDescriptorWithParameters<PermuteDescriptor> |
| 152 | { |
| 153 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 154 | }; |
| 155 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 156 | // Pooling 2D layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 157 | struct Pooling2dQueueDescriptor : QueueDescriptorWithParameters<Pooling2dDescriptor> |
| 158 | { |
| 159 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 160 | }; |
| 161 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 162 | // Convolution 2D layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 163 | struct Convolution2dQueueDescriptor : QueueDescriptorWithParameters<Convolution2dDescriptor> |
| 164 | { |
| 165 | Convolution2dQueueDescriptor() |
| 166 | : m_Weight(nullptr) |
| 167 | , m_Bias(nullptr) |
| 168 | { |
| 169 | } |
| 170 | |
| 171 | const ConstCpuTensorHandle* m_Weight; |
| 172 | const ConstCpuTensorHandle* m_Bias; |
| 173 | |
| 174 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 175 | }; |
| 176 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 177 | // Depthwise Convolution 2D layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 178 | struct DepthwiseConvolution2dQueueDescriptor : QueueDescriptorWithParameters<DepthwiseConvolution2dDescriptor> |
| 179 | { |
| 180 | DepthwiseConvolution2dQueueDescriptor() |
| 181 | : m_Weight(nullptr) |
| 182 | , m_Bias(nullptr) |
| 183 | { |
| 184 | } |
| 185 | |
| 186 | const ConstCpuTensorHandle* m_Weight; |
| 187 | const ConstCpuTensorHandle* m_Bias; |
| 188 | |
| 189 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 190 | }; |
| 191 | |
Narumol Prangnawarat | 94dd5d8 | 2019-01-23 18:06:26 +0000 | [diff] [blame] | 192 | struct DetectionPostProcessQueueDescriptor : QueueDescriptorWithParameters<DetectionPostProcessDescriptor> |
| 193 | { |
Narumol Prangnawarat | bc67cef | 2019-01-31 15:31:54 +0000 | [diff] [blame] | 194 | DetectionPostProcessQueueDescriptor() |
| 195 | : m_Anchors(nullptr) |
| 196 | { |
| 197 | } |
| 198 | |
| 199 | const ConstCpuTensorHandle* m_Anchors; |
| 200 | |
Narumol Prangnawarat | 94dd5d8 | 2019-01-23 18:06:26 +0000 | [diff] [blame] | 201 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 202 | }; |
| 203 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 204 | // Normalization layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 205 | struct NormalizationQueueDescriptor : QueueDescriptorWithParameters<NormalizationDescriptor> |
| 206 | { |
| 207 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 208 | }; |
| 209 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 210 | // Add layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 211 | struct AdditionQueueDescriptor : QueueDescriptor |
| 212 | { |
| 213 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 214 | }; |
| 215 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 216 | // Multiplication layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 217 | struct MultiplicationQueueDescriptor : QueueDescriptor |
| 218 | { |
| 219 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 220 | }; |
| 221 | |
Francis Murtagh | e7a86a4 | 2018-08-29 12:42:10 +0100 | [diff] [blame] | 222 | // Division layer workload data. |
| 223 | struct DivisionQueueDescriptor : QueueDescriptor |
| 224 | { |
| 225 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 226 | }; |
| 227 | |
David Beck | c2044fe | 2018-09-05 15:00:38 +0100 | [diff] [blame] | 228 | // Subtraction layer workload data. |
| 229 | struct SubtractionQueueDescriptor : QueueDescriptor |
| 230 | { |
| 231 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 232 | }; |
| 233 | |
Nattapat Chaimanowong | 5a4304a | 2018-11-28 10:44:37 +0000 | [diff] [blame] | 234 | // Maximum layer workload data. |
| 235 | struct MaximumQueueDescriptor : QueueDescriptor |
| 236 | { |
| 237 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 238 | }; |
| 239 | |
narpra01 | a6bf912 | 2018-09-10 09:50:09 +0100 | [diff] [blame] | 240 | // Mean layer workload data. |
narpra01 | 32b9046 | 2018-09-13 11:07:48 +0100 | [diff] [blame] | 241 | struct MeanQueueDescriptor : QueueDescriptorWithParameters<MeanDescriptor> |
narpra01 | a6bf912 | 2018-09-10 09:50:09 +0100 | [diff] [blame] | 242 | { |
| 243 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 244 | }; |
| 245 | |
jimfly01 | 2c9322a | 2018-09-19 10:59:49 +0100 | [diff] [blame] | 246 | // Pad layer workload data |
| 247 | struct PadQueueDescriptor : QueueDescriptorWithParameters<PadDescriptor> |
| 248 | { |
| 249 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 250 | }; |
| 251 | |
Derek Lamberti | a9cca6a | 2019-03-25 15:41:58 +0000 | [diff] [blame] | 252 | struct QuantizeQueueDescriptor : QueueDescriptor |
| 253 | { |
| 254 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 255 | }; |
| 256 | |
FrancisMurtagh | 2099595 | 2018-12-17 12:11:36 +0000 | [diff] [blame] | 257 | // Equal layer workload data |
| 258 | struct EqualQueueDescriptor : QueueDescriptor |
| 259 | { |
| 260 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 261 | }; |
| 262 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 263 | // Batch norm layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 264 | struct BatchNormalizationQueueDescriptor : QueueDescriptorWithParameters<BatchNormalizationDescriptor> |
| 265 | { |
| 266 | BatchNormalizationQueueDescriptor() |
| 267 | : m_Mean(nullptr) |
| 268 | , m_Variance(nullptr) |
| 269 | , m_Beta(nullptr) |
| 270 | , m_Gamma(nullptr) |
| 271 | { |
| 272 | } |
| 273 | |
| 274 | const ConstCpuTensorHandle* m_Mean; |
| 275 | const ConstCpuTensorHandle* m_Variance; |
| 276 | const ConstCpuTensorHandle* m_Beta; |
| 277 | const ConstCpuTensorHandle* m_Gamma; |
| 278 | |
| 279 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 280 | }; |
| 281 | |
| 282 | struct ResizeBilinearQueueDescriptor : QueueDescriptorWithParameters<ResizeBilinearDescriptor> |
| 283 | { |
| 284 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 285 | }; |
| 286 | |
Teresa Charlin | a9075df | 2019-06-27 15:41:57 +0100 | [diff] [blame] | 287 | struct ResizeQueueDescriptor : QueueDescriptorWithParameters<ResizeDescriptor> |
| 288 | { |
| 289 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 290 | }; |
| 291 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 292 | struct FakeQuantizationQueueDescriptor : QueueDescriptorWithParameters<FakeQuantizationDescriptor> |
| 293 | { |
| 294 | FakeQuantizationQueueDescriptor() |
| 295 | : m_Min(nullptr) |
| 296 | , m_Max(nullptr) |
| 297 | { |
| 298 | } |
| 299 | |
| 300 | const ConstCpuTensorHandle* m_Min; |
| 301 | const ConstCpuTensorHandle* m_Max; |
| 302 | |
| 303 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 304 | }; |
| 305 | |
Matteo Martincigh | bcd3c85 | 2018-09-28 14:14:12 +0100 | [diff] [blame] | 306 | struct L2NormalizationQueueDescriptor : QueueDescriptorWithParameters<L2NormalizationDescriptor> |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 307 | { |
| 308 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 309 | }; |
| 310 | |
| 311 | struct ConstantQueueDescriptor : QueueDescriptor |
| 312 | { |
| 313 | ConstantQueueDescriptor() |
| 314 | : m_LayerOutput(nullptr) |
| 315 | { |
| 316 | } |
| 317 | |
| 318 | const ConstCpuTensorHandle* m_LayerOutput; |
| 319 | |
| 320 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 321 | }; |
| 322 | |
| 323 | struct ReshapeQueueDescriptor : QueueDescriptorWithParameters<ReshapeDescriptor> |
| 324 | { |
| 325 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 326 | }; |
| 327 | |
Nattapat Chaimanowong | 207ef9a | 2018-11-02 10:57:25 +0000 | [diff] [blame] | 328 | struct SpaceToBatchNdQueueDescriptor : QueueDescriptorWithParameters<SpaceToBatchNdDescriptor> |
| 329 | { |
| 330 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 331 | }; |
| 332 | |
Aron Virginas-Tar | 972af15 | 2019-06-11 14:14:03 +0100 | [diff] [blame] | 333 | struct SpaceToDepthQueueDescriptor : QueueDescriptorWithParameters<SpaceToDepthDescriptor> |
| 334 | { |
| 335 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 336 | }; |
| 337 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 338 | struct FloorQueueDescriptor : QueueDescriptor |
| 339 | { |
| 340 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 341 | }; |
| 342 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 343 | struct LstmQueueDescriptor : QueueDescriptorWithParameters<LstmDescriptor> |
| 344 | { |
| 345 | LstmQueueDescriptor() |
| 346 | : m_InputToInputWeights(nullptr) |
| 347 | , m_InputToForgetWeights(nullptr) |
| 348 | , m_InputToCellWeights(nullptr) |
| 349 | , m_InputToOutputWeights(nullptr) |
| 350 | , m_RecurrentToInputWeights(nullptr) |
| 351 | , m_RecurrentToForgetWeights(nullptr) |
| 352 | , m_RecurrentToCellWeights(nullptr) |
| 353 | , m_RecurrentToOutputWeights(nullptr) |
| 354 | , m_CellToInputWeights(nullptr) |
| 355 | , m_CellToForgetWeights(nullptr) |
| 356 | , m_CellToOutputWeights(nullptr) |
| 357 | , m_InputGateBias(nullptr) |
| 358 | , m_ForgetGateBias(nullptr) |
| 359 | , m_CellBias(nullptr) |
| 360 | , m_OutputGateBias(nullptr) |
| 361 | , m_ProjectionWeights(nullptr) |
| 362 | , m_ProjectionBias(nullptr) |
Jan Eilers | 38e05bd | 2019-06-26 13:10:09 +0100 | [diff] [blame] | 363 | , m_InputLayerNormWeights(nullptr) |
| 364 | , m_ForgetLayerNormWeights(nullptr) |
| 365 | , m_CellLayerNormWeights(nullptr) |
| 366 | , m_OutputLayerNormWeights(nullptr) |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 367 | { |
| 368 | } |
| 369 | |
| 370 | const ConstCpuTensorHandle* m_InputToInputWeights; |
| 371 | const ConstCpuTensorHandle* m_InputToForgetWeights; |
| 372 | const ConstCpuTensorHandle* m_InputToCellWeights; |
| 373 | const ConstCpuTensorHandle* m_InputToOutputWeights; |
| 374 | const ConstCpuTensorHandle* m_RecurrentToInputWeights; |
| 375 | const ConstCpuTensorHandle* m_RecurrentToForgetWeights; |
| 376 | const ConstCpuTensorHandle* m_RecurrentToCellWeights; |
| 377 | const ConstCpuTensorHandle* m_RecurrentToOutputWeights; |
| 378 | const ConstCpuTensorHandle* m_CellToInputWeights; |
| 379 | const ConstCpuTensorHandle* m_CellToForgetWeights; |
| 380 | const ConstCpuTensorHandle* m_CellToOutputWeights; |
| 381 | const ConstCpuTensorHandle* m_InputGateBias; |
| 382 | const ConstCpuTensorHandle* m_ForgetGateBias; |
| 383 | const ConstCpuTensorHandle* m_CellBias; |
| 384 | const ConstCpuTensorHandle* m_OutputGateBias; |
| 385 | const ConstCpuTensorHandle* m_ProjectionWeights; |
| 386 | const ConstCpuTensorHandle* m_ProjectionBias; |
Jan Eilers | 38e05bd | 2019-06-26 13:10:09 +0100 | [diff] [blame] | 387 | const ConstCpuTensorHandle* m_InputLayerNormWeights; |
| 388 | const ConstCpuTensorHandle* m_ForgetLayerNormWeights; |
| 389 | const ConstCpuTensorHandle* m_CellLayerNormWeights; |
| 390 | const ConstCpuTensorHandle* m_OutputLayerNormWeights; |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 391 | |
| 392 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 393 | }; |
| 394 | |
| 395 | struct ConvertFp16ToFp32QueueDescriptor : QueueDescriptor |
| 396 | { |
| 397 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 398 | }; |
| 399 | |
| 400 | struct ConvertFp32ToFp16QueueDescriptor : QueueDescriptor |
| 401 | { |
| 402 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 403 | }; |
| 404 | |
Éanna Ó Catháin | 4e1e136 | 2018-11-12 11:36:34 +0000 | [diff] [blame] | 405 | struct BatchToSpaceNdQueueDescriptor : QueueDescriptorWithParameters<BatchToSpaceNdDescriptor> |
| 406 | { |
| 407 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 408 | }; |
Conor Kennedy | 430b5d8 | 2018-11-14 15:28:28 +0000 | [diff] [blame] | 409 | |
| 410 | struct StridedSliceQueueDescriptor : QueueDescriptorWithParameters<StridedSliceDescriptor> |
| 411 | { |
| 412 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 413 | }; |
| 414 | |
Éanna Ó Catháin | 20e5880 | 2018-12-04 10:29:06 +0000 | [diff] [blame] | 415 | // Minimum layer workload data. |
kevmay01 | 9053969 | 2018-11-29 08:40:19 +0000 | [diff] [blame] | 416 | struct MinimumQueueDescriptor : QueueDescriptor |
| 417 | { |
| 418 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 419 | }; |
| 420 | |
Matteo Martincigh | 59a950c | 2018-12-13 12:48:25 +0000 | [diff] [blame] | 421 | struct GreaterQueueDescriptor : QueueDescriptor |
| 422 | { |
| 423 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 424 | }; |
| 425 | |
Nattapat Chaimanowong | 964e955 | 2019-03-26 11:03:26 +0000 | [diff] [blame] | 426 | struct DebugQueueDescriptor : QueueDescriptor |
Nattapat Chaimanowong | a9a1cf1 | 2018-12-03 16:06:49 +0000 | [diff] [blame] | 427 | { |
| 428 | void Validate(const WorkloadInfo& workloadInfo) const; |
Nattapat Chaimanowong | 964e955 | 2019-03-26 11:03:26 +0000 | [diff] [blame] | 429 | |
| 430 | LayerGuid m_Guid; |
| 431 | std::string m_LayerName; |
| 432 | unsigned int m_SlotIndex; |
Nattapat Chaimanowong | a9a1cf1 | 2018-12-03 16:06:49 +0000 | [diff] [blame] | 433 | }; |
| 434 | |
Mohamed Nour Abouelseoud | a1d3c6a | 2018-12-27 12:39:16 +0000 | [diff] [blame] | 435 | struct RsqrtQueueDescriptor : QueueDescriptor |
| 436 | { |
| 437 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 438 | }; |
| 439 | |
narpra01 | b89b05f | 2019-01-16 09:53:09 +0000 | [diff] [blame] | 440 | struct GatherQueueDescriptor : QueueDescriptor |
| 441 | { |
| 442 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 443 | }; |
| 444 | |
Matteo Martincigh | 4912402 | 2019-01-11 13:25:59 +0000 | [diff] [blame] | 445 | struct PreCompiledQueueDescriptor : QueueDescriptorWithParameters<PreCompiledDescriptor> |
| 446 | { |
| 447 | PreCompiledQueueDescriptor() |
| 448 | : m_PreCompiledObject(nullptr) |
| 449 | { |
| 450 | } |
| 451 | |
Matteo Martincigh | 7997a35 | 2019-04-17 15:37:30 +0100 | [diff] [blame] | 452 | void* m_PreCompiledObject; |
Matteo Martincigh | 4912402 | 2019-01-11 13:25:59 +0000 | [diff] [blame] | 453 | |
| 454 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 455 | }; |
| 456 | |
Nattapat Chaimanowong | e4294fd | 2019-03-28 09:56:53 +0000 | [diff] [blame] | 457 | struct DequantizeQueueDescriptor : QueueDescriptor |
| 458 | { |
| 459 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 460 | }; |
| 461 | |
Nattapat Chaimanowong | 1f88630 | 2019-04-05 13:37:19 +0100 | [diff] [blame] | 462 | struct MergeQueueDescriptor : QueueDescriptor |
| 463 | { |
| 464 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 465 | }; |
| 466 | |
Sadik Armagan | eff363d | 2019-04-05 15:25:46 +0100 | [diff] [blame] | 467 | struct SwitchQueueDescriptor : QueueDescriptor |
| 468 | { |
| 469 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 470 | }; |
| 471 | |
Matteo Martincigh | 0e406ee | 2019-06-12 15:42:18 +0100 | [diff] [blame] | 472 | struct PreluQueueDescriptor : QueueDescriptor |
| 473 | { |
| 474 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 475 | }; |
| 476 | |
Aron Virginas-Tar | 639fb04 | 2019-06-20 14:28:19 +0100 | [diff] [blame] | 477 | struct TransposeConvolution2dQueueDescriptor : QueueDescriptorWithParameters<TransposeConvolution2dDescriptor> |
| 478 | { |
| 479 | TransposeConvolution2dQueueDescriptor() : |
| 480 | m_Weight(nullptr), |
| 481 | m_Bias(nullptr) |
| 482 | {} |
| 483 | |
| 484 | const ConstCpuTensorHandle* m_Weight; |
| 485 | const ConstCpuTensorHandle* m_Bias; |
| 486 | |
| 487 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 488 | }; |
| 489 | |
James Conroy | ee18dc8 | 2019-07-17 11:27:46 +0100 | [diff] [blame] | 490 | struct QuantizedLstmQueueDescriptor : QueueDescriptor |
| 491 | { |
| 492 | QuantizedLstmQueueDescriptor() |
| 493 | : m_InputToInputWeights(nullptr) |
| 494 | , m_InputToForgetWeights(nullptr) |
| 495 | , m_InputToCellWeights(nullptr) |
| 496 | , m_InputToOutputWeights(nullptr) |
| 497 | |
| 498 | , m_RecurrentToInputWeights(nullptr) |
| 499 | , m_RecurrentToForgetWeights(nullptr) |
| 500 | , m_RecurrentToCellWeights(nullptr) |
| 501 | , m_RecurrentToOutputWeights(nullptr) |
| 502 | |
| 503 | , m_InputGateBias(nullptr) |
| 504 | , m_ForgetGateBias(nullptr) |
| 505 | , m_CellBias(nullptr) |
| 506 | , m_OutputGateBias(nullptr) |
| 507 | {} |
| 508 | |
| 509 | const ConstCpuTensorHandle* m_InputToInputWeights; |
| 510 | const ConstCpuTensorHandle* m_InputToForgetWeights; |
| 511 | const ConstCpuTensorHandle* m_InputToCellWeights; |
| 512 | const ConstCpuTensorHandle* m_InputToOutputWeights; |
| 513 | |
| 514 | const ConstCpuTensorHandle* m_RecurrentToInputWeights; |
| 515 | const ConstCpuTensorHandle* m_RecurrentToForgetWeights; |
| 516 | const ConstCpuTensorHandle* m_RecurrentToCellWeights; |
| 517 | const ConstCpuTensorHandle* m_RecurrentToOutputWeights; |
| 518 | |
| 519 | const ConstCpuTensorHandle* m_InputGateBias; |
| 520 | const ConstCpuTensorHandle* m_ForgetGateBias; |
| 521 | const ConstCpuTensorHandle* m_CellBias; |
| 522 | const ConstCpuTensorHandle* m_OutputGateBias; |
| 523 | |
| 524 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 525 | }; |
| 526 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 527 | } //namespace armnn |