telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 1 | // |
Teresa Charlin | 588cbdf | 2022-01-19 15:55:37 +0000 | [diff] [blame] | 2 | // Copyright © 2017 Arm Ltd and Contributors. All rights reserved. |
David Beck | ecb56cd | 2018-09-05 12:52:57 +0100 | [diff] [blame] | 3 | // SPDX-License-Identifier: MIT |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 4 | // |
| 5 | |
| 6 | #pragma once |
| 7 | |
Teresa Charlin | 588cbdf | 2022-01-19 15:55:37 +0000 | [diff] [blame] | 8 | #include "ClBaseWorkload.hpp" |
arovir01 | a682410 | 2018-08-28 17:40:45 +0100 | [diff] [blame] | 9 | |
Matthew Bentham | d877739 | 2018-10-08 09:38:55 +0100 | [diff] [blame] | 10 | #include <arm_compute/runtime/IFunction.h> |
| 11 | #include <arm_compute/core/Error.h> |
| 12 | #include <arm_compute/runtime/CL/CLTensor.h> |
Matthew Bentham | 14e4669 | 2018-09-20 15:35:30 +0100 | [diff] [blame] | 13 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 14 | namespace armnn |
| 15 | { |
| 16 | |
| 17 | arm_compute::Status ClDepthwiseConvolutionWorkloadValidate(const TensorInfo& input, |
| 18 | const TensorInfo& output, |
| 19 | const DepthwiseConvolution2dDescriptor& descriptor, |
| 20 | const TensorInfo& weights, |
Mike Kelly | 07810fc | 2020-11-12 10:58:48 +0000 | [diff] [blame] | 21 | const Optional<TensorInfo>& biases, |
| 22 | const ActivationDescriptor* activationDescriptor = nullptr); |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 23 | |
Teresa Charlin | 588cbdf | 2022-01-19 15:55:37 +0000 | [diff] [blame] | 24 | class ClDepthwiseConvolutionWorkload : public ClBaseWorkload<DepthwiseConvolution2dQueueDescriptor> |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 25 | { |
| 26 | public: |
Matthew Bentham | d877739 | 2018-10-08 09:38:55 +0100 | [diff] [blame] | 27 | using BaseWorkload<DepthwiseConvolution2dQueueDescriptor>::m_Data; |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 28 | |
Matthew Bentham | d877739 | 2018-10-08 09:38:55 +0100 | [diff] [blame] | 29 | ClDepthwiseConvolutionWorkload(const DepthwiseConvolution2dQueueDescriptor& descriptor, |
Sadik Armagan | e944475 | 2020-12-02 11:28:58 +0000 | [diff] [blame] | 30 | const WorkloadInfo& info, |
| 31 | const arm_compute::CLCompileContext& clCompileContext); |
Matthew Bentham | d877739 | 2018-10-08 09:38:55 +0100 | [diff] [blame] | 32 | |
| 33 | void Execute() const override; |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 34 | |
| 35 | protected: |
| 36 | std::unique_ptr<arm_compute::IFunction> m_DepthwiseConvolutionLayer; |
| 37 | |
| 38 | std::unique_ptr<arm_compute::CLTensor> m_KernelTensor; |
| 39 | std::unique_ptr<arm_compute::CLTensor> m_BiasTensor; |
| 40 | |
| 41 | void FreeUnusedTensors(); |
| 42 | }; |
| 43 | |
| 44 | } //namespace armnn |