| Teresa Charlin | 50de4fa | 2021-05-31 18:47:33 +0100 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2021 Arm Ltd and Contributors. All rights reserved. |
| 3 | // SPDX-License-Identifier: MIT |
| 4 | // |
| 5 | |
| 6 | #pragma once |
| 7 | |
| Teresa Charlin | 588cbdf | 2022-01-19 15:55:37 +0000 | [diff] [blame] | 8 | #include "ClBaseWorkload.hpp" |
| Teresa Charlin | 50de4fa | 2021-05-31 18:47:33 +0100 | [diff] [blame] | 9 | |
| 10 | #include <arm_compute/core/Error.h> |
| Nikhil Raj | 77c92e4 | 2021-06-16 09:44:06 +0100 | [diff] [blame] | 11 | #include <arm_compute/runtime/CL/functions/CLElementwiseUnaryLayer.h> |
| Teresa Charlin | 50de4fa | 2021-05-31 18:47:33 +0100 | [diff] [blame] | 12 | |
| 13 | namespace armnn |
| 14 | { |
| 15 | |
| 16 | arm_compute::Status ClSinWorkloadValidate(const TensorInfo& input, const TensorInfo& output); |
| 17 | |
| Teresa Charlin | 588cbdf | 2022-01-19 15:55:37 +0000 | [diff] [blame] | 18 | class ClSinWorkload : public ClBaseWorkload<ElementwiseUnaryQueueDescriptor> |
| Teresa Charlin | 50de4fa | 2021-05-31 18:47:33 +0100 | [diff] [blame] | 19 | { |
| 20 | public: |
| 21 | ClSinWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, |
| 22 | const WorkloadInfo& info, |
| 23 | const arm_compute::CLCompileContext& clCompileContext); |
| 24 | virtual void Execute() const override; |
| 25 | |
| 26 | private: |
| 27 | mutable arm_compute::CLSinLayer m_SinLayer; |
| 28 | }; |
| 29 | |
| 30 | } // namespace armnn |