Laurent Carlier | 749294b | 2020-06-01 09:03:17 +0100 | [diff] [blame] | 1 | // |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 2 | // Copyright © 2017 Arm Ltd. All rights reserved. |
David Beck | ecb56cd | 2018-09-05 12:52:57 +0100 | [diff] [blame] | 3 | // SPDX-License-Identifier: MIT |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 4 | // |
| 5 | #pragma once |
| 6 | |
Matteo Martincigh | e5b8eb9 | 2019-11-28 15:45:42 +0000 | [diff] [blame] | 7 | #include <armnn/backends/CpuTensorHandleFwd.hpp> |
| 8 | #include <armnn/backends/ITensorHandle.hpp> |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 9 | |
Aron Virginas-Tar | c9cc804 | 2018-11-01 16:15:57 +0000 | [diff] [blame] | 10 | #include <InternalTypes.hpp> |
| 11 | |
Jim Flynn | e242f2d | 2019-05-22 14:24:13 +0100 | [diff] [blame] | 12 | #include <armnn/Deprecated.hpp> |
David Beck | 0dbe0ee | 2018-09-24 15:59:27 +0100 | [diff] [blame] | 13 | #include <armnn/Descriptors.hpp> |
| 14 | #include <armnn/Exceptions.hpp> |
Aron Virginas-Tar | c9cc804 | 2018-11-01 16:15:57 +0000 | [diff] [blame] | 15 | #include <armnn/Types.hpp> |
| 16 | #include <armnn/Tensor.hpp> |
David Beck | 0dbe0ee | 2018-09-24 15:59:27 +0100 | [diff] [blame] | 17 | |
Aron Virginas-Tar | c9cc804 | 2018-11-01 16:15:57 +0000 | [diff] [blame] | 18 | #include <backendsCommon/WorkloadInfo.hpp> |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 19 | |
| 20 | namespace armnn |
| 21 | { |
| 22 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 23 | //A helper function that returns the bias data type required for given input data type. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 24 | DataType GetBiasDataType(DataType inputDataType); |
| 25 | |
| 26 | struct WorkloadInfo; |
| 27 | |
| 28 | struct QueueDescriptor |
| 29 | { |
| 30 | std::vector<ITensorHandle*> m_Inputs; |
| 31 | std::vector<ITensorHandle*> m_Outputs; |
Keith Davis | df04d23 | 2020-10-23 17:20:05 +0100 | [diff] [blame] | 32 | void* m_AdditionalInfoObject; |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 33 | |
| 34 | void ValidateInputsOutputs(const std::string& descName, |
Narumol Prangnawarat | 867eba5 | 2020-02-03 12:29:56 +0000 | [diff] [blame] | 35 | unsigned int numExpectedIn, |
| 36 | unsigned int numExpectedOut) const; |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 37 | |
Keith Davis | df04d23 | 2020-10-23 17:20:05 +0100 | [diff] [blame] | 38 | template<typename T> |
Mike Kelly | 07810fc | 2020-11-12 10:58:48 +0000 | [diff] [blame] | 39 | const T* GetAdditionalInformation() const |
Keith Davis | df04d23 | 2020-10-23 17:20:05 +0100 | [diff] [blame] | 40 | { |
| 41 | return static_cast<T*>(m_AdditionalInfoObject); |
| 42 | } |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 43 | |
| 44 | protected: |
| 45 | ~QueueDescriptor() = default; |
Keith Davis | df04d23 | 2020-10-23 17:20:05 +0100 | [diff] [blame] | 46 | QueueDescriptor() |
| 47 | : m_AdditionalInfoObject(nullptr) |
| 48 | {} |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 49 | QueueDescriptor(QueueDescriptor const&) = default; |
| 50 | QueueDescriptor& operator=(QueueDescriptor const&) = default; |
| 51 | }; |
| 52 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 53 | // Base class for queue descriptors which contain parameters. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 54 | template <typename LayerDescriptor> |
| 55 | struct QueueDescriptorWithParameters : public QueueDescriptor |
| 56 | { |
| 57 | LayerDescriptor m_Parameters; |
| 58 | |
| 59 | protected: |
| 60 | ~QueueDescriptorWithParameters() = default; |
| 61 | QueueDescriptorWithParameters() = default; |
| 62 | QueueDescriptorWithParameters(QueueDescriptorWithParameters const&) = default; |
| 63 | QueueDescriptorWithParameters& operator=(QueueDescriptorWithParameters const&) = default; |
| 64 | }; |
| 65 | |
Jim Flynn | 68db06f | 2020-10-06 10:14:50 +0100 | [diff] [blame] | 66 | struct MapQueueDescriptor : QueueDescriptor |
| 67 | { |
| 68 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 69 | }; |
| 70 | |
Jim Flynn | 3a40ea5 | 2020-10-08 11:42:30 +0100 | [diff] [blame] | 71 | struct UnmapQueueDescriptor : QueueDescriptor |
| 72 | { |
| 73 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 74 | }; |
| 75 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 76 | struct MemCopyQueueDescriptor : QueueDescriptor |
| 77 | { |
| 78 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 79 | }; |
| 80 | |
| 81 | using InputQueueDescriptor = MemCopyQueueDescriptor; |
| 82 | using OutputQueueDescriptor = MemCopyQueueDescriptor; |
| 83 | |
Derek Lamberti | f674aa0 | 2019-08-01 15:56:25 +0100 | [diff] [blame] | 84 | struct MemImportQueueDescriptor : QueueDescriptor |
| 85 | { |
| 86 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 87 | }; |
| 88 | |
| 89 | struct MemSyncQueueDescriptor : QueueDescriptor |
| 90 | { |
| 91 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 92 | }; |
| 93 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 94 | // Softmax layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 95 | struct SoftmaxQueueDescriptor : QueueDescriptorWithParameters<SoftmaxDescriptor> |
| 96 | { |
| 97 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 98 | }; |
| 99 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 100 | // Splitter layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 101 | struct SplitterQueueDescriptor : QueueDescriptorWithParameters<ViewsDescriptor> |
| 102 | { |
| 103 | struct ViewOrigin |
| 104 | { |
| 105 | ViewOrigin() {} |
| 106 | ViewOrigin(std::vector<unsigned int> const& origin) : m_Origin(origin) {} |
| 107 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 108 | //View origin (size of the vector is the same as number of dimensions of the view). |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 109 | std::vector<unsigned int> m_Origin; |
| 110 | }; |
| 111 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 112 | //View defines a tensor that will be carved from the input tensor. |
| 113 | //View origins are stored here, the extents are defined by sizes of the output tensors. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 114 | std::vector<ViewOrigin> m_ViewOrigins; |
| 115 | |
| 116 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 117 | }; |
| 118 | |
Jim Flynn | e242f2d | 2019-05-22 14:24:13 +0100 | [diff] [blame] | 119 | // Concat layer workload data. |
| 120 | struct ConcatQueueDescriptor : QueueDescriptorWithParameters<OriginsDescriptor> |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 121 | { |
| 122 | struct ViewOrigin |
| 123 | { |
| 124 | ViewOrigin() {} |
| 125 | ViewOrigin(const std::vector<unsigned int>& origin) : m_Origin(origin) {} |
| 126 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 127 | //View origin (size of the vector is the same as number of dimensions of the view). |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 128 | std::vector<unsigned int> m_Origin; |
| 129 | }; |
| 130 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 131 | //View defines a sub-area of the output tensor that will be filled with the corresponding input tensor. |
| 132 | //View origins are stored here, the extents are defined by sizes of the input tensors. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 133 | std::vector<ViewOrigin> m_ViewOrigins; |
| 134 | |
| 135 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 136 | }; |
| 137 | |
Jim Flynn | e242f2d | 2019-05-22 14:24:13 +0100 | [diff] [blame] | 138 | // Deprecated. Use ConcatQueueDescriptor instead |
| 139 | using MergerQueueDescriptor = ConcatQueueDescriptor; |
| 140 | |
Matthew Jackson | 2b8c1da | 2019-07-04 14:59:16 +0100 | [diff] [blame] | 141 | // Stack layer workload data. |
| 142 | struct StackQueueDescriptor : QueueDescriptorWithParameters<StackDescriptor> |
| 143 | { |
| 144 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 145 | }; |
| 146 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 147 | // Activation layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 148 | struct ActivationQueueDescriptor : QueueDescriptorWithParameters<ActivationDescriptor> |
| 149 | { |
| 150 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 151 | }; |
| 152 | |
Nikhil Raj | ee391d5 | 2019-09-05 17:50:44 +0100 | [diff] [blame] | 153 | struct ArgMinMaxQueueDescriptor : QueueDescriptorWithParameters<ArgMinMaxDescriptor> |
| 154 | { |
| 155 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 156 | }; |
| 157 | |
Ryan OShea | ec6c680 | 2020-06-05 17:17:06 +0100 | [diff] [blame] | 158 | // Fill layer workload data. |
| 159 | struct FillQueueDescriptor : QueueDescriptorWithParameters<FillDescriptor> |
| 160 | { |
Ryan OShea | ec6c680 | 2020-06-05 17:17:06 +0100 | [diff] [blame] | 161 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 162 | }; |
| 163 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 164 | // Fully connected layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 165 | struct FullyConnectedQueueDescriptor : QueueDescriptorWithParameters<FullyConnectedDescriptor> |
| 166 | { |
| 167 | FullyConnectedQueueDescriptor() |
| 168 | : m_Weight(nullptr) |
| 169 | , m_Bias(nullptr) |
| 170 | { |
| 171 | } |
| 172 | |
| 173 | const ConstCpuTensorHandle* m_Weight; |
| 174 | const ConstCpuTensorHandle* m_Bias; |
| 175 | |
| 176 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 177 | }; |
| 178 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 179 | // Permute layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 180 | struct PermuteQueueDescriptor : QueueDescriptorWithParameters<PermuteDescriptor> |
| 181 | { |
| 182 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 183 | }; |
| 184 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 185 | // Pooling 2D layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 186 | struct Pooling2dQueueDescriptor : QueueDescriptorWithParameters<Pooling2dDescriptor> |
| 187 | { |
| 188 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 189 | }; |
| 190 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 191 | // Convolution 2D layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 192 | struct Convolution2dQueueDescriptor : QueueDescriptorWithParameters<Convolution2dDescriptor> |
| 193 | { |
| 194 | Convolution2dQueueDescriptor() |
| 195 | : m_Weight(nullptr) |
| 196 | , m_Bias(nullptr) |
| 197 | { |
| 198 | } |
| 199 | |
| 200 | const ConstCpuTensorHandle* m_Weight; |
| 201 | const ConstCpuTensorHandle* m_Bias; |
| 202 | |
| 203 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 204 | }; |
| 205 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 206 | // Depthwise Convolution 2D layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 207 | struct DepthwiseConvolution2dQueueDescriptor : QueueDescriptorWithParameters<DepthwiseConvolution2dDescriptor> |
| 208 | { |
| 209 | DepthwiseConvolution2dQueueDescriptor() |
| 210 | : m_Weight(nullptr) |
| 211 | , m_Bias(nullptr) |
| 212 | { |
| 213 | } |
| 214 | |
| 215 | const ConstCpuTensorHandle* m_Weight; |
| 216 | const ConstCpuTensorHandle* m_Bias; |
| 217 | |
| 218 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 219 | }; |
| 220 | |
Narumol Prangnawarat | 94dd5d8 | 2019-01-23 18:06:26 +0000 | [diff] [blame] | 221 | struct DetectionPostProcessQueueDescriptor : QueueDescriptorWithParameters<DetectionPostProcessDescriptor> |
| 222 | { |
Narumol Prangnawarat | bc67cef | 2019-01-31 15:31:54 +0000 | [diff] [blame] | 223 | DetectionPostProcessQueueDescriptor() |
| 224 | : m_Anchors(nullptr) |
| 225 | { |
| 226 | } |
| 227 | |
| 228 | const ConstCpuTensorHandle* m_Anchors; |
| 229 | |
Narumol Prangnawarat | 94dd5d8 | 2019-01-23 18:06:26 +0000 | [diff] [blame] | 230 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 231 | }; |
| 232 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 233 | // Normalization layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 234 | struct NormalizationQueueDescriptor : QueueDescriptorWithParameters<NormalizationDescriptor> |
| 235 | { |
| 236 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 237 | }; |
| 238 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 239 | // Add layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 240 | struct AdditionQueueDescriptor : QueueDescriptor |
| 241 | { |
| 242 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 243 | }; |
| 244 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 245 | // Multiplication layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 246 | struct MultiplicationQueueDescriptor : QueueDescriptor |
| 247 | { |
| 248 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 249 | }; |
| 250 | |
Francis Murtagh | e7a86a4 | 2018-08-29 12:42:10 +0100 | [diff] [blame] | 251 | // Division layer workload data. |
| 252 | struct DivisionQueueDescriptor : QueueDescriptor |
| 253 | { |
| 254 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 255 | }; |
| 256 | |
David Beck | c2044fe | 2018-09-05 15:00:38 +0100 | [diff] [blame] | 257 | // Subtraction layer workload data. |
| 258 | struct SubtractionQueueDescriptor : QueueDescriptor |
| 259 | { |
| 260 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 261 | }; |
| 262 | |
Nattapat Chaimanowong | 5a4304a | 2018-11-28 10:44:37 +0000 | [diff] [blame] | 263 | // Maximum layer workload data. |
| 264 | struct MaximumQueueDescriptor : QueueDescriptor |
| 265 | { |
| 266 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 267 | }; |
| 268 | |
narpra01 | a6bf912 | 2018-09-10 09:50:09 +0100 | [diff] [blame] | 269 | // Mean layer workload data. |
narpra01 | 32b9046 | 2018-09-13 11:07:48 +0100 | [diff] [blame] | 270 | struct MeanQueueDescriptor : QueueDescriptorWithParameters<MeanDescriptor> |
narpra01 | a6bf912 | 2018-09-10 09:50:09 +0100 | [diff] [blame] | 271 | { |
| 272 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 273 | }; |
| 274 | |
jimfly01 | 2c9322a | 2018-09-19 10:59:49 +0100 | [diff] [blame] | 275 | // Pad layer workload data |
| 276 | struct PadQueueDescriptor : QueueDescriptorWithParameters<PadDescriptor> |
| 277 | { |
| 278 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 279 | }; |
| 280 | |
Derek Lamberti | a9cca6a | 2019-03-25 15:41:58 +0000 | [diff] [blame] | 281 | struct QuantizeQueueDescriptor : QueueDescriptor |
| 282 | { |
| 283 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 284 | }; |
| 285 | |
Teresa Charlin | cedd34f | 2020-03-30 11:17:30 +0100 | [diff] [blame] | 286 | // Deprecated use ComparisonQueueDescriptor instead |
FrancisMurtagh | 2099595 | 2018-12-17 12:11:36 +0000 | [diff] [blame] | 287 | struct EqualQueueDescriptor : QueueDescriptor |
| 288 | { |
| 289 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 290 | }; |
| 291 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 292 | // Batch norm layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 293 | struct BatchNormalizationQueueDescriptor : QueueDescriptorWithParameters<BatchNormalizationDescriptor> |
| 294 | { |
| 295 | BatchNormalizationQueueDescriptor() |
| 296 | : m_Mean(nullptr) |
| 297 | , m_Variance(nullptr) |
| 298 | , m_Beta(nullptr) |
| 299 | , m_Gamma(nullptr) |
| 300 | { |
| 301 | } |
| 302 | |
| 303 | const ConstCpuTensorHandle* m_Mean; |
| 304 | const ConstCpuTensorHandle* m_Variance; |
| 305 | const ConstCpuTensorHandle* m_Beta; |
| 306 | const ConstCpuTensorHandle* m_Gamma; |
| 307 | |
| 308 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 309 | }; |
| 310 | |
Finn Williams | 2605b23 | 2020-06-10 15:53:46 +0100 | [diff] [blame] | 311 | struct RankQueueDescriptor : QueueDescriptor |
| 312 | { |
| 313 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 314 | }; |
| 315 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 316 | struct ResizeBilinearQueueDescriptor : QueueDescriptorWithParameters<ResizeBilinearDescriptor> |
| 317 | { |
| 318 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 319 | }; |
| 320 | |
Teresa Charlin | a9075df | 2019-06-27 15:41:57 +0100 | [diff] [blame] | 321 | struct ResizeQueueDescriptor : QueueDescriptorWithParameters<ResizeDescriptor> |
| 322 | { |
| 323 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 324 | }; |
| 325 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 326 | struct FakeQuantizationQueueDescriptor : QueueDescriptorWithParameters<FakeQuantizationDescriptor> |
| 327 | { |
| 328 | FakeQuantizationQueueDescriptor() |
| 329 | : m_Min(nullptr) |
| 330 | , m_Max(nullptr) |
| 331 | { |
| 332 | } |
| 333 | |
| 334 | const ConstCpuTensorHandle* m_Min; |
| 335 | const ConstCpuTensorHandle* m_Max; |
| 336 | |
| 337 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 338 | }; |
| 339 | |
Kevin May | ce5045a | 2019-10-02 14:07:47 +0100 | [diff] [blame] | 340 | struct InstanceNormalizationQueueDescriptor : QueueDescriptorWithParameters<InstanceNormalizationDescriptor> |
| 341 | { |
Kevin May | ce5045a | 2019-10-02 14:07:47 +0100 | [diff] [blame] | 342 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 343 | }; |
| 344 | |
Matteo Martincigh | bcd3c85 | 2018-09-28 14:14:12 +0100 | [diff] [blame] | 345 | struct L2NormalizationQueueDescriptor : QueueDescriptorWithParameters<L2NormalizationDescriptor> |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 346 | { |
| 347 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 348 | }; |
| 349 | |
Aron Virginas-Tar | f982dea | 2019-10-11 14:07:53 +0100 | [diff] [blame] | 350 | struct LogSoftmaxQueueDescriptor : QueueDescriptorWithParameters<LogSoftmaxDescriptor> |
| 351 | { |
| 352 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 353 | }; |
| 354 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 355 | struct ConstantQueueDescriptor : QueueDescriptor |
| 356 | { |
| 357 | ConstantQueueDescriptor() |
| 358 | : m_LayerOutput(nullptr) |
| 359 | { |
| 360 | } |
| 361 | |
| 362 | const ConstCpuTensorHandle* m_LayerOutput; |
| 363 | |
| 364 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 365 | }; |
| 366 | |
| 367 | struct ReshapeQueueDescriptor : QueueDescriptorWithParameters<ReshapeDescriptor> |
| 368 | { |
| 369 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 370 | }; |
| 371 | |
Nattapat Chaimanowong | 207ef9a | 2018-11-02 10:57:25 +0000 | [diff] [blame] | 372 | struct SpaceToBatchNdQueueDescriptor : QueueDescriptorWithParameters<SpaceToBatchNdDescriptor> |
| 373 | { |
| 374 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 375 | }; |
| 376 | |
Aron Virginas-Tar | 972af15 | 2019-06-11 14:14:03 +0100 | [diff] [blame] | 377 | struct SpaceToDepthQueueDescriptor : QueueDescriptorWithParameters<SpaceToDepthDescriptor> |
| 378 | { |
| 379 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 380 | }; |
| 381 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 382 | struct FloorQueueDescriptor : QueueDescriptor |
| 383 | { |
| 384 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 385 | }; |
| 386 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 387 | struct LstmQueueDescriptor : QueueDescriptorWithParameters<LstmDescriptor> |
| 388 | { |
| 389 | LstmQueueDescriptor() |
| 390 | : m_InputToInputWeights(nullptr) |
| 391 | , m_InputToForgetWeights(nullptr) |
| 392 | , m_InputToCellWeights(nullptr) |
| 393 | , m_InputToOutputWeights(nullptr) |
| 394 | , m_RecurrentToInputWeights(nullptr) |
| 395 | , m_RecurrentToForgetWeights(nullptr) |
| 396 | , m_RecurrentToCellWeights(nullptr) |
| 397 | , m_RecurrentToOutputWeights(nullptr) |
| 398 | , m_CellToInputWeights(nullptr) |
| 399 | , m_CellToForgetWeights(nullptr) |
| 400 | , m_CellToOutputWeights(nullptr) |
| 401 | , m_InputGateBias(nullptr) |
| 402 | , m_ForgetGateBias(nullptr) |
| 403 | , m_CellBias(nullptr) |
| 404 | , m_OutputGateBias(nullptr) |
| 405 | , m_ProjectionWeights(nullptr) |
| 406 | , m_ProjectionBias(nullptr) |
Jan Eilers | 38e05bd | 2019-06-26 13:10:09 +0100 | [diff] [blame] | 407 | , m_InputLayerNormWeights(nullptr) |
| 408 | , m_ForgetLayerNormWeights(nullptr) |
| 409 | , m_CellLayerNormWeights(nullptr) |
| 410 | , m_OutputLayerNormWeights(nullptr) |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 411 | { |
| 412 | } |
| 413 | |
| 414 | const ConstCpuTensorHandle* m_InputToInputWeights; |
| 415 | const ConstCpuTensorHandle* m_InputToForgetWeights; |
| 416 | const ConstCpuTensorHandle* m_InputToCellWeights; |
| 417 | const ConstCpuTensorHandle* m_InputToOutputWeights; |
| 418 | const ConstCpuTensorHandle* m_RecurrentToInputWeights; |
| 419 | const ConstCpuTensorHandle* m_RecurrentToForgetWeights; |
| 420 | const ConstCpuTensorHandle* m_RecurrentToCellWeights; |
| 421 | const ConstCpuTensorHandle* m_RecurrentToOutputWeights; |
| 422 | const ConstCpuTensorHandle* m_CellToInputWeights; |
| 423 | const ConstCpuTensorHandle* m_CellToForgetWeights; |
| 424 | const ConstCpuTensorHandle* m_CellToOutputWeights; |
| 425 | const ConstCpuTensorHandle* m_InputGateBias; |
| 426 | const ConstCpuTensorHandle* m_ForgetGateBias; |
| 427 | const ConstCpuTensorHandle* m_CellBias; |
| 428 | const ConstCpuTensorHandle* m_OutputGateBias; |
| 429 | const ConstCpuTensorHandle* m_ProjectionWeights; |
| 430 | const ConstCpuTensorHandle* m_ProjectionBias; |
Jan Eilers | 38e05bd | 2019-06-26 13:10:09 +0100 | [diff] [blame] | 431 | const ConstCpuTensorHandle* m_InputLayerNormWeights; |
| 432 | const ConstCpuTensorHandle* m_ForgetLayerNormWeights; |
| 433 | const ConstCpuTensorHandle* m_CellLayerNormWeights; |
| 434 | const ConstCpuTensorHandle* m_OutputLayerNormWeights; |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 435 | |
| 436 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 437 | }; |
| 438 | |
Narumol Prangnawarat | 7ddbbae | 2020-03-13 10:26:05 +0000 | [diff] [blame] | 439 | struct ConvertBf16ToFp32QueueDescriptor : QueueDescriptor |
| 440 | { |
| 441 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 442 | }; |
| 443 | |
Narumol Prangnawarat | ea54a01 | 2020-03-16 16:36:10 +0000 | [diff] [blame] | 444 | struct ConvertFp32ToBf16QueueDescriptor : QueueDescriptor |
| 445 | { |
| 446 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 447 | }; |
| 448 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 449 | struct ConvertFp16ToFp32QueueDescriptor : QueueDescriptor |
| 450 | { |
| 451 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 452 | }; |
| 453 | |
| 454 | struct ConvertFp32ToFp16QueueDescriptor : QueueDescriptor |
| 455 | { |
| 456 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 457 | }; |
| 458 | |
Éanna Ó Catháin | 4e1e136 | 2018-11-12 11:36:34 +0000 | [diff] [blame] | 459 | struct BatchToSpaceNdQueueDescriptor : QueueDescriptorWithParameters<BatchToSpaceNdDescriptor> |
| 460 | { |
| 461 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 462 | }; |
Conor Kennedy | 430b5d8 | 2018-11-14 15:28:28 +0000 | [diff] [blame] | 463 | |
| 464 | struct StridedSliceQueueDescriptor : QueueDescriptorWithParameters<StridedSliceDescriptor> |
| 465 | { |
| 466 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 467 | }; |
| 468 | |
Éanna Ó Catháin | 20e5880 | 2018-12-04 10:29:06 +0000 | [diff] [blame] | 469 | // Minimum layer workload data. |
kevmay01 | 9053969 | 2018-11-29 08:40:19 +0000 | [diff] [blame] | 470 | struct MinimumQueueDescriptor : QueueDescriptor |
| 471 | { |
| 472 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 473 | }; |
| 474 | |
Teresa Charlin | 2b030d9 | 2020-03-27 16:40:56 +0000 | [diff] [blame] | 475 | // Deprecated use ComparisonQueueDescriptor instead |
Matteo Martincigh | 59a950c | 2018-12-13 12:48:25 +0000 | [diff] [blame] | 476 | struct GreaterQueueDescriptor : QueueDescriptor |
| 477 | { |
| 478 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 479 | }; |
| 480 | |
Nattapat Chaimanowong | 964e955 | 2019-03-26 11:03:26 +0000 | [diff] [blame] | 481 | struct DebugQueueDescriptor : QueueDescriptor |
Nattapat Chaimanowong | a9a1cf1 | 2018-12-03 16:06:49 +0000 | [diff] [blame] | 482 | { |
janeil01 | 3fec1ea | 2019-11-07 09:47:20 +0000 | [diff] [blame] | 483 | DebugQueueDescriptor() : m_Guid(0) {} |
| 484 | |
Nattapat Chaimanowong | a9a1cf1 | 2018-12-03 16:06:49 +0000 | [diff] [blame] | 485 | void Validate(const WorkloadInfo& workloadInfo) const; |
Nattapat Chaimanowong | 964e955 | 2019-03-26 11:03:26 +0000 | [diff] [blame] | 486 | |
| 487 | LayerGuid m_Guid; |
| 488 | std::string m_LayerName; |
| 489 | unsigned int m_SlotIndex; |
Nattapat Chaimanowong | a9a1cf1 | 2018-12-03 16:06:49 +0000 | [diff] [blame] | 490 | }; |
| 491 | |
Mohamed Nour Abouelseoud | a1d3c6a | 2018-12-27 12:39:16 +0000 | [diff] [blame] | 492 | struct RsqrtQueueDescriptor : QueueDescriptor |
| 493 | { |
| 494 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 495 | }; |
| 496 | |
Teresa Charlin | 5266473 | 2020-06-29 16:27:03 +0100 | [diff] [blame] | 497 | struct GatherQueueDescriptor : QueueDescriptorWithParameters<GatherDescriptor> |
narpra01 | b89b05f | 2019-01-16 09:53:09 +0000 | [diff] [blame] | 498 | { |
| 499 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 500 | }; |
| 501 | |
Matteo Martincigh | 4912402 | 2019-01-11 13:25:59 +0000 | [diff] [blame] | 502 | struct PreCompiledQueueDescriptor : QueueDescriptorWithParameters<PreCompiledDescriptor> |
| 503 | { |
| 504 | PreCompiledQueueDescriptor() |
| 505 | : m_PreCompiledObject(nullptr) |
| 506 | { |
| 507 | } |
| 508 | |
Matteo Martincigh | 7997a35 | 2019-04-17 15:37:30 +0100 | [diff] [blame] | 509 | void* m_PreCompiledObject; |
Matteo Martincigh | 4912402 | 2019-01-11 13:25:59 +0000 | [diff] [blame] | 510 | |
| 511 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 512 | }; |
| 513 | |
Nattapat Chaimanowong | e4294fd | 2019-03-28 09:56:53 +0000 | [diff] [blame] | 514 | struct DequantizeQueueDescriptor : QueueDescriptor |
| 515 | { |
| 516 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 517 | }; |
| 518 | |
Nattapat Chaimanowong | 1f88630 | 2019-04-05 13:37:19 +0100 | [diff] [blame] | 519 | struct MergeQueueDescriptor : QueueDescriptor |
| 520 | { |
| 521 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 522 | }; |
| 523 | |
Sadik Armagan | eff363d | 2019-04-05 15:25:46 +0100 | [diff] [blame] | 524 | struct SwitchQueueDescriptor : QueueDescriptor |
| 525 | { |
| 526 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 527 | }; |
| 528 | |
Matteo Martincigh | 0e406ee | 2019-06-12 15:42:18 +0100 | [diff] [blame] | 529 | struct PreluQueueDescriptor : QueueDescriptor |
| 530 | { |
| 531 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 532 | }; |
| 533 | |
Aron Virginas-Tar | 639fb04 | 2019-06-20 14:28:19 +0100 | [diff] [blame] | 534 | struct TransposeConvolution2dQueueDescriptor : QueueDescriptorWithParameters<TransposeConvolution2dDescriptor> |
| 535 | { |
| 536 | TransposeConvolution2dQueueDescriptor() : |
| 537 | m_Weight(nullptr), |
| 538 | m_Bias(nullptr) |
| 539 | {} |
| 540 | |
| 541 | const ConstCpuTensorHandle* m_Weight; |
| 542 | const ConstCpuTensorHandle* m_Bias; |
| 543 | |
| 544 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 545 | }; |
| 546 | |
Mike Kelly | c9ea45a | 2020-02-28 18:11:58 +0000 | [diff] [blame] | 547 | struct TransposeQueueDescriptor : QueueDescriptorWithParameters<TransposeDescriptor> |
| 548 | { |
| 549 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 550 | }; |
| 551 | |
James Conroy | 586a9aa | 2020-03-20 08:49:33 +0000 | [diff] [blame] | 552 | struct QLstmQueueDescriptor : QueueDescriptorWithParameters<QLstmDescriptor> |
| 553 | { |
| 554 | QLstmQueueDescriptor() |
| 555 | : m_InputToInputWeights(nullptr) |
| 556 | , m_InputToForgetWeights(nullptr) |
| 557 | , m_InputToCellWeights(nullptr) |
| 558 | , m_InputToOutputWeights(nullptr) |
| 559 | , m_RecurrentToInputWeights(nullptr) |
| 560 | , m_RecurrentToForgetWeights(nullptr) |
| 561 | , m_RecurrentToCellWeights(nullptr) |
| 562 | , m_RecurrentToOutputWeights(nullptr) |
| 563 | , m_CellToInputWeights(nullptr) |
| 564 | , m_CellToForgetWeights(nullptr) |
| 565 | , m_CellToOutputWeights(nullptr) |
| 566 | , m_InputGateBias(nullptr) |
| 567 | , m_ForgetGateBias(nullptr) |
| 568 | , m_CellBias(nullptr) |
| 569 | , m_OutputGateBias(nullptr) |
| 570 | , m_ProjectionWeights(nullptr) |
| 571 | , m_ProjectionBias(nullptr) |
| 572 | , m_InputLayerNormWeights(nullptr) |
| 573 | , m_ForgetLayerNormWeights(nullptr) |
| 574 | , m_CellLayerNormWeights(nullptr) |
| 575 | , m_OutputLayerNormWeights(nullptr) |
| 576 | { |
| 577 | } |
| 578 | |
| 579 | const ConstCpuTensorHandle* m_InputToInputWeights; |
| 580 | const ConstCpuTensorHandle* m_InputToForgetWeights; |
| 581 | const ConstCpuTensorHandle* m_InputToCellWeights; |
| 582 | const ConstCpuTensorHandle* m_InputToOutputWeights; |
| 583 | const ConstCpuTensorHandle* m_RecurrentToInputWeights; |
| 584 | const ConstCpuTensorHandle* m_RecurrentToForgetWeights; |
| 585 | const ConstCpuTensorHandle* m_RecurrentToCellWeights; |
| 586 | const ConstCpuTensorHandle* m_RecurrentToOutputWeights; |
| 587 | const ConstCpuTensorHandle* m_CellToInputWeights; |
| 588 | const ConstCpuTensorHandle* m_CellToForgetWeights; |
| 589 | const ConstCpuTensorHandle* m_CellToOutputWeights; |
| 590 | const ConstCpuTensorHandle* m_InputGateBias; |
| 591 | const ConstCpuTensorHandle* m_ForgetGateBias; |
| 592 | const ConstCpuTensorHandle* m_CellBias; |
| 593 | const ConstCpuTensorHandle* m_OutputGateBias; |
| 594 | const ConstCpuTensorHandle* m_ProjectionWeights; |
| 595 | const ConstCpuTensorHandle* m_ProjectionBias; |
| 596 | const ConstCpuTensorHandle* m_InputLayerNormWeights; |
| 597 | const ConstCpuTensorHandle* m_ForgetLayerNormWeights; |
| 598 | const ConstCpuTensorHandle* m_CellLayerNormWeights; |
| 599 | const ConstCpuTensorHandle* m_OutputLayerNormWeights; |
| 600 | |
| 601 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 602 | }; |
| 603 | |
James Conroy | ee18dc8 | 2019-07-17 11:27:46 +0100 | [diff] [blame] | 604 | struct QuantizedLstmQueueDescriptor : QueueDescriptor |
| 605 | { |
| 606 | QuantizedLstmQueueDescriptor() |
| 607 | : m_InputToInputWeights(nullptr) |
| 608 | , m_InputToForgetWeights(nullptr) |
| 609 | , m_InputToCellWeights(nullptr) |
| 610 | , m_InputToOutputWeights(nullptr) |
| 611 | |
| 612 | , m_RecurrentToInputWeights(nullptr) |
| 613 | , m_RecurrentToForgetWeights(nullptr) |
| 614 | , m_RecurrentToCellWeights(nullptr) |
| 615 | , m_RecurrentToOutputWeights(nullptr) |
| 616 | |
| 617 | , m_InputGateBias(nullptr) |
| 618 | , m_ForgetGateBias(nullptr) |
| 619 | , m_CellBias(nullptr) |
| 620 | , m_OutputGateBias(nullptr) |
| 621 | {} |
| 622 | |
| 623 | const ConstCpuTensorHandle* m_InputToInputWeights; |
| 624 | const ConstCpuTensorHandle* m_InputToForgetWeights; |
| 625 | const ConstCpuTensorHandle* m_InputToCellWeights; |
| 626 | const ConstCpuTensorHandle* m_InputToOutputWeights; |
| 627 | |
| 628 | const ConstCpuTensorHandle* m_RecurrentToInputWeights; |
| 629 | const ConstCpuTensorHandle* m_RecurrentToForgetWeights; |
| 630 | const ConstCpuTensorHandle* m_RecurrentToCellWeights; |
| 631 | const ConstCpuTensorHandle* m_RecurrentToOutputWeights; |
| 632 | |
| 633 | const ConstCpuTensorHandle* m_InputGateBias; |
| 634 | const ConstCpuTensorHandle* m_ForgetGateBias; |
| 635 | const ConstCpuTensorHandle* m_CellBias; |
| 636 | const ConstCpuTensorHandle* m_OutputGateBias; |
| 637 | |
| 638 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 639 | }; |
| 640 | |
Kevin May | 868eb14 | 2019-09-04 17:29:31 +0100 | [diff] [blame] | 641 | struct AbsQueueDescriptor : QueueDescriptor |
| 642 | { |
| 643 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 644 | }; |
| 645 | |
Aron Virginas-Tar | 636ab40 | 2019-09-16 14:27:45 +0100 | [diff] [blame] | 646 | struct SliceQueueDescriptor : QueueDescriptorWithParameters<SliceDescriptor> |
| 647 | { |
| 648 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 649 | }; |
| 650 | |
Aron Virginas-Tar | dd6247f | 2019-09-19 14:31:17 +0100 | [diff] [blame] | 651 | struct DepthToSpaceQueueDescriptor : QueueDescriptorWithParameters<DepthToSpaceDescriptor> |
| 652 | { |
| 653 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 654 | }; |
| 655 | |
Aron Virginas-Tar | 77bfb5e | 2019-10-16 17:45:38 +0100 | [diff] [blame] | 656 | struct ComparisonQueueDescriptor : QueueDescriptorWithParameters<ComparisonDescriptor> |
| 657 | { |
| 658 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 659 | }; |
| 660 | |
josh minor | 4a3c610 | 2020-01-06 16:40:46 -0600 | [diff] [blame] | 661 | struct ElementwiseUnaryQueueDescriptor : QueueDescriptorWithParameters<ElementwiseUnaryDescriptor> |
| 662 | { |
| 663 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 664 | }; |
| 665 | |
James Conroy | aba90cd | 2020-11-06 16:28:18 +0000 | [diff] [blame] | 666 | struct LogicalBinaryQueueDescriptor : QueueDescriptorWithParameters<LogicalBinaryDescriptor> |
| 667 | { |
| 668 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 669 | }; |
| 670 | |
Aron Virginas-Tar | 636ab40 | 2019-09-16 14:27:45 +0100 | [diff] [blame] | 671 | } // namespace armnn |