David Monahan | 8a57046 | 2023-11-22 13:24:25 +0000 | [diff] [blame^] | 1 | // |
| 2 | // Copyright © 2023 Arm Ltd and Contributors. All rights reserved. |
| 3 | // SPDX-License-Identifier: MIT |
| 4 | // |
| 5 | |
| 6 | #include "GpuFsaConvolution2dValidate.hpp" |
| 7 | |
| 8 | #include <armnn/Types.hpp> |
| 9 | #include <armnn/utility/IgnoreUnused.hpp> |
| 10 | |
| 11 | #include <aclCommon/ArmComputeTensorUtils.hpp> |
| 12 | |
| 13 | #include <arm_compute/core/ITensorInfo.h> |
| 14 | #include <arm_compute/core/TensorInfo.h> |
| 15 | #include <arm_compute/core/TensorShape.h> |
| 16 | #include <arm_compute/core/CL/CLKernelLibrary.h> |
| 17 | #include <arm_compute/core/CL/CLCompileContext.h> |
| 18 | |
| 19 | #include <arm_compute/dynamic_fusion/runtime/gpu/cl/ClWorkloadRuntime.h> |
| 20 | #include <arm_compute/dynamic_fusion/sketch/gpu/GpuWorkloadContext.h> |
| 21 | #include <arm_compute/dynamic_fusion/sketch/gpu/operators/GpuConv2d.h> |
| 22 | #include <arm_compute/dynamic_fusion/sketch/gpu/operators/GpuOutput.h> |
| 23 | |
| 24 | #include <vector> |
| 25 | #include <iostream> |
| 26 | |
| 27 | namespace armnn |
| 28 | { |
| 29 | |
| 30 | using namespace armcomputetensorutils; |
| 31 | |
| 32 | inline arm_compute::Status ValidateAndCreateOp(const TensorInfo& input, |
| 33 | const Convolution2dDescriptor& descriptor, |
| 34 | const TensorInfo& weights, |
| 35 | const Optional<TensorInfo>& biases, |
| 36 | const bool createOp = false) |
| 37 | { |
| 38 | // Create a new workload sketch, for validation purposes |
| 39 | auto compileCtx = arm_compute::CLKernelLibrary::get().get_compile_context(); |
| 40 | auto gpuCtx = GpuWorkloadContext(&compileCtx); |
| 41 | GpuWorkloadSketch sketch{ &gpuCtx }; |
| 42 | |
| 43 | // Build and create tensor infos using the sketch |
| 44 | const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout); |
| 45 | arm_compute::TensorInfo aclWeightsInfo = BuildArmComputeTensorInfo(weights, descriptor.m_DataLayout); |
| 46 | aclWeightsInfo.set_are_values_constant(weights.IsConstant()); |
| 47 | |
| 48 | auto inputInfo = gpuCtx.create_tensor_info(aclInputInfo); |
| 49 | auto weightInfo = gpuCtx.create_tensor_info(aclWeightsInfo); |
| 50 | |
| 51 | // Only create the bias tensor info if enabled, otherwise pass nullptr to validate_op |
| 52 | arm_compute::TensorInfo aclBiasInfo; |
| 53 | arm_compute::TensorInfo biasSketchInfo; |
| 54 | arm_compute::TensorInfo* biasSketchInfoPtr = nullptr; |
| 55 | |
| 56 | if (descriptor.m_BiasEnabled) |
| 57 | { |
| 58 | if(!biases.has_value()) |
| 59 | { |
| 60 | throw InvalidArgumentException("GpuFsaConvolution2dValidate: No biases set when biases are enabled"); |
| 61 | } |
| 62 | aclBiasInfo = BuildArmComputeTensorInfo(biases.value(), descriptor.m_DataLayout); |
| 63 | aclBiasInfo.set_are_values_constant(biases.value().IsConstant()); |
| 64 | |
| 65 | biasSketchInfo = gpuCtx.create_tensor_info(aclBiasInfo); |
| 66 | biasSketchInfoPtr = &biasSketchInfo; |
| 67 | } |
| 68 | |
| 69 | // Set Conv2d attributes using descriptor |
| 70 | const arm_compute::Size2D aclDilationInfo = BuildArmComputeSize2D(descriptor.m_DilationX, |
| 71 | descriptor.m_DilationY); |
| 72 | const arm_compute::Padding2D aclPadInfo = BuildArmComputePaddingInfo(descriptor); |
| 73 | const arm_compute::Size2D aclStrideInfo = BuildArmComputeSize2D(descriptor.m_StrideX, descriptor.m_StrideY); |
| 74 | |
| 75 | Conv2dAttributes conv2DAttributes{}; |
| 76 | conv2DAttributes.dilation(aclDilationInfo); |
| 77 | conv2DAttributes.pad(aclPadInfo); |
| 78 | conv2DAttributes.stride(aclStrideInfo); |
| 79 | |
| 80 | // Validate operator, check status and update reasonIfUnsupported |
| 81 | arm_compute::Status aclStatus = GpuConv2d::validate_op(sketch, |
| 82 | &inputInfo, |
| 83 | &weightInfo, |
| 84 | biasSketchInfoPtr, |
| 85 | conv2DAttributes); |
| 86 | |
| 87 | if (createOp) |
| 88 | { |
| 89 | const bool supported = (aclStatus.error_code() == arm_compute::ErrorCode::OK); |
| 90 | if (!supported) |
| 91 | { |
| 92 | throw BackendCapabilityException("\"GpuFsa\" backend failed during operation validation when attempting " |
| 93 | "to fuse a GpuConv2d operator into the existing workload sketch."); |
| 94 | } |
| 95 | |
| 96 | arm_compute::ITensorInfo* convOutInfo = GpuConv2d::create_op(sketch, |
| 97 | &inputInfo, |
| 98 | &weightInfo, |
| 99 | biasSketchInfoPtr, |
| 100 | conv2DAttributes); |
| 101 | |
| 102 | // Temporary fix until fusing attempt is make for GpuFsa backend and Output layer workload is created. |
| 103 | auto outputInfo = gpuCtx.create_tensor_info(); |
| 104 | GpuOutput::create_op(sketch, convOutInfo, &outputInfo); |
| 105 | } |
| 106 | |
| 107 | return aclStatus; |
| 108 | } |
| 109 | |
| 110 | arm_compute::Status GpuFsaConvolution2dValidate(const TensorInfo& input, |
| 111 | const Convolution2dDescriptor& descriptor, |
| 112 | const TensorInfo& weights, |
| 113 | const Optional<TensorInfo>& biases) |
| 114 | { |
| 115 | return ValidateAndCreateOp(input, descriptor, weights, biases); |
| 116 | } |
| 117 | |
| 118 | void GpuFsaConvolution2dCreateOp(const TensorInfo& input, |
| 119 | const Convolution2dDescriptor& descriptor, |
| 120 | const TensorInfo& weights, |
| 121 | const Optional<TensorInfo>& biases) |
| 122 | { |
| 123 | ValidateAndCreateOp(input, descriptor, weights, biases, true); |
| 124 | } |
| 125 | |
| 126 | } // namespace armnn |