Sadik Armagan | ac47210 | 2020-03-24 09:54:36 +0000 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2020 Arm Ltd. All rights reserved. |
| 3 | // SPDX-License-Identifier: MIT |
| 4 | // |
| 5 | |
| 6 | #include "NeonNegWorkload.hpp" |
| 7 | |
| 8 | #include "NeonWorkloadUtils.hpp" |
| 9 | |
| 10 | #include <aclCommon/ArmComputeTensorHandle.hpp> |
| 11 | #include <aclCommon/ArmComputeTensorUtils.hpp> |
Jan Eilers | bb446e5 | 2020-04-02 13:56:54 +0100 | [diff] [blame] | 12 | #include <armnn/utility/PolymorphicDowncast.hpp> |
Sadik Armagan | ac47210 | 2020-03-24 09:54:36 +0000 | [diff] [blame] | 13 | |
| 14 | namespace armnn |
| 15 | { |
| 16 | |
| 17 | arm_compute::Status NeonNegWorkloadValidate(const TensorInfo& input, const TensorInfo& output) |
| 18 | { |
| 19 | const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input); |
| 20 | const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output); |
| 21 | |
| 22 | return arm_compute::NENegLayer::validate(&aclInput, &aclOutput); |
| 23 | } |
| 24 | |
| 25 | NeonNegWorkload::NeonNegWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info) |
| 26 | : BaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) |
| 27 | { |
| 28 | m_Data.ValidateInputsOutputs("NeonNegWorkload", 1, 1); |
| 29 | |
Jan Eilers | bb446e5 | 2020-04-02 13:56:54 +0100 | [diff] [blame] | 30 | arm_compute::ITensor& input = PolymorphicDowncast<IAclTensorHandle*>(m_Data.m_Inputs[0])->GetTensor(); |
| 31 | arm_compute::ITensor& output = PolymorphicDowncast<IAclTensorHandle*>(m_Data.m_Outputs[0])->GetTensor(); |
Sadik Armagan | ac47210 | 2020-03-24 09:54:36 +0000 | [diff] [blame] | 32 | |
| 33 | m_NegLayer.configure(&input, &output); |
| 34 | } |
| 35 | |
| 36 | void NeonNegWorkload::Execute() const |
| 37 | { |
| 38 | ARMNN_SCOPED_PROFILING_EVENT_NEON("NeonNegWorkload_Execute"); |
| 39 | m_NegLayer.run(); |
| 40 | } |
| 41 | |
| 42 | } // namespace armnn |