Sadik Armagan | 3c24f43 | 2020-10-19 17:35:30 +0100 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2020 Arm Ltd and Contributors. All rights reserved. |
| 3 | // SPDX-License-Identifier: MIT |
| 4 | // |
| 5 | |
Sadik Armagan | 3c24f43 | 2020-10-19 17:35:30 +0100 | [diff] [blame] | 6 | #define DOCTEST_CONFIG_IMPLEMENT_WITH_MAIN |
Sadik Armagan | 3c24f43 | 2020-10-19 17:35:30 +0100 | [diff] [blame] | 7 | #include <doctest/doctest.h> |
| 8 | |
Sadik Armagan | 62483be | 2020-10-23 17:14:43 +0100 | [diff] [blame] | 9 | #include <armnn_delegate.hpp> |
| 10 | |
Sadik Armagan | 3c24f43 | 2020-10-19 17:35:30 +0100 | [diff] [blame] | 11 | #include "tensorflow/lite/kernels/builtin_op_kernels.h" |
| 12 | #include <tensorflow/lite/interpreter.h> |
Keith Davis | 892fafe | 2020-11-26 17:40:35 +0000 | [diff] [blame] | 13 | #include <tensorflow/lite/kernels/register.h> |
Sadik Armagan | 3c24f43 | 2020-10-19 17:35:30 +0100 | [diff] [blame] | 14 | |
Sadik Armagan | 62483be | 2020-10-23 17:14:43 +0100 | [diff] [blame] | 15 | namespace armnnDelegate |
Sadik Armagan | 3c24f43 | 2020-10-19 17:35:30 +0100 | [diff] [blame] | 16 | { |
| 17 | |
Sadik Armagan | 3c24f43 | 2020-10-19 17:35:30 +0100 | [diff] [blame] | 18 | TEST_SUITE("ArmnnDelegate") |
| 19 | { |
| 20 | |
| 21 | TEST_CASE ("ArmnnDelegate Registered") |
| 22 | { |
Sadik Armagan | 67e95f2 | 2020-10-29 16:14:54 +0000 | [diff] [blame] | 23 | using namespace tflite; |
Narumol Prangnawarat | 0b51d5a | 2021-01-20 15:58:29 +0000 | [diff] [blame] | 24 | auto tfLiteInterpreter = std::make_unique<Interpreter>(); |
Sadik Armagan | 3c24f43 | 2020-10-19 17:35:30 +0100 | [diff] [blame] | 25 | |
Sadik Armagan | 3c24f43 | 2020-10-19 17:35:30 +0100 | [diff] [blame] | 26 | tfLiteInterpreter->AddTensors(3); |
Sadik Armagan | 67e95f2 | 2020-10-29 16:14:54 +0000 | [diff] [blame] | 27 | tfLiteInterpreter->SetInputs({0, 1}); |
Sadik Armagan | 3c24f43 | 2020-10-19 17:35:30 +0100 | [diff] [blame] | 28 | tfLiteInterpreter->SetOutputs({2}); |
| 29 | |
Sadik Armagan | 67e95f2 | 2020-10-29 16:14:54 +0000 | [diff] [blame] | 30 | tfLiteInterpreter->SetTensorParametersReadWrite(0, kTfLiteFloat32, "input1", {1,2,2,1}, TfLiteQuantization()); |
| 31 | tfLiteInterpreter->SetTensorParametersReadWrite(1, kTfLiteFloat32, "input2", {1,2,2,1}, TfLiteQuantization()); |
| 32 | tfLiteInterpreter->SetTensorParametersReadWrite(2, kTfLiteFloat32, "output", {1,2,2,1}, TfLiteQuantization()); |
Sadik Armagan | 3c24f43 | 2020-10-19 17:35:30 +0100 | [diff] [blame] | 33 | |
Sadik Armagan | 67e95f2 | 2020-10-29 16:14:54 +0000 | [diff] [blame] | 34 | tflite::ops::builtin::BuiltinOpResolver opResolver; |
| 35 | const TfLiteRegistration* opRegister = opResolver.FindOp(BuiltinOperator_ADD, 1); |
| 36 | tfLiteInterpreter->AddNodeWithParameters({0, 1}, {2}, "", 0, nullptr, opRegister); |
Sadik Armagan | 3c24f43 | 2020-10-19 17:35:30 +0100 | [diff] [blame] | 37 | |
Sadik Armagan | 4189cc5 | 2020-11-11 18:01:48 +0000 | [diff] [blame] | 38 | // Create the Armnn Delegate |
Sadik Armagan | 67e95f2 | 2020-10-29 16:14:54 +0000 | [diff] [blame] | 39 | std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef }; |
Sadik Armagan | 4189cc5 | 2020-11-11 18:01:48 +0000 | [diff] [blame] | 40 | std::vector<armnn::BackendOptions> backendOptions; |
| 41 | backendOptions.emplace_back( |
| 42 | armnn::BackendOptions{ "BackendName", |
| 43 | { |
| 44 | { "Option1", 42 }, |
| 45 | { "Option2", true } |
| 46 | }} |
| 47 | ); |
| 48 | |
| 49 | armnnDelegate::DelegateOptions delegateOptions(backends, backendOptions); |
Sadik Armagan | 67e95f2 | 2020-10-29 16:14:54 +0000 | [diff] [blame] | 50 | std::unique_ptr<TfLiteDelegate, decltype(&armnnDelegate::TfLiteArmnnDelegateDelete)> |
| 51 | theArmnnDelegate(armnnDelegate::TfLiteArmnnDelegateCreate(delegateOptions), |
| 52 | armnnDelegate::TfLiteArmnnDelegateDelete); |
| 53 | |
| 54 | auto status = tfLiteInterpreter->ModifyGraphWithDelegate(std::move(theArmnnDelegate)); |
Sadik Armagan | 3c24f43 | 2020-10-19 17:35:30 +0100 | [diff] [blame] | 55 | CHECK(status == kTfLiteOk); |
| 56 | CHECK(tfLiteInterpreter != nullptr); |
Sadik Armagan | 3c24f43 | 2020-10-19 17:35:30 +0100 | [diff] [blame] | 57 | } |
| 58 | |
Narumol Prangnawarat | 0b51d5a | 2021-01-20 15:58:29 +0000 | [diff] [blame] | 59 | TEST_CASE ("ArmnnDelegateOptimizerOptionsRegistered") |
| 60 | { |
| 61 | using namespace tflite; |
| 62 | auto tfLiteInterpreter = std::make_unique<Interpreter>(); |
| 63 | |
| 64 | tfLiteInterpreter->AddTensors(3); |
| 65 | tfLiteInterpreter->SetInputs({0, 1}); |
| 66 | tfLiteInterpreter->SetOutputs({2}); |
| 67 | |
| 68 | tfLiteInterpreter->SetTensorParametersReadWrite(0, kTfLiteFloat32, "input1", {1,2,2,1}, TfLiteQuantization()); |
| 69 | tfLiteInterpreter->SetTensorParametersReadWrite(1, kTfLiteFloat32, "input2", {1,2,2,1}, TfLiteQuantization()); |
| 70 | tfLiteInterpreter->SetTensorParametersReadWrite(2, kTfLiteFloat32, "output", {1,2,2,1}, TfLiteQuantization()); |
| 71 | |
| 72 | tflite::ops::builtin::BuiltinOpResolver opResolver; |
| 73 | const TfLiteRegistration* opRegister = opResolver.FindOp(BuiltinOperator_ADD, 1); |
| 74 | tfLiteInterpreter->AddNodeWithParameters({0, 1}, {2}, "", 0, nullptr, opRegister); |
| 75 | |
| 76 | // Create the Armnn Delegate |
| 77 | std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef }; |
| 78 | |
| 79 | armnn::OptimizerOptions optimizerOptions(true, true, false, true); |
| 80 | |
| 81 | armnnDelegate::DelegateOptions delegateOptions(backends, optimizerOptions); |
| 82 | std::unique_ptr<TfLiteDelegate, decltype(&armnnDelegate::TfLiteArmnnDelegateDelete)> |
| 83 | theArmnnDelegate(armnnDelegate::TfLiteArmnnDelegateCreate(delegateOptions), |
| 84 | armnnDelegate::TfLiteArmnnDelegateDelete); |
| 85 | |
| 86 | auto status = tfLiteInterpreter->ModifyGraphWithDelegate(std::move(theArmnnDelegate)); |
| 87 | CHECK(status == kTfLiteOk); |
| 88 | CHECK(tfLiteInterpreter != nullptr); |
| 89 | } |
| 90 | |
Sadik Armagan | 3c24f43 | 2020-10-19 17:35:30 +0100 | [diff] [blame] | 91 | } |
| 92 | |
Sadik Armagan | 62483be | 2020-10-23 17:14:43 +0100 | [diff] [blame] | 93 | } // namespace armnnDelegate |