telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2017 Arm Ltd. All rights reserved. |
David Beck | ecb56cd | 2018-09-05 12:52:57 +0100 | [diff] [blame] | 3 | // SPDX-License-Identifier: MIT |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 4 | // |
| 5 | |
Nattapat Chaimanowong | 974b65f | 2018-10-15 15:07:34 +0100 | [diff] [blame] | 6 | #include "NeonConvolution2dWorkload.hpp" |
| 7 | |
Aron Virginas-Tar | c9cc804 | 2018-11-01 16:15:57 +0000 | [diff] [blame] | 8 | #include <backendsCommon/CpuTensorHandle.hpp> |
| 9 | #include <aclCommon/ArmComputeTensorUtils.hpp> |
| 10 | #include <neon/NeonLayerSupport.hpp> |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 11 | |
David Beck | 711fa31 | 2018-09-24 10:46:38 +0100 | [diff] [blame] | 12 | #include <armnn/Types.hpp> |
Aron Virginas-Tar | c9cc804 | 2018-11-01 16:15:57 +0000 | [diff] [blame] | 13 | #include <Half.hpp> |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 14 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 15 | namespace armnn |
| 16 | { |
| 17 | |
surmeh01 | 3537c2c | 2018-05-18 16:31:43 +0100 | [diff] [blame] | 18 | using namespace armcomputetensorutils; |
| 19 | |
| 20 | arm_compute::Status NeonConvolution2dWorkloadValidate(const TensorInfo& input, |
| 21 | const TensorInfo& output, |
| 22 | const Convolution2dDescriptor& descriptor, |
| 23 | const TensorInfo& weights, |
David Beck | 5eec11d | 2018-10-04 15:43:17 +0100 | [diff] [blame] | 24 | const Optional<TensorInfo>& biases) |
surmeh01 | 3537c2c | 2018-05-18 16:31:43 +0100 | [diff] [blame] | 25 | { |
Francis Murtagh | 351d13d | 2018-09-24 15:01:18 +0100 | [diff] [blame] | 26 | const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout); |
| 27 | const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout); |
| 28 | const arm_compute::TensorInfo aclWeightsInfo = BuildArmComputeTensorInfo(weights, descriptor.m_DataLayout); |
arovir01 | a682410 | 2018-08-28 17:40:45 +0100 | [diff] [blame] | 29 | |
surmeh01 | 3537c2c | 2018-05-18 16:31:43 +0100 | [diff] [blame] | 30 | arm_compute::TensorInfo aclBiasesInfo; |
| 31 | arm_compute::TensorInfo *optionalAclBiasesInfo = nullptr; |
| 32 | |
| 33 | if (descriptor.m_BiasEnabled) |
| 34 | { |
David Beck | 5eec11d | 2018-10-04 15:43:17 +0100 | [diff] [blame] | 35 | BOOST_ASSERT(biases.has_value()); |
arovir01 | a682410 | 2018-08-28 17:40:45 +0100 | [diff] [blame] | 36 | |
David Beck | 5eec11d | 2018-10-04 15:43:17 +0100 | [diff] [blame] | 37 | aclBiasesInfo = BuildArmComputeTensorInfo(biases.value(), descriptor.m_DataLayout); |
surmeh01 | 3537c2c | 2018-05-18 16:31:43 +0100 | [diff] [blame] | 38 | optionalAclBiasesInfo = &aclBiasesInfo; |
| 39 | } |
| 40 | |
| 41 | arm_compute::PadStrideInfo layerInfo = BuildArmComputePadStrideInfo(descriptor); |
| 42 | |
| 43 | return arm_compute::NEConvolutionLayer::validate(&aclInputInfo, |
| 44 | &aclWeightsInfo, |
| 45 | optionalAclBiasesInfo, |
| 46 | &aclOutputInfo, |
| 47 | layerInfo); |
| 48 | } |
| 49 | |
Nattapat Chaimanowong | 974b65f | 2018-10-15 15:07:34 +0100 | [diff] [blame] | 50 | NeonConvolution2dWorkload::NeonConvolution2dWorkload( |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 51 | const Convolution2dQueueDescriptor& descriptor, const WorkloadInfo& info, |
| 52 | std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager) |
Nattapat Chaimanowong | 974b65f | 2018-10-15 15:07:34 +0100 | [diff] [blame] | 53 | : BaseWorkload<Convolution2dQueueDescriptor>(descriptor, info) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 54 | { |
| 55 | using arm_compute::NEDirectConvolutionLayer; |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 56 | |
Nattapat Chaimanowong | 974b65f | 2018-10-15 15:07:34 +0100 | [diff] [blame] | 57 | m_Data.ValidateInputsOutputs("NeonConvolution2dWorkload", 1, 1); |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 58 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 59 | // todo: check tensor shapes match. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 60 | |
| 61 | arm_compute::ITensor& input = boost::polymorphic_downcast<INeonTensorHandle*>(m_Data.m_Inputs[0])->GetTensor(); |
| 62 | arm_compute::ITensor& output = boost::polymorphic_downcast<INeonTensorHandle*>(m_Data.m_Outputs[0])->GetTensor(); |
| 63 | |
Francis Murtagh | d59116e | 2018-10-04 16:03:07 +0100 | [diff] [blame] | 64 | arm_compute::DataLayout aclDataLayout = ConvertDataLayout(m_Data.m_Parameters.m_DataLayout); |
| 65 | input.info()->set_data_layout(aclDataLayout); |
| 66 | output.info()->set_data_layout(aclDataLayout); |
| 67 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 68 | m_KernelTensor = std::make_unique<arm_compute::Tensor>(); |
Francis Murtagh | d59116e | 2018-10-04 16:03:07 +0100 | [diff] [blame] | 69 | BuildArmComputeTensor(*m_KernelTensor, m_Data.m_Weight->GetTensorInfo(), m_Data.m_Parameters.m_DataLayout); |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 70 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 71 | if (m_Data.m_Parameters.m_BiasEnabled) |
| 72 | { |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 73 | m_BiasTensor = std::make_unique<arm_compute::Tensor>(); |
Francis Murtagh | d59116e | 2018-10-04 16:03:07 +0100 | [diff] [blame] | 74 | BuildArmComputeTensor(*m_BiasTensor, m_Data.m_Bias->GetTensorInfo(), m_Data.m_Parameters.m_DataLayout); |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 75 | } |
| 76 | |
| 77 | arm_compute::PadStrideInfo padStrideInfo(m_Data.m_Parameters.m_StrideX, |
| 78 | m_Data.m_Parameters.m_StrideY, |
| 79 | m_Data.m_Parameters.m_PadLeft, |
| 80 | m_Data.m_Parameters.m_PadRight, |
| 81 | m_Data.m_Parameters.m_PadTop, |
| 82 | m_Data.m_Parameters.m_PadBottom, |
| 83 | arm_compute::DimensionRoundingType::FLOOR); |
| 84 | |
narpra01 | fca75c3 | 2018-11-16 12:38:41 +0000 | [diff] [blame] | 85 | auto convolutionLayer = std::make_unique<arm_compute::NEConvolutionLayer>(memoryManager); |
| 86 | convolutionLayer->configure(&input, |
| 87 | m_KernelTensor.get(), |
| 88 | m_BiasTensor.get(), |
| 89 | &output, |
| 90 | padStrideInfo); |
| 91 | m_ConvolutionLayer.reset(convolutionLayer.release()); |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 92 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 93 | BOOST_ASSERT(m_ConvolutionLayer); |
| 94 | |
Nattapat Chaimanowong | 177d8d2 | 2018-10-16 13:21:27 +0100 | [diff] [blame] | 95 | InitializeArmComputeTensorData(*m_KernelTensor, m_Data.m_Weight); |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 96 | |
Nattapat Chaimanowong | 974b65f | 2018-10-15 15:07:34 +0100 | [diff] [blame] | 97 | if (m_Data.m_Parameters.m_BiasEnabled) |
| 98 | { |
| 99 | InitializeArmComputeTensorData(*m_BiasTensor, m_Data.m_Bias); |
| 100 | } |
| 101 | |
| 102 | m_ConvolutionLayer->prepare(); |
| 103 | FreeUnusedTensors(); |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 104 | } |
| 105 | |
Nattapat Chaimanowong | 974b65f | 2018-10-15 15:07:34 +0100 | [diff] [blame] | 106 | void NeonConvolution2dWorkload::Execute() const |
| 107 | { |
| 108 | ARMNN_SCOPED_PROFILING_EVENT_NEON("NeonConvolution2dWorkload_Execute"); |
| 109 | m_ConvolutionLayer->run(); |
| 110 | } |
| 111 | |
| 112 | void NeonConvolution2dWorkload::FreeUnusedTensors() |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 113 | { |
| 114 | FreeTensorIfUnused(m_KernelTensor); |
| 115 | FreeTensorIfUnused(m_BiasTensor); |
| 116 | } |
| 117 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 118 | } //namespace armnn |