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telsoa014fcda012018-03-09 14:13:49 +00001//
2// Copyright © 2017 Arm Ltd. All rights reserved.
David Beckecb56cd2018-09-05 12:52:57 +01003// SPDX-License-Identifier: MIT
telsoa014fcda012018-03-09 14:13:49 +00004//
5#pragma once
6
Aron Virginas-Tarc9cc8042018-11-01 16:15:57 +00007#include "CpuTensorHandleFwd.hpp"
telsoa014fcda012018-03-09 14:13:49 +00008#include "WorkloadDataFwd.hpp"
9
Aron Virginas-Tarc9cc8042018-11-01 16:15:57 +000010#include <InternalTypes.hpp>
11
David Beck0dbe0ee2018-09-24 15:59:27 +010012#include <armnn/Descriptors.hpp>
13#include <armnn/Exceptions.hpp>
Aron Virginas-Tarc9cc8042018-11-01 16:15:57 +000014#include <armnn/Types.hpp>
15#include <armnn/Tensor.hpp>
David Beck0dbe0ee2018-09-24 15:59:27 +010016
Aron Virginas-Tarc9cc8042018-11-01 16:15:57 +000017#include <backendsCommon/OutputHandler.hpp>
18#include <backendsCommon/WorkloadInfo.hpp>
telsoa014fcda012018-03-09 14:13:49 +000019
20namespace armnn
21{
22
telsoa01c577f2c2018-08-31 09:22:23 +010023//A helper function that returns the bias data type required for given input data type.
telsoa014fcda012018-03-09 14:13:49 +000024DataType GetBiasDataType(DataType inputDataType);
25
26struct WorkloadInfo;
27
28struct QueueDescriptor
29{
30 std::vector<ITensorHandle*> m_Inputs;
31 std::vector<ITensorHandle*> m_Outputs;
32
33 void ValidateInputsOutputs(const std::string& descName,
34 unsigned int numExpectedIn, unsigned int numExpectedOut) const;
35
36
37protected:
38 ~QueueDescriptor() = default;
39 QueueDescriptor() = default;
40 QueueDescriptor(QueueDescriptor const&) = default;
41 QueueDescriptor& operator=(QueueDescriptor const&) = default;
42};
43
telsoa01c577f2c2018-08-31 09:22:23 +010044// Base class for queue descriptors which contain parameters.
telsoa014fcda012018-03-09 14:13:49 +000045template <typename LayerDescriptor>
46struct QueueDescriptorWithParameters : public QueueDescriptor
47{
48 LayerDescriptor m_Parameters;
49
50protected:
51 ~QueueDescriptorWithParameters() = default;
52 QueueDescriptorWithParameters() = default;
53 QueueDescriptorWithParameters(QueueDescriptorWithParameters const&) = default;
54 QueueDescriptorWithParameters& operator=(QueueDescriptorWithParameters const&) = default;
55};
56
57struct MemCopyQueueDescriptor : QueueDescriptor
58{
59 void Validate(const WorkloadInfo& workloadInfo) const;
60};
61
62using InputQueueDescriptor = MemCopyQueueDescriptor;
63using OutputQueueDescriptor = MemCopyQueueDescriptor;
64
telsoa01c577f2c2018-08-31 09:22:23 +010065// Softmax layer workload data.
telsoa014fcda012018-03-09 14:13:49 +000066struct SoftmaxQueueDescriptor : QueueDescriptorWithParameters<SoftmaxDescriptor>
67{
68 void Validate(const WorkloadInfo& workloadInfo) const;
69};
70
telsoa01c577f2c2018-08-31 09:22:23 +010071// Splitter layer workload data.
telsoa014fcda012018-03-09 14:13:49 +000072struct SplitterQueueDescriptor : QueueDescriptorWithParameters<ViewsDescriptor>
73{
74 struct ViewOrigin
75 {
76 ViewOrigin() {}
77 ViewOrigin(std::vector<unsigned int> const& origin) : m_Origin(origin) {}
78
telsoa01c577f2c2018-08-31 09:22:23 +010079 //View origin (size of the vector is the same as number of dimensions of the view).
telsoa014fcda012018-03-09 14:13:49 +000080 std::vector<unsigned int> m_Origin;
81 };
82
telsoa01c577f2c2018-08-31 09:22:23 +010083 //View defines a tensor that will be carved from the input tensor.
84 //View origins are stored here, the extents are defined by sizes of the output tensors.
telsoa014fcda012018-03-09 14:13:49 +000085 std::vector<ViewOrigin> m_ViewOrigins;
86
87 void Validate(const WorkloadInfo& workloadInfo) const;
88};
89
telsoa01c577f2c2018-08-31 09:22:23 +010090// Merger layer workload data.
telsoa014fcda012018-03-09 14:13:49 +000091struct MergerQueueDescriptor : QueueDescriptorWithParameters<OriginsDescriptor>
92{
93 struct ViewOrigin
94 {
95 ViewOrigin() {}
96 ViewOrigin(const std::vector<unsigned int>& origin) : m_Origin(origin) {}
97
telsoa01c577f2c2018-08-31 09:22:23 +010098 //View origin (size of the vector is the same as number of dimensions of the view).
telsoa014fcda012018-03-09 14:13:49 +000099 std::vector<unsigned int> m_Origin;
100 };
101
telsoa01c577f2c2018-08-31 09:22:23 +0100102 //View defines a sub-area of the output tensor that will be filled with the corresponding input tensor.
103 //View origins are stored here, the extents are defined by sizes of the input tensors.
telsoa014fcda012018-03-09 14:13:49 +0000104 std::vector<ViewOrigin> m_ViewOrigins;
105
106 void Validate(const WorkloadInfo& workloadInfo) const;
107};
108
telsoa01c577f2c2018-08-31 09:22:23 +0100109// Activation layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000110struct ActivationQueueDescriptor : QueueDescriptorWithParameters<ActivationDescriptor>
111{
112 void Validate(const WorkloadInfo& workloadInfo) const;
113};
114
telsoa01c577f2c2018-08-31 09:22:23 +0100115// Fully connected layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000116struct FullyConnectedQueueDescriptor : QueueDescriptorWithParameters<FullyConnectedDescriptor>
117{
118 FullyConnectedQueueDescriptor()
119 : m_Weight(nullptr)
120 , m_Bias(nullptr)
121 {
122 }
123
124 const ConstCpuTensorHandle* m_Weight;
125 const ConstCpuTensorHandle* m_Bias;
126
127 void Validate(const WorkloadInfo& workloadInfo) const;
128};
129
telsoa01c577f2c2018-08-31 09:22:23 +0100130// Permute layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000131struct PermuteQueueDescriptor : QueueDescriptorWithParameters<PermuteDescriptor>
132{
133 void Validate(const WorkloadInfo& workloadInfo) const;
134};
135
telsoa01c577f2c2018-08-31 09:22:23 +0100136// Pooling 2D layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000137struct Pooling2dQueueDescriptor : QueueDescriptorWithParameters<Pooling2dDescriptor>
138{
139 void Validate(const WorkloadInfo& workloadInfo) const;
140};
141
telsoa01c577f2c2018-08-31 09:22:23 +0100142// Convolution 2D layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000143struct Convolution2dQueueDescriptor : QueueDescriptorWithParameters<Convolution2dDescriptor>
144{
145 Convolution2dQueueDescriptor()
146 : m_Weight(nullptr)
147 , m_Bias(nullptr)
148 {
149 }
150
151 const ConstCpuTensorHandle* m_Weight;
152 const ConstCpuTensorHandle* m_Bias;
153
154 void Validate(const WorkloadInfo& workloadInfo) const;
155};
156
telsoa01c577f2c2018-08-31 09:22:23 +0100157// Depthwise Convolution 2D layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000158struct DepthwiseConvolution2dQueueDescriptor : QueueDescriptorWithParameters<DepthwiseConvolution2dDescriptor>
159{
160 DepthwiseConvolution2dQueueDescriptor()
161 : m_Weight(nullptr)
162 , m_Bias(nullptr)
163 {
164 }
165
166 const ConstCpuTensorHandle* m_Weight;
167 const ConstCpuTensorHandle* m_Bias;
168
169 void Validate(const WorkloadInfo& workloadInfo) const;
170};
171
Narumol Prangnawarat94dd5d82019-01-23 18:06:26 +0000172struct DetectionPostProcessQueueDescriptor : QueueDescriptorWithParameters<DetectionPostProcessDescriptor>
173{
Narumol Prangnawaratbc67cef2019-01-31 15:31:54 +0000174 DetectionPostProcessQueueDescriptor()
175 : m_Anchors(nullptr)
176 {
177 }
178
179 const ConstCpuTensorHandle* m_Anchors;
180
Narumol Prangnawarat94dd5d82019-01-23 18:06:26 +0000181 void Validate(const WorkloadInfo& workloadInfo) const;
182};
183
telsoa01c577f2c2018-08-31 09:22:23 +0100184// Normalization layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000185struct NormalizationQueueDescriptor : QueueDescriptorWithParameters<NormalizationDescriptor>
186{
187 void Validate(const WorkloadInfo& workloadInfo) const;
188};
189
telsoa01c577f2c2018-08-31 09:22:23 +0100190// Add layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000191struct AdditionQueueDescriptor : QueueDescriptor
192{
193 void Validate(const WorkloadInfo& workloadInfo) const;
194};
195
telsoa01c577f2c2018-08-31 09:22:23 +0100196// Multiplication layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000197struct MultiplicationQueueDescriptor : QueueDescriptor
198{
199 void Validate(const WorkloadInfo& workloadInfo) const;
200};
201
Francis Murtaghe7a86a42018-08-29 12:42:10 +0100202// Division layer workload data.
203struct DivisionQueueDescriptor : QueueDescriptor
204{
205 void Validate(const WorkloadInfo& workloadInfo) const;
206};
207
David Beckc2044fe2018-09-05 15:00:38 +0100208// Subtraction layer workload data.
209struct SubtractionQueueDescriptor : QueueDescriptor
210{
211 void Validate(const WorkloadInfo& workloadInfo) const;
212};
213
Nattapat Chaimanowong5a4304a2018-11-28 10:44:37 +0000214// Maximum layer workload data.
215struct MaximumQueueDescriptor : QueueDescriptor
216{
217 void Validate(const WorkloadInfo& workloadInfo) const;
218};
219
narpra01a6bf9122018-09-10 09:50:09 +0100220// Mean layer workload data.
narpra0132b90462018-09-13 11:07:48 +0100221struct MeanQueueDescriptor : QueueDescriptorWithParameters<MeanDescriptor>
narpra01a6bf9122018-09-10 09:50:09 +0100222{
223 void Validate(const WorkloadInfo& workloadInfo) const;
224};
225
jimfly012c9322a2018-09-19 10:59:49 +0100226// Pad layer workload data
227struct PadQueueDescriptor : QueueDescriptorWithParameters<PadDescriptor>
228{
229 void Validate(const WorkloadInfo& workloadInfo) const;
230};
231
FrancisMurtagh20995952018-12-17 12:11:36 +0000232// Equal layer workload data
233struct EqualQueueDescriptor : QueueDescriptor
234{
235 void Validate(const WorkloadInfo& workloadInfo) const;
236};
237
telsoa01c577f2c2018-08-31 09:22:23 +0100238// Batch norm layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000239struct BatchNormalizationQueueDescriptor : QueueDescriptorWithParameters<BatchNormalizationDescriptor>
240{
241 BatchNormalizationQueueDescriptor()
242 : m_Mean(nullptr)
243 , m_Variance(nullptr)
244 , m_Beta(nullptr)
245 , m_Gamma(nullptr)
246 {
247 }
248
249 const ConstCpuTensorHandle* m_Mean;
250 const ConstCpuTensorHandle* m_Variance;
251 const ConstCpuTensorHandle* m_Beta;
252 const ConstCpuTensorHandle* m_Gamma;
253
254 void Validate(const WorkloadInfo& workloadInfo) const;
255};
256
257struct ResizeBilinearQueueDescriptor : QueueDescriptorWithParameters<ResizeBilinearDescriptor>
258{
259 void Validate(const WorkloadInfo& workloadInfo) const;
260};
261
262struct FakeQuantizationQueueDescriptor : QueueDescriptorWithParameters<FakeQuantizationDescriptor>
263{
264 FakeQuantizationQueueDescriptor()
265 : m_Min(nullptr)
266 , m_Max(nullptr)
267 {
268 }
269
270 const ConstCpuTensorHandle* m_Min;
271 const ConstCpuTensorHandle* m_Max;
272
273 void Validate(const WorkloadInfo& workloadInfo) const;
274};
275
Matteo Martincighbcd3c852018-09-28 14:14:12 +0100276struct L2NormalizationQueueDescriptor : QueueDescriptorWithParameters<L2NormalizationDescriptor>
telsoa014fcda012018-03-09 14:13:49 +0000277{
278 void Validate(const WorkloadInfo& workloadInfo) const;
279};
280
281struct ConstantQueueDescriptor : QueueDescriptor
282{
283 ConstantQueueDescriptor()
284 : m_LayerOutput(nullptr)
285 {
286 }
287
288 const ConstCpuTensorHandle* m_LayerOutput;
289
290 void Validate(const WorkloadInfo& workloadInfo) const;
291};
292
293struct ReshapeQueueDescriptor : QueueDescriptorWithParameters<ReshapeDescriptor>
294{
295 void Validate(const WorkloadInfo& workloadInfo) const;
296};
297
Nattapat Chaimanowong207ef9a2018-11-02 10:57:25 +0000298struct SpaceToBatchNdQueueDescriptor : QueueDescriptorWithParameters<SpaceToBatchNdDescriptor>
299{
300 void Validate(const WorkloadInfo& workloadInfo) const;
301};
302
telsoa014fcda012018-03-09 14:13:49 +0000303struct FloorQueueDescriptor : QueueDescriptor
304{
305 void Validate(const WorkloadInfo& workloadInfo) const;
306};
307
telsoa01c577f2c2018-08-31 09:22:23 +0100308struct LstmQueueDescriptor : QueueDescriptorWithParameters<LstmDescriptor>
309{
310 LstmQueueDescriptor()
311 : m_InputToInputWeights(nullptr)
312 , m_InputToForgetWeights(nullptr)
313 , m_InputToCellWeights(nullptr)
314 , m_InputToOutputWeights(nullptr)
315 , m_RecurrentToInputWeights(nullptr)
316 , m_RecurrentToForgetWeights(nullptr)
317 , m_RecurrentToCellWeights(nullptr)
318 , m_RecurrentToOutputWeights(nullptr)
319 , m_CellToInputWeights(nullptr)
320 , m_CellToForgetWeights(nullptr)
321 , m_CellToOutputWeights(nullptr)
322 , m_InputGateBias(nullptr)
323 , m_ForgetGateBias(nullptr)
324 , m_CellBias(nullptr)
325 , m_OutputGateBias(nullptr)
326 , m_ProjectionWeights(nullptr)
327 , m_ProjectionBias(nullptr)
328 {
329 }
330
331 const ConstCpuTensorHandle* m_InputToInputWeights;
332 const ConstCpuTensorHandle* m_InputToForgetWeights;
333 const ConstCpuTensorHandle* m_InputToCellWeights;
334 const ConstCpuTensorHandle* m_InputToOutputWeights;
335 const ConstCpuTensorHandle* m_RecurrentToInputWeights;
336 const ConstCpuTensorHandle* m_RecurrentToForgetWeights;
337 const ConstCpuTensorHandle* m_RecurrentToCellWeights;
338 const ConstCpuTensorHandle* m_RecurrentToOutputWeights;
339 const ConstCpuTensorHandle* m_CellToInputWeights;
340 const ConstCpuTensorHandle* m_CellToForgetWeights;
341 const ConstCpuTensorHandle* m_CellToOutputWeights;
342 const ConstCpuTensorHandle* m_InputGateBias;
343 const ConstCpuTensorHandle* m_ForgetGateBias;
344 const ConstCpuTensorHandle* m_CellBias;
345 const ConstCpuTensorHandle* m_OutputGateBias;
346 const ConstCpuTensorHandle* m_ProjectionWeights;
347 const ConstCpuTensorHandle* m_ProjectionBias;
348
349 void Validate(const WorkloadInfo& workloadInfo) const;
350};
351
352struct ConvertFp16ToFp32QueueDescriptor : QueueDescriptor
353{
354 void Validate(const WorkloadInfo& workloadInfo) const;
355};
356
357struct ConvertFp32ToFp16QueueDescriptor : QueueDescriptor
358{
359 void Validate(const WorkloadInfo& workloadInfo) const;
360};
361
Éanna Ó Catháin4e1e1362018-11-12 11:36:34 +0000362struct BatchToSpaceNdQueueDescriptor : QueueDescriptorWithParameters<BatchToSpaceNdDescriptor>
363{
364 void Validate(const WorkloadInfo& workloadInfo) const;
365};
Conor Kennedy430b5d82018-11-14 15:28:28 +0000366
367struct StridedSliceQueueDescriptor : QueueDescriptorWithParameters<StridedSliceDescriptor>
368{
369 void Validate(const WorkloadInfo& workloadInfo) const;
370};
371
Éanna Ó Catháin20e58802018-12-04 10:29:06 +0000372// Minimum layer workload data.
kevmay0190539692018-11-29 08:40:19 +0000373struct MinimumQueueDescriptor : QueueDescriptor
374{
375 void Validate(const WorkloadInfo& workloadInfo) const;
376};
377
Matteo Martincigh59a950c2018-12-13 12:48:25 +0000378struct GreaterQueueDescriptor : QueueDescriptor
379{
380 void Validate(const WorkloadInfo& workloadInfo) const;
381};
382
Nattapat Chaimanowongac5aa1f2018-12-05 15:17:18 +0000383struct DebugQueueDescriptor : QueueDescriptorWithParameters<DebugDescriptor>
Nattapat Chaimanowonga9a1cf12018-12-03 16:06:49 +0000384{
385 void Validate(const WorkloadInfo& workloadInfo) const;
386};
387
Mohamed Nour Abouelseouda1d3c6a2018-12-27 12:39:16 +0000388struct RsqrtQueueDescriptor : QueueDescriptor
389{
390 void Validate(const WorkloadInfo& workloadInfo) const;
391};
392
narpra01b89b05f2019-01-16 09:53:09 +0000393struct GatherQueueDescriptor : QueueDescriptor
394{
395 void Validate(const WorkloadInfo& workloadInfo) const;
396};
397
Matteo Martincigh49124022019-01-11 13:25:59 +0000398struct PreCompiledQueueDescriptor : QueueDescriptorWithParameters<PreCompiledDescriptor>
399{
400 PreCompiledQueueDescriptor()
401 : m_PreCompiledObject(nullptr)
402 {
403 }
404
405 std::shared_ptr<void> m_PreCompiledObject;
406
407 void Validate(const WorkloadInfo& workloadInfo) const;
408};
409
telsoa014fcda012018-03-09 14:13:49 +0000410} //namespace armnn