Simon Obute | 51f6777 | 2021-09-03 15:50:13 +0100 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2021 Arm Ltd and Contributors. All rights reserved. |
| 3 | // SPDX-License-Identifier: MIT |
| 4 | // |
| 5 | |
| 6 | #pragma once |
| 7 | |
Finn Williams | 73c547d | 2022-02-15 20:47:34 +0000 | [diff] [blame] | 8 | #include "RefBaseWorkload.hpp" |
Colm Donelan | 0c47974 | 2021-12-10 12:43:54 +0000 | [diff] [blame] | 9 | #include <armnn/backends/WorkloadData.hpp> |
Simon Obute | 51f6777 | 2021-09-03 15:50:13 +0100 | [diff] [blame] | 10 | |
| 11 | namespace armnn |
| 12 | { |
| 13 | |
Finn Williams | 73c547d | 2022-02-15 20:47:34 +0000 | [diff] [blame] | 14 | class RefChannelShuffleWorkload : public RefBaseWorkload<ChannelShuffleQueueDescriptor> |
Simon Obute | 51f6777 | 2021-09-03 15:50:13 +0100 | [diff] [blame] | 15 | { |
| 16 | public: |
Finn Williams | 73c547d | 2022-02-15 20:47:34 +0000 | [diff] [blame] | 17 | using RefBaseWorkload<ChannelShuffleQueueDescriptor>::RefBaseWorkload; |
Simon Obute | 51f6777 | 2021-09-03 15:50:13 +0100 | [diff] [blame] | 18 | void Execute() const override; |
| 19 | void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; |
| 20 | |
| 21 | private: |
| 22 | void Execute(std::vector<ITensorHandle*> inputs, std::vector<ITensorHandle*> outputs) const; |
| 23 | }; |
| 24 | |
| 25 | } // namespace armnn |