telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2017 Arm Ltd. All rights reserved. |
David Beck | ecb56cd | 2018-09-05 12:52:57 +0100 | [diff] [blame] | 3 | // SPDX-License-Identifier: MIT |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 4 | // |
| 5 | #pragma once |
| 6 | |
arovir01 | 616e775 | 2018-10-01 17:08:59 +0100 | [diff] [blame] | 7 | #include <armnnUtils/Half.hpp> |
Matthew Bentham | 14e4669 | 2018-09-20 15:35:30 +0100 | [diff] [blame] | 8 | |
Aron Virginas-Tar | 3b278e9 | 2018-10-12 13:00:55 +0100 | [diff] [blame] | 9 | #include <backends/aclCommon/ArmComputeTensorUtils.hpp> |
| 10 | #include <backends/cl/OpenClTimer.hpp> |
| 11 | #include <backends/CpuTensorHandle.hpp> |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 12 | |
| 13 | #define ARMNN_SCOPED_PROFILING_EVENT_CL(name) \ |
| 14 | ARMNN_SCOPED_PROFILING_EVENT_WITH_INSTRUMENTS(armnn::Compute::GpuAcc, \ |
| 15 | name, \ |
| 16 | armnn::OpenClTimer(), \ |
| 17 | armnn::WallClockTimer()) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 18 | |
| 19 | namespace armnn |
| 20 | { |
| 21 | |
| 22 | template <typename T> |
Matthew Bentham | ca6616c | 2018-09-21 15:16:53 +0100 | [diff] [blame] | 23 | void CopyArmComputeClTensorData(arm_compute::CLTensor& dstTensor, const T* srcData) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 24 | { |
| 25 | { |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 26 | ARMNN_SCOPED_PROFILING_EVENT_CL("MapClTensorForWriting"); |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 27 | dstTensor.map(true); |
| 28 | } |
| 29 | |
| 30 | { |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 31 | ARMNN_SCOPED_PROFILING_EVENT_CL("CopyToClTensor"); |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 32 | armcomputetensorutils::CopyArmComputeITensorData<T>(srcData, dstTensor); |
| 33 | } |
| 34 | |
| 35 | dstTensor.unmap(); |
| 36 | } |
| 37 | |
Matthew Bentham | 785df50 | 2018-09-21 10:29:58 +0100 | [diff] [blame] | 38 | inline void InitializeArmComputeClTensorData(arm_compute::CLTensor& clTensor, |
| 39 | const ConstCpuTensorHandle* handle) |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 40 | { |
| 41 | BOOST_ASSERT(handle); |
Matthew Bentham | ca6616c | 2018-09-21 15:16:53 +0100 | [diff] [blame] | 42 | |
| 43 | armcomputetensorutils::InitialiseArmComputeTensorEmpty(clTensor); |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 44 | switch(handle->GetTensorInfo().GetDataType()) |
| 45 | { |
| 46 | case DataType::Float16: |
Matthew Bentham | ca6616c | 2018-09-21 15:16:53 +0100 | [diff] [blame] | 47 | CopyArmComputeClTensorData(clTensor, handle->GetConstTensor<armnn::Half>()); |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 48 | break; |
| 49 | case DataType::Float32: |
Matthew Bentham | ca6616c | 2018-09-21 15:16:53 +0100 | [diff] [blame] | 50 | CopyArmComputeClTensorData(clTensor, handle->GetConstTensor<float>()); |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 51 | break; |
Matthew Bentham | 785df50 | 2018-09-21 10:29:58 +0100 | [diff] [blame] | 52 | case DataType::QuantisedAsymm8: |
Matthew Bentham | ca6616c | 2018-09-21 15:16:53 +0100 | [diff] [blame] | 53 | CopyArmComputeClTensorData(clTensor, handle->GetConstTensor<uint8_t>()); |
Matthew Bentham | 785df50 | 2018-09-21 10:29:58 +0100 | [diff] [blame] | 54 | break; |
| 55 | case DataType::Signed32: |
Matthew Bentham | ca6616c | 2018-09-21 15:16:53 +0100 | [diff] [blame] | 56 | CopyArmComputeClTensorData(clTensor, handle->GetConstTensor<int32_t>()); |
Matthew Bentham | 785df50 | 2018-09-21 10:29:58 +0100 | [diff] [blame] | 57 | break; |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 58 | default: |
Matthew Bentham | 785df50 | 2018-09-21 10:29:58 +0100 | [diff] [blame] | 59 | BOOST_ASSERT_MSG(false, "Unexpected tensor type."); |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 60 | } |
| 61 | }; |
| 62 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 63 | } //namespace armnn |