Nikhil Raj | 91e4c6d | 2019-07-05 12:22:58 +0100 | [diff] [blame] | 1 | // |
Teresa Charlin | 588cbdf | 2022-01-19 15:55:37 +0000 | [diff] [blame] | 2 | // Copyright © 2017 Arm Ltd and Contributors. All rights reserved. |
Nikhil Raj | 91e4c6d | 2019-07-05 12:22:58 +0100 | [diff] [blame] | 3 | // SPDX-License-Identifier: MIT |
| 4 | // |
| 5 | |
| 6 | #pragma once |
| 7 | |
Teresa Charlin | 588cbdf | 2022-01-19 15:55:37 +0000 | [diff] [blame] | 8 | #include "ClBaseWorkload.hpp" |
Nikhil Raj | 91e4c6d | 2019-07-05 12:22:58 +0100 | [diff] [blame] | 9 | |
Matthew Bentham | 9b3e738 | 2020-02-05 21:39:55 +0000 | [diff] [blame] | 10 | #include <arm_compute/runtime/CL/functions/CLPReluLayer.h> |
Nikhil Raj | 91e4c6d | 2019-07-05 12:22:58 +0100 | [diff] [blame] | 11 | |
| 12 | namespace armnn |
| 13 | { |
| 14 | arm_compute::Status ClPreluWorkloadValidate(const TensorInfo& input, |
| 15 | const TensorInfo& alpha, |
| 16 | const TensorInfo& output); |
| 17 | |
Teresa Charlin | 588cbdf | 2022-01-19 15:55:37 +0000 | [diff] [blame] | 18 | class ClPreluWorkload : public ClBaseWorkload<PreluQueueDescriptor> |
Nikhil Raj | 91e4c6d | 2019-07-05 12:22:58 +0100 | [diff] [blame] | 19 | { |
| 20 | public: |
Sadik Armagan | e944475 | 2020-12-02 11:28:58 +0000 | [diff] [blame] | 21 | ClPreluWorkload(const PreluQueueDescriptor& descriptor, |
| 22 | const WorkloadInfo& info, |
| 23 | const arm_compute::CLCompileContext& clCompileContext); |
Nikhil Raj | 91e4c6d | 2019-07-05 12:22:58 +0100 | [diff] [blame] | 24 | void Execute() const override; |
| 25 | |
| 26 | private: |
| 27 | mutable arm_compute::CLPReluLayer m_PreluLayer; |
| 28 | }; |
| 29 | |
| 30 | } //namespace armnn |