telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2017 Arm Ltd. All rights reserved. |
David Beck | ecb56cd | 2018-09-05 12:52:57 +0100 | [diff] [blame] | 3 | // SPDX-License-Identifier: MIT |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 4 | // |
| 5 | |
| 6 | #pragma once |
| 7 | |
Francis Murtagh | 3b93835 | 2019-07-26 15:44:17 +0100 | [diff] [blame] | 8 | #include <armnn/Descriptors.hpp> |
Matthew Bentham | 14e4669 | 2018-09-20 15:35:30 +0100 | [diff] [blame] | 9 | #include <armnn/Tensor.hpp> |
| 10 | #include <arm_compute/core/Error.h> |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 11 | |
| 12 | namespace armnn |
| 13 | { |
| 14 | |
| 15 | arm_compute::Status ClSoftmaxWorkloadValidate(const TensorInfo& input, |
Francis Murtagh | 3b93835 | 2019-07-26 15:44:17 +0100 | [diff] [blame] | 16 | const TensorInfo& output, |
| 17 | const SoftmaxDescriptor& descriptor); |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 18 | |
| 19 | } // namespace armnn |