James Conroy | 4d1ff58 | 2019-06-10 17:06:39 +0100 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2017 Arm Ltd. All rights reserved. |
| 3 | // SPDX-License-Identifier: MIT |
| 4 | // |
| 5 | |
| 6 | #include "RefMeanWorkload.hpp" |
| 7 | |
Sadik Armagan | 0c3ea5b | 2021-02-03 09:29:30 +0000 | [diff] [blame] | 8 | #include "Reduce.hpp" |
James Conroy | 4d1ff58 | 2019-06-10 17:06:39 +0100 | [diff] [blame] | 9 | #include "RefWorkloadUtils.hpp" |
| 10 | |
| 11 | #include "Profiling.hpp" |
| 12 | |
| 13 | #include <vector> |
| 14 | |
| 15 | namespace armnn |
| 16 | { |
| 17 | |
| 18 | RefMeanWorkload::RefMeanWorkload(const MeanQueueDescriptor& descriptor, const WorkloadInfo& info) |
| 19 | :BaseWorkload<MeanQueueDescriptor>(descriptor, info) {} |
| 20 | |
| 21 | void RefMeanWorkload::Execute() const |
| 22 | { |
| 23 | ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuRef, "RefMeanWorkload_Execute"); |
| 24 | |
| 25 | const TensorInfo& inputInfo = GetTensorInfo(m_Data.m_Inputs[0]); |
| 26 | const TensorInfo& outputInfo = GetTensorInfo(m_Data.m_Outputs[0]); |
| 27 | |
| 28 | auto inputDecoder = MakeDecoder<float>(inputInfo, m_Data.m_Inputs[0]->Map()); |
| 29 | auto outputEncoder = MakeEncoder<float>(outputInfo, m_Data.m_Outputs[0]->Map()); |
| 30 | |
Sadik Armagan | 0c3ea5b | 2021-02-03 09:29:30 +0000 | [diff] [blame] | 31 | Reduce(inputInfo, |
| 32 | outputInfo, |
| 33 | *inputDecoder, |
| 34 | *outputEncoder, |
| 35 | m_Data.m_Parameters.m_Axis, |
| 36 | armnn::ReduceOperation::Mean); |
James Conroy | 4d1ff58 | 2019-06-10 17:06:39 +0100 | [diff] [blame] | 37 | } |
| 38 | |
| 39 | } //namespace armnn |