telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2017 Arm Ltd. All rights reserved. |
David Beck | ecb56cd | 2018-09-05 12:52:57 +0100 | [diff] [blame] | 3 | // SPDX-License-Identifier: MIT |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 4 | // |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 5 | |
Aron Virginas-Tar | 5605519 | 2018-11-12 18:10:43 +0000 | [diff] [blame] | 6 | #include "RefWorkloadFactoryHelper.hpp" |
| 7 | |
Aron Virginas-Tar | c9cc804 | 2018-11-01 16:15:57 +0000 | [diff] [blame] | 8 | #include <test/TensorHelpers.hpp> |
| 9 | #include <test/UnitTests.hpp> |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 10 | |
Aron Virginas-Tar | c9cc804 | 2018-11-01 16:15:57 +0000 | [diff] [blame] | 11 | #include <reference/RefWorkloadFactory.hpp> |
| 12 | #include <backendsCommon/test/LayerTests.hpp> |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 13 | |
arovir01 | 43095f3 | 2018-10-09 18:04:24 +0100 | [diff] [blame] | 14 | #include <boost/test/unit_test.hpp> |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 15 | |
| 16 | BOOST_AUTO_TEST_SUITE(Compute_Reference) |
| 17 | using FactoryType = armnn::RefWorkloadFactory; |
| 18 | |
| 19 | // ============================================================================ |
| 20 | // UNIT tests |
| 21 | |
| 22 | // Convolution |
jimfly01 | 0a088a6 | 2018-10-25 17:05:05 +0100 | [diff] [blame] | 23 | ARMNN_AUTO_TEST_CASE(SimpleConvolution2d3x5, SimpleConvolution2d3x5Test, true, armnn::DataLayout::NCHW) |
| 24 | ARMNN_AUTO_TEST_CASE(SimpleConvolution2d3x5Uint8, SimpleConvolution2d3x5Uint8Test, true, armnn::DataLayout::NCHW) |
narpra01 | 5f70318 | 2018-10-26 16:24:58 +0100 | [diff] [blame] | 25 | ARMNN_AUTO_TEST_CASE(SimpleConvolution2d3x5Nhwc, SimpleConvolution2d3x5Test, true, armnn::DataLayout::NHWC) |
| 26 | ARMNN_AUTO_TEST_CASE(SimpleConvolution2d3x5Uint8Nhwc, SimpleConvolution2d3x5Uint8Test, true, armnn::DataLayout::NHWC) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 27 | |
jimfly01 | 0a088a6 | 2018-10-25 17:05:05 +0100 | [diff] [blame] | 28 | ARMNN_AUTO_TEST_CASE(UnbiasedConvolution2d, SimpleConvolution2d3x5Test, false, armnn::DataLayout::NCHW) |
| 29 | ARMNN_AUTO_TEST_CASE(UnbiasedConvolutionUint8, SimpleConvolution2d3x5Uint8Test, false, armnn::DataLayout::NCHW) |
narpra01 | 5f70318 | 2018-10-26 16:24:58 +0100 | [diff] [blame] | 30 | ARMNN_AUTO_TEST_CASE(UnbiasedConvolution2dNhwc, SimpleConvolution2d3x5Test, false, armnn::DataLayout::NHWC) |
| 31 | ARMNN_AUTO_TEST_CASE(UnbiasedConvolutionUint8Nhwc, SimpleConvolution2d3x5Uint8Test, false, armnn::DataLayout::NHWC) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 32 | |
| 33 | ARMNN_AUTO_TEST_CASE(SimpleConvolution1d, Convolution1dTest, true) |
| 34 | ARMNN_AUTO_TEST_CASE(SimpleConvolution1dUint8, Convolution1dUint8Test, true) |
| 35 | |
narpra01 | 5f70318 | 2018-10-26 16:24:58 +0100 | [diff] [blame] | 36 | ARMNN_AUTO_TEST_CASE(SimpleConvolution2d3x3, SimpleConvolution2d3x3Test, true, armnn::DataLayout::NCHW) |
| 37 | ARMNN_AUTO_TEST_CASE(SimpleConvolution2d3x3Uint8, SimpleConvolution2d3x3Uint8Test, true, armnn::DataLayout::NCHW) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 38 | |
narpra01 | 5f70318 | 2018-10-26 16:24:58 +0100 | [diff] [blame] | 39 | ARMNN_AUTO_TEST_CASE(SimpleConvolution2d3x3Nhwc, SimpleConvolution2d3x3Test, true, armnn::DataLayout::NHWC) |
| 40 | ARMNN_AUTO_TEST_CASE(SimpleConvolution2d3x3Uint8Nhwc, SimpleConvolution2d3x3Uint8Test, true, armnn::DataLayout::NHWC) |
| 41 | |
| 42 | ARMNN_AUTO_TEST_CASE(UnbiasedConvolution2dSquare, SimpleConvolution2d3x3Test, false, armnn::DataLayout::NCHW) |
| 43 | ARMNN_AUTO_TEST_CASE(UnbiasedConvolution2dSquareNhwc, SimpleConvolution2d3x3Test, false, armnn::DataLayout::NHWC) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 44 | |
| 45 | ARMNN_AUTO_TEST_CASE(SimpleConvolution2dAsymmetricPaddingLargerThanHalfKernelSize, |
narpra01 | 5f70318 | 2018-10-26 16:24:58 +0100 | [diff] [blame] | 46 | Convolution2dAsymmetricPaddingLargerThanHalfKernelSizeTest, |
| 47 | armnn::DataLayout::NCHW) |
| 48 | ARMNN_AUTO_TEST_CASE(SimpleConvolution2dAsymmetricPadding, Convolution2dAsymmetricPaddingTest, armnn::DataLayout::NCHW) |
| 49 | |
| 50 | ARMNN_AUTO_TEST_CASE(SimpleConvolution2dAsymmetricPaddingLargerThanHalfKernelSizeNhwc, |
| 51 | Convolution2dAsymmetricPaddingLargerThanHalfKernelSizeTest, |
| 52 | armnn::DataLayout::NHWC) |
| 53 | ARMNN_AUTO_TEST_CASE(SimpleConvolution2dAsymmetricPaddingNhwc, |
| 54 | Convolution2dAsymmetricPaddingTest, |
| 55 | armnn::DataLayout::NHWC) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 56 | |
Nikhil Raj | e4dfd6e | 2018-10-18 10:11:04 +0100 | [diff] [blame] | 57 | ARMNN_AUTO_TEST_CASE(SimpleConvolution2dSquareNhwc, SimpleConvolution2d3x3NhwcTest, false) |
| 58 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 59 | // Depthwise Convolution |
jimfly01 | d84216a | 2018-10-26 12:56:21 +0100 | [diff] [blame] | 60 | ARMNN_AUTO_TEST_CASE(DepthwiseConvolution2d, DepthwiseConvolution2dTest, true, armnn::DataLayout::NCHW) |
| 61 | ARMNN_AUTO_TEST_CASE(DepthwiseConvolution2dUint8, DepthwiseConvolution2dUint8Test, true, armnn::DataLayout::NCHW) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 62 | |
jimfly01 | d84216a | 2018-10-26 12:56:21 +0100 | [diff] [blame] | 63 | ARMNN_AUTO_TEST_CASE(UnbiasedDepthwiseConvolution2d, DepthwiseConvolution2dTest, false, armnn::DataLayout::NCHW) |
| 64 | ARMNN_AUTO_TEST_CASE(UnbiasedDepthwiseConvolution2dUint8, |
| 65 | DepthwiseConvolution2dUint8Test, |
| 66 | false, |
| 67 | armnn::DataLayout::NCHW) |
| 68 | |
| 69 | // NHWC Depthwise Convolution |
| 70 | ARMNN_AUTO_TEST_CASE(DepthwiseConvolution2dNhwc, DepthwiseConvolution2dTest, true, armnn::DataLayout::NHWC) |
| 71 | ARMNN_AUTO_TEST_CASE(DepthwiseConvolution2dUint8Nhwc, DepthwiseConvolution2dUint8Test, true, armnn::DataLayout::NHWC) |
| 72 | |
| 73 | ARMNN_AUTO_TEST_CASE(UnbiasedDepthwiseConvolution2dNhwc, DepthwiseConvolution2dTest, false, armnn::DataLayout::NHWC) |
| 74 | ARMNN_AUTO_TEST_CASE(UnbiasedDepthwiseConvolution2dUint8Nhwc, |
| 75 | DepthwiseConvolution2dUint8Test, |
| 76 | false, |
| 77 | armnn::DataLayout::NHWC) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 78 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 79 | |
jimfly01 | b9c8963 | 2018-10-26 16:50:13 +0100 | [diff] [blame] | 80 | ARMNN_AUTO_TEST_CASE(DepthwiseConvolution2dDepthMul1, |
| 81 | DepthwiseConvolution2dDepthMul1Test, true, armnn::DataLayout::NCHW) |
| 82 | ARMNN_AUTO_TEST_CASE(DepthwiseConvolution2dDepthMul1Uint8, |
| 83 | DepthwiseConvolution2dDepthMul1Uint8Test, true, armnn::DataLayout::NCHW) |
| 84 | |
| 85 | ARMNN_AUTO_TEST_CASE(UnbiasedDepthwiseConvolution2dDepthMul1, |
| 86 | DepthwiseConvolution2dDepthMul1Test, false, armnn::DataLayout::NCHW) |
| 87 | ARMNN_AUTO_TEST_CASE(UnbiasedDepthwiseConvolution2dDepthMul1Uint8, |
| 88 | DepthwiseConvolution2dDepthMul1Uint8Test, false, armnn::DataLayout::NCHW) |
| 89 | |
| 90 | ARMNN_AUTO_TEST_CASE(DepthwiseConvolution2dDepthMul1Nhwc, |
| 91 | DepthwiseConvolution2dDepthMul1Test, true, armnn::DataLayout::NHWC) |
| 92 | ARMNN_AUTO_TEST_CASE(DepthwiseConvolution2dDepthMul1Uint8Nhwc, |
| 93 | DepthwiseConvolution2dDepthMul1Uint8Test, true, armnn::DataLayout::NHWC) |
| 94 | |
| 95 | ARMNN_AUTO_TEST_CASE(UnbiasedDepthwiseConvolution2dDepthMul1Nhwc, |
| 96 | DepthwiseConvolution2dDepthMul1Test, false, armnn::DataLayout::NHWC) |
| 97 | ARMNN_AUTO_TEST_CASE(UnbiasedDepthwiseConvolution2dDepthMul1Uint8Nhwc, |
| 98 | DepthwiseConvolution2dDepthMul1Uint8Test, false, armnn::DataLayout::NHWC) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 99 | |
jimfly01 | 382a91d | 2018-10-26 15:55:50 +0100 | [diff] [blame] | 100 | ARMNN_AUTO_TEST_CASE(DepthwiseConvolution2dAsymmetric, |
| 101 | DepthwiseConvolution2dAsymmetricTest, true, armnn::DataLayout::NCHW) |
| 102 | ARMNN_AUTO_TEST_CASE(UnbiasedDepthwiseConvolution2dAsymmetric, |
| 103 | DepthwiseConvolution2dAsymmetricTest, false, armnn::DataLayout::NCHW) |
| 104 | ARMNN_AUTO_TEST_CASE(DepthwiseConvolution2dAsymmetricNhwc, |
| 105 | DepthwiseConvolution2dAsymmetricTest, true, armnn::DataLayout::NHWC) |
| 106 | ARMNN_AUTO_TEST_CASE(UnbiasedDepthwiseConvolution2dAsymmetricNhwc, |
| 107 | DepthwiseConvolution2dAsymmetricTest, false, armnn::DataLayout::NHWC) |
surmeh01 | 3537c2c | 2018-05-18 16:31:43 +0100 | [diff] [blame] | 108 | |
jimfly01 | b9c8963 | 2018-10-26 16:50:13 +0100 | [diff] [blame] | 109 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 110 | // Pooling |
| 111 | ARMNN_AUTO_TEST_CASE(SimpleMaxPooling2dSize2x2Stride2x2, SimpleMaxPooling2dSize2x2Stride2x2Test, false) |
| 112 | ARMNN_AUTO_TEST_CASE(SimpleMaxPooling2dSize2x2Stride2x2Uint8, SimpleMaxPooling2dSize2x2Stride2x2Uint8Test, false) |
| 113 | |
| 114 | ARMNN_AUTO_TEST_CASE(SimpleMaxPooling2dSize3x3Stride2x4, SimpleMaxPooling2dSize3x3Stride2x4Test, false) |
| 115 | ARMNN_AUTO_TEST_CASE(SimpleMaxPooling2dSize3x3Stride2x4Uint8, SimpleMaxPooling2dSize3x3Stride2x4Uint8Test, false) |
| 116 | |
| 117 | ARMNN_AUTO_TEST_CASE(IgnorePaddingSimpleMaxPooling2d, IgnorePaddingSimpleMaxPooling2dTest) |
| 118 | ARMNN_AUTO_TEST_CASE(IgnorePaddingSimpleMaxPooling2dUint8, IgnorePaddingSimpleMaxPooling2dUint8Test) |
| 119 | ARMNN_AUTO_TEST_CASE(IgnorePaddingMaxPooling2dSize3, IgnorePaddingMaxPooling2dSize3Test) |
| 120 | ARMNN_AUTO_TEST_CASE(IgnorePaddingMaxPooling2dSize3Uint8, IgnorePaddingMaxPooling2dSize3Uint8Test) |
| 121 | |
| 122 | ARMNN_AUTO_TEST_CASE(IgnorePaddingSimpleAveragePooling2d, IgnorePaddingSimpleAveragePooling2dTest) |
| 123 | ARMNN_AUTO_TEST_CASE(IgnorePaddingSimpleAveragePooling2dUint8, IgnorePaddingSimpleAveragePooling2dUint8Test) |
| 124 | ARMNN_AUTO_TEST_CASE(IgnorePaddingSimpleAveragePooling2dNoPadding, IgnorePaddingSimpleAveragePooling2dNoPaddingTest) |
| 125 | ARMNN_AUTO_TEST_CASE(IgnorePaddingSimpleAveragePooling2dNoPaddingUint8, |
| 126 | IgnorePaddingSimpleAveragePooling2dNoPaddingUint8Test) |
| 127 | ARMNN_AUTO_TEST_CASE(IgnorePaddingAveragePooling2dSize3, IgnorePaddingAveragePooling2dSize3Test) |
| 128 | ARMNN_AUTO_TEST_CASE(IgnorePaddingAveragePooling2dSize3Uint8, IgnorePaddingAveragePooling2dSize3Uint8Test) |
| 129 | |
| 130 | ARMNN_AUTO_TEST_CASE(IgnorePaddingSimpleL2Pooling2d, IgnorePaddingSimpleL2Pooling2dTest) |
| 131 | ARMNN_AUTO_TEST_CASE(IgnorePaddingSimpleL2Pooling2dUint8, IgnorePaddingSimpleL2Pooling2dUint8Test) |
| 132 | ARMNN_AUTO_TEST_CASE(IgnorePaddingL2Pooling2dSize3, IgnorePaddingL2Pooling2dSize3Test) |
| 133 | ARMNN_AUTO_TEST_CASE(IgnorePaddingL2Pooling2dSize3Uint8, IgnorePaddingL2Pooling2dSize3Uint8Test) |
| 134 | |
James Conroy | 45a9b77 | 2018-10-31 11:47:53 +0000 | [diff] [blame] | 135 | ARMNN_AUTO_TEST_CASE(SimpleMaxPooling2d, SimpleMaxPooling2dTest, armnn::DataLayout::NCHW) |
| 136 | ARMNN_AUTO_TEST_CASE(SimpleMaxPooling2dNhwc, SimpleMaxPooling2dTest, armnn::DataLayout::NHWC) |
| 137 | ARMNN_AUTO_TEST_CASE(SimpleMaxPooling2dUint8, SimpleMaxPooling2dUint8Test, armnn::DataLayout::NCHW) |
| 138 | ARMNN_AUTO_TEST_CASE(SimpleMaxPooling2dUint8Nhwc, SimpleMaxPooling2dUint8Test, armnn::DataLayout::NHWC) |
| 139 | |
| 140 | ARMNN_AUTO_TEST_CASE(SimpleAveragePooling2d, SimpleAveragePooling2dTest, armnn::DataLayout::NCHW) |
| 141 | ARMNN_AUTO_TEST_CASE(SimpleAveragePooling2dNhwc, SimpleAveragePooling2dTest, armnn::DataLayout::NHWC) |
| 142 | ARMNN_AUTO_TEST_CASE(SimpleAveragePooling2dUint8, SimpleAveragePooling2dUint8Test, armnn::DataLayout::NCHW) |
| 143 | ARMNN_AUTO_TEST_CASE(SimpleAveragePooling2dUint8Nhwc, SimpleAveragePooling2dUint8Test, armnn::DataLayout::NHWC) |
| 144 | |
surmeh01 | bceff2f | 2018-03-29 16:29:27 +0100 | [diff] [blame] | 145 | ARMNN_AUTO_TEST_CASE(IgnorePaddingAveragePooling2dSize3x2Stride2x2, |
| 146 | IgnorePaddingAveragePooling2dSize3x2Stride2x2Test, false) |
| 147 | ARMNN_AUTO_TEST_CASE(IgnorePaddingAveragePooling2dSize3x2Stride2x2NoPadding, |
| 148 | IgnorePaddingAveragePooling2dSize3x2Stride2x2Test, true) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 149 | |
| 150 | ARMNN_AUTO_TEST_CASE(LargeTensorsAveragePooling2d, LargeTensorsAveragePooling2dTest) |
| 151 | ARMNN_AUTO_TEST_CASE(LargeTensorsAveragePooling2dUint8, LargeTensorsAveragePooling2dUint8Test) |
| 152 | |
James Conroy | 45a9b77 | 2018-10-31 11:47:53 +0000 | [diff] [blame] | 153 | ARMNN_AUTO_TEST_CASE(SimpleL2Pooling2d, SimpleL2Pooling2dTest, armnn::DataLayout::NCHW) |
| 154 | ARMNN_AUTO_TEST_CASE(SimpleL2Pooling2dNhwc, SimpleL2Pooling2dTest, armnn::DataLayout::NHWC) |
| 155 | ARMNN_AUTO_TEST_CASE(SimpleL2Pooling2dUint8, SimpleL2Pooling2dUint8Test, armnn::DataLayout::NCHW) |
| 156 | ARMNN_AUTO_TEST_CASE(SimpleL2Pooling2dNhwcUint8, SimpleL2Pooling2dUint8Test, armnn::DataLayout::NHWC) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 157 | |
| 158 | ARMNN_AUTO_TEST_CASE(L2Pooling2dSize7, L2Pooling2dSize7Test) |
| 159 | ARMNN_AUTO_TEST_CASE(L2Pooling2dSize7Uint8, L2Pooling2dSize7Uint8Test) |
| 160 | |
| 161 | ARMNN_AUTO_TEST_CASE(AsymmNonSquarePooling2d, AsymmetricNonSquarePooling2dTest) |
| 162 | ARMNN_AUTO_TEST_CASE(AsymmNonSquarePooling2dUint8, AsymmetricNonSquarePooling2dUint8Test) |
| 163 | |
| 164 | // Activation |
| 165 | ARMNN_AUTO_TEST_CASE(ConstantLinearActivation, ConstantLinearActivationTest) |
| 166 | ARMNN_AUTO_TEST_CASE(ConstantLinearActivationUint8, ConstantLinearActivationUint8Test) |
| 167 | |
Matteo Martincigh | 8e6f92d | 2018-10-18 08:45:39 +0100 | [diff] [blame] | 168 | // Normalization |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 169 | ARMNN_AUTO_TEST_CASE(SimpleNormalizationAcross, SimpleNormalizationAcrossTest) |
| 170 | ARMNN_AUTO_TEST_CASE(SimpleNormalizationWithin, SimpleNormalizationWithinTest) |
Matteo Martincigh | 8e6f92d | 2018-10-18 08:45:39 +0100 | [diff] [blame] | 171 | ARMNN_AUTO_TEST_CASE(SimpleNormalizationAcrossNhwc, SimpleNormalizationAcrossNhwcTest) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 172 | |
| 173 | ARMNN_AUTO_TEST_CASE(SimpleSoftmaxBeta1, SimpleSoftmaxTest, 1.0f) |
| 174 | ARMNN_AUTO_TEST_CASE(SimpleSoftmaxBeta2, SimpleSoftmaxTest, 2.0f) |
| 175 | ARMNN_AUTO_TEST_CASE(SimpleSoftmaxBeta1Uint8, SimpleSoftmaxUint8Test, 1.0f) |
| 176 | ARMNN_AUTO_TEST_CASE(SimpleSoftmaxBeta2Uint8, SimpleSoftmaxUint8Test, 2.0f) |
| 177 | |
| 178 | ARMNN_AUTO_TEST_CASE(SimpleSigmoid, SimpleSigmoidTest) |
| 179 | ARMNN_AUTO_TEST_CASE(SimpleSigmoidUint8, SimpleSigmoidUint8Test) |
| 180 | |
| 181 | ARMNN_AUTO_TEST_CASE(ReLu1, BoundedReLuUpperAndLowerBoundTest) |
| 182 | ARMNN_AUTO_TEST_CASE(ReLu6, BoundedReLuUpperBoundOnlyTest) |
| 183 | ARMNN_AUTO_TEST_CASE(ReLu1Uint8, BoundedReLuUint8UpperAndLowerBoundTest) |
| 184 | ARMNN_AUTO_TEST_CASE(ReLu6Uint8, BoundedReLuUint8UpperBoundOnlyTest) |
| 185 | |
| 186 | // Fully Conected |
| 187 | ARMNN_AUTO_TEST_CASE(SimpleFullyConnected, FullyConnectedFloat32Test, false, false) |
| 188 | ARMNN_AUTO_TEST_CASE(FullyConnectedUint8, FullyConnectedUint8Test, false) |
| 189 | ARMNN_AUTO_TEST_CASE(SimpleFullyConnectedWithBias, FullyConnectedFloat32Test, true, false) |
| 190 | ARMNN_AUTO_TEST_CASE(FullyConnectedBiasedUint8, FullyConnectedUint8Test, true) |
| 191 | ARMNN_AUTO_TEST_CASE(SimpleFullyConnectedWithTranspose, FullyConnectedFloat32Test, false, true) |
| 192 | |
| 193 | ARMNN_AUTO_TEST_CASE(FullyConnectedLarge, FullyConnectedLargeTest, false) |
| 194 | ARMNN_AUTO_TEST_CASE(FullyConnectedLargeTransposed, FullyConnectedLargeTest, true) |
| 195 | |
| 196 | // Splitter |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 197 | ARMNN_AUTO_TEST_CASE(SimpleSplitter, SplitterTest) |
| 198 | ARMNN_AUTO_TEST_CASE(SimpleSplitterUint8, SplitterUint8Test) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 199 | |
| 200 | ARMNN_AUTO_TEST_CASE(CopyViaSplitter, CopyViaSplitterTest) |
| 201 | ARMNN_AUTO_TEST_CASE(CopyViaSplitterUint8, CopyViaSplitterUint8Test) |
| 202 | |
| 203 | // Merger |
| 204 | ARMNN_AUTO_TEST_CASE(SimpleMerger, MergerTest) |
| 205 | ARMNN_AUTO_TEST_CASE(MergerUint8, MergerUint8Test) |
| 206 | |
| 207 | // Add |
| 208 | ARMNN_AUTO_TEST_CASE(SimpleAdd, AdditionTest) |
| 209 | ARMNN_AUTO_TEST_CASE(AddBroadcast1Element, AdditionBroadcast1ElementTest) |
| 210 | ARMNN_AUTO_TEST_CASE(AddBroadcast, AdditionBroadcastTest) |
| 211 | |
| 212 | ARMNN_AUTO_TEST_CASE(AdditionUint8, AdditionUint8Test) |
| 213 | ARMNN_AUTO_TEST_CASE(AddBroadcastUint8, AdditionBroadcastUint8Test) |
| 214 | ARMNN_AUTO_TEST_CASE(AddBroadcast1ElementUint8, AdditionBroadcast1ElementUint8Test) |
| 215 | |
David Beck | f195f03 | 2018-09-06 16:46:34 +0100 | [diff] [blame] | 216 | // Sub |
| 217 | ARMNN_AUTO_TEST_CASE(SimpleSub, SubtractionTest) |
| 218 | ARMNN_AUTO_TEST_CASE(SubBroadcast1Element, SubtractionBroadcast1ElementTest) |
| 219 | ARMNN_AUTO_TEST_CASE(SubBroadcast, SubtractionBroadcastTest) |
| 220 | |
David Beck | 4a8692c | 2018-09-07 16:19:24 +0100 | [diff] [blame] | 221 | ARMNN_AUTO_TEST_CASE(SubtractionUint8, SubtractionUint8Test) |
David Beck | f195f03 | 2018-09-06 16:46:34 +0100 | [diff] [blame] | 222 | ARMNN_AUTO_TEST_CASE(SubBroadcastUint8, SubtractionBroadcastUint8Test) |
| 223 | ARMNN_AUTO_TEST_CASE(SubBroadcast1ElementUint8, SubtractionBroadcast1ElementUint8Test) |
| 224 | |
Francis Murtagh | e7a86a4 | 2018-08-29 12:42:10 +0100 | [diff] [blame] | 225 | // Div |
| 226 | ARMNN_AUTO_TEST_CASE(SimpleDivision, DivisionTest) |
Francis Murtagh | 8c5e3dc | 2018-08-30 17:18:37 +0100 | [diff] [blame] | 227 | ARMNN_AUTO_TEST_CASE(DivisionByZero, DivisionByZeroTest) |
Francis Murtagh | e7a86a4 | 2018-08-29 12:42:10 +0100 | [diff] [blame] | 228 | ARMNN_AUTO_TEST_CASE(DivisionBroadcast1Element, DivisionBroadcast1ElementTest) |
| 229 | ARMNN_AUTO_TEST_CASE(DivisionBroadcast1DVector, DivisionBroadcast1DVectorTest) |
David Beck | 5cd01f3 | 2018-09-12 16:00:08 +0100 | [diff] [blame] | 230 | // NOTE: division by zero for quantized div needs more attention |
| 231 | // see IVGCVSW-1849 |
| 232 | ARMNN_AUTO_TEST_CASE(DivisionUint8, DivisionUint8Test) |
| 233 | ARMNN_AUTO_TEST_CASE(DivisionUint8Broadcast1Element, DivisionBroadcast1ElementUint8Test) |
| 234 | ARMNN_AUTO_TEST_CASE(DivisionUint8Broadcast1DVector, DivisionBroadcast1DVectorUint8Test) |
Francis Murtagh | e7a86a4 | 2018-08-29 12:42:10 +0100 | [diff] [blame] | 235 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 236 | // Mul |
| 237 | ARMNN_AUTO_TEST_CASE(SimpleMultiplication, MultiplicationTest) |
surmeh01 | bceff2f | 2018-03-29 16:29:27 +0100 | [diff] [blame] | 238 | ARMNN_AUTO_TEST_CASE(MultiplicationBroadcast1Element, MultiplicationBroadcast1ElementTest) |
| 239 | ARMNN_AUTO_TEST_CASE(MultiplicationBroadcast1DVector, MultiplicationBroadcast1DVectorTest) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 240 | ARMNN_AUTO_TEST_CASE(MultiplicationUint8, MultiplicationUint8Test) |
surmeh01 | bceff2f | 2018-03-29 16:29:27 +0100 | [diff] [blame] | 241 | ARMNN_AUTO_TEST_CASE(MultiplicationBroadcast1ElementUint8, MultiplicationBroadcast1ElementUint8Test) |
| 242 | ARMNN_AUTO_TEST_CASE(MultiplicationBroadcast1DVectorUint8, MultiplicationBroadcast1DVectorUint8Test) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 243 | |
| 244 | // Batch Norm |
| 245 | ARMNN_AUTO_TEST_CASE(BatchNorm, BatchNormTest) |
Matteo Martincigh | 8eb675e | 2018-10-17 14:43:29 +0100 | [diff] [blame] | 246 | ARMNN_AUTO_TEST_CASE(BatchNormNhwc, BatchNormNhwcTest) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 247 | ARMNN_AUTO_TEST_CASE(BatchNormUint8, BatchNormUint8Test) |
Matteo Martincigh | 8eb675e | 2018-10-17 14:43:29 +0100 | [diff] [blame] | 248 | ARMNN_AUTO_TEST_CASE(BatchNormUint8Nhwc, BatchNormUint8NhwcTest) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 249 | |
James Conroy | 5954082 | 2018-10-11 12:39:05 +0100 | [diff] [blame] | 250 | // Resize Bilinear - NCHW |
James Conroy | 6b96582 | 2018-11-01 11:33:09 +0000 | [diff] [blame] | 251 | ARMNN_AUTO_TEST_CASE(SimpleResizeBilinear, SimpleResizeBilinearTest, armnn::DataLayout::NCHW) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 252 | ARMNN_AUTO_TEST_CASE(SimpleResizeBilinearUint8, SimpleResizeBilinearUint8Test) |
James Conroy | 6b96582 | 2018-11-01 11:33:09 +0000 | [diff] [blame] | 253 | ARMNN_AUTO_TEST_CASE(ResizeBilinearNop, ResizeBilinearNopTest, armnn::DataLayout::NCHW) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 254 | ARMNN_AUTO_TEST_CASE(ResizeBilinearNopUint8, ResizeBilinearNopUint8Test) |
James Conroy | 6b96582 | 2018-11-01 11:33:09 +0000 | [diff] [blame] | 255 | ARMNN_AUTO_TEST_CASE(ResizeBilinearSqMin, ResizeBilinearSqMinTest, armnn::DataLayout::NCHW) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 256 | ARMNN_AUTO_TEST_CASE(ResizeBilinearSqMinUint8, ResizeBilinearSqMinUint8Test) |
James Conroy | 6b96582 | 2018-11-01 11:33:09 +0000 | [diff] [blame] | 257 | ARMNN_AUTO_TEST_CASE(ResizeBilinearMin, ResizeBilinearMinTest, armnn::DataLayout::NCHW) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 258 | ARMNN_AUTO_TEST_CASE(ResizeBilinearMinUint8, ResizeBilinearMinUint8Test) |
James Conroy | 6b96582 | 2018-11-01 11:33:09 +0000 | [diff] [blame] | 259 | ARMNN_AUTO_TEST_CASE(ResizeBilinearMag, ResizeBilinearMagTest, armnn::DataLayout::NCHW) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 260 | ARMNN_AUTO_TEST_CASE(ResizeBilinearMagUint8, ResizeBilinearMagUint8Test) |
| 261 | |
James Conroy | 5954082 | 2018-10-11 12:39:05 +0100 | [diff] [blame] | 262 | // Resize Bilinear - NHWC |
James Conroy | 6b96582 | 2018-11-01 11:33:09 +0000 | [diff] [blame] | 263 | ARMNN_AUTO_TEST_CASE(ResizeBilinearNopNhwc, ResizeBilinearNopTest, armnn::DataLayout::NHWC) |
| 264 | ARMNN_AUTO_TEST_CASE(SimpleResizeBilinearNhwc, SimpleResizeBilinearTest, armnn::DataLayout::NHWC) |
| 265 | ARMNN_AUTO_TEST_CASE(ResizeBilinearSqMinNhwc, ResizeBilinearSqMinTest, armnn::DataLayout::NHWC) |
| 266 | ARMNN_AUTO_TEST_CASE(ResizeBilinearMinNhwc, ResizeBilinearMinTest, armnn::DataLayout::NHWC) |
| 267 | ARMNN_AUTO_TEST_CASE(ResizeBilinearMagNhwc, ResizeBilinearMagTest, armnn::DataLayout::NHWC) |
James Conroy | 5954082 | 2018-10-11 12:39:05 +0100 | [diff] [blame] | 268 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 269 | // Fake Quantization |
| 270 | ARMNN_AUTO_TEST_CASE(FakeQuantization, FakeQuantizationTest) |
| 271 | |
Matteo Martincigh | 539b44d | 2018-10-01 09:26:39 +0100 | [diff] [blame] | 272 | // L2 Normalization |
jimfly01 | 3aab7c3 | 2018-11-12 13:32:08 +0000 | [diff] [blame] | 273 | ARMNN_AUTO_TEST_CASE(L2Normalization1d, L2Normalization1dTest, armnn::DataLayout::NCHW) |
| 274 | ARMNN_AUTO_TEST_CASE(L2Normalization2d, L2Normalization2dTest, armnn::DataLayout::NCHW) |
| 275 | ARMNN_AUTO_TEST_CASE(L2Normalization3d, L2Normalization3dTest, armnn::DataLayout::NCHW) |
| 276 | ARMNN_AUTO_TEST_CASE(L2Normalization4d, L2Normalization4dTest, armnn::DataLayout::NCHW) |
| 277 | |
| 278 | ARMNN_AUTO_TEST_CASE(L2Normalization1dNhwc, L2Normalization1dTest, armnn::DataLayout::NHWC) |
| 279 | ARMNN_AUTO_TEST_CASE(L2Normalization2dNhwc, L2Normalization2dTest, armnn::DataLayout::NHWC) |
| 280 | ARMNN_AUTO_TEST_CASE(L2Normalization3dNhwc, L2Normalization3dTest, armnn::DataLayout::NHWC) |
| 281 | ARMNN_AUTO_TEST_CASE(L2Normalization4dNhwc, L2Normalization4dTest, armnn::DataLayout::NHWC) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 282 | |
Mohamed Nour Abouelseoud | 7420e55 | 2018-10-12 12:26:24 +0100 | [diff] [blame] | 283 | // Pad |
Mohamed Nour Abouelseoud | dd6acea | 2018-10-18 12:26:19 +0100 | [diff] [blame] | 284 | ARMNN_AUTO_TEST_CASE(PadFloat322d, PadFloat322dTest) |
| 285 | ARMNN_AUTO_TEST_CASE(PadFloat323d, PadFloat323dTest) |
| 286 | ARMNN_AUTO_TEST_CASE(PadFloat324d, PadFloat324dTest) |
| 287 | |
| 288 | ARMNN_AUTO_TEST_CASE(PadUint82d, PadUint82dTest) |
| 289 | ARMNN_AUTO_TEST_CASE(PadUint83d, PadUint83dTest) |
| 290 | ARMNN_AUTO_TEST_CASE(PadUint84d, PadUint84dTest) |
Mohamed Nour Abouelseoud | 7420e55 | 2018-10-12 12:26:24 +0100 | [diff] [blame] | 291 | |
Matteo Martincigh | 539b44d | 2018-10-01 09:26:39 +0100 | [diff] [blame] | 292 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 293 | // Constant |
| 294 | ARMNN_AUTO_TEST_CASE(Constant, ConstantTest) |
| 295 | ARMNN_AUTO_TEST_CASE(ConstantUint8, ConstantUint8Test) |
| 296 | |
| 297 | // Concat |
| 298 | ARMNN_AUTO_TEST_CASE(Concatenation1d, Concatenation1dTest) |
| 299 | ARMNN_AUTO_TEST_CASE(Concatenation1dUint8, Concatenation1dUint8Test) |
| 300 | |
| 301 | ARMNN_AUTO_TEST_CASE(Concatenation2dDim0, Concatenation2dDim0Test) |
| 302 | ARMNN_AUTO_TEST_CASE(Concatenation2dDim0Uint8, Concatenation2dDim0Uint8Test) |
| 303 | ARMNN_AUTO_TEST_CASE(Concatenation2dDim1, Concatenation2dDim1Test) |
| 304 | ARMNN_AUTO_TEST_CASE(Concatenation2dDim1Uint8, Concatenation2dDim1Uint8Test) |
| 305 | |
| 306 | ARMNN_AUTO_TEST_CASE(Concatenation2dDim0DiffInputDims, Concatenation2dDim0DiffInputDimsTest) |
| 307 | ARMNN_AUTO_TEST_CASE(Concatenation2dDim0DiffInputDimsUint8, Concatenation2dDim0DiffInputDimsUint8Test) |
| 308 | ARMNN_AUTO_TEST_CASE(Concatenation2dDim1DiffInputDims, Concatenation2dDim1DiffInputDimsTest) |
| 309 | ARMNN_AUTO_TEST_CASE(Concatenation2dDim1DiffInputDimsUint8, Concatenation2dDim1DiffInputDimsUint8Test) |
| 310 | |
| 311 | ARMNN_AUTO_TEST_CASE(Concatenation3dDim0, Concatenation3dDim0Test) |
| 312 | ARMNN_AUTO_TEST_CASE(Concatenation3dDim0Uint8, Concatenation3dDim0Uint8Test) |
| 313 | ARMNN_AUTO_TEST_CASE(Concatenation3dDim1, Concatenation3dDim1Test) |
| 314 | ARMNN_AUTO_TEST_CASE(Concatenation3dDim1Uint8, Concatenation3dDim1Uint8Test) |
| 315 | ARMNN_AUTO_TEST_CASE(Concatenation3dDim2, Concatenation3dDim2Test) |
| 316 | ARMNN_AUTO_TEST_CASE(Concatenation3dDim2Uint8, Concatenation3dDim2Uint8Test) |
| 317 | |
| 318 | ARMNN_AUTO_TEST_CASE(Concatenation3dDim0DiffInputDims, Concatenation3dDim0DiffInputDimsTest) |
| 319 | ARMNN_AUTO_TEST_CASE(Concatenation3dDim0DiffInputDimsUint8, Concatenation3dDim0DiffInputDimsUint8Test) |
| 320 | ARMNN_AUTO_TEST_CASE(Concatenation3dDim1DiffInputDims, Concatenation3dDim1DiffInputDimsTest) |
| 321 | ARMNN_AUTO_TEST_CASE(Concatenation3dDim1DiffInputDimsUint8, Concatenation3dDim1DiffInputDimsUint8Test) |
| 322 | ARMNN_AUTO_TEST_CASE(Concatenation3dDim2DiffInputDims, Concatenation3dDim2DiffInputDimsTest) |
| 323 | ARMNN_AUTO_TEST_CASE(Concatenation3dDim2DiffInputDimsUint8, Concatenation3dDim2DiffInputDimsUint8Test) |
| 324 | |
| 325 | // Floor |
| 326 | ARMNN_AUTO_TEST_CASE(SimpleFloor, SimpleFloorTest) |
| 327 | |
| 328 | // Reshape |
| 329 | ARMNN_AUTO_TEST_CASE(SimpleReshapeFloat32, SimpleReshapeFloat32Test) |
| 330 | ARMNN_AUTO_TEST_CASE(SimpleReshapeUint8, SimpleReshapeUint8Test) |
| 331 | |
| 332 | // Permute |
| 333 | ARMNN_AUTO_TEST_CASE(SimplePermuteFloat32, SimplePermuteFloat32Test) |
| 334 | ARMNN_AUTO_TEST_CASE(SimplePermuteUint8, SimplePermuteUint8Test) |
surmeh01 | bceff2f | 2018-03-29 16:29:27 +0100 | [diff] [blame] | 335 | ARMNN_AUTO_TEST_CASE(PermuteFloat32ValueSet1, PermuteFloat32ValueSet1Test) |
| 336 | ARMNN_AUTO_TEST_CASE(PermuteFloat32ValueSet2, PermuteFloat32ValueSet2Test) |
| 337 | ARMNN_AUTO_TEST_CASE(PermuteFloat32ValueSet3, PermuteFloat32ValueSet3Test) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 338 | |
Matteo Martincigh | a65b7ae | 2018-11-14 12:39:55 +0000 | [diff] [blame^] | 339 | // Lstm |
| 340 | ARMNN_AUTO_TEST_CASE(LstmLayerFloat32WithCifgWithPeepholeNoProjection, |
| 341 | LstmLayerFloat32WithCifgWithPeepholeNoProjectionTest) |
| 342 | ARMNN_AUTO_TEST_CASE(LstmLayerFloat32NoCifgNoPeepholeNoProjection, |
| 343 | LstmLayerFloat32NoCifgNoPeepholeNoProjectionTest) |
| 344 | ARMNN_AUTO_TEST_CASE(LstmLayerFloat32NoCifgWithPeepholeWithProjection, |
| 345 | LstmLayerFloat32NoCifgWithPeepholeWithProjectionTest) |
| 346 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 347 | // Convert from Float16 to Float32 |
| 348 | ARMNN_AUTO_TEST_CASE(SimpleConvertFp16ToFp32, SimpleConvertFp16ToFp32Test) |
| 349 | // Convert from Float32 to Float16 |
| 350 | ARMNN_AUTO_TEST_CASE(SimpleConvertFp32ToFp16, SimpleConvertFp32ToFp16Test) |
| 351 | |
narpra01 | 1e4c31d | 2018-09-28 11:07:51 +0100 | [diff] [blame] | 352 | // Mean |
| 353 | ARMNN_AUTO_TEST_CASE(MeanUint8Simple, MeanUint8SimpleTest) |
| 354 | ARMNN_AUTO_TEST_CASE(MeanUint8SimpleAxis, MeanUint8SimpleAxisTest) |
| 355 | ARMNN_AUTO_TEST_CASE(MeanUint8KeepDims, MeanUint8KeepDimsTest) |
| 356 | ARMNN_AUTO_TEST_CASE(MeanUint8MultipleDims, MeanUint8MultipleDimsTest) |
| 357 | ARMNN_AUTO_TEST_CASE(MeanVtsUint8, MeanVtsUint8Test) |
| 358 | |
| 359 | ARMNN_AUTO_TEST_CASE(MeanFloatSimple, MeanFloatSimpleTest) |
| 360 | ARMNN_AUTO_TEST_CASE(MeanFloatSimpleAxis, MeanFloatSimpleAxisTest) |
| 361 | ARMNN_AUTO_TEST_CASE(MeanFloatKeepDims, MeanFloatKeepDimsTest) |
| 362 | ARMNN_AUTO_TEST_CASE(MeanFloatMultipleDims, MeanFloatMultipleDimsTest) |
| 363 | ARMNN_AUTO_TEST_CASE(MeanVtsFloat1, MeanVtsFloat1Test) |
| 364 | ARMNN_AUTO_TEST_CASE(MeanVtsFloat2, MeanVtsFloat2Test) |
Matteo Martincigh | 28dcab6 | 2018-10-19 16:40:03 +0100 | [diff] [blame] | 365 | ARMNN_AUTO_TEST_CASE(MeanVtsFloat3, MeanVtsFloat3Test) |
narpra01 | 1e4c31d | 2018-09-28 11:07:51 +0100 | [diff] [blame] | 366 | |
Éanna Ó Catháin | 47c1ddb | 2018-10-12 14:24:13 +0100 | [diff] [blame] | 367 | ARMNN_AUTO_TEST_CASE(AdditionAfterMaxPool, AdditionAfterMaxPoolTest) |
| 368 | |
Nattapat Chaimanowong | 3ea76d5 | 2018-11-09 14:10:38 +0000 | [diff] [blame] | 369 | // Space To Batch Nd |
| 370 | ARMNN_AUTO_TEST_CASE(SpaceToBatchNdSimpleFloat32, SpaceToBatchNdSimpleFloat32Test) |
| 371 | ARMNN_AUTO_TEST_CASE(SpaceToBatchNdMultiChannelsFloat32, SpaceToBatchNdMultiChannelsFloat32Test) |
| 372 | ARMNN_AUTO_TEST_CASE(SpaceToBatchNdMultiBlockFloat32, SpaceToBatchNdMultiBlockFloat32Test) |
| 373 | ARMNN_AUTO_TEST_CASE(SpaceToBatchNdPaddingFloat32, SpaceToBatchNdPaddingFloat32Test) |
| 374 | |
| 375 | ARMNN_AUTO_TEST_CASE(SpaceToBatchNdSimpleUint8, SpaceToBatchNdSimpleUint8Test) |
| 376 | ARMNN_AUTO_TEST_CASE(SpaceToBatchNdMultiChannelsUint8, SpaceToBatchNdMultiChannelsUint8Test) |
| 377 | ARMNN_AUTO_TEST_CASE(SpaceToBatchNdMultiBlockUint8, SpaceToBatchNdMultiBlockUint8Test) |
| 378 | ARMNN_AUTO_TEST_CASE(SpaceToBatchNdPaddingUint8, SpaceToBatchNdPaddingUint8Test) |
| 379 | |
| 380 | ARMNN_AUTO_TEST_CASE(SpaceToBatchNdSimpleNHWCFloat32, SpaceToBatchNdSimpleNHWCFloat32Test) |
| 381 | ARMNN_AUTO_TEST_CASE(SpaceToBatchNdMultiChannelsNHWCFloat32, SpaceToBatchNdMultiChannelsNHWCFloat32Test) |
| 382 | ARMNN_AUTO_TEST_CASE(SpaceToBatchNdMultiBlockNHWCFloat32, SpaceToBatchNdMultiBlockNHWCFloat32Test) |
| 383 | ARMNN_AUTO_TEST_CASE(SpaceToBatchNdPaddingNHWCFloat32, SpaceToBatchNdPaddingNHWCFloat32Test) |
| 384 | |
| 385 | ARMNN_AUTO_TEST_CASE(SpaceToBatchNdSimpleNHWCUint8, SpaceToBatchNdSimpleNHWCUint8Test) |
| 386 | ARMNN_AUTO_TEST_CASE(SpaceToBatchNdMultiChannelsNHWCUint8, SpaceToBatchNdMultiChannelsNHWCUint8Test) |
| 387 | ARMNN_AUTO_TEST_CASE(SpaceToBatchNdMultiBlockNHWCUint8, SpaceToBatchNdMultiBlockNHWCUint8Test) |
| 388 | ARMNN_AUTO_TEST_CASE(SpaceToBatchNdPaddingNHWCUint8, SpaceToBatchNdPaddingNHWCUint8Test) |
| 389 | |
Éanna Ó Catháin | 4e1e136 | 2018-11-12 11:36:34 +0000 | [diff] [blame] | 390 | ARMNN_AUTO_TEST_CASE(BatchToSpaceNdNhwcFloat321, BatchToSpaceNdNhwcFloat32Test1) |
| 391 | ARMNN_AUTO_TEST_CASE(BatchToSpaceNdNhwcFloat322, BatchToSpaceNdNhwcFloat32Test2) |
| 392 | ARMNN_AUTO_TEST_CASE(BatchToSpaceNdNhwcFloat323, BatchToSpaceNdNhwcFloat32Test3) |
| 393 | |
| 394 | ARMNN_AUTO_TEST_CASE(BatchToSpaceNdNchwFloat321, BatchToSpaceNdNchwFloat32Test1) |
| 395 | |
Éanna Ó Catháin | 262553e | 2018-11-14 11:26:23 +0000 | [diff] [blame] | 396 | ARMNN_AUTO_TEST_CASE(BatchToSpaceNdNhwcUint1, BatchToSpaceNdNhwcUintTest1) |
| 397 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 398 | BOOST_AUTO_TEST_SUITE_END() |