telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2017 Arm Ltd. All rights reserved. |
David Beck | ecb56cd | 2018-09-05 12:52:57 +0100 | [diff] [blame] | 3 | // SPDX-License-Identifier: MIT |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 4 | // |
| 5 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 6 | #include "../TfLiteParser.hpp" |
| 7 | #include <iostream> |
| 8 | #include <string> |
| 9 | |
Sadik Armagan | 1625efc | 2021-06-10 18:24:34 +0100 | [diff] [blame] | 10 | #include <doctest/doctest.h> |
| 11 | |
| 12 | TEST_SUITE("TensorflowLiteParser_OutputShapeOfSqueeze") |
| 13 | { |
| 14 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 15 | struct TfLiteParserFixture |
| 16 | { |
| 17 | |
Kevin May | 7d96b16 | 2021-02-03 17:38:41 +0000 | [diff] [blame] | 18 | armnnTfLiteParser::TfLiteParserImpl m_Parser; |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 19 | unsigned int m_InputShape[4]; |
| 20 | |
Kevin May | 7d96b16 | 2021-02-03 17:38:41 +0000 | [diff] [blame] | 21 | TfLiteParserFixture() : m_Parser( ), m_InputShape { 1, 2, 2, 1 } {} |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 22 | ~TfLiteParserFixture() { } |
| 23 | |
| 24 | }; |
| 25 | |
Sadik Armagan | 1625efc | 2021-06-10 18:24:34 +0100 | [diff] [blame] | 26 | TEST_CASE_FIXTURE(TfLiteParserFixture, "EmptySqueezeDims_OutputWithAllDimensionsSqueezed") |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 27 | { |
| 28 | |
| 29 | std::vector<uint32_t> squeezeDims = { }; |
| 30 | |
| 31 | armnn::TensorInfo inputTensorInfo = armnn::TensorInfo(4, m_InputShape, armnn::DataType::Float32); |
| 32 | armnn::TensorInfo outputTensorInfo = m_Parser.OutputShapeOfSqueeze(squeezeDims, inputTensorInfo); |
Sadik Armagan | 1625efc | 2021-06-10 18:24:34 +0100 | [diff] [blame] | 33 | CHECK(outputTensorInfo.GetNumElements() == 4); |
| 34 | CHECK(outputTensorInfo.GetNumDimensions() == 2); |
| 35 | CHECK((outputTensorInfo.GetShape() == armnn::TensorShape({ 2, 2 }))); |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 36 | }; |
| 37 | |
Sadik Armagan | 1625efc | 2021-06-10 18:24:34 +0100 | [diff] [blame] | 38 | TEST_CASE_FIXTURE(TfLiteParserFixture, "SqueezeDimsNotIncludingSizeOneDimensions_NoDimensionsSqueezedInOutput") |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 39 | { |
| 40 | std::vector<uint32_t> squeezeDims = { 1, 2 }; |
| 41 | |
| 42 | armnn::TensorInfo inputTensorInfo = armnn::TensorInfo(4, m_InputShape, armnn::DataType::Float32); |
| 43 | armnn::TensorInfo outputTensorInfo = m_Parser.OutputShapeOfSqueeze(squeezeDims, inputTensorInfo); |
Sadik Armagan | 1625efc | 2021-06-10 18:24:34 +0100 | [diff] [blame] | 44 | CHECK(outputTensorInfo.GetNumElements() == 4); |
| 45 | CHECK(outputTensorInfo.GetNumDimensions() == 4); |
| 46 | CHECK((outputTensorInfo.GetShape() == armnn::TensorShape({ 1, 2, 2, 1 }))); |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 47 | }; |
| 48 | |
Sadik Armagan | 1625efc | 2021-06-10 18:24:34 +0100 | [diff] [blame] | 49 | TEST_CASE_FIXTURE(TfLiteParserFixture, "SqueezeDimsRangePartial_OutputWithDimensionsWithinRangeSqueezed") |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 50 | { |
| 51 | std::vector<uint32_t> squeezeDims = { 1, 3 }; |
| 52 | |
| 53 | armnn::TensorInfo inputTensorInfo = armnn::TensorInfo(4, m_InputShape, armnn::DataType::Float32); |
| 54 | armnn::TensorInfo outputTensorInfo = m_Parser.OutputShapeOfSqueeze(squeezeDims, inputTensorInfo); |
Sadik Armagan | 1625efc | 2021-06-10 18:24:34 +0100 | [diff] [blame] | 55 | CHECK(outputTensorInfo.GetNumElements() == 4); |
| 56 | CHECK(outputTensorInfo.GetNumDimensions() == 3); |
| 57 | CHECK((outputTensorInfo.GetShape() == armnn::TensorShape({ 1, 2, 2 }))); |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 58 | }; |
| 59 | |
Sadik Armagan | 1625efc | 2021-06-10 18:24:34 +0100 | [diff] [blame] | 60 | } |