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telsoa01c577f2c2018-08-31 09:22:23 +01001//
Teresa Charlin588cbdf2022-01-19 15:55:37 +00002// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
David Beckecb56cd2018-09-05 12:52:57 +01003// SPDX-License-Identifier: MIT
telsoa01c577f2c2018-08-31 09:22:23 +01004//
5
6#pragma once
7
Colm Donelan0c479742021-12-10 12:43:54 +00008#include <armnn/backends/Workload.hpp>
Matthew Bentham14e46692018-09-20 15:35:30 +01009
Matthew Bentham9b3e7382020-02-05 21:39:55 +000010#include <arm_compute/runtime/CL/functions/CLDepthConvertLayer.h>
telsoa01c577f2c2018-08-31 09:22:23 +010011
Jim Flynn5e7335b2022-02-14 11:22:29 +000012#include <cl/ICLTensorProxy.hpp>
13
telsoa01c577f2c2018-08-31 09:22:23 +010014namespace armnn
15{
16
17class ClConvertFp32ToFp16Workload : public Float32ToFloat16Workload<ConvertFp32ToFp16QueueDescriptor>
18{
19public:
20
Sadik Armagane9444752020-12-02 11:28:58 +000021 ClConvertFp32ToFp16Workload(const ConvertFp32ToFp16QueueDescriptor& descriptor,
22 const WorkloadInfo& info,
23 const arm_compute::CLCompileContext& clCompileContext);
telsoa01c577f2c2018-08-31 09:22:23 +010024 virtual void Execute() const override;
David Monahanc27d15c2022-02-17 11:00:09 +000025
26 bool SupportsTensorHandleReplacement() const override { return true;};
27
David Monahanec819992022-02-10 14:47:13 +000028 // Replace input tensor handle with the given TensorHandle
29 void ReplaceInputTensorHandle(ITensorHandle* tensorHandle, unsigned int slot) override;
telsoa01c577f2c2018-08-31 09:22:23 +010030
David Monahanec819992022-02-10 14:47:13 +000031 // Replace output tensor handle with the given TensorHandle
32 void ReplaceOutputTensorHandle(ITensorHandle* tensorHandle, unsigned int slot) override;
telsoa01c577f2c2018-08-31 09:22:23 +010033private:
34 mutable arm_compute::CLDepthConvertLayer m_Layer;
David Monahanec819992022-02-10 14:47:13 +000035 virtual void Reconfigure();
Jim Flynn5e7335b2022-02-14 11:22:29 +000036
37 std::unique_ptr<ICLTensorProxy> m_InputProxy;
38 std::unique_ptr<ICLTensorProxy> m_OutputProxy;
telsoa01c577f2c2018-08-31 09:22:23 +010039};
40
arovir01085f0a42018-10-08 14:48:19 +010041arm_compute::Status ClConvertFp32ToFp16WorkloadValidate(const TensorInfo& input, const TensorInfo& output);
telsoa01c577f2c2018-08-31 09:22:23 +010042
43} //namespace armnn