telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2017 Arm Ltd. All rights reserved. |
David Beck | ecb56cd | 2018-09-05 12:52:57 +0100 | [diff] [blame] | 3 | // SPDX-License-Identifier: MIT |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 4 | // |
| 5 | #pragma once |
| 6 | |
Aron Virginas-Tar | c9cc804 | 2018-11-01 16:15:57 +0000 | [diff] [blame] | 7 | #include "CpuTensorHandleFwd.hpp" |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 8 | |
Aron Virginas-Tar | c9cc804 | 2018-11-01 16:15:57 +0000 | [diff] [blame] | 9 | #include <InternalTypes.hpp> |
| 10 | |
Jim Flynn | e242f2d | 2019-05-22 14:24:13 +0100 | [diff] [blame] | 11 | #include <armnn/Deprecated.hpp> |
David Beck | 0dbe0ee | 2018-09-24 15:59:27 +0100 | [diff] [blame] | 12 | #include <armnn/Descriptors.hpp> |
| 13 | #include <armnn/Exceptions.hpp> |
Aron Virginas-Tar | c9cc804 | 2018-11-01 16:15:57 +0000 | [diff] [blame] | 14 | #include <armnn/Types.hpp> |
| 15 | #include <armnn/Tensor.hpp> |
David Beck | 0dbe0ee | 2018-09-24 15:59:27 +0100 | [diff] [blame] | 16 | |
Aron Virginas-Tar | c9cc804 | 2018-11-01 16:15:57 +0000 | [diff] [blame] | 17 | #include <backendsCommon/OutputHandler.hpp> |
| 18 | #include <backendsCommon/WorkloadInfo.hpp> |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 19 | |
| 20 | namespace armnn |
| 21 | { |
| 22 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 23 | //A helper function that returns the bias data type required for given input data type. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 24 | DataType GetBiasDataType(DataType inputDataType); |
| 25 | |
| 26 | struct WorkloadInfo; |
| 27 | |
| 28 | struct QueueDescriptor |
| 29 | { |
| 30 | std::vector<ITensorHandle*> m_Inputs; |
| 31 | std::vector<ITensorHandle*> m_Outputs; |
| 32 | |
| 33 | void ValidateInputsOutputs(const std::string& descName, |
| 34 | unsigned int numExpectedIn, unsigned int numExpectedOut) const; |
| 35 | |
| 36 | |
| 37 | protected: |
| 38 | ~QueueDescriptor() = default; |
| 39 | QueueDescriptor() = default; |
| 40 | QueueDescriptor(QueueDescriptor const&) = default; |
| 41 | QueueDescriptor& operator=(QueueDescriptor const&) = default; |
| 42 | }; |
| 43 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 44 | // Base class for queue descriptors which contain parameters. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 45 | template <typename LayerDescriptor> |
| 46 | struct QueueDescriptorWithParameters : public QueueDescriptor |
| 47 | { |
| 48 | LayerDescriptor m_Parameters; |
| 49 | |
| 50 | protected: |
| 51 | ~QueueDescriptorWithParameters() = default; |
| 52 | QueueDescriptorWithParameters() = default; |
| 53 | QueueDescriptorWithParameters(QueueDescriptorWithParameters const&) = default; |
| 54 | QueueDescriptorWithParameters& operator=(QueueDescriptorWithParameters const&) = default; |
| 55 | }; |
| 56 | |
| 57 | struct MemCopyQueueDescriptor : QueueDescriptor |
| 58 | { |
| 59 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 60 | }; |
| 61 | |
| 62 | using InputQueueDescriptor = MemCopyQueueDescriptor; |
| 63 | using OutputQueueDescriptor = MemCopyQueueDescriptor; |
| 64 | |
Derek Lamberti | f674aa0 | 2019-08-01 15:56:25 +0100 | [diff] [blame] | 65 | struct MemImportQueueDescriptor : QueueDescriptor |
| 66 | { |
| 67 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 68 | }; |
| 69 | |
| 70 | struct MemSyncQueueDescriptor : QueueDescriptor |
| 71 | { |
| 72 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 73 | }; |
| 74 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 75 | // Softmax layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 76 | struct SoftmaxQueueDescriptor : QueueDescriptorWithParameters<SoftmaxDescriptor> |
| 77 | { |
| 78 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 79 | }; |
| 80 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 81 | // Splitter layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 82 | struct SplitterQueueDescriptor : QueueDescriptorWithParameters<ViewsDescriptor> |
| 83 | { |
| 84 | struct ViewOrigin |
| 85 | { |
| 86 | ViewOrigin() {} |
| 87 | ViewOrigin(std::vector<unsigned int> const& origin) : m_Origin(origin) {} |
| 88 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 89 | //View origin (size of the vector is the same as number of dimensions of the view). |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 90 | std::vector<unsigned int> m_Origin; |
| 91 | }; |
| 92 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 93 | //View defines a tensor that will be carved from the input tensor. |
| 94 | //View origins are stored here, the extents are defined by sizes of the output tensors. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 95 | std::vector<ViewOrigin> m_ViewOrigins; |
| 96 | |
| 97 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 98 | }; |
| 99 | |
Jim Flynn | e242f2d | 2019-05-22 14:24:13 +0100 | [diff] [blame] | 100 | // Concat layer workload data. |
| 101 | struct ConcatQueueDescriptor : QueueDescriptorWithParameters<OriginsDescriptor> |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 102 | { |
| 103 | struct ViewOrigin |
| 104 | { |
| 105 | ViewOrigin() {} |
| 106 | ViewOrigin(const std::vector<unsigned int>& origin) : m_Origin(origin) {} |
| 107 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 108 | //View origin (size of the vector is the same as number of dimensions of the view). |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 109 | std::vector<unsigned int> m_Origin; |
| 110 | }; |
| 111 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 112 | //View defines a sub-area of the output tensor that will be filled with the corresponding input tensor. |
| 113 | //View origins are stored here, the extents are defined by sizes of the input tensors. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 114 | std::vector<ViewOrigin> m_ViewOrigins; |
| 115 | |
| 116 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 117 | }; |
| 118 | |
Jim Flynn | e242f2d | 2019-05-22 14:24:13 +0100 | [diff] [blame] | 119 | // Deprecated. Use ConcatQueueDescriptor instead |
| 120 | using MergerQueueDescriptor = ConcatQueueDescriptor; |
| 121 | |
Matthew Jackson | 2b8c1da | 2019-07-04 14:59:16 +0100 | [diff] [blame] | 122 | // Stack layer workload data. |
| 123 | struct StackQueueDescriptor : QueueDescriptorWithParameters<StackDescriptor> |
| 124 | { |
| 125 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 126 | }; |
| 127 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 128 | // Activation layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 129 | struct ActivationQueueDescriptor : QueueDescriptorWithParameters<ActivationDescriptor> |
| 130 | { |
| 131 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 132 | }; |
| 133 | |
Nikhil Raj | ee391d5 | 2019-09-05 17:50:44 +0100 | [diff] [blame] | 134 | struct ArgMinMaxQueueDescriptor : QueueDescriptorWithParameters<ArgMinMaxDescriptor> |
| 135 | { |
| 136 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 137 | }; |
| 138 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 139 | // Fully connected layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 140 | struct FullyConnectedQueueDescriptor : QueueDescriptorWithParameters<FullyConnectedDescriptor> |
| 141 | { |
| 142 | FullyConnectedQueueDescriptor() |
| 143 | : m_Weight(nullptr) |
| 144 | , m_Bias(nullptr) |
| 145 | { |
| 146 | } |
| 147 | |
| 148 | const ConstCpuTensorHandle* m_Weight; |
| 149 | const ConstCpuTensorHandle* m_Bias; |
| 150 | |
| 151 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 152 | }; |
| 153 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 154 | // Permute layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 155 | struct PermuteQueueDescriptor : QueueDescriptorWithParameters<PermuteDescriptor> |
| 156 | { |
| 157 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 158 | }; |
| 159 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 160 | // Pooling 2D layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 161 | struct Pooling2dQueueDescriptor : QueueDescriptorWithParameters<Pooling2dDescriptor> |
| 162 | { |
| 163 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 164 | }; |
| 165 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 166 | // Convolution 2D layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 167 | struct Convolution2dQueueDescriptor : QueueDescriptorWithParameters<Convolution2dDescriptor> |
| 168 | { |
| 169 | Convolution2dQueueDescriptor() |
| 170 | : m_Weight(nullptr) |
| 171 | , m_Bias(nullptr) |
| 172 | { |
| 173 | } |
| 174 | |
| 175 | const ConstCpuTensorHandle* m_Weight; |
| 176 | const ConstCpuTensorHandle* m_Bias; |
| 177 | |
| 178 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 179 | }; |
| 180 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 181 | // Depthwise Convolution 2D layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 182 | struct DepthwiseConvolution2dQueueDescriptor : QueueDescriptorWithParameters<DepthwiseConvolution2dDescriptor> |
| 183 | { |
| 184 | DepthwiseConvolution2dQueueDescriptor() |
| 185 | : m_Weight(nullptr) |
| 186 | , m_Bias(nullptr) |
| 187 | { |
| 188 | } |
| 189 | |
| 190 | const ConstCpuTensorHandle* m_Weight; |
| 191 | const ConstCpuTensorHandle* m_Bias; |
| 192 | |
| 193 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 194 | }; |
| 195 | |
Narumol Prangnawarat | 94dd5d8 | 2019-01-23 18:06:26 +0000 | [diff] [blame] | 196 | struct DetectionPostProcessQueueDescriptor : QueueDescriptorWithParameters<DetectionPostProcessDescriptor> |
| 197 | { |
Narumol Prangnawarat | bc67cef | 2019-01-31 15:31:54 +0000 | [diff] [blame] | 198 | DetectionPostProcessQueueDescriptor() |
| 199 | : m_Anchors(nullptr) |
| 200 | { |
| 201 | } |
| 202 | |
| 203 | const ConstCpuTensorHandle* m_Anchors; |
| 204 | |
Narumol Prangnawarat | 94dd5d8 | 2019-01-23 18:06:26 +0000 | [diff] [blame] | 205 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 206 | }; |
| 207 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 208 | // Normalization layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 209 | struct NormalizationQueueDescriptor : QueueDescriptorWithParameters<NormalizationDescriptor> |
| 210 | { |
| 211 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 212 | }; |
| 213 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 214 | // Add layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 215 | struct AdditionQueueDescriptor : QueueDescriptor |
| 216 | { |
| 217 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 218 | }; |
| 219 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 220 | // Multiplication layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 221 | struct MultiplicationQueueDescriptor : QueueDescriptor |
| 222 | { |
| 223 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 224 | }; |
| 225 | |
Francis Murtagh | e7a86a4 | 2018-08-29 12:42:10 +0100 | [diff] [blame] | 226 | // Division layer workload data. |
| 227 | struct DivisionQueueDescriptor : QueueDescriptor |
| 228 | { |
| 229 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 230 | }; |
| 231 | |
David Beck | c2044fe | 2018-09-05 15:00:38 +0100 | [diff] [blame] | 232 | // Subtraction layer workload data. |
| 233 | struct SubtractionQueueDescriptor : QueueDescriptor |
| 234 | { |
| 235 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 236 | }; |
| 237 | |
Nattapat Chaimanowong | 5a4304a | 2018-11-28 10:44:37 +0000 | [diff] [blame] | 238 | // Maximum layer workload data. |
| 239 | struct MaximumQueueDescriptor : QueueDescriptor |
| 240 | { |
| 241 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 242 | }; |
| 243 | |
narpra01 | a6bf912 | 2018-09-10 09:50:09 +0100 | [diff] [blame] | 244 | // Mean layer workload data. |
narpra01 | 32b9046 | 2018-09-13 11:07:48 +0100 | [diff] [blame] | 245 | struct MeanQueueDescriptor : QueueDescriptorWithParameters<MeanDescriptor> |
narpra01 | a6bf912 | 2018-09-10 09:50:09 +0100 | [diff] [blame] | 246 | { |
| 247 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 248 | }; |
| 249 | |
jimfly01 | 2c9322a | 2018-09-19 10:59:49 +0100 | [diff] [blame] | 250 | // Pad layer workload data |
| 251 | struct PadQueueDescriptor : QueueDescriptorWithParameters<PadDescriptor> |
| 252 | { |
| 253 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 254 | }; |
| 255 | |
Derek Lamberti | a9cca6a | 2019-03-25 15:41:58 +0000 | [diff] [blame] | 256 | struct QuantizeQueueDescriptor : QueueDescriptor |
| 257 | { |
| 258 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 259 | }; |
| 260 | |
FrancisMurtagh | 2099595 | 2018-12-17 12:11:36 +0000 | [diff] [blame] | 261 | // Equal layer workload data |
| 262 | struct EqualQueueDescriptor : QueueDescriptor |
| 263 | { |
| 264 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 265 | }; |
| 266 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 267 | // Batch norm layer workload data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 268 | struct BatchNormalizationQueueDescriptor : QueueDescriptorWithParameters<BatchNormalizationDescriptor> |
| 269 | { |
| 270 | BatchNormalizationQueueDescriptor() |
| 271 | : m_Mean(nullptr) |
| 272 | , m_Variance(nullptr) |
| 273 | , m_Beta(nullptr) |
| 274 | , m_Gamma(nullptr) |
| 275 | { |
| 276 | } |
| 277 | |
| 278 | const ConstCpuTensorHandle* m_Mean; |
| 279 | const ConstCpuTensorHandle* m_Variance; |
| 280 | const ConstCpuTensorHandle* m_Beta; |
| 281 | const ConstCpuTensorHandle* m_Gamma; |
| 282 | |
| 283 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 284 | }; |
| 285 | |
| 286 | struct ResizeBilinearQueueDescriptor : QueueDescriptorWithParameters<ResizeBilinearDescriptor> |
| 287 | { |
| 288 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 289 | }; |
| 290 | |
Teresa Charlin | a9075df | 2019-06-27 15:41:57 +0100 | [diff] [blame] | 291 | struct ResizeQueueDescriptor : QueueDescriptorWithParameters<ResizeDescriptor> |
| 292 | { |
| 293 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 294 | }; |
| 295 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 296 | struct FakeQuantizationQueueDescriptor : QueueDescriptorWithParameters<FakeQuantizationDescriptor> |
| 297 | { |
| 298 | FakeQuantizationQueueDescriptor() |
| 299 | : m_Min(nullptr) |
| 300 | , m_Max(nullptr) |
| 301 | { |
| 302 | } |
| 303 | |
| 304 | const ConstCpuTensorHandle* m_Min; |
| 305 | const ConstCpuTensorHandle* m_Max; |
| 306 | |
| 307 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 308 | }; |
| 309 | |
Kevin May | ce5045a | 2019-10-02 14:07:47 +0100 | [diff] [blame] | 310 | struct InstanceNormalizationQueueDescriptor : QueueDescriptorWithParameters<InstanceNormalizationDescriptor> |
| 311 | { |
Kevin May | ce5045a | 2019-10-02 14:07:47 +0100 | [diff] [blame] | 312 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 313 | }; |
| 314 | |
Matteo Martincigh | bcd3c85 | 2018-09-28 14:14:12 +0100 | [diff] [blame] | 315 | struct L2NormalizationQueueDescriptor : QueueDescriptorWithParameters<L2NormalizationDescriptor> |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 316 | { |
| 317 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 318 | }; |
| 319 | |
Aron Virginas-Tar | f982dea | 2019-10-11 14:07:53 +0100 | [diff] [blame] | 320 | struct LogSoftmaxQueueDescriptor : QueueDescriptorWithParameters<LogSoftmaxDescriptor> |
| 321 | { |
| 322 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 323 | }; |
| 324 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 325 | struct ConstantQueueDescriptor : QueueDescriptor |
| 326 | { |
| 327 | ConstantQueueDescriptor() |
| 328 | : m_LayerOutput(nullptr) |
| 329 | { |
| 330 | } |
| 331 | |
| 332 | const ConstCpuTensorHandle* m_LayerOutput; |
| 333 | |
| 334 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 335 | }; |
| 336 | |
| 337 | struct ReshapeQueueDescriptor : QueueDescriptorWithParameters<ReshapeDescriptor> |
| 338 | { |
| 339 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 340 | }; |
| 341 | |
Nattapat Chaimanowong | 207ef9a | 2018-11-02 10:57:25 +0000 | [diff] [blame] | 342 | struct SpaceToBatchNdQueueDescriptor : QueueDescriptorWithParameters<SpaceToBatchNdDescriptor> |
| 343 | { |
| 344 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 345 | }; |
| 346 | |
Aron Virginas-Tar | 972af15 | 2019-06-11 14:14:03 +0100 | [diff] [blame] | 347 | struct SpaceToDepthQueueDescriptor : QueueDescriptorWithParameters<SpaceToDepthDescriptor> |
| 348 | { |
| 349 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 350 | }; |
| 351 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 352 | struct FloorQueueDescriptor : QueueDescriptor |
| 353 | { |
| 354 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 355 | }; |
| 356 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 357 | struct LstmQueueDescriptor : QueueDescriptorWithParameters<LstmDescriptor> |
| 358 | { |
| 359 | LstmQueueDescriptor() |
| 360 | : m_InputToInputWeights(nullptr) |
| 361 | , m_InputToForgetWeights(nullptr) |
| 362 | , m_InputToCellWeights(nullptr) |
| 363 | , m_InputToOutputWeights(nullptr) |
| 364 | , m_RecurrentToInputWeights(nullptr) |
| 365 | , m_RecurrentToForgetWeights(nullptr) |
| 366 | , m_RecurrentToCellWeights(nullptr) |
| 367 | , m_RecurrentToOutputWeights(nullptr) |
| 368 | , m_CellToInputWeights(nullptr) |
| 369 | , m_CellToForgetWeights(nullptr) |
| 370 | , m_CellToOutputWeights(nullptr) |
| 371 | , m_InputGateBias(nullptr) |
| 372 | , m_ForgetGateBias(nullptr) |
| 373 | , m_CellBias(nullptr) |
| 374 | , m_OutputGateBias(nullptr) |
| 375 | , m_ProjectionWeights(nullptr) |
| 376 | , m_ProjectionBias(nullptr) |
Jan Eilers | 38e05bd | 2019-06-26 13:10:09 +0100 | [diff] [blame] | 377 | , m_InputLayerNormWeights(nullptr) |
| 378 | , m_ForgetLayerNormWeights(nullptr) |
| 379 | , m_CellLayerNormWeights(nullptr) |
| 380 | , m_OutputLayerNormWeights(nullptr) |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 381 | { |
| 382 | } |
| 383 | |
| 384 | const ConstCpuTensorHandle* m_InputToInputWeights; |
| 385 | const ConstCpuTensorHandle* m_InputToForgetWeights; |
| 386 | const ConstCpuTensorHandle* m_InputToCellWeights; |
| 387 | const ConstCpuTensorHandle* m_InputToOutputWeights; |
| 388 | const ConstCpuTensorHandle* m_RecurrentToInputWeights; |
| 389 | const ConstCpuTensorHandle* m_RecurrentToForgetWeights; |
| 390 | const ConstCpuTensorHandle* m_RecurrentToCellWeights; |
| 391 | const ConstCpuTensorHandle* m_RecurrentToOutputWeights; |
| 392 | const ConstCpuTensorHandle* m_CellToInputWeights; |
| 393 | const ConstCpuTensorHandle* m_CellToForgetWeights; |
| 394 | const ConstCpuTensorHandle* m_CellToOutputWeights; |
| 395 | const ConstCpuTensorHandle* m_InputGateBias; |
| 396 | const ConstCpuTensorHandle* m_ForgetGateBias; |
| 397 | const ConstCpuTensorHandle* m_CellBias; |
| 398 | const ConstCpuTensorHandle* m_OutputGateBias; |
| 399 | const ConstCpuTensorHandle* m_ProjectionWeights; |
| 400 | const ConstCpuTensorHandle* m_ProjectionBias; |
Jan Eilers | 38e05bd | 2019-06-26 13:10:09 +0100 | [diff] [blame] | 401 | const ConstCpuTensorHandle* m_InputLayerNormWeights; |
| 402 | const ConstCpuTensorHandle* m_ForgetLayerNormWeights; |
| 403 | const ConstCpuTensorHandle* m_CellLayerNormWeights; |
| 404 | const ConstCpuTensorHandle* m_OutputLayerNormWeights; |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 405 | |
| 406 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 407 | }; |
| 408 | |
| 409 | struct ConvertFp16ToFp32QueueDescriptor : QueueDescriptor |
| 410 | { |
| 411 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 412 | }; |
| 413 | |
| 414 | struct ConvertFp32ToFp16QueueDescriptor : QueueDescriptor |
| 415 | { |
| 416 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 417 | }; |
| 418 | |
Éanna Ó Catháin | 4e1e136 | 2018-11-12 11:36:34 +0000 | [diff] [blame] | 419 | struct BatchToSpaceNdQueueDescriptor : QueueDescriptorWithParameters<BatchToSpaceNdDescriptor> |
| 420 | { |
| 421 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 422 | }; |
Conor Kennedy | 430b5d8 | 2018-11-14 15:28:28 +0000 | [diff] [blame] | 423 | |
| 424 | struct StridedSliceQueueDescriptor : QueueDescriptorWithParameters<StridedSliceDescriptor> |
| 425 | { |
| 426 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 427 | }; |
| 428 | |
Éanna Ó Catháin | 20e5880 | 2018-12-04 10:29:06 +0000 | [diff] [blame] | 429 | // Minimum layer workload data. |
kevmay01 | 9053969 | 2018-11-29 08:40:19 +0000 | [diff] [blame] | 430 | struct MinimumQueueDescriptor : QueueDescriptor |
| 431 | { |
| 432 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 433 | }; |
| 434 | |
Matteo Martincigh | 59a950c | 2018-12-13 12:48:25 +0000 | [diff] [blame] | 435 | struct GreaterQueueDescriptor : QueueDescriptor |
| 436 | { |
| 437 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 438 | }; |
| 439 | |
Nattapat Chaimanowong | 964e955 | 2019-03-26 11:03:26 +0000 | [diff] [blame] | 440 | struct DebugQueueDescriptor : QueueDescriptor |
Nattapat Chaimanowong | a9a1cf1 | 2018-12-03 16:06:49 +0000 | [diff] [blame] | 441 | { |
janeil01 | 3fec1ea | 2019-11-07 09:47:20 +0000 | [diff] [blame] | 442 | DebugQueueDescriptor() : m_Guid(0) {} |
| 443 | |
Nattapat Chaimanowong | a9a1cf1 | 2018-12-03 16:06:49 +0000 | [diff] [blame] | 444 | void Validate(const WorkloadInfo& workloadInfo) const; |
Nattapat Chaimanowong | 964e955 | 2019-03-26 11:03:26 +0000 | [diff] [blame] | 445 | |
| 446 | LayerGuid m_Guid; |
| 447 | std::string m_LayerName; |
| 448 | unsigned int m_SlotIndex; |
Nattapat Chaimanowong | a9a1cf1 | 2018-12-03 16:06:49 +0000 | [diff] [blame] | 449 | }; |
| 450 | |
Mohamed Nour Abouelseoud | a1d3c6a | 2018-12-27 12:39:16 +0000 | [diff] [blame] | 451 | struct RsqrtQueueDescriptor : QueueDescriptor |
| 452 | { |
| 453 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 454 | }; |
| 455 | |
narpra01 | b89b05f | 2019-01-16 09:53:09 +0000 | [diff] [blame] | 456 | struct GatherQueueDescriptor : QueueDescriptor |
| 457 | { |
| 458 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 459 | }; |
| 460 | |
Matteo Martincigh | 4912402 | 2019-01-11 13:25:59 +0000 | [diff] [blame] | 461 | struct PreCompiledQueueDescriptor : QueueDescriptorWithParameters<PreCompiledDescriptor> |
| 462 | { |
| 463 | PreCompiledQueueDescriptor() |
| 464 | : m_PreCompiledObject(nullptr) |
| 465 | { |
| 466 | } |
| 467 | |
Matteo Martincigh | 7997a35 | 2019-04-17 15:37:30 +0100 | [diff] [blame] | 468 | void* m_PreCompiledObject; |
Matteo Martincigh | 4912402 | 2019-01-11 13:25:59 +0000 | [diff] [blame] | 469 | |
| 470 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 471 | }; |
| 472 | |
Nattapat Chaimanowong | e4294fd | 2019-03-28 09:56:53 +0000 | [diff] [blame] | 473 | struct DequantizeQueueDescriptor : QueueDescriptor |
| 474 | { |
| 475 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 476 | }; |
| 477 | |
Nattapat Chaimanowong | 1f88630 | 2019-04-05 13:37:19 +0100 | [diff] [blame] | 478 | struct MergeQueueDescriptor : QueueDescriptor |
| 479 | { |
| 480 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 481 | }; |
| 482 | |
Sadik Armagan | eff363d | 2019-04-05 15:25:46 +0100 | [diff] [blame] | 483 | struct SwitchQueueDescriptor : QueueDescriptor |
| 484 | { |
| 485 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 486 | }; |
| 487 | |
Matteo Martincigh | 0e406ee | 2019-06-12 15:42:18 +0100 | [diff] [blame] | 488 | struct PreluQueueDescriptor : QueueDescriptor |
| 489 | { |
| 490 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 491 | }; |
| 492 | |
Aron Virginas-Tar | 639fb04 | 2019-06-20 14:28:19 +0100 | [diff] [blame] | 493 | struct TransposeConvolution2dQueueDescriptor : QueueDescriptorWithParameters<TransposeConvolution2dDescriptor> |
| 494 | { |
| 495 | TransposeConvolution2dQueueDescriptor() : |
| 496 | m_Weight(nullptr), |
| 497 | m_Bias(nullptr) |
| 498 | {} |
| 499 | |
| 500 | const ConstCpuTensorHandle* m_Weight; |
| 501 | const ConstCpuTensorHandle* m_Bias; |
| 502 | |
| 503 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 504 | }; |
| 505 | |
James Conroy | ee18dc8 | 2019-07-17 11:27:46 +0100 | [diff] [blame] | 506 | struct QuantizedLstmQueueDescriptor : QueueDescriptor |
| 507 | { |
| 508 | QuantizedLstmQueueDescriptor() |
| 509 | : m_InputToInputWeights(nullptr) |
| 510 | , m_InputToForgetWeights(nullptr) |
| 511 | , m_InputToCellWeights(nullptr) |
| 512 | , m_InputToOutputWeights(nullptr) |
| 513 | |
| 514 | , m_RecurrentToInputWeights(nullptr) |
| 515 | , m_RecurrentToForgetWeights(nullptr) |
| 516 | , m_RecurrentToCellWeights(nullptr) |
| 517 | , m_RecurrentToOutputWeights(nullptr) |
| 518 | |
| 519 | , m_InputGateBias(nullptr) |
| 520 | , m_ForgetGateBias(nullptr) |
| 521 | , m_CellBias(nullptr) |
| 522 | , m_OutputGateBias(nullptr) |
| 523 | {} |
| 524 | |
| 525 | const ConstCpuTensorHandle* m_InputToInputWeights; |
| 526 | const ConstCpuTensorHandle* m_InputToForgetWeights; |
| 527 | const ConstCpuTensorHandle* m_InputToCellWeights; |
| 528 | const ConstCpuTensorHandle* m_InputToOutputWeights; |
| 529 | |
| 530 | const ConstCpuTensorHandle* m_RecurrentToInputWeights; |
| 531 | const ConstCpuTensorHandle* m_RecurrentToForgetWeights; |
| 532 | const ConstCpuTensorHandle* m_RecurrentToCellWeights; |
| 533 | const ConstCpuTensorHandle* m_RecurrentToOutputWeights; |
| 534 | |
| 535 | const ConstCpuTensorHandle* m_InputGateBias; |
| 536 | const ConstCpuTensorHandle* m_ForgetGateBias; |
| 537 | const ConstCpuTensorHandle* m_CellBias; |
| 538 | const ConstCpuTensorHandle* m_OutputGateBias; |
| 539 | |
| 540 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 541 | }; |
| 542 | |
Kevin May | 868eb14 | 2019-09-04 17:29:31 +0100 | [diff] [blame] | 543 | struct AbsQueueDescriptor : QueueDescriptor |
| 544 | { |
| 545 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 546 | }; |
| 547 | |
Aron Virginas-Tar | 636ab40 | 2019-09-16 14:27:45 +0100 | [diff] [blame] | 548 | struct SliceQueueDescriptor : QueueDescriptorWithParameters<SliceDescriptor> |
| 549 | { |
| 550 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 551 | }; |
| 552 | |
Aron Virginas-Tar | dd6247f | 2019-09-19 14:31:17 +0100 | [diff] [blame] | 553 | struct DepthToSpaceQueueDescriptor : QueueDescriptorWithParameters<DepthToSpaceDescriptor> |
| 554 | { |
| 555 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 556 | }; |
| 557 | |
Aron Virginas-Tar | 77bfb5e | 2019-10-16 17:45:38 +0100 | [diff] [blame] | 558 | struct ComparisonQueueDescriptor : QueueDescriptorWithParameters<ComparisonDescriptor> |
| 559 | { |
| 560 | void Validate(const WorkloadInfo& workloadInfo) const; |
| 561 | }; |
| 562 | |
Aron Virginas-Tar | 636ab40 | 2019-09-16 14:27:45 +0100 | [diff] [blame] | 563 | } // namespace armnn |