David Monahan | 8a57046 | 2023-11-22 13:24:25 +0000 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2022-2023 Arm Ltd and Contributors. All rights reserved. |
| 3 | // SPDX-License-Identifier: MIT |
| 4 | // |
| 5 | |
| 6 | #include "GpuFsaBackend.hpp" |
| 7 | #include "GpuFsaBackendContext.hpp" |
| 8 | #include "GpuFsaBackendDefaultAllocator.hpp" |
| 9 | #include "GpuFsaBackendId.hpp" |
| 10 | #include "GpuFsaLayerSupport.hpp" |
| 11 | #include "GpuFsaTensorHandleFactory.hpp" |
| 12 | #include "GpuFsaWorkloadFactory.hpp" |
| 13 | |
| 14 | #include <armnn/backends/IBackendContext.hpp> |
| 15 | #include <armnn/backends/IMemoryManager.hpp> |
| 16 | #include <aclCommon/BaseMemoryManager.hpp> |
| 17 | #include <backendsCommon/SubgraphUtils.hpp> |
| 18 | #include <Optimizer.hpp> |
| 19 | |
| 20 | #include <arm_compute/core/CL/CLKernelLibrary.h> |
| 21 | #include <arm_compute/runtime/CL/CLBufferAllocator.h> |
| 22 | |
| 23 | #include <arm_compute/dynamic_fusion/sketch/gpu/GpuWorkloadContext.h> |
| 24 | #include <arm_compute/dynamic_fusion/sketch/gpu/GpuWorkloadSketch.h> |
| 25 | |
| 26 | #include "layerValidators/GpuFsaConvolution2dValidate.hpp" |
| 27 | |
| 28 | namespace armnn |
| 29 | { |
| 30 | |
| 31 | template <typename T> |
| 32 | inline void DeleteAsType(const void* const blob) |
| 33 | { |
| 34 | delete static_cast<const T*>(blob); |
| 35 | } |
| 36 | |
| 37 | inline SubgraphView::InputSlots CreateInputsFrom(Layer* layer) |
| 38 | { |
| 39 | SubgraphView::InputSlots result; |
| 40 | for (auto&& it = layer->BeginInputSlots(); it != layer->EndInputSlots(); ++it) |
| 41 | { |
| 42 | result.push_back(&(*it)); |
| 43 | } |
| 44 | return result; |
| 45 | } |
| 46 | |
| 47 | inline SubgraphView::OutputSlots CreateOutputsFrom(Layer* layer) |
| 48 | { |
| 49 | SubgraphView::OutputSlots result; |
| 50 | for (auto&& it = layer->BeginOutputSlots(); it != layer->EndOutputSlots(); ++it) |
| 51 | { |
| 52 | result.push_back(&(*it)); |
| 53 | } |
| 54 | return result; |
| 55 | } |
| 56 | |
| 57 | inline SubgraphView::SubgraphViewPtr CreateSubgraphViewFrom(SubgraphView::InputSlots&& inputs, |
| 58 | SubgraphView::OutputSlots&& outputs, |
| 59 | SubgraphView::Layers&& layers) |
| 60 | { |
| 61 | return std::make_unique<SubgraphView>(std::move(inputs), std::move(outputs), std::move(layers)); |
| 62 | } |
| 63 | |
| 64 | const BackendId& GpuFsaBackend::GetIdStatic() |
| 65 | { |
| 66 | static const BackendId s_Id{GpuFsaBackendId()}; |
| 67 | return s_Id; |
| 68 | } |
| 69 | |
| 70 | IBackendInternal::IMemoryManagerUniquePtr GpuFsaBackend::CreateMemoryManager() const |
| 71 | { |
| 72 | if (m_UsingCustomAllocator) |
| 73 | { |
| 74 | return std::make_unique<GpuFsaMemoryManager>(m_CustomAllocator); |
| 75 | } |
| 76 | return std::make_unique<GpuFsaMemoryManager>(std::make_unique<arm_compute::CLBufferAllocator>()); |
| 77 | } |
| 78 | |
| 79 | IBackendInternal::IWorkloadFactoryPtr GpuFsaBackend::CreateWorkloadFactory( |
| 80 | const IBackendInternal::IMemoryManagerSharedPtr& memoryManager) const |
| 81 | { |
| 82 | return std::make_unique<GpuFsaWorkloadFactory>(PolymorphicPointerDowncast<GpuFsaMemoryManager>(memoryManager)); |
| 83 | } |
| 84 | |
| 85 | IBackendInternal::IWorkloadFactoryPtr GpuFsaBackend::CreateWorkloadFactory( |
| 86 | TensorHandleFactoryRegistry& registry) const |
| 87 | { |
| 88 | std::shared_ptr<GpuFsaMemoryManager> memoryManager; |
| 89 | if (m_UsingCustomAllocator) |
| 90 | { |
| 91 | memoryManager = std::make_shared<GpuFsaMemoryManager>(m_CustomAllocator); |
| 92 | } |
| 93 | else |
| 94 | { |
| 95 | memoryManager = std::make_shared<GpuFsaMemoryManager>(std::make_unique<arm_compute::CLBufferAllocator>()); |
| 96 | } |
| 97 | |
| 98 | std::unique_ptr<ITensorHandleFactory> factory = std::make_unique<GpuFsaTensorHandleFactory>(memoryManager); |
| 99 | |
| 100 | registry.RegisterMemoryManager(memoryManager); |
| 101 | registry.RegisterFactory(std::move(factory)); |
| 102 | |
| 103 | return std::make_unique<GpuFsaWorkloadFactory>(PolymorphicPointerDowncast<GpuFsaMemoryManager>(memoryManager)); |
| 104 | } |
| 105 | |
| 106 | IBackendInternal::IWorkloadFactoryPtr GpuFsaBackend::CreateWorkloadFactory( |
| 107 | TensorHandleFactoryRegistry& registry, |
| 108 | const ModelOptions&, |
| 109 | MemorySourceFlags inputFlags, |
| 110 | MemorySourceFlags outputFlags) const |
| 111 | { |
| 112 | |
| 113 | // To allow force import if inputFlags/outputFlags are Undefined, set it as Malloc |
| 114 | if (inputFlags == static_cast<MemorySourceFlags>(MemorySource::Undefined)) |
| 115 | { |
| 116 | inputFlags = static_cast<MemorySourceFlags>(MemorySource::Malloc); |
| 117 | } |
| 118 | if (outputFlags == static_cast<MemorySourceFlags>(MemorySource::Undefined)) |
| 119 | { |
| 120 | outputFlags = static_cast<MemorySourceFlags>(MemorySource::Malloc); |
| 121 | } |
| 122 | |
| 123 | std::shared_ptr<GpuFsaMemoryManager> memoryManager; |
| 124 | if (m_UsingCustomAllocator) |
| 125 | { |
| 126 | memoryManager = std::make_shared<GpuFsaMemoryManager>(m_CustomAllocator); |
| 127 | } |
| 128 | else |
| 129 | { |
| 130 | memoryManager = std::make_shared<GpuFsaMemoryManager>(std::make_unique<arm_compute::CLBufferAllocator>()); |
| 131 | } |
| 132 | |
| 133 | std::unique_ptr<ITensorHandleFactory> factory = std::make_unique<GpuFsaTensorHandleFactory>(memoryManager); |
| 134 | |
| 135 | registry.RegisterMemoryManager(memoryManager); |
| 136 | registry.RegisterFactory(std::move(factory)); |
| 137 | |
| 138 | return std::make_unique<GpuFsaWorkloadFactory>(PolymorphicPointerDowncast<GpuFsaMemoryManager>(memoryManager)); |
| 139 | } |
| 140 | |
| 141 | std::vector<ITensorHandleFactory::FactoryId> GpuFsaBackend::GetHandleFactoryPreferences() const |
| 142 | { |
| 143 | return std::vector<ITensorHandleFactory::FactoryId> { GpuFsaTensorHandleFactory::GetIdStatic() }; |
| 144 | } |
| 145 | |
| 146 | void GpuFsaBackend::RegisterTensorHandleFactories(TensorHandleFactoryRegistry& registry) |
| 147 | { |
| 148 | std::shared_ptr<GpuFsaMemoryManager> memoryManager; |
| 149 | if (m_UsingCustomAllocator) |
| 150 | { |
| 151 | memoryManager = std::make_shared<GpuFsaMemoryManager>(m_CustomAllocator); |
| 152 | } |
| 153 | else |
| 154 | { |
| 155 | memoryManager = std::make_shared<GpuFsaMemoryManager>(std::make_unique<arm_compute::CLBufferAllocator>()); |
| 156 | } |
| 157 | |
| 158 | std::unique_ptr<ITensorHandleFactory> factory = std::make_unique<GpuFsaTensorHandleFactory>(memoryManager); |
| 159 | registry.RegisterMemoryManager(memoryManager); |
| 160 | registry.RegisterFactory(std::move(factory)); |
| 161 | |
| 162 | } |
| 163 | |
| 164 | void GpuFsaBackend::RegisterTensorHandleFactories(TensorHandleFactoryRegistry& registry, |
| 165 | MemorySourceFlags inputFlags, |
| 166 | MemorySourceFlags outputFlags) |
| 167 | { |
| 168 | // To allow force import if inputFlags/outputFlags are Undefined, set it as Malloc |
| 169 | if (inputFlags == static_cast<MemorySourceFlags>(MemorySource::Undefined)) |
| 170 | { |
| 171 | inputFlags = static_cast<MemorySourceFlags>(MemorySource::Malloc); |
| 172 | } |
| 173 | if (outputFlags == static_cast<MemorySourceFlags>(MemorySource::Undefined)) |
| 174 | { |
| 175 | outputFlags = static_cast<MemorySourceFlags>(MemorySource::Malloc); |
| 176 | } |
| 177 | |
| 178 | std::shared_ptr<GpuFsaMemoryManager> memoryManager; |
| 179 | if (m_UsingCustomAllocator) |
| 180 | { |
| 181 | memoryManager = std::make_shared<GpuFsaMemoryManager>(m_CustomAllocator); |
| 182 | } |
| 183 | else |
| 184 | { |
| 185 | memoryManager = std::make_shared<GpuFsaMemoryManager>(std::make_unique<arm_compute::CLBufferAllocator>()); |
| 186 | } |
| 187 | |
| 188 | std::unique_ptr<ITensorHandleFactory> factory = std::make_unique<GpuFsaTensorHandleFactory>(memoryManager); |
| 189 | registry.RegisterMemoryManager(memoryManager); |
| 190 | registry.RegisterFactory(std::move(factory)); |
| 191 | } |
| 192 | |
| 193 | IBackendInternal::IBackendContextPtr GpuFsaBackend::CreateBackendContext(const IRuntime::CreationOptions& options) const |
| 194 | { |
| 195 | return IBackendContextPtr{new GpuFsaBackendContext{options}}; |
| 196 | } |
| 197 | |
| 198 | IBackendInternal::IBackendProfilingContextPtr GpuFsaBackend::CreateBackendProfilingContext( |
| 199 | const IRuntime::CreationOptions&, IBackendProfilingPtr&) |
| 200 | { |
| 201 | return IBackendProfilingContextPtr{}; |
| 202 | } |
| 203 | |
| 204 | IBackendInternal::ILayerSupportSharedPtr GpuFsaBackend::GetLayerSupport() const |
| 205 | { |
| 206 | static ILayerSupportSharedPtr layerSupport{new GpuFsaLayerSupport}; |
| 207 | return layerSupport; |
| 208 | } |
| 209 | |
| 210 | std::unique_ptr<ICustomAllocator> GpuFsaBackend::GetDefaultAllocator() const |
| 211 | { |
| 212 | return std::make_unique<GpuFsaBackendDefaultAllocator>(); |
| 213 | } |
| 214 | |
| 215 | OptimizationViews GpuFsaBackend::OptimizeSubgraphView(const SubgraphView& subgraph, |
| 216 | const ModelOptions& modelOptions) const |
| 217 | { |
| 218 | OptimizationViews optimizationViews(modelOptions); |
| 219 | |
| 220 | using namespace arm_compute::experimental::dynamic_fusion; |
| 221 | // Create a new workload sketch, for validation purposes |
| 222 | auto compileCtx = arm_compute::CLKernelLibrary::get().get_compile_context(); |
| 223 | auto gpuCtx = GpuWorkloadContext(&compileCtx); |
| 224 | |
| 225 | auto it = subgraph.end(); |
| 226 | std::map<LayerGuid, Layer*> untouched; |
| 227 | while (it != subgraph.begin()) |
| 228 | { |
| 229 | --it; |
| 230 | Layer& base = *(PolymorphicDowncast<Layer*>(*it)); |
| 231 | untouched.insert({base.GetGuid(), &base}); |
| 232 | } |
| 233 | |
| 234 | GpuFsaLayerSupport supportChecker; |
| 235 | it = subgraph.end(); |
| 236 | while (it != subgraph.begin()) |
| 237 | { |
| 238 | --it; |
| 239 | Layer& base = *(PolymorphicDowncast<Layer*>(*it)); |
| 240 | |
| 241 | std::unique_ptr<GpuWorkloadSketch> sketch = std::make_unique<GpuWorkloadSketch>(&gpuCtx); |
| 242 | switch (base.GetType()) |
| 243 | { |
| 244 | case (LayerType::Convolution2d): |
| 245 | { |
| 246 | auto input = base.GetInputSlot(0).GetConnectedOutputSlot()->GetTensorInfo(); |
| 247 | auto weights = base.GetInputSlot(1).GetConnectedOutputSlot()->GetTensorInfo(); |
| 248 | //std::vector<TensorInfo> infos = {input, weights}; |
| 249 | |
| 250 | auto desc = PolymorphicDowncast<const Convolution2dDescriptor*>(&base.GetParameters()); |
| 251 | if (desc->m_BiasEnabled) |
| 252 | { |
| 253 | auto bias = base.GetInputSlot(2).GetConnectedOutputSlot()->GetTensorInfo(); |
| 254 | GpuFsaConvolution2dCreateOp(input, |
| 255 | *desc, |
| 256 | weights, |
| 257 | bias); |
| 258 | } |
| 259 | else |
| 260 | { |
| 261 | GpuFsaConvolution2dCreateOp(input, |
| 262 | *desc, |
| 263 | weights, |
| 264 | EmptyOptional()); |
| 265 | } |
| 266 | break; |
| 267 | } |
| 268 | default: |
| 269 | // unsupported layer for GpuFsa backend |
| 270 | continue; |
| 271 | } |
| 272 | |
| 273 | auto compiledBlob = std::make_unique<PreCompiledObjectPtr>(sketch.release(), DeleteAsType<GpuWorkloadSketch>); |
| 274 | |
| 275 | IConnectableLayer* preCompiledLayer = optimizationViews.GetINetwork()->AddPrecompiledLayer( |
| 276 | PreCompiledDescriptor(base.GetNumInputSlots(), base.GetNumOutputSlots()), |
| 277 | std::move(*compiledBlob), |
| 278 | armnn::Optional<BackendId>(GetId()), |
| 279 | "GpuFsa_Pre_Compiled_Layer"); |
| 280 | |
| 281 | // Copy the output tensor infos from sub-graph |
| 282 | for (unsigned int i = 0; i < subgraph.GetNumOutputSlots(); i++) |
| 283 | { |
| 284 | preCompiledLayer->GetOutputSlot(i).SetTensorInfo(base.GetOutputSlot(i).GetTensorInfo()); |
| 285 | } |
| 286 | |
| 287 | SubgraphView::SubgraphViewPtr substituteSubgraph = |
| 288 | CreateSubgraphViewFrom(CreateInputsFrom(&base), |
| 289 | CreateOutputsFrom(&base), |
| 290 | {&base}); |
| 291 | |
| 292 | optimizationViews.AddSubstitution({ *substituteSubgraph, SubgraphView(preCompiledLayer) }); |
| 293 | |
| 294 | untouched.erase(base.GetGuid()); |
| 295 | } |
| 296 | |
| 297 | if (optimizationViews.GetSubstitutions().empty()) |
| 298 | { |
| 299 | optimizationViews.AddUntouchedSubgraph(SubgraphView(subgraph)); |
| 300 | } |
| 301 | else |
| 302 | { |
| 303 | ReportUntouchedLayers(optimizationViews, untouched); |
| 304 | } |
| 305 | |
| 306 | |
| 307 | return optimizationViews; |
| 308 | } |
| 309 | |
| 310 | } // namespace armnn |