Mike Kelly | 0be3a88 | 2020-01-24 11:27:50 +0000 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2020 Arm Ltd. All rights reserved. |
| 3 | // SPDX-License-Identifier: MIT |
| 4 | // |
| 5 | |
| 6 | #include "NeonSpaceToBatchNdWorkload.hpp" |
| 7 | |
| 8 | #include "NeonWorkloadUtils.hpp" |
Jan Eilers | 3c9e045 | 2020-04-10 13:00:44 +0100 | [diff] [blame] | 9 | |
Matthew Sloyan | 171214c | 2020-09-09 09:07:37 +0100 | [diff] [blame] | 10 | #include <armnn/utility/NumericCast.hpp> |
Jan Eilers | 3c9e045 | 2020-04-10 13:00:44 +0100 | [diff] [blame] | 11 | #include <armnn/utility/PolymorphicDowncast.hpp> |
Matthew Sloyan | 171214c | 2020-09-09 09:07:37 +0100 | [diff] [blame] | 12 | |
Mike Kelly | 0be3a88 | 2020-01-24 11:27:50 +0000 | [diff] [blame] | 13 | #include <ResolveType.hpp> |
| 14 | |
| 15 | namespace armnn |
| 16 | { |
| 17 | |
| 18 | using namespace armcomputetensorutils; |
| 19 | |
| 20 | arm_compute::Status NeonSpaceToBatchNdWorkloadValidate(const TensorInfo& input, |
| 21 | const TensorInfo& output, |
| 22 | const SpaceToBatchNdDescriptor& descriptor) |
| 23 | { |
| 24 | const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout); |
| 25 | const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout); |
| 26 | |
| 27 | // ArmNN blockShape is [H, W] Cl asks for W, H |
Matthew Sloyan | 171214c | 2020-09-09 09:07:37 +0100 | [diff] [blame] | 28 | int32_t blockHeight = armnn::numeric_cast<int32_t>(descriptor.m_BlockShape[0]); |
| 29 | int32_t blockWidth = armnn::numeric_cast<int32_t>(descriptor.m_BlockShape[1]); |
Mike Kelly | 0be3a88 | 2020-01-24 11:27:50 +0000 | [diff] [blame] | 30 | |
| 31 | arm_compute::Size2D paddingLeftTop = BuildArmComputeSize2D( |
| 32 | descriptor.m_PadList[1].first, descriptor.m_PadList[0].first); |
| 33 | arm_compute::Size2D paddingRightBottom = BuildArmComputeSize2D( |
| 34 | descriptor.m_PadList[1].second, descriptor.m_PadList[0].second); |
| 35 | |
| 36 | return arm_compute::NESpaceToBatchLayer::validate(&aclInputInfo, |
| 37 | blockWidth, |
| 38 | blockHeight, |
| 39 | paddingLeftTop, |
| 40 | paddingRightBottom, |
| 41 | &aclOutputInfo); |
| 42 | } |
| 43 | |
| 44 | NeonSpaceToBatchNdWorkload::NeonSpaceToBatchNdWorkload(const SpaceToBatchNdQueueDescriptor& desc, |
| 45 | const WorkloadInfo& info) |
| 46 | : BaseWorkload<SpaceToBatchNdQueueDescriptor>(desc, info) |
| 47 | { |
| 48 | m_Data.ValidateInputsOutputs("NESpaceToBatchNdWorkload", 1, 1); |
| 49 | |
| 50 | arm_compute::ITensor& input = |
Jan Eilers | 3c9e045 | 2020-04-10 13:00:44 +0100 | [diff] [blame] | 51 | PolymorphicPointerDowncast<IAclTensorHandle>(m_Data.m_Inputs[0])->GetTensor(); |
Mike Kelly | 0be3a88 | 2020-01-24 11:27:50 +0000 | [diff] [blame] | 52 | arm_compute::ITensor& output = |
Jan Eilers | 3c9e045 | 2020-04-10 13:00:44 +0100 | [diff] [blame] | 53 | PolymorphicPointerDowncast<IAclTensorHandle>(m_Data.m_Outputs[0])->GetTensor(); |
Mike Kelly | 0be3a88 | 2020-01-24 11:27:50 +0000 | [diff] [blame] | 54 | |
| 55 | // ArmNN blockShape is [H, W] Cl asks for W, H |
Matthew Sloyan | 171214c | 2020-09-09 09:07:37 +0100 | [diff] [blame] | 56 | int32_t blockHeight = armnn::numeric_cast<int32_t>(m_Data.m_Parameters.m_BlockShape[0]); |
| 57 | int32_t blockWidth = armnn::numeric_cast<int32_t>(m_Data.m_Parameters.m_BlockShape[1]); |
Mike Kelly | 0be3a88 | 2020-01-24 11:27:50 +0000 | [diff] [blame] | 58 | |
| 59 | arm_compute::Size2D paddingLeftTop = BuildArmComputeSize2D( |
| 60 | m_Data.m_Parameters.m_PadList[1].first, m_Data.m_Parameters.m_PadList[0].first); |
| 61 | arm_compute::Size2D paddingRightBottom = BuildArmComputeSize2D( |
| 62 | m_Data.m_Parameters.m_PadList[1].second, m_Data.m_Parameters.m_PadList[0].second); |
| 63 | |
| 64 | arm_compute::DataLayout aclDataLayout = ConvertDataLayout(m_Data.m_Parameters.m_DataLayout); |
| 65 | input.info()->set_data_layout(aclDataLayout); |
| 66 | output.info()->set_data_layout(aclDataLayout); |
| 67 | |
| 68 | m_Layer.reset(new arm_compute::NESpaceToBatchLayer()); |
| 69 | m_Layer->configure(&input, |
| 70 | blockWidth, |
| 71 | blockHeight, |
| 72 | paddingLeftTop, |
| 73 | paddingRightBottom, |
| 74 | &output); |
| 75 | m_Layer->prepare(); |
| 76 | } |
| 77 | |
| 78 | void NeonSpaceToBatchNdWorkload::Execute() const |
| 79 | { |
| 80 | if (m_Layer) |
| 81 | { |
| 82 | ARMNN_SCOPED_PROFILING_EVENT_NEON("NeonSpaceToBatchNdWorkload_Execute"); |
| 83 | m_Layer->run(); |
| 84 | } |
| 85 | } |
| 86 | |
| 87 | } //namespace armnn |