blob: 36138b3c3f601e46b9be575c15834894d70921ad [file] [log] [blame]
telsoa014fcda012018-03-09 14:13:49 +00001//
2// Copyright © 2017 Arm Ltd. All rights reserved.
David Beckecb56cd2018-09-05 12:52:57 +01003// SPDX-License-Identifier: MIT
telsoa014fcda012018-03-09 14:13:49 +00004//
telsoa014fcda012018-03-09 14:13:49 +00005
arovir0143095f32018-10-09 18:04:24 +01006#include <armnn/test/TensorHelpers.hpp>
7#include <armnn/test/UnitTests.hpp>
telsoa014fcda012018-03-09 14:13:49 +00008
David Beckb4540be2018-09-24 13:18:27 +01009#include <backends/CpuTensorHandle.hpp>
David Beck0dbe0ee2018-09-24 15:59:27 +010010#include <backends/neon/NeonLayerSupport.hpp>
11#include <backends/neon/NeonWorkloadFactory.hpp>
David Beckb4540be2018-09-24 13:18:27 +010012#include <backends/reference/RefWorkloadFactory.hpp>
arovir0143095f32018-10-09 18:04:24 +010013#include <backends/test/ActivationFixture.hpp>
14#include <backends/test/LayerTests.hpp>
David Beckb4540be2018-09-24 13:18:27 +010015#include <backends/test/TensorCopyUtils.hpp>
arovir0143095f32018-10-09 18:04:24 +010016#include <backends/test/WorkloadTestUtils.hpp>
telsoa014fcda012018-03-09 14:13:49 +000017
arovir0143095f32018-10-09 18:04:24 +010018#include <boost/test/unit_test.hpp>
telsoa014fcda012018-03-09 14:13:49 +000019
20BOOST_AUTO_TEST_SUITE(Compute_ArmComputeNeon)
21using FactoryType = armnn::NeonWorkloadFactory;
22
23// ============================================================================
24// UNIT tests
25
26// Convolution
27ARMNN_AUTO_TEST_CASE(SimpleConvolution1d, Convolution1dTest, true)
28
29ARMNN_AUTO_TEST_CASE(SimpleConvolution2d, SimpleConvolution2d3x5Test, true)
30ARMNN_AUTO_TEST_CASE(SimpleConvolution2dSquare, SimpleConvolution2d3x3Test, true)
31ARMNN_AUTO_TEST_CASE(UnbiasedConvolution2d, SimpleConvolution2d3x5Test, false)
32ARMNN_AUTO_TEST_CASE(UnbiasedConvolution2dSquare, SimpleConvolution2d3x3Test, false)
33ARMNN_AUTO_TEST_CASE(SimpleConvolution2dAsymmetricPadding, Convolution2dAsymmetricPaddingTest)
34
Francis Murtaghd59116e2018-10-04 16:03:07 +010035ARMNN_AUTO_TEST_CASE(SimpleConvolution2dSquareNhwc, SimpleConvolution2d3x3NhwcTest, false)
telsoa014fcda012018-03-09 14:13:49 +000036namespace
37{
38
39armnn::Convolution2dDescriptor MakeConv2dDesc(uint32_t strideX, uint32_t strideY,
40 uint32_t padLeft = 0, uint32_t padRight = 0, uint32_t padTop = 0, uint32_t padBottom = 0)
41{
42 armnn::Convolution2dDescriptor result;
43 result.m_StrideX = strideX;
44 result.m_StrideY = strideY;
45 result.m_PadLeft = padLeft;
46 result.m_PadRight = padRight;
47 result.m_PadTop = padTop;
48 result.m_PadBottom = padBottom;
49 result.m_BiasEnabled = true;
50 return result;
51}
52
53}
54
55BOOST_AUTO_TEST_CASE(Conv2dUtils)
56{
telsoa01c577f2c2018-08-31 09:22:23 +010057 // The only preferred Neon convolution is 1x1 with padding=0 and stride size {1,2,3}.
telsoa014fcda012018-03-09 14:13:49 +000058 armnn::TensorShape shape1x1({ 1,1,1,1 });
59 armnn::TensorInfo info1x1(shape1x1, armnn::DataType::Float32);
60 BOOST_TEST(armnn::IsNeonDirectConvolutionPreferred(info1x1, MakeConv2dDesc(1, 1)));
61 BOOST_TEST(armnn::IsNeonDirectConvolutionPreferred(info1x1, MakeConv2dDesc(1, 2)));
62 BOOST_TEST(armnn::IsNeonDirectConvolutionPreferred(info1x1, MakeConv2dDesc(1, 3)));
63 BOOST_TEST(armnn::IsNeonDirectConvolutionPreferred(info1x1, MakeConv2dDesc(2, 1)));
64 BOOST_TEST(armnn::IsNeonDirectConvolutionPreferred(info1x1, MakeConv2dDesc(2, 2)));
65 BOOST_TEST(armnn::IsNeonDirectConvolutionPreferred(info1x1, MakeConv2dDesc(2, 3)));
66 BOOST_TEST(armnn::IsNeonDirectConvolutionPreferred(info1x1, MakeConv2dDesc(3, 1)));
67 BOOST_TEST(armnn::IsNeonDirectConvolutionPreferred(info1x1, MakeConv2dDesc(3, 2)));
68 BOOST_TEST(armnn::IsNeonDirectConvolutionPreferred(info1x1, MakeConv2dDesc(3, 3)));
69
70 BOOST_TEST(!armnn::IsNeonDirectConvolutionPreferred(info1x1, MakeConv2dDesc(4, 1)));
71 BOOST_TEST(!armnn::IsNeonDirectConvolutionPreferred(info1x1, MakeConv2dDesc(4, 5)));
72 BOOST_TEST(!armnn::IsNeonDirectConvolutionPreferred(info1x1, MakeConv2dDesc(3, 6)));
73
74 // non zero padding is not preferred for direct convolution
75 BOOST_TEST(!armnn::IsNeonDirectConvolutionPreferred(info1x1, MakeConv2dDesc(1, 1, 1, 0)));
76 BOOST_TEST(!armnn::IsNeonDirectConvolutionPreferred(info1x1, MakeConv2dDesc(1, 1, 0, 1)));
77 BOOST_TEST(!armnn::IsNeonDirectConvolutionPreferred(info1x1, MakeConv2dDesc(1, 1, 1, 1)));
78
79 // 2x2 filter not preferred for direct convolution
80 armnn::TensorShape shape2x2({ 1,1,2,2 });
81 armnn::TensorInfo info2x2(shape2x2, armnn::DataType::Float32);
82 BOOST_TEST(!armnn::IsNeonDirectConvolutionPreferred(info2x2, MakeConv2dDesc(1, 1)));
83}
84
85// Depthwise Convolution
86ARMNN_AUTO_TEST_CASE(DepthwiseConvolution2dDepthMul1, DepthwiseConvolution2dDepthMul1Test, true)
Nikhil Rajcec6b652018-10-12 13:51:57 +010087ARMNN_AUTO_TEST_CASE(DepthwiseConvolution2dDepthNhwc, DepthwiseConvolution2dDepthNhwcTest, false)
telsoa014fcda012018-03-09 14:13:49 +000088ARMNN_AUTO_TEST_CASE(UnbiasedDepthwiseConvolution2dDepthMul1, DepthwiseConvolution2dDepthMul1Test, false)
89ARMNN_AUTO_TEST_CASE(DepthwiseConvolution2dDepthMul1Uint8, DepthwiseConvolution2dDepthMul1Uint8Test, true)
90ARMNN_AUTO_TEST_CASE(UnbiasedDepthwiseConvolution2dDepthMul1Uint8, DepthwiseConvolution2dDepthMul1Uint8Test, false)
91
surmeh013537c2c2018-05-18 16:31:43 +010092ARMNN_AUTO_TEST_CASE(DepthwiseConvolution2dAsymmetric, DepthwiseConvolution2dAsymmetricTest, true)
93ARMNN_AUTO_TEST_CASE(UnbiasedDepthwiseConvolution2dAsymmetric, DepthwiseConvolution2dAsymmetricTest, false)
94
telsoa014fcda012018-03-09 14:13:49 +000095namespace
96{
97
98armnn::DepthwiseConvolution2dDescriptor MakeDepthwiseConv2dDesc(uint32_t strideX, uint32_t strideY,
99 uint32_t depthMultiplier = 1, uint32_t padLeft = 0, uint32_t padRight = 0,
100 uint32_t padTop = 0, uint32_t padBottom = 0)
101{
telsoa01c577f2c2018-08-31 09:22:23 +0100102 boost::ignore_unused(depthMultiplier);
103
telsoa014fcda012018-03-09 14:13:49 +0000104 armnn::DepthwiseConvolution2dDescriptor desc;
telsoa01c577f2c2018-08-31 09:22:23 +0100105
telsoa014fcda012018-03-09 14:13:49 +0000106 desc.m_PadLeft = padLeft;
107 desc.m_PadRight = padRight;
telsoa01c577f2c2018-08-31 09:22:23 +0100108
telsoa014fcda012018-03-09 14:13:49 +0000109 desc.m_PadTop = padTop;
110 desc.m_PadBottom = padBottom;
111 desc.m_StrideX = strideX;
112 desc.m_StrideY = strideY;
telsoa01c577f2c2018-08-31 09:22:23 +0100113 desc.m_BiasEnabled = false;
114
telsoa014fcda012018-03-09 14:13:49 +0000115 return desc;
116}
117
telsoa01c577f2c2018-08-31 09:22:23 +0100118armnn::TensorInfo CreateOutputTensorInfo(const armnn::TensorInfo& inputInfo,
119 const armnn::TensorInfo& weightsInfo,
120 const armnn::DepthwiseConvolution2dDescriptor& descriptor,
121 armnn::DataType dataType)
122{
123 const armnn::TensorShape& inputShape = inputInfo.GetShape();
124 const armnn::TensorShape& filterShape = weightsInfo.GetShape();
125
126 unsigned int inWidth = inputShape[3];
127 unsigned int inHeight = inputShape[2];
128 unsigned int inBatchSize = inputShape[0];
129
130 unsigned int filterWidth = filterShape[3];
131 unsigned int readWidth = (inWidth + descriptor.m_PadLeft + descriptor.m_PadRight) - (filterWidth);
132 unsigned int outWidth = 1u + (readWidth / descriptor.m_StrideX);
133
134 unsigned int filterHeight = filterShape[2];
135 unsigned int readHeight = (inHeight + descriptor.m_PadTop + descriptor.m_PadBottom) - (filterHeight);
136 unsigned int outHeight = 1u + (readHeight / descriptor.m_StrideY);
137 unsigned int depthMultiplier = filterShape[0];
138
139 unsigned int outChannels = filterShape[1] * depthMultiplier;
140 unsigned int outBatchSize = inBatchSize;
141
142 armnn::TensorShape outputShape({outBatchSize, outChannels, outHeight, outWidth});
143 return armnn::TensorInfo(outputShape, dataType);
144}
telsoa014fcda012018-03-09 14:13:49 +0000145}
146
147BOOST_AUTO_TEST_CASE(DepthwiseConv2dUtils)
148{
telsoa01c577f2c2018-08-31 09:22:23 +0100149 const armnn::DataType dataType = armnn::DataType::Float32;
150
151 armnn::TensorInfo inputInfo({1, 1, 10, 10 }, dataType);
152 armnn::TensorInfo outputInfo;
153 armnn::TensorInfo weightsInfo3x3({ 1, 1, 3, 3 }, dataType);
154 armnn::TensorInfo biasesInfo;
155
156 armnn::DepthwiseConvolution2dDescriptor descriptor;
telsoa014fcda012018-03-09 14:13:49 +0000157
158 // Strides supported: 1,2,3
telsoa01c577f2c2018-08-31 09:22:23 +0100159 descriptor = MakeDepthwiseConv2dDesc(1, 1);
160 outputInfo = CreateOutputTensorInfo(inputInfo, weightsInfo3x3, descriptor, dataType);
161 BOOST_TEST(armnn::IsDepthwiseConvolutionSupportedNeon(inputInfo, outputInfo, descriptor,
162 weightsInfo3x3, biasesInfo));
telsoa014fcda012018-03-09 14:13:49 +0000163
telsoa01c577f2c2018-08-31 09:22:23 +0100164 descriptor = MakeDepthwiseConv2dDesc(1, 2);
165 outputInfo = CreateOutputTensorInfo(inputInfo, weightsInfo3x3, descriptor, dataType);
166 BOOST_TEST(armnn::IsDepthwiseConvolutionSupportedNeon(inputInfo, outputInfo, descriptor,
167 weightsInfo3x3, biasesInfo));
168
169 descriptor = MakeDepthwiseConv2dDesc(1, 3);
170 outputInfo = CreateOutputTensorInfo(inputInfo, weightsInfo3x3, descriptor, dataType);
171 BOOST_TEST(armnn::IsDepthwiseConvolutionSupportedNeon(inputInfo, outputInfo, descriptor,
172 weightsInfo3x3, biasesInfo));
173
174 descriptor = MakeDepthwiseConv2dDesc(2, 1);
175 outputInfo = CreateOutputTensorInfo(inputInfo, weightsInfo3x3, descriptor, dataType);
176 BOOST_TEST(armnn::IsDepthwiseConvolutionSupportedNeon(inputInfo, outputInfo, descriptor,
177 weightsInfo3x3, biasesInfo));
178
179 descriptor = MakeDepthwiseConv2dDesc(2, 2);
180 outputInfo = CreateOutputTensorInfo(inputInfo, weightsInfo3x3, descriptor, dataType);
181 BOOST_TEST(armnn::IsDepthwiseConvolutionSupportedNeon(inputInfo, outputInfo, descriptor,
182 weightsInfo3x3, biasesInfo));
183
184 descriptor = MakeDepthwiseConv2dDesc(2, 3);
185 outputInfo = CreateOutputTensorInfo(inputInfo, weightsInfo3x3, descriptor, dataType);
186 BOOST_TEST(armnn::IsDepthwiseConvolutionSupportedNeon(inputInfo, outputInfo, descriptor,
187 weightsInfo3x3, biasesInfo));
188
189 descriptor = MakeDepthwiseConv2dDesc(3, 1);
190 outputInfo = CreateOutputTensorInfo(inputInfo, weightsInfo3x3, descriptor, dataType);
191 BOOST_TEST(armnn::IsDepthwiseConvolutionSupportedNeon(inputInfo, outputInfo, descriptor,
192 weightsInfo3x3, biasesInfo));
193
194 descriptor = MakeDepthwiseConv2dDesc(3, 2);
195 outputInfo = CreateOutputTensorInfo(inputInfo, weightsInfo3x3, descriptor, dataType);
196 BOOST_TEST(armnn::IsDepthwiseConvolutionSupportedNeon(inputInfo, outputInfo, descriptor,
197 weightsInfo3x3, biasesInfo));
198
199 descriptor = MakeDepthwiseConv2dDesc(3, 3);
200 outputInfo = CreateOutputTensorInfo(inputInfo, weightsInfo3x3, descriptor, dataType);
201 BOOST_TEST(armnn::IsDepthwiseConvolutionSupportedNeon(inputInfo, outputInfo, descriptor,
202 weightsInfo3x3, biasesInfo));
203
204 // Supported stride 4
205 descriptor = MakeDepthwiseConv2dDesc(4, 1);
206 outputInfo = CreateOutputTensorInfo(inputInfo, weightsInfo3x3, descriptor, dataType);
207 BOOST_TEST(armnn::IsDepthwiseConvolutionSupportedNeon(inputInfo, outputInfo, descriptor,
208 weightsInfo3x3, biasesInfo));
telsoa014fcda012018-03-09 14:13:49 +0000209
210 // Supported weights shape 1x1
211 armnn::TensorInfo weightsInfo1x1({ 1, 1, 1, 1 }, armnn::DataType::Float32);
telsoa01c577f2c2018-08-31 09:22:23 +0100212 descriptor = MakeDepthwiseConv2dDesc(1, 1);
213 outputInfo = CreateOutputTensorInfo(inputInfo, weightsInfo1x1, descriptor, dataType);
214 BOOST_TEST(armnn::IsDepthwiseConvolutionSupportedNeon(inputInfo, outputInfo, descriptor,
215 weightsInfo1x1, biasesInfo));
telsoa014fcda012018-03-09 14:13:49 +0000216
217 // Supported shape 2x2
218 armnn::TensorInfo weightsInfo2x2({ 1, 1, 2, 2 }, armnn::DataType::Float32);
telsoa01c577f2c2018-08-31 09:22:23 +0100219 descriptor = MakeDepthwiseConv2dDesc(1, 1);
220 outputInfo = CreateOutputTensorInfo(inputInfo, weightsInfo2x2, descriptor, dataType);
221 BOOST_TEST(armnn::IsDepthwiseConvolutionSupportedNeon(inputInfo, outputInfo, descriptor,
222 weightsInfo2x2, biasesInfo));
surmeh013537c2c2018-05-18 16:31:43 +0100223
224 // Asymmetric padding
telsoa01c577f2c2018-08-31 09:22:23 +0100225 descriptor = MakeDepthwiseConv2dDesc(1, 1, 1, 1, 2, 1, 2);
226 outputInfo = CreateOutputTensorInfo(inputInfo, weightsInfo3x3, descriptor, dataType);
227 BOOST_TEST(armnn::IsDepthwiseConvolutionSupportedNeon(inputInfo, outputInfo, descriptor,
228 weightsInfo3x3, biasesInfo));
telsoa014fcda012018-03-09 14:13:49 +0000229}
230
231// Pooling
232ARMNN_AUTO_TEST_CASE(SimpleMaxPooling2dSize3x3Stride2x4, SimpleMaxPooling2dSize3x3Stride2x4Test, true)
233ARMNN_AUTO_TEST_CASE(SimpleMaxPooling2dSize3x3Stride2x4Uint8, SimpleMaxPooling2dSize3x3Stride2x4Uint8Test, true)
234ARMNN_AUTO_TEST_CASE(SimpleAveragePooling2d, SimpleAveragePooling2dTest)
Francis Murtagh043d0d02018-10-05 14:08:48 +0100235ARMNN_AUTO_TEST_CASE(SimpleAveragePooling2dNhwc, SimpleAveragePooling2dNhwcTest)
telsoa014fcda012018-03-09 14:13:49 +0000236ARMNN_AUTO_TEST_CASE(SimpleAveragePooling2dUint8, SimpleAveragePooling2dUint8Test)
surmeh01bceff2f2018-03-29 16:29:27 +0100237
telsoa014fcda012018-03-09 14:13:49 +0000238ARMNN_AUTO_TEST_CASE(LargeTensorsAveragePooling2d, LargeTensorsAveragePooling2dTest)
239ARMNN_AUTO_TEST_CASE(LargeTensorsAveragePooling2dUint8, LargeTensorsAveragePooling2dUint8Test)
240
241ARMNN_AUTO_TEST_CASE(SimpleL2Pooling2d, SimpleL2Pooling2dTest)
242ARMNN_AUTO_TEST_CASE(UNSUPPORTED_SimpleL2Pooling2dUint8, SimpleL2Pooling2dUint8Test)
243ARMNN_AUTO_TEST_CASE(L2Pooling2dSize3Stride1, L2Pooling2dSize3Stride1Test)
244ARMNN_AUTO_TEST_CASE(UNSUPPORTED_L2Pooling2dSize3Stride1Uint8, L2Pooling2dSize3Stride1Uint8Test)
245ARMNN_AUTO_TEST_CASE(L2Pooling2dSize3Stride3, L2Pooling2dSize3Stride3Test)
246ARMNN_AUTO_TEST_CASE(UNSUPPORTED_L2Pooling2dSize3Stride3Uint8, L2Pooling2dSize3Stride3Uint8Test)
247ARMNN_AUTO_TEST_CASE(L2Pooling2dSize3Stride4, L2Pooling2dSize3Stride4Test)
248ARMNN_AUTO_TEST_CASE(UNSUPPORTED_L2Pooling2dSize3Stride4Uint8, L2Pooling2dSize3Stride4Uint8Test)
249ARMNN_AUTO_TEST_CASE(L2Pooling2dSize7, L2Pooling2dSize7Test)
250ARMNN_AUTO_TEST_CASE(UNSUPPORTED_L2Pooling2dSize7Uint8, L2Pooling2dSize7Uint8Test)
251ARMNN_AUTO_TEST_CASE(L2Pooling2dSize9, L2Pooling2dSize9Test)
252ARMNN_AUTO_TEST_CASE(UNSUPPORTED_L2Pooling2dSize9Uint8, L2Pooling2dSize9Uint8Test)
253
254// Ignore padding values for pooling but count padding fields into the divisor
255ARMNN_AUTO_TEST_CASE(IgnorePaddingSimpleMaxPooling2d, IgnorePaddingSimpleMaxPooling2dTest)
256ARMNN_AUTO_TEST_CASE(IgnorePaddingSimpleMaxPooling2dUint8, IgnorePaddingSimpleMaxPooling2dUint8Test)
257ARMNN_AUTO_TEST_CASE(IgnorePaddingMaxPooling2dSize3, IgnorePaddingMaxPooling2dSize3Test)
258ARMNN_AUTO_TEST_CASE(IgnorePaddingMaxPooling2dSize3Uint8, IgnorePaddingMaxPooling2dSize3Uint8Test)
259
260ARMNN_AUTO_TEST_CASE(IgnorePaddingSimpleAveragePooling2d, IgnorePaddingSimpleAveragePooling2dTest)
261ARMNN_AUTO_TEST_CASE(IgnorePaddingSimpleAveragePooling2dUint8, IgnorePaddingSimpleAveragePooling2dUint8Test)
262ARMNN_AUTO_TEST_CASE(IgnorePaddingSimpleAveragePooling2dNoPadding, IgnorePaddingSimpleAveragePooling2dNoPaddingTest)
263ARMNN_AUTO_TEST_CASE(IgnorePaddingSimpleAveragePooling2dNoPaddingUint8,
264 IgnorePaddingSimpleAveragePooling2dNoPaddingUint8Test)
265ARMNN_AUTO_TEST_CASE(IgnorePaddingAveragePooling2dSize3, IgnorePaddingAveragePooling2dSize3Test)
266ARMNN_AUTO_TEST_CASE(IgnorePaddingAveragePooling2dSize3Uint8, IgnorePaddingAveragePooling2dSize3Uint8Test)
surmeh01bceff2f2018-03-29 16:29:27 +0100267ARMNN_AUTO_TEST_CASE(IgnorePaddingAveragePooling2dSize3x2Stride2x2,
268 IgnorePaddingAveragePooling2dSize3x2Stride2x2Test, false)
269ARMNN_AUTO_TEST_CASE(IgnorePaddingAveragePooling2dSize3x2Stride2x2NoPadding,
270 IgnorePaddingAveragePooling2dSize3x2Stride2x2Test,
271 true)
telsoa014fcda012018-03-09 14:13:49 +0000272
273ARMNN_AUTO_TEST_CASE(IgnorePaddingSimpleL2Pooling2d, IgnorePaddingSimpleL2Pooling2dTest)
274ARMNN_AUTO_TEST_CASE(UNSUPPORTED_IgnorePaddingSimpleL2Pooling2dUint8, IgnorePaddingSimpleL2Pooling2dUint8Test)
275ARMNN_AUTO_TEST_CASE(IgnorePaddingL2Pooling2dSize3, IgnorePaddingL2Pooling2dSize3Test)
276ARMNN_AUTO_TEST_CASE(UNSUPPORTED_IgnorePaddingL2Pooling2dSize3Uint8, IgnorePaddingL2Pooling2dSize3Uint8Test)
277
278// Activation
279ARMNN_AUTO_TEST_CASE(ConstantLinearActivation, ConstantLinearActivationTest)
280
281ARMNN_AUTO_TEST_CASE(SimpleSoftmaxBeta1, SimpleSoftmaxTest, 1.0f)
282ARMNN_AUTO_TEST_CASE(SimpleSoftmaxBeta2, SimpleSoftmaxTest, 2.0f)
283
284ARMNN_AUTO_TEST_CASE(SimpleSoftmaxBeta1Uint8, SimpleSoftmaxUint8Test, 1.0f)
285ARMNN_AUTO_TEST_CASE(SimpleSoftmaxBeta2Uint8, SimpleSoftmaxUint8Test, 2.0f)
286
287ARMNN_AUTO_TEST_CASE(ReLu1Uint8, BoundedReLuUint8UpperAndLowerBoundTest)
288ARMNN_AUTO_TEST_CASE(ReLu6Uint8, BoundedReLuUint8UpperBoundOnlyTest)
289
telsoa01c577f2c2018-08-31 09:22:23 +0100290// Softmax
291BOOST_AUTO_TEST_CASE(Softmax4dSupport)
telsoa014fcda012018-03-09 14:13:49 +0000292{
telsoa01c577f2c2018-08-31 09:22:23 +0100293 const unsigned int numDimensions = 4u;
294 std::array<unsigned int, numDimensions> dimensionSizes;
295 dimensionSizes.fill(1u);
296
297 const armnn::TensorInfo inputInfo(numDimensions, &dimensionSizes.front(), armnn::DataType::Float32);
298 const armnn::TensorInfo outputInfo(numDimensions, &dimensionSizes.front(), armnn::DataType::Float32);
299
300 // 4D Softmax should be reported as unsupported on the NEON backend
301 BOOST_TEST(!armnn::IsSoftmaxSupportedNeon(inputInfo, outputInfo, armnn::SoftmaxDescriptor()));
telsoa014fcda012018-03-09 14:13:49 +0000302}
303
telsoa01c577f2c2018-08-31 09:22:23 +0100304// Splitter
305ARMNN_AUTO_TEST_CASE(SimpleSplitter, SplitterTest)
306ARMNN_AUTO_TEST_CASE(SimpleSplitterUint8, SplitterUint8Test)
telsoa014fcda012018-03-09 14:13:49 +0000307
308ARMNN_AUTO_TEST_CASE(CopyViaSplitter, CopyViaSplitterTest)
309ARMNN_AUTO_TEST_CASE(CopyViaSplitterUint8, CopyViaSplitterUint8Test)
310
311// Merger
312ARMNN_AUTO_TEST_CASE(SimpleMerger, MergerTest)
313ARMNN_AUTO_TEST_CASE(MergerUint8, MergerUint8Test)
314
315// Fully Connected
316ARMNN_AUTO_TEST_CASE(SimpleFullyConnected, FullyConnectedFloat32Test, false, false)
317ARMNN_AUTO_TEST_CASE(SimpleFullyConnectedWithBias, FullyConnectedFloat32Test, true, false)
318ARMNN_AUTO_TEST_CASE(SimpleFullyConnectedWithTranspose, FullyConnectedFloat32Test, false, true)
319ARMNN_AUTO_TEST_CASE(FullyConnectedLarge, FullyConnectedLargeTest, false)
320ARMNN_AUTO_TEST_CASE(FullyConnectedLargeTransposed, FullyConnectedLargeTest, true)
kevmay01e448be32018-09-26 10:21:55 +0100321ARMNN_AUTO_TEST_CASE(FullyConnectedUint8, FullyConnectedUint8Test, false)
322ARMNN_AUTO_TEST_CASE(FullyConnectedBiasedUint8, FullyConnectedUint8Test, true)
telsoa014fcda012018-03-09 14:13:49 +0000323
324// Add
325ARMNN_AUTO_TEST_CASE(SimpleAdd, AdditionTest)
David Beckbc392452018-09-10 14:47:28 +0100326ARMNN_AUTO_TEST_CASE(AddBroadcast, AdditionBroadcastTest)
telsoa014fcda012018-03-09 14:13:49 +0000327ARMNN_AUTO_TEST_CASE(AddBroadcast1Element, AdditionBroadcast1ElementTest)
328
David Beckbc392452018-09-10 14:47:28 +0100329// Sub
330ARMNN_AUTO_TEST_CASE(SimpleSub, SubtractionTest)
331
telsoa014fcda012018-03-09 14:13:49 +0000332// Mul
333ARMNN_AUTO_TEST_CASE(SimpleMultiplication, MultiplicationTest)
surmeh013537c2c2018-05-18 16:31:43 +0100334ARMNN_AUTO_TEST_CASE(MultiplicationBroadcast1Element, MultiplicationBroadcast1ElementTest)
335ARMNN_AUTO_TEST_CASE(MultiplicationBroadcast1DVector, MultiplicationBroadcast1DVectorTest)
telsoa014fcda012018-03-09 14:13:49 +0000336
337// Batch Norm
338ARMNN_AUTO_TEST_CASE(BatchNorm, BatchNormTest)
339
340// Constant
341ARMNN_AUTO_TEST_CASE(Constant, ConstantTest)
342ARMNN_AUTO_TEST_CASE(ConstantUint8, ConstantTestUint8)
343
344// Concatenation
345ARMNN_AUTO_TEST_CASE(Concatenation1d, Concatenation1dTest)
346ARMNN_AUTO_TEST_CASE(Concatenation1dUint8, Concatenation1dUint8Test)
347
348ARMNN_AUTO_TEST_CASE(Concatenation2dDim0, Concatenation2dDim0Test)
349ARMNN_AUTO_TEST_CASE(Concatenation2dDim0Uint8, Concatenation2dDim0Uint8Test)
350ARMNN_AUTO_TEST_CASE(Concatenation2dDim1, Concatenation2dDim1Test)
351ARMNN_AUTO_TEST_CASE(Concatenation2dDim1Uint8, Concatenation2dDim1Uint8Test)
352
353ARMNN_AUTO_TEST_CASE(Concatenation2dDim0DiffInputDims, Concatenation2dDim0DiffInputDimsTest)
354ARMNN_AUTO_TEST_CASE(Concatenation2dDim0DiffInputDimsUint8, Concatenation2dDim0DiffInputDimsUint8Test)
355ARMNN_AUTO_TEST_CASE(Concatenation2dDim1DiffInputDims, Concatenation2dDim1DiffInputDimsTest)
356ARMNN_AUTO_TEST_CASE(Concatenation2dDim1DiffInputDimsUint8, Concatenation2dDim1DiffInputDimsUint8Test)
357
358ARMNN_AUTO_TEST_CASE(Concatenation3dDim0, Concatenation3dDim0Test)
359ARMNN_AUTO_TEST_CASE(Concatenation3dDim0Uint8, Concatenation3dDim0Uint8Test)
360ARMNN_AUTO_TEST_CASE(Concatenation3dDim1, Concatenation3dDim1Test)
361ARMNN_AUTO_TEST_CASE(Concatenation3dDim1Uint8, Concatenation3dDim1Uint8Test)
362ARMNN_AUTO_TEST_CASE(Concatenation3dDim2, Concatenation3dDim2Test)
363ARMNN_AUTO_TEST_CASE(Concatenation3dDim2Uint8, Concatenation3dDim2Uint8Test)
364
365ARMNN_AUTO_TEST_CASE(Concatenation3dDim0DiffInputDims, Concatenation3dDim0DiffInputDimsTest)
366ARMNN_AUTO_TEST_CASE(Concatenation3dDim0DiffInputDimsUint8, Concatenation3dDim0DiffInputDimsUint8Test)
367ARMNN_AUTO_TEST_CASE(Concatenation3dDim1DiffInputDims, Concatenation3dDim1DiffInputDimsTest)
368ARMNN_AUTO_TEST_CASE(Concatenation3dDim1DiffInputDimsUint8, Concatenation3dDim1DiffInputDimsUint8Test)
369ARMNN_AUTO_TEST_CASE(Concatenation3dDim2DiffInputDims, Concatenation3dDim2DiffInputDimsTest)
370ARMNN_AUTO_TEST_CASE(Concatenation3dDim2DiffInputDimsUint8, Concatenation3dDim2DiffInputDimsUint8Test)
371
372// L2 Normalization
Matteo Martincigh539b44d2018-10-01 09:26:39 +0100373ARMNN_AUTO_TEST_CASE(L2Normalization1d, L2Normalization1dTest)
374ARMNN_AUTO_TEST_CASE(L2Normalization2d, L2Normalization2dTest)
375ARMNN_AUTO_TEST_CASE(L2Normalization3d, L2Normalization3dTest)
376ARMNN_AUTO_TEST_CASE(L2Normalization4d, L2Normalization4dTest)
377
378ARMNN_AUTO_TEST_CASE(L2Normalization1dNhwc, L2Normalization1dNhwcTest)
379ARMNN_AUTO_TEST_CASE(L2Normalization2dNhwc, L2Normalization2dNhwcTest)
380ARMNN_AUTO_TEST_CASE(L2Normalization3dNhwc, L2Normalization3dNhwcTest)
381ARMNN_AUTO_TEST_CASE(L2Normalization4dNhwc, L2Normalization4dNhwcTest)
telsoa014fcda012018-03-09 14:13:49 +0000382
383// Floor
384ARMNN_AUTO_TEST_CASE(SimpleFloor, SimpleFloorTest)
385
386// Reshape
387ARMNN_AUTO_TEST_CASE(SimpleReshapeFloat32, SimpleReshapeFloat32Test)
388ARMNN_AUTO_TEST_CASE(SimpleReshapeUint8, SimpleReshapeUint8Test)
389
390// Permute
391ARMNN_AUTO_TEST_CASE(SimplePermuteFloat32, SimplePermuteFloat32Test)
392ARMNN_AUTO_TEST_CASE(SimplePermuteUint8, SimplePermuteUint8Test)
surmeh01bceff2f2018-03-29 16:29:27 +0100393ARMNN_AUTO_TEST_CASE(PermuteFloat32ValueSet1, PermuteFloat32ValueSet1Test)
394ARMNN_AUTO_TEST_CASE(PermuteFloat32ValueSet2, PermuteFloat32ValueSet2Test)
395ARMNN_AUTO_TEST_CASE(PermuteFloat32ValueSet3, PermuteFloat32ValueSet3Test)
396
Les Bellde9011b2018-10-03 10:37:52 +0100397// Lstm
398ARMNN_AUTO_TEST_CASE(LstmLayerFloat32WithCifgWithPeepholeNoProjection,
399 LstmLayerFloat32WithCifgWithPeepholeNoProjectionTest)
400ARMNN_AUTO_TEST_CASE(LstmLayerFloat32NoCifgNoPeepholeNoProjection,
401 LstmLayerFloat32NoCifgNoPeepholeNoProjectionTest)
402ARMNN_AUTO_TEST_CASE(LstmLayerFloat32NoCifgWithPeepholeWithProjection,
403 LstmLayerFloat32NoCifgWithPeepholeWithProjectionTest)
404
narpra0155a97bc2018-10-02 14:35:53 +0100405// Normalization
406ARMNN_AUTO_TEST_CASE(SimpleNormalizationAcross, SimpleNormalizationAcrossTest)
407ARMNN_AUTO_TEST_CASE(SimpleNormalizationWithin, SimpleNormalizationWithinTest)
408ARMNN_AUTO_TEST_CASE(SimpleNormalizationAcrossNhwc, SimpleNormalizationAcrossNhwcTest)
409
telsoa014fcda012018-03-09 14:13:49 +0000410// ============================================================================
411// COMPARE tests
412
413ARMNN_COMPARE_REF_AUTO_TEST_CASE(CompareConv2dWithReference, CompareConvolution2dTest)
414
415ARMNN_COMPARE_REF_AUTO_TEST_CASE(CompareDepthwiseConv2dWithReferenceFloat32, CompareDepthwiseConvolution2dTest<float>)
416ARMNN_COMPARE_REF_AUTO_TEST_CASE(CompareDepthwiseConv2dWithReferenceUint8, CompareDepthwiseConvolution2dTest<uint8_t>)
417
418ARMNN_COMPARE_REF_AUTO_TEST_CASE(CompareNormalizationWithinWithReference, CompareNormalizationTest,
419 armnn::NormalizationAlgorithmChannel::Within,
420 armnn::NormalizationAlgorithmMethod::LocalBrightness)
421ARMNN_COMPARE_REF_AUTO_TEST_CASE(CompareNormalizationAcrossWithReference, CompareNormalizationTest,
422 armnn::NormalizationAlgorithmChannel::Across,
423 armnn::NormalizationAlgorithmMethod::LocalBrightness)
424
425ARMNN_COMPARE_REF_AUTO_TEST_CASE(CompareMaxPooling2dWithReference, ComparePooling2dTest, armnn::PoolingAlgorithm::Max)
426ARMNN_COMPARE_REF_AUTO_TEST_CASE(CompareMaxPooling2dWithReferenceUint8, ComparePooling2dUint8Test,
427 armnn::PoolingAlgorithm::Max)
428ARMNN_COMPARE_REF_AUTO_TEST_CASE(CompareAveragePooling2dWithReference, ComparePooling2dTest,
429 armnn::PoolingAlgorithm::Average)
430ARMNN_COMPARE_REF_AUTO_TEST_CASE(CompareAveragePooling2dWithReferenceUint8, ComparePooling2dUint8Test,
431 armnn::PoolingAlgorithm::Average)
432ARMNN_COMPARE_REF_AUTO_TEST_CASE(CompareL2Pooling2dWithReference, ComparePooling2dTest, armnn::PoolingAlgorithm::L2)
433ARMNN_COMPARE_REF_AUTO_TEST_CASE(UNSUPPORTED_CompareL2Pooling2dWithReferenceUint8, ComparePooling2dUint8Test,
434 armnn::PoolingAlgorithm::L2)
435
436ARMNN_COMPARE_REF_AUTO_TEST_CASE(CompareSoftmaxBeta1WithReference, CompareSoftmaxTest, 1.0f)
437ARMNN_COMPARE_REF_AUTO_TEST_CASE(CompareSoftmaxBeta2WithReference, CompareSoftmaxTest, 2.0f)
438
439ARMNN_COMPARE_REF_AUTO_TEST_CASE(CompareSoftmaxUint8Beta1WithReference, CompareSoftmaxUint8Test, 1.0f)
440ARMNN_COMPARE_REF_AUTO_TEST_CASE(CompareSoftmaxUint8Beta2WithReference, CompareSoftmaxUint8Test, 2.0f)
441
442ARMNN_COMPARE_REF_AUTO_TEST_CASE(CompareAddition, CompareAdditionTest)
443
444ARMNN_COMPARE_REF_AUTO_TEST_CASE(CompareMultiplicationWithReference, CompareMultiplicationTest)
445
446ARMNN_COMPARE_REF_AUTO_TEST_CASE(CompareBatchNorm, CompareBatchNormTest)
447
448ARMNN_COMPARE_REF_AUTO_TEST_CASE(ReLu1, CompareBoundedReLuTest, 1.0f, -1.0f)
449ARMNN_COMPARE_REF_AUTO_TEST_CASE(ReLu6, CompareBoundedReLuTest, 6.0f, 0.0f)
450
451// ============================================================================
452// FIXTURE tests
453
454ARMNN_COMPARE_REF_FIXTURE_TEST_CASE(CompareSigmoidActivationWithReference, ActivationFixture,
455 CompareActivationTest, armnn::ActivationFunction::Sigmoid, 5u)
456
457ARMNN_COMPARE_REF_FIXTURE_TEST_CASE(CompareTanhActivationWithReference, ActivationFixture,
458 CompareActivationTest, armnn::ActivationFunction::TanH, 5u)
459
460ARMNN_COMPARE_REF_FIXTURE_TEST_CASE(CompareLinearActivationWithReference, ActivationFixture,
461 CompareActivationTest, armnn::ActivationFunction::Linear, 5u)
462
463ARMNN_COMPARE_REF_FIXTURE_TEST_CASE(CompareReLuActivationWithReference, ActivationFixture,
464 CompareActivationTest, armnn::ActivationFunction::ReLu, 5u)
465
466ARMNN_COMPARE_REF_FIXTURE_TEST_CASE(CompareBoundedReLuActivationWithReference, ActivationFixture,
467 CompareActivationTest, armnn::ActivationFunction::BoundedReLu, 5u)
468ARMNN_COMPARE_REF_FIXTURE_TEST_CASE(CompareBoundedReLuActivationWithReferenceUint8, ActivationFixture,
469 CompareActivationUint8Test, armnn::ActivationFunction::BoundedReLu)
470
471ARMNN_COMPARE_REF_FIXTURE_TEST_CASE(CompareSoftReLuActivationWithReference, ActivationFixture,
472 CompareActivationTest, armnn::ActivationFunction::SoftReLu, 1u)
473
474ARMNN_COMPARE_REF_FIXTURE_TEST_CASE(CompareLeakyReLuActivationWithReference, ActivationFixture,
475 CompareActivationTest, armnn::ActivationFunction::LeakyReLu, 5u)
476
477ARMNN_COMPARE_REF_FIXTURE_TEST_CASE(CompareAbsActivationWithReference, ActivationFixture,
478 CompareActivationTest, armnn::ActivationFunction::Abs, 5u)
479
480ARMNN_COMPARE_REF_FIXTURE_TEST_CASE(CompareSqrtActivationWithReference, PositiveActivationFixture,
481 CompareActivationTest, armnn::ActivationFunction::Sqrt, 5u)
482
483ARMNN_COMPARE_REF_FIXTURE_TEST_CASE(CompareSquareActivationWithReference, ActivationFixture,
484 CompareActivationTest, armnn::ActivationFunction::Square, 5u)
telsoa014fcda012018-03-09 14:13:49 +0000485BOOST_AUTO_TEST_SUITE_END()