narpra01 | db2b160 | 2019-01-23 15:23:11 +0000 | [diff] [blame] | 1 | // |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 2 | // Copyright © 2017 Arm Ltd. All rights reserved. |
David Beck | ecb56cd | 2018-09-05 12:52:57 +0100 | [diff] [blame] | 3 | // SPDX-License-Identifier: MIT |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 4 | // |
| 5 | |
narpra01 | db2b160 | 2019-01-23 15:23:11 +0000 | [diff] [blame] | 6 | #include "RefConstantWorkload.hpp" |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 7 | |
| 8 | #include "RefWorkloadUtils.hpp" |
| 9 | |
| 10 | #include <armnn/Types.hpp> |
| 11 | |
| 12 | #include <boost/assert.hpp> |
| 13 | |
| 14 | #include <cstring> |
| 15 | |
| 16 | namespace armnn |
| 17 | { |
| 18 | |
| 19 | template <armnn::DataType DataType> |
narpra01 | db2b160 | 2019-01-23 15:23:11 +0000 | [diff] [blame] | 20 | void RefConstantWorkload<DataType>::Execute() const |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 21 | { |
| 22 | // Considering the reference backend independently, it could be possible to initialise the intermediate tensor |
| 23 | // created by the layer output handler at workload construction time, rather than at workload execution time. |
| 24 | // However, this is not an option for other backends (e.g. CL). For consistency, we prefer to align all |
| 25 | // implementations. |
| 26 | // A similar argument can be made about performing the memory copy in the first place (the layer output handler |
| 27 | // could have a non-owning reference to the layer output tensor managed by the const input layer); again, this is |
| 28 | // not an option for other backends, and the extra complexity required to make this work for the reference backend |
| 29 | // may not be worth the effort (skipping a memory copy in the first inference). |
narpra01 | db2b160 | 2019-01-23 15:23:11 +0000 | [diff] [blame] | 30 | ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuRef, "RefConstantWorkload_Execute"); |
| 31 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 32 | if (!m_RanOnce) |
| 33 | { |
| 34 | const ConstantQueueDescriptor& data = this->m_Data; |
| 35 | |
| 36 | BOOST_ASSERT(data.m_LayerOutput != nullptr); |
| 37 | |
| 38 | const TensorInfo& outputInfo = GetTensorInfo(data.m_Outputs[0]); |
| 39 | BOOST_ASSERT(data.m_LayerOutput->GetTensorInfo().GetNumBytes() == outputInfo.GetNumBytes()); |
| 40 | |
| 41 | memcpy(GetOutputTensorData<void>(0, data), data.m_LayerOutput->GetConstTensor<void>(), |
| 42 | outputInfo.GetNumBytes()); |
| 43 | |
| 44 | m_RanOnce = true; |
| 45 | } |
| 46 | } |
| 47 | |
narpra01 | db2b160 | 2019-01-23 15:23:11 +0000 | [diff] [blame] | 48 | template class RefConstantWorkload<DataType::Float32>; |
| 49 | template class RefConstantWorkload<DataType::QuantisedAsymm8>; |
| 50 | template class RefConstantWorkload<DataType::Signed32>; |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 51 | |
| 52 | } //namespace armnn |