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telsoa014fcda012018-03-09 14:13:49 +00001//
2// Copyright © 2017 Arm Ltd. All rights reserved.
David Beckecb56cd2018-09-05 12:52:57 +01003// SPDX-License-Identifier: MIT
telsoa014fcda012018-03-09 14:13:49 +00004//
5#pragma once
6
7#include "WorkloadDataFwd.hpp"
8
David Beck0dbe0ee2018-09-24 15:59:27 +01009#include <armnn/Types.hpp>
10#include <armnn/Tensor.hpp>
11#include <armnn/Descriptors.hpp>
12#include <armnn/Exceptions.hpp>
David Beckdcb751f2018-10-03 11:42:42 +010013#include <backends/WorkloadInfo.hpp>
David Beck0dbe0ee2018-09-24 15:59:27 +010014
15#include <InternalTypes.hpp>
16#include <backends/OutputHandler.hpp>
17
telsoa014fcda012018-03-09 14:13:49 +000018#include "CpuTensorHandleFwd.hpp"
19
20namespace armnn
21{
22
telsoa01c577f2c2018-08-31 09:22:23 +010023//A helper function that returns the bias data type required for given input data type.
telsoa014fcda012018-03-09 14:13:49 +000024DataType GetBiasDataType(DataType inputDataType);
25
26struct WorkloadInfo;
27
28struct QueueDescriptor
29{
30 std::vector<ITensorHandle*> m_Inputs;
31 std::vector<ITensorHandle*> m_Outputs;
32
33 void ValidateInputsOutputs(const std::string& descName,
34 unsigned int numExpectedIn, unsigned int numExpectedOut) const;
35
36
37protected:
38 ~QueueDescriptor() = default;
39 QueueDescriptor() = default;
40 QueueDescriptor(QueueDescriptor const&) = default;
41 QueueDescriptor& operator=(QueueDescriptor const&) = default;
42};
43
telsoa01c577f2c2018-08-31 09:22:23 +010044// Base class for queue descriptors which contain parameters.
telsoa014fcda012018-03-09 14:13:49 +000045template <typename LayerDescriptor>
46struct QueueDescriptorWithParameters : public QueueDescriptor
47{
48 LayerDescriptor m_Parameters;
49
50protected:
51 ~QueueDescriptorWithParameters() = default;
52 QueueDescriptorWithParameters() = default;
53 QueueDescriptorWithParameters(QueueDescriptorWithParameters const&) = default;
54 QueueDescriptorWithParameters& operator=(QueueDescriptorWithParameters const&) = default;
55};
56
57struct MemCopyQueueDescriptor : QueueDescriptor
58{
59 void Validate(const WorkloadInfo& workloadInfo) const;
60};
61
62using InputQueueDescriptor = MemCopyQueueDescriptor;
63using OutputQueueDescriptor = MemCopyQueueDescriptor;
64
telsoa01c577f2c2018-08-31 09:22:23 +010065// Softmax layer workload data.
telsoa014fcda012018-03-09 14:13:49 +000066struct SoftmaxQueueDescriptor : QueueDescriptorWithParameters<SoftmaxDescriptor>
67{
68 void Validate(const WorkloadInfo& workloadInfo) const;
69};
70
telsoa01c577f2c2018-08-31 09:22:23 +010071// Splitter layer workload data.
telsoa014fcda012018-03-09 14:13:49 +000072struct SplitterQueueDescriptor : QueueDescriptorWithParameters<ViewsDescriptor>
73{
74 struct ViewOrigin
75 {
76 ViewOrigin() {}
77 ViewOrigin(std::vector<unsigned int> const& origin) : m_Origin(origin) {}
78
telsoa01c577f2c2018-08-31 09:22:23 +010079 //View origin (size of the vector is the same as number of dimensions of the view).
telsoa014fcda012018-03-09 14:13:49 +000080 std::vector<unsigned int> m_Origin;
81 };
82
telsoa01c577f2c2018-08-31 09:22:23 +010083 //View defines a tensor that will be carved from the input tensor.
84 //View origins are stored here, the extents are defined by sizes of the output tensors.
telsoa014fcda012018-03-09 14:13:49 +000085 std::vector<ViewOrigin> m_ViewOrigins;
86
87 void Validate(const WorkloadInfo& workloadInfo) const;
88};
89
telsoa01c577f2c2018-08-31 09:22:23 +010090// Merger layer workload data.
telsoa014fcda012018-03-09 14:13:49 +000091struct MergerQueueDescriptor : QueueDescriptorWithParameters<OriginsDescriptor>
92{
93 struct ViewOrigin
94 {
95 ViewOrigin() {}
96 ViewOrigin(const std::vector<unsigned int>& origin) : m_Origin(origin) {}
97
telsoa01c577f2c2018-08-31 09:22:23 +010098 //View origin (size of the vector is the same as number of dimensions of the view).
telsoa014fcda012018-03-09 14:13:49 +000099 std::vector<unsigned int> m_Origin;
100 };
101
telsoa01c577f2c2018-08-31 09:22:23 +0100102 //View defines a sub-area of the output tensor that will be filled with the corresponding input tensor.
103 //View origins are stored here, the extents are defined by sizes of the input tensors.
telsoa014fcda012018-03-09 14:13:49 +0000104 std::vector<ViewOrigin> m_ViewOrigins;
105
106 void Validate(const WorkloadInfo& workloadInfo) const;
107};
108
telsoa01c577f2c2018-08-31 09:22:23 +0100109// Activation layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000110struct ActivationQueueDescriptor : QueueDescriptorWithParameters<ActivationDescriptor>
111{
112 void Validate(const WorkloadInfo& workloadInfo) const;
113};
114
telsoa01c577f2c2018-08-31 09:22:23 +0100115// Fully connected layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000116struct FullyConnectedQueueDescriptor : QueueDescriptorWithParameters<FullyConnectedDescriptor>
117{
118 FullyConnectedQueueDescriptor()
119 : m_Weight(nullptr)
120 , m_Bias(nullptr)
121 {
122 }
123
124 const ConstCpuTensorHandle* m_Weight;
125 const ConstCpuTensorHandle* m_Bias;
126
127 void Validate(const WorkloadInfo& workloadInfo) const;
128};
129
telsoa01c577f2c2018-08-31 09:22:23 +0100130// Permute layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000131struct PermuteQueueDescriptor : QueueDescriptorWithParameters<PermuteDescriptor>
132{
133 void Validate(const WorkloadInfo& workloadInfo) const;
134};
135
telsoa01c577f2c2018-08-31 09:22:23 +0100136// Pooling 2D layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000137struct Pooling2dQueueDescriptor : QueueDescriptorWithParameters<Pooling2dDescriptor>
138{
139 void Validate(const WorkloadInfo& workloadInfo) const;
140};
141
telsoa01c577f2c2018-08-31 09:22:23 +0100142// Convolution 2D layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000143struct Convolution2dQueueDescriptor : QueueDescriptorWithParameters<Convolution2dDescriptor>
144{
145 Convolution2dQueueDescriptor()
146 : m_Weight(nullptr)
147 , m_Bias(nullptr)
Francis Murtagh351d13d2018-09-24 15:01:18 +0100148 , m_DataLayout(DataLayout::NCHW)
telsoa014fcda012018-03-09 14:13:49 +0000149 {
150 }
151
152 const ConstCpuTensorHandle* m_Weight;
153 const ConstCpuTensorHandle* m_Bias;
Francis Murtagh351d13d2018-09-24 15:01:18 +0100154 DataLayout m_DataLayout;
telsoa014fcda012018-03-09 14:13:49 +0000155
156 void Validate(const WorkloadInfo& workloadInfo) const;
157};
158
telsoa01c577f2c2018-08-31 09:22:23 +0100159// Depthwise Convolution 2D layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000160struct DepthwiseConvolution2dQueueDescriptor : QueueDescriptorWithParameters<DepthwiseConvolution2dDescriptor>
161{
162 DepthwiseConvolution2dQueueDescriptor()
163 : m_Weight(nullptr)
164 , m_Bias(nullptr)
Nikhil Raja05c2102018-09-25 16:16:13 +0100165 , m_DataLayout(DataLayout::NCHW)
telsoa014fcda012018-03-09 14:13:49 +0000166 {
167 }
168
169 const ConstCpuTensorHandle* m_Weight;
170 const ConstCpuTensorHandle* m_Bias;
Nikhil Raja05c2102018-09-25 16:16:13 +0100171 DataLayout m_DataLayout;
telsoa014fcda012018-03-09 14:13:49 +0000172
173 void Validate(const WorkloadInfo& workloadInfo) const;
174};
175
telsoa01c577f2c2018-08-31 09:22:23 +0100176// Normalization layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000177struct NormalizationQueueDescriptor : QueueDescriptorWithParameters<NormalizationDescriptor>
178{
179 void Validate(const WorkloadInfo& workloadInfo) const;
180};
181
telsoa01c577f2c2018-08-31 09:22:23 +0100182// Add layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000183struct AdditionQueueDescriptor : QueueDescriptor
184{
185 void Validate(const WorkloadInfo& workloadInfo) const;
186};
187
telsoa01c577f2c2018-08-31 09:22:23 +0100188// Multiplication layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000189struct MultiplicationQueueDescriptor : QueueDescriptor
190{
191 void Validate(const WorkloadInfo& workloadInfo) const;
192};
193
Francis Murtaghe7a86a42018-08-29 12:42:10 +0100194// Division layer workload data.
195struct DivisionQueueDescriptor : QueueDescriptor
196{
197 void Validate(const WorkloadInfo& workloadInfo) const;
198};
199
David Beckc2044fe2018-09-05 15:00:38 +0100200// Subtraction layer workload data.
201struct SubtractionQueueDescriptor : QueueDescriptor
202{
203 void Validate(const WorkloadInfo& workloadInfo) const;
204};
205
narpra01a6bf9122018-09-10 09:50:09 +0100206// Mean layer workload data.
narpra0132b90462018-09-13 11:07:48 +0100207struct MeanQueueDescriptor : QueueDescriptorWithParameters<MeanDescriptor>
narpra01a6bf9122018-09-10 09:50:09 +0100208{
209 void Validate(const WorkloadInfo& workloadInfo) const;
210};
211
jimfly012c9322a2018-09-19 10:59:49 +0100212// Pad layer workload data
213struct PadQueueDescriptor : QueueDescriptorWithParameters<PadDescriptor>
214{
215 void Validate(const WorkloadInfo& workloadInfo) const;
216};
217
telsoa01c577f2c2018-08-31 09:22:23 +0100218// Batch norm layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000219struct BatchNormalizationQueueDescriptor : QueueDescriptorWithParameters<BatchNormalizationDescriptor>
220{
221 BatchNormalizationQueueDescriptor()
222 : m_Mean(nullptr)
223 , m_Variance(nullptr)
224 , m_Beta(nullptr)
225 , m_Gamma(nullptr)
226 {
227 }
228
229 const ConstCpuTensorHandle* m_Mean;
230 const ConstCpuTensorHandle* m_Variance;
231 const ConstCpuTensorHandle* m_Beta;
232 const ConstCpuTensorHandle* m_Gamma;
233
234 void Validate(const WorkloadInfo& workloadInfo) const;
235};
236
237struct ResizeBilinearQueueDescriptor : QueueDescriptorWithParameters<ResizeBilinearDescriptor>
238{
239 void Validate(const WorkloadInfo& workloadInfo) const;
240};
241
242struct FakeQuantizationQueueDescriptor : QueueDescriptorWithParameters<FakeQuantizationDescriptor>
243{
244 FakeQuantizationQueueDescriptor()
245 : m_Min(nullptr)
246 , m_Max(nullptr)
247 {
248 }
249
250 const ConstCpuTensorHandle* m_Min;
251 const ConstCpuTensorHandle* m_Max;
252
253 void Validate(const WorkloadInfo& workloadInfo) const;
254};
255
Matteo Martincighbcd3c852018-09-28 14:14:12 +0100256struct L2NormalizationQueueDescriptor : QueueDescriptorWithParameters<L2NormalizationDescriptor>
telsoa014fcda012018-03-09 14:13:49 +0000257{
258 void Validate(const WorkloadInfo& workloadInfo) const;
259};
260
261struct ConstantQueueDescriptor : QueueDescriptor
262{
263 ConstantQueueDescriptor()
264 : m_LayerOutput(nullptr)
265 {
266 }
267
268 const ConstCpuTensorHandle* m_LayerOutput;
269
270 void Validate(const WorkloadInfo& workloadInfo) const;
271};
272
273struct ReshapeQueueDescriptor : QueueDescriptorWithParameters<ReshapeDescriptor>
274{
275 void Validate(const WorkloadInfo& workloadInfo) const;
276};
277
278struct FloorQueueDescriptor : QueueDescriptor
279{
280 void Validate(const WorkloadInfo& workloadInfo) const;
281};
282
telsoa01c577f2c2018-08-31 09:22:23 +0100283struct LstmQueueDescriptor : QueueDescriptorWithParameters<LstmDescriptor>
284{
285 LstmQueueDescriptor()
286 : m_InputToInputWeights(nullptr)
287 , m_InputToForgetWeights(nullptr)
288 , m_InputToCellWeights(nullptr)
289 , m_InputToOutputWeights(nullptr)
290 , m_RecurrentToInputWeights(nullptr)
291 , m_RecurrentToForgetWeights(nullptr)
292 , m_RecurrentToCellWeights(nullptr)
293 , m_RecurrentToOutputWeights(nullptr)
294 , m_CellToInputWeights(nullptr)
295 , m_CellToForgetWeights(nullptr)
296 , m_CellToOutputWeights(nullptr)
297 , m_InputGateBias(nullptr)
298 , m_ForgetGateBias(nullptr)
299 , m_CellBias(nullptr)
300 , m_OutputGateBias(nullptr)
301 , m_ProjectionWeights(nullptr)
302 , m_ProjectionBias(nullptr)
303 {
304 }
305
306 const ConstCpuTensorHandle* m_InputToInputWeights;
307 const ConstCpuTensorHandle* m_InputToForgetWeights;
308 const ConstCpuTensorHandle* m_InputToCellWeights;
309 const ConstCpuTensorHandle* m_InputToOutputWeights;
310 const ConstCpuTensorHandle* m_RecurrentToInputWeights;
311 const ConstCpuTensorHandle* m_RecurrentToForgetWeights;
312 const ConstCpuTensorHandle* m_RecurrentToCellWeights;
313 const ConstCpuTensorHandle* m_RecurrentToOutputWeights;
314 const ConstCpuTensorHandle* m_CellToInputWeights;
315 const ConstCpuTensorHandle* m_CellToForgetWeights;
316 const ConstCpuTensorHandle* m_CellToOutputWeights;
317 const ConstCpuTensorHandle* m_InputGateBias;
318 const ConstCpuTensorHandle* m_ForgetGateBias;
319 const ConstCpuTensorHandle* m_CellBias;
320 const ConstCpuTensorHandle* m_OutputGateBias;
321 const ConstCpuTensorHandle* m_ProjectionWeights;
322 const ConstCpuTensorHandle* m_ProjectionBias;
323
324 void Validate(const WorkloadInfo& workloadInfo) const;
325};
326
327struct ConvertFp16ToFp32QueueDescriptor : QueueDescriptor
328{
329 void Validate(const WorkloadInfo& workloadInfo) const;
330};
331
332struct ConvertFp32ToFp16QueueDescriptor : QueueDescriptor
333{
334 void Validate(const WorkloadInfo& workloadInfo) const;
335};
336
telsoa014fcda012018-03-09 14:13:49 +0000337} //namespace armnn