blob: f04cede2f8166c5d0dc75f8b690fefde5ef82688 [file] [log] [blame]
James Conroyfe3ec942020-11-18 14:20:53 +00001//
2// Copyright © 2020 Arm Ltd and Contributors. All rights reserved.
3// SPDX-License-Identifier: MIT
4//
5
6#include "ClLogicalAndWorkload.hpp"
7
8#include "ClWorkloadUtils.hpp"
9
10#include <armnn/utility/PolymorphicDowncast.hpp>
11
12#include <aclCommon/ArmComputeTensorUtils.hpp>
13
14#include <cl/ClTensorHandle.hpp>
15
16namespace armnn
17{
18using namespace armcomputetensorutils;
19
20arm_compute::Status ClLogicalAndWorkloadValidate(const TensorInfo& input0,
21 const TensorInfo& input1,
22 const TensorInfo& output)
23{
24 const arm_compute::TensorInfo aclInputInfo0 = BuildArmComputeTensorInfo(input0);
25 const arm_compute::TensorInfo aclInputInfo1 = BuildArmComputeTensorInfo(input1);
26 const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
27
28 const arm_compute::Status aclStatus = arm_compute::CLLogicalAnd::validate(&aclInputInfo0,
29 &aclInputInfo1,
30 &aclOutputInfo);
31 return aclStatus;
32}
33
34ClLogicalAndWorkload::ClLogicalAndWorkload(const LogicalBinaryQueueDescriptor& descriptor,
Sadik Armagane9444752020-12-02 11:28:58 +000035 const WorkloadInfo& info,
36 const arm_compute::CLCompileContext& clCompileContext)
James Conroyfe3ec942020-11-18 14:20:53 +000037 : BaseWorkload<LogicalBinaryQueueDescriptor>(descriptor, info)
38{
39 m_Data.ValidateInputsOutputs("ClLogicalAndWorkload", 2, 1);
40
41 arm_compute::ICLTensor& input0 = PolymorphicDowncast<ClTensorHandle*>(m_Data.m_Inputs[0])->GetTensor();
42 arm_compute::ICLTensor& input1 = PolymorphicDowncast<ClTensorHandle*>(m_Data.m_Inputs[1])->GetTensor();
43 arm_compute::ICLTensor& output = PolymorphicDowncast<ClTensorHandle*>(m_Data.m_Outputs[0])->GetTensor();
44
Sadik Armagane9444752020-12-02 11:28:58 +000045 m_LogicalAndLayer.configure(clCompileContext, &input0, &input1, &output);
James Conroyfe3ec942020-11-18 14:20:53 +000046}
47
48void ClLogicalAndWorkload::Execute() const
49{
50 ARMNN_SCOPED_PROFILING_EVENT_CL("ClLogicalAndWorkload_Execute");
51 m_LogicalAndLayer.run();
52}
53
54} // namespace armnn