telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2017 Arm Ltd. All rights reserved. |
David Beck | ecb56cd | 2018-09-05 12:52:57 +0100 | [diff] [blame^] | 3 | // SPDX-License-Identifier: MIT |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 4 | // |
| 5 | #pragma once |
| 6 | |
| 7 | #include <array> |
| 8 | |
| 9 | namespace armnn |
| 10 | { |
| 11 | |
| 12 | constexpr unsigned int MaxNumOfTensorDimensions = 4U; |
| 13 | |
| 14 | /// @enum Status enumeration |
| 15 | /// @var Status::Successful |
| 16 | /// @var Status::Failure |
| 17 | enum class Status |
| 18 | { |
| 19 | Success = 0, |
| 20 | Failure = 1 |
| 21 | }; |
| 22 | |
| 23 | enum class DataType |
| 24 | { |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 25 | Float16 = 0, |
| 26 | Float32 = 1, |
| 27 | QuantisedAsymm8 = 2, |
| 28 | Signed32 = 3 |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 29 | }; |
| 30 | |
| 31 | enum class ActivationFunction |
| 32 | { |
| 33 | Sigmoid = 0, |
| 34 | TanH = 1, |
| 35 | Linear = 2, |
| 36 | ReLu = 3, |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 37 | BoundedReLu = 4, ///< min(a, max(b, input)) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 38 | SoftReLu = 5, |
| 39 | LeakyReLu = 6, |
| 40 | Abs = 7, |
| 41 | Sqrt = 8, |
| 42 | Square = 9 |
| 43 | }; |
| 44 | |
| 45 | enum class PoolingAlgorithm |
| 46 | { |
| 47 | Max = 0, |
| 48 | Average = 1, |
| 49 | L2 = 2 |
| 50 | }; |
| 51 | |
| 52 | /// |
| 53 | /// The padding method modifies the output of pooling layers. |
| 54 | /// In both supported methods, the values are ignored (they are |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 55 | /// not even zeroes, which would make a difference for max pooling |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 56 | /// a tensor with negative values). The difference between |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 57 | /// IgnoreValue and Exclude is that the former counts the padding |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 58 | /// fields in the divisor of Average and L2 pooling, while |
| 59 | /// Exclude does not. |
| 60 | /// |
| 61 | enum class PaddingMethod |
| 62 | { |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 63 | /// The padding fields count, but are ignored |
| 64 | IgnoreValue = 0, |
| 65 | /// The padding fields don't count and are ignored |
| 66 | Exclude = 1 |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 67 | }; |
| 68 | |
| 69 | enum class NormalizationAlgorithmChannel |
| 70 | { |
| 71 | Across = 0, |
| 72 | Within = 1 |
| 73 | }; |
| 74 | |
| 75 | enum class NormalizationAlgorithmMethod |
| 76 | { |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 77 | /// Krichevsky 2012: Local Brightness Normalization |
| 78 | LocalBrightness = 0, |
| 79 | /// Jarret 2009: Local Contrast Normalization |
| 80 | LocalContrast = 1 |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 81 | }; |
| 82 | |
| 83 | enum class OutputShapeRounding |
| 84 | { |
| 85 | Floor = 0, |
| 86 | Ceiling = 1 |
| 87 | }; |
| 88 | |
| 89 | enum class Compute |
| 90 | { |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 91 | /// CPU Execution: Reference C++ kernels |
| 92 | CpuRef = 0, |
| 93 | /// CPU Execution: NEON: ArmCompute |
| 94 | CpuAcc = 1, |
| 95 | /// GPU Execution: OpenCL: ArmCompute |
| 96 | GpuAcc = 2, |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 97 | Undefined = 5 |
| 98 | }; |
| 99 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 100 | class IDeviceSpec |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 101 | { |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 102 | protected: |
| 103 | IDeviceSpec() {}; |
| 104 | virtual ~IDeviceSpec() {}; |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 105 | }; |
| 106 | |
| 107 | /// Type of identifiers for bindable layers (inputs, outputs). |
| 108 | using LayerBindingId = int; |
| 109 | |
| 110 | class PermutationVector |
| 111 | { |
| 112 | public: |
| 113 | using ValueType = unsigned int; |
| 114 | using SizeType = unsigned int; |
| 115 | using ArrayType = std::array<ValueType, MaxNumOfTensorDimensions>; |
| 116 | using ConstIterator = typename ArrayType::const_iterator; |
| 117 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 118 | /// @param dimMappings - Indicates how to translate tensor elements from a given source into the target destination, |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 119 | /// when source and target potentially have different memory layouts. |
| 120 | /// |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 121 | /// E.g. For a 4-d tensor laid out in a memory with the format (Batch Element, Height, Width, Channels), |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 122 | /// which is to be passed as an input to ArmNN, each source dimension is mapped to the corresponding |
| 123 | /// ArmNN dimension. The Batch dimension remains the same (0 -> 0). The source Height dimension is mapped |
| 124 | /// to the location of the ArmNN Height dimension (1 -> 2). Similar arguments are made for the Width and |
| 125 | /// Channels (2 -> 3 and 3 -> 1). This will lead to @ref m_DimMappings pointing to the following array: |
| 126 | /// [ 0, 2, 3, 1 ]. |
| 127 | /// |
| 128 | /// Note that the mapping should be reversed if considering the case of ArmNN 4-d outputs (Batch Element, |
| 129 | /// Channels, Height, Width) being written to a destination with the format mentioned above. We now have |
| 130 | /// 0 -> 0, 2 -> 1, 3 -> 2, 1 -> 3, which, when reordered, lead to the following @ref m_DimMappings contents: |
| 131 | /// [ 0, 3, 1, 2 ]. |
| 132 | /// |
| 133 | PermutationVector(const ValueType *dimMappings, SizeType numDimMappings); |
| 134 | |
| 135 | PermutationVector(std::initializer_list<ValueType> dimMappings); |
| 136 | |
| 137 | ValueType operator[](SizeType i) const { return m_DimMappings.at(i); } |
| 138 | |
| 139 | SizeType GetSize() const { return m_NumDimMappings; } |
| 140 | |
| 141 | ConstIterator begin() const { return m_DimMappings.begin(); } |
| 142 | ConstIterator end() const { return m_DimMappings.end(); } |
| 143 | |
| 144 | bool IsEqual(const PermutationVector& other) const |
| 145 | { |
| 146 | return std::equal(begin(), end(), other.begin(), other.end()); |
| 147 | } |
| 148 | |
| 149 | bool IsInverse(const PermutationVector& other) const |
| 150 | { |
| 151 | bool isInverse = (GetSize() == other.GetSize()); |
| 152 | for (SizeType i = 0; isInverse && (i < GetSize()); ++i) |
| 153 | { |
| 154 | isInverse = (m_DimMappings[other.m_DimMappings[i]] == i); |
| 155 | } |
| 156 | return isInverse; |
| 157 | } |
| 158 | |
| 159 | private: |
| 160 | ArrayType m_DimMappings; |
| 161 | /// Number of valid entries in @ref m_DimMappings |
| 162 | SizeType m_NumDimMappings; |
| 163 | }; |
| 164 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 165 | /// Define LayerGuid type. |
surmeh01 | bceff2f | 2018-03-29 16:29:27 +0100 | [diff] [blame] | 166 | using LayerGuid = unsigned int; |
| 167 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 168 | } |