diff --git a/CMakeLists.txt b/CMakeLists.txt
index 7b56fa3..e7cd9e1 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -30,6 +30,7 @@
 
 set(LOG_NAMES err warning info debug)
 set(ETHOSU_LOG_SEVERITY "warning" CACHE STRING "Driver log severity level ${LOG_NAMES} (Defaults to 'warning')")
+set(ETHOSU_TARGET_NPU_CONFIG "ethos-u55-128" CACHE STRING "Default NPU configuration")
 set_property(CACHE ETHOSU_LOG_SEVERITY PROPERTY STRINGS ${LOG_NAMES})
 
 #
@@ -53,7 +54,28 @@
 # Build driver library
 add_library(ethosu_core_driver STATIC)
 target_include_directories(ethosu_core_driver PUBLIC include)
-target_sources(ethosu_core_driver PRIVATE src/ethosu_driver.c src/ethosu_device_u55.c src/ethosu_pmu.c)
+target_sources(ethosu_core_driver PRIVATE src/ethosu_driver.c src/ethosu_pmu.c)
+
+string(TOLOWER ${ETHOSU_TARGET_NPU_CONFIG} ETHOSU_TARGET_NPU_CONFIG)
+if(ETHOSU_TARGET_NPU_CONFIG MATCHES "^ethos-(u[0-9]+|uz)-([0-9]+$)")
+    set(ETHOSU_ARCH ${CMAKE_MATCH_1})
+    set(ETHOSU_MACS ${CMAKE_MATCH_2})
+else()
+    message(FATAL_ERROR "Invalid Ethos-U target configuration '${ETHOSU_TARGET_NPU_CONFIG}")
+endif()
+
+target_compile_definitions(ethosu_core_driver PRIVATE
+    ETHOSU_ARCH=${ETHOSU_ARCH}
+    ETHOS$<UPPER_CASE:${ETHOSU_ARCH}>)
+
+if (ETHOSU_ARCH STREQUAL "u55" OR ETHOSU_ARCH STREQUAL "u65")
+    target_sources(ethosu_core_driver PRIVATE src/ethosu_device_u55_u65.c)
+else()
+    message(FATAL_ERROR "Invalid NPU configuration")
+endif()
+
+
+# Set the log level for the target
 target_compile_definitions(ethosu_core_driver PRIVATE ETHOSU_LOG_SEVERITY=${LOG_SEVERITY})
 
 # Install library and include files
@@ -67,6 +89,7 @@
 
 message(STATUS "*******************************************************")
 message(STATUS "PROJECT_NAME                           : ${PROJECT_NAME}")
+message(STATUS "ETHOSU_TARGET_NPU_CONFIG               : ${ETHOSU_TARGET_NPU_CONFIG}")
 message(STATUS "CMAKE_SYSTEM_PROCESSOR                 : ${CMAKE_SYSTEM_PROCESSOR}")
 message(STATUS "CMSIS_PATH                             : ${CMSIS_PATH}")
 message(STATUS "ETHOSU_LOG_SEVERITY                    : ${ETHOSU_LOG_SEVERITY}")
diff --git a/include/ethosu_device.h b/include/ethosu_device.h
deleted file mode 100644
index dad88ef..0000000
--- a/include/ethosu_device.h
+++ /dev/null
@@ -1,439 +0,0 @@
-/*
- * Copyright (c) 2019-2021 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef ETHOSU_DEVICE_H
-#define ETHOSU_DEVICE_H
-
-/******************************************************************************
- * Includes
- ******************************************************************************/
-
-#include <stdbool.h>
-#include <stdint.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/******************************************************************************
- * Defines
- ******************************************************************************/
-
-#define ETHOSU_BASEP_INDEXES 8 ///< Number of base pointer indexes
-
-#ifndef ETHOSU_PMU_NCOUNTERS
-#define ETHOSU_PMU_NCOUNTERS 4
-#endif
-
-/******************************************************************************
- * Types
- ******************************************************************************/
-
-enum ethosu_error_codes
-{
-    ETHOSU_SUCCESS         = 0,  ///< Success
-    ETHOSU_GENERIC_FAILURE = -1, ///< Generic failure
-    ETHOSU_INVALID_PARAM   = -2  ///< Invalid parameter
-};
-
-struct ethosu_device
-{
-    volatile uintptr_t base_address;
-    uint32_t proto;
-    uint32_t pmcr;
-    uint32_t pmccntr[2];
-    uint32_t pmcnten;
-    uint32_t pmint;
-    uint32_t pmccntr_cfg;
-    uint32_t pmu_evcntr[ETHOSU_PMU_NCOUNTERS];
-    uint32_t pmu_evtypr[ETHOSU_PMU_NCOUNTERS];
-    uint32_t secure;
-    uint32_t privileged;
-};
-
-struct ethosu_id
-{
-    uint32_t version_status; ///< Version status
-    uint32_t version_minor;  ///< Version minor
-    uint32_t version_major;  ///< Version major
-    uint32_t product_major;  ///< Product major
-    uint32_t arch_patch_rev; ///< Architecture version patch
-    uint32_t arch_minor_rev; ///< Architecture version minor
-    uint32_t arch_major_rev; ///< Architecture version major
-};
-
-struct ethosu_config
-{
-    uint32_t macs_per_cc;        ///< MACs per clock cycle
-    uint32_t cmd_stream_version; ///< NPU command stream version
-    uint32_t shram_size;         ///< SHRAM size
-    uint32_t custom_dma;         ///< Custom DMA enabled
-};
-
-/**
- * Memory type parameter for set_regioncfg_reg:
- *   Counter{0,1}: Outstanding transactions for
- *   AXI port 0 for memory type/region a=0,b=1
- *   Counter{2,3}: Outstanding transactions for
- *   AXI port 1 for memory type/region a=2,b=3
- */
-enum ethosu_memory_type
-{
-    ETHOSU_AXI0_OUTSTANDING_COUNTER0 = 0, ///< NPU axi0_outstanding_counter0
-    ETHOSU_AXI0_OUTSTANDING_COUNTER1 = 1, ///< NPU axi0_outstanding_counter1
-    ETHOSU_AXI1_OUTSTANDING_COUNTER2 = 2, ///< NPU axi1_outstanding_counter2
-    ETHOSU_AXI1_OUTSTANDING_COUNTER3 = 3  ///< NPU axi1_outstanding_counter3
-};
-
-enum ethosu_axi_limit_beats
-{
-    ETHOSU_AXI_LIMIT_64_BYTES  = 0, ///< NPU AXI limit 64 byte burst split alignment.
-    ETHOSU_AXI_LIMIT_128_BYTES = 1, ///< NPU AXI limit 128 byte burst split alignment.
-    ETHOSU_AXI_LIMIT_256_BYTES = 2  ///< NPU AXI limit 256 byte burst split alignment.
-};
-
-enum ethosu_axi_limit_mem_type
-{
-    ETHOSU_MEM_TYPE_DEVICE_NON_BUFFERABLE                 = 0,
-    ETHOSU_MEM_TYPE_DEVICE_BUFFERABLE                     = 1,
-    ETHOSU_MEM_TYPE_NORMAL_NON_CACHEABLE_NON_BUFFERABLE   = 2,
-    ETHOSU_MEM_TYPE_NORMAL_NON_CACHEABLE_BUFFERABLE       = 3,
-    ETHOSU_MEM_TYPE_WRITE_THROUGH_NO_ALLOCATE             = 4,
-    ETHOSU_MEM_TYPE_WRITE_THROUGH_READ_ALLOCATE           = 5,
-    ETHOSU_MEM_TYPE_WRITE_THROUGH_WRITE_ALLOCATE          = 6,
-    ETHOSU_MEM_TYPE_WRITE_THROUGH_READ_AND_WRITE_ALLOCATE = 7,
-    ETHOSU_MEM_TYPE_WRITE_BACK_NO_ALLOCATE                = 8,
-    ETHOSU_MEM_TYPE_WRITE_BACK_READ_ALLOCATE              = 9,
-    ETHOSU_MEM_TYPE_WRITE_BACK_WRITE_ALLOCATE             = 10,
-    ETHOSU_MEM_TYPE_WRITE_BACK_READ_AND_WRITE_ALLOCATE    = 11
-};
-
-enum ethosu_clock_q_request
-{
-    ETHOSU_CLOCK_Q_DISABLE = 0, ///< Disble NPU signal ready for clock off.
-    ETHOSU_CLOCK_Q_ENABLE  = 1  ///< Enable NPU signal ready for clock off when stop+idle state reached.
-};
-
-enum ethosu_power_q_request
-{
-    ETHOSU_POWER_Q_DISABLE = 0, ///< Disble NPU signal ready for power off.
-    ETHOSU_POWER_Q_ENABLE  = 1  ///< Enable NPU signal ready for power off when stop+idle state reached.
-};
-
-/******************************************************************************
- * Prototypes
- ******************************************************************************/
-
-/**
- * Initialize the device.
- */
-enum ethosu_error_codes ethosu_dev_init(struct ethosu_device *dev,
-                                        const void *base_address,
-                                        uint32_t secure_enable,
-                                        uint32_t privilege_enable);
-
-/**
- * Get device id.
- */
-enum ethosu_error_codes ethosu_dev_get_id(struct ethosu_device *dev, struct ethosu_id *id);
-
-/**
- * Get device configuration.
- */
-enum ethosu_error_codes ethosu_dev_get_config(struct ethosu_device *dev, struct ethosu_config *config);
-
-/**
- * Execute a given command stream on NPU.
- * \param[in] cmd_stream_ptr   Pointer to the command stream
- * \param[in] cms_length       Command stream length
- * \param[in] base_addr        Pointer to array of base addresses
- *                             - 0: weight tensor
- *                             - 1: scratch tensor
- *                             - All input tensors
- *                             - All output tensors
- * \param[in] num_base_addr    Number of base addresses.
- * \return                     \ref ethosu_error_codes
- */
-enum ethosu_error_codes ethosu_dev_run_command_stream(struct ethosu_device *dev,
-                                                      const uint8_t *cmd_stream_ptr,
-                                                      uint32_t cms_length,
-                                                      const uint64_t *base_addr,
-                                                      int num_base_addr);
-
-/**
- * Check if IRQ is raised.
- * \param[out] irq_status      Pointer to IRQ status
- *                             - 0 IRQ not raised
- *                             - 1 IRQ raised
- * \return                     \ref ethosu_error_codes
- */
-enum ethosu_error_codes ethosu_dev_is_irq_raised(struct ethosu_device *dev, uint8_t *irq_status);
-
-/**
- * Clear IRQ status.
- * \return                     \ref ethosu_error_codes
- */
-enum ethosu_error_codes ethosu_dev_clear_irq_status(struct ethosu_device *dev);
-
-/**
- * Get the 16 bit status mask.
- * \param[out] irq_status_mask     Pointer to the status mask.
- *                                 The lower 16 bits of status reg are returned.
- *                                 bit0: state
- *                                 bit1: irq_raised
- *                                 bit2: bus_status
- *                                 bit3: reset_status
- *                                 bit4: cmd_parse_error
- *                                 bit5: cmd_end_reached
- *                                 bit6: pmu_irq_raised
- *                                 bit7-15: reserved
- * \return                         \ref ethosu_error_codes
- */
-
-enum ethosu_error_codes ethosu_dev_get_status_mask(struct ethosu_device *dev, uint16_t *status_mask);
-
-/**
- * Get current NPU status
- * \return                     32 bit status value
- */
-uint32_t ethosu_dev_get_status(struct ethosu_device *dev);
-
-/**
- * Get the 16 bit IRQ history mask.
- * \param[out] irq_history_mask    Pointer to the IRQ history mask.
- * \return                         \ref ethosu_error_codes
- */
-enum ethosu_error_codes ethosu_dev_get_irq_history_mask(struct ethosu_device *dev, uint16_t *irq_history_mask);
-
-/**
- * Clear the given bits in the
- *                                     IRQ history mask.
- * \param[in] irq_history_clear_mask   16 bit mask indicating which bits to
- *                                     clear in the IRQ history mask.
- * \return                             \ref ethosu_error_codes
- */
-enum ethosu_error_codes ethosu_dev_clear_irq_history_mask(struct ethosu_device *dev, uint16_t irq_history_clear_mask);
-
-/**
- * Perform a NPU soft reset.
- * \return                     \ref ethosu_error_codes
- */
-enum ethosu_error_codes ethosu_dev_soft_reset(struct ethosu_device *dev);
-
-/**
- * Wait for reset ready.
- * \return                     \ref ethosu_error_codes
- */
-enum ethosu_error_codes ethosu_dev_wait_for_reset(struct ethosu_device *dev);
-
-/**
- * Read and return the content of a given NPU APB
- *                             register range.
- * \param[in] start_address    Start address.
- * \param[in] num_reg          Number of registers to read.
- * \param[out] reg_p           Pointer to a output area, allocated by the
- *                             caller, where the register content shall be
- *                             written.
- * \return                     \ref ethosu_error_codes
- */
-enum ethosu_error_codes ethosu_dev_read_apb_reg(struct ethosu_device *dev,
-                                                uint32_t start_address,
-                                                uint16_t num_reg,
-                                                uint32_t *reg_p);
-
-/**
- * Set qconfig register. I.e.
- *                             AXI configuration for the command stream.
- * \param[in] memory_type      Memory_type to use for command stream:
- *                             enum ethosu_memory_type.
- * \return                     \ref ethosu_error_codes
- */
-enum ethosu_error_codes ethosu_dev_set_qconfig(struct ethosu_device *dev, enum ethosu_memory_type memory_type);
-
-/**
- * Set register REGIONCFG.
- *                             Base pointer configuration.
- *                             Bits[2*k+1:2*k] give the memory type for BASEP[k].
- * \param[in] region           Region field to set: 0 - 7.
- * \param[in] memory_type      Memory_type to use for region: enum ethosu_memory_type.
- * \return                     \ref ethosu_error_codes
- */
-enum ethosu_error_codes ethosu_dev_set_regioncfg(struct ethosu_device *dev,
-                                                 uint8_t region,
-                                                 enum ethosu_memory_type memory_type);
-
-/**
- * Set AXI limit parameters for port 0 counter 0.
- * \param[in] max_beats        Burst split alignment, \ref ethosu_axi_limit_beats.
- * \param[in] memtype          Cache policy \ref ethosu_axi_limit_mem_type
- * \param[in] max_reads        Maximum number of outstanding reads.
- * \param[in] max_writes       Maximum number of outstanding writes.
- * \return                     \ref ethosu_error_codes
- */
-enum ethosu_error_codes ethosu_dev_set_axi_limit0(struct ethosu_device *dev,
-                                                  enum ethosu_axi_limit_beats max_beats,
-                                                  enum ethosu_axi_limit_mem_type memtype,
-                                                  uint8_t max_reads,
-                                                  uint8_t max_writes);
-/**
- * Set AXI limit parameters for port 0 counter 1.
- * \param[in] max_beats        Burst split alignment, \ref ethosu_axi_limit_beats.
- * \param[in] memtype          Cache policy \ref ethosu_axi_limit_mem_type
- * \param[in] max_reads        Maximum number of outstanding reads.
- * \param[in] max_writes       Maximum number of outstanding writes.
- * \return                     \ref ethosu_error_codes
- */
-enum ethosu_error_codes ethosu_dev_set_axi_limit1(struct ethosu_device *dev,
-                                                  enum ethosu_axi_limit_beats max_beats,
-                                                  enum ethosu_axi_limit_mem_type memtype,
-                                                  uint8_t max_reads,
-                                                  uint8_t max_writes);
-/**
- * Set AXI limit parameters for port 1 counter 2.
- * \param[in] max_beats        Burst split alignment, \ref ethosu_axi_limit_beats.
- * \param[in] memtype          Cache policy \ref ethosu_axi_limit_mem_type
- * \param[in] max_reads        Maximum number of outstanding reads.
- * \param[in] max_writes       Maximum number of outstanding writes.
- * \return                     \ref ethosu_error_codes
- */
-enum ethosu_error_codes ethosu_dev_set_axi_limit2(struct ethosu_device *dev,
-                                                  enum ethosu_axi_limit_beats max_beats,
-                                                  enum ethosu_axi_limit_mem_type memtype,
-                                                  uint8_t max_reads,
-                                                  uint8_t max_writes);
-/**
- * Set AXI limit parameters for port 1 counter 3.
- * \param[in] max_beats        Burst split alignment, \ref ethosu_axi_limit_beats.
- * \param[in] memtype          Cache policy \ref ethosu_axi_limit_mem_type
- * \param[in] max_reads        Maximum number of outstanding reads.
- * \param[in] max_writes       Maximum number of outstanding writes.
- * \return                     \ref ethosu_error_codes
- */
-enum ethosu_error_codes ethosu_dev_set_axi_limit3(struct ethosu_device *dev,
-                                                  enum ethosu_axi_limit_beats max_beats,
-                                                  enum ethosu_axi_limit_mem_type memtype,
-                                                  uint8_t max_reads,
-                                                  uint8_t max_writes);
-
-/**
- * Get current command stream queue read position.
- * \return                     qread position
- */
-uint32_t ethosu_dev_get_qread(struct ethosu_device *dev);
-
-/**
- * Get revision of NPU
- * \param[out] revision        Pointer to revision read.
- * \return                     \ref ethosu_error_codes
- */
-enum ethosu_error_codes ethosu_dev_get_revision(struct ethosu_device *dev, uint32_t *revision);
-
-/**
- * Issue run command for the currently programmed
- *                             command stream, starting at current queue read
- *                             position.
- * \return                     \ref ethosu_error_codes
- */
-enum ethosu_error_codes ethosu_dev_set_command_run(struct ethosu_device *dev);
-
-/**
- * Dump a 1KB section of SHRAM.
- * \param[in] section          Section offset to 1KB section in SHRAM.
- * \param[out] shram_p         Pointer to a output area, allocated by the
- *                             caller, where the SHRAM content shall be
- *                             written.
- * \return                     \ref ethosu_error_codes
- */
-enum ethosu_error_codes ethosu_dev_get_shram_data(struct ethosu_device *dev, int section, uint32_t *shram_p);
-
-/**
- * Set clock and power q request enable bits.
- * \param[in] clock_q          Clock q ENABLE/DISABLE \ref clock_q_request.
- * \param[in] power_q          Power q ENABLE/DISABLE \ref power_q_request.
- * \return                     \ref ethosu_error_codes
- */
-enum ethosu_error_codes ethosu_dev_set_clock_and_power(struct ethosu_device *dev,
-                                                       enum ethosu_clock_q_request clock_q,
-                                                       enum ethosu_power_q_request power_q);
-
-/**
- * Read register.
- * \param[in] address          Address to read.
- * \return                     Register value.
- */
-uint32_t ethosu_dev_read_reg(struct ethosu_device *dev, uint32_t address);
-
-/**
- * Write register.
- * \param[in] address          Address to read.
- * \param[in] value            Value to be written.
- */
-void ethosu_dev_write_reg(struct ethosu_device *dev, uint32_t address, uint32_t value);
-
-/**
- * Write register with shadow variable.
- * \param[in] address          Address to read.
- * \param[in] value            Value to be written.
- */
-void ethosu_dev_write_reg_shadow(struct ethosu_device *dev, uint32_t address, uint32_t value, uint32_t *shadow);
-
-/**
- * Save the PMU configuration to ethosu_device struct.
- * \param[in] dev              Ethos-U device where the PMU configuration is
- *                             saved.
- * \return                     \ref ethosu_error_codes
- */
-enum ethosu_error_codes ethosu_dev_save_pmu_config(struct ethosu_device *dev);
-
-/**
- * Restore the PMU configuration from a ethosu_device struct.
- * \param[in] dev              Ethos-U device where the PMU configuration is
- *                             stored.
- * \return                     \ref ethosu_error_codes
- */
-enum ethosu_error_codes ethosu_dev_restore_pmu_config(struct ethosu_device *dev);
-
-/**
- * Save PMU counters to shadow variables in memory.
- * \param[in] dev              Ethos-U device where the PMU configuration is
- *                             stored.
- * \return                     \ref ethosu_error_codes
- */
-enum ethosu_error_codes ethosu_dev_save_pmu_counters(struct ethosu_device *dev);
-
-/**
- * Check if the PROT register value has changed compared to cached value.
- * \param[in] dev              Ethos-U device to check.
- * \return                     true if register value differs from cached value,
- *                             false otherwise.
- */
-bool ethosu_dev_prot_has_changed(struct ethosu_device *dev);
-
-/**
- * Check if the STATUS register has any error bits set or not.
- * \param[in] dev              Ethos-U device to check.
- * \return                     true if any error bits set,
- *                             false otherwise.
- */
-bool ethosu_dev_status_has_error(struct ethosu_device *dev);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // ETHOSU_DEVICE_H
diff --git a/include/ethosu_driver.h b/include/ethosu_driver.h
index 6f8f201..a7b2bdb 100644
--- a/include/ethosu_driver.h
+++ b/include/ethosu_driver.h
@@ -23,7 +23,7 @@
  * Includes
  ******************************************************************************/
 
-#include "ethosu_device.h"
+#include "ethosu_types.h"
 
 #include <stdbool.h>
 #include <stddef.h>
@@ -45,15 +45,17 @@
  * Types
  ******************************************************************************/
 
+// Forward declare
+struct ethosu_device;
+
 struct ethosu_driver
 {
-    struct ethosu_device dev;
+    struct ethosu_device *dev;
     struct ethosu_driver *next;
     void *semaphore;
     uint64_t fast_memory;
     size_t fast_memory_size;
     bool status_error;
-    bool abort_inference;
     bool dev_power_always_on;
     bool reserved;
     volatile bool irq_triggered;
@@ -68,12 +70,6 @@
     uint8_t patch;
 };
 
-struct ethosu_hw_info
-{
-    struct ethosu_id version;
-    struct ethosu_config cfg;
-};
-
 enum ethosu_request_clients
 {
     ETHOSU_PMU_REQUEST       = 0,
@@ -159,11 +155,6 @@
                   const int num_base_addr);
 
 /**
- * Abort Ethos-U inference.
- */
-void ethosu_abort(struct ethosu_driver *drv);
-
-/**
  * Set Ethos-U power mode.
  */
 void ethosu_set_power_mode(struct ethosu_driver *drv, bool always_on);
diff --git a/include/ethosu_types.h b/include/ethosu_types.h
new file mode 100644
index 0000000..a8062dd
--- /dev/null
+++ b/include/ethosu_types.h
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2019-2021 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef ETHOSU_TYPES_H
+#define ETHOSU_TYPES_H
+
+/******************************************************************************
+ * Includes
+ ******************************************************************************/
+
+#include <stdint.h>
+
+/******************************************************************************
+ * Types
+ ******************************************************************************/
+
+enum ethosu_error_codes
+{
+    ETHOSU_SUCCESS         = 0,  ///< Success
+    ETHOSU_GENERIC_FAILURE = -1, ///< Generic failure
+    ETHOSU_INVALID_PARAM   = -2  ///< Invalid parameter
+};
+
+enum ethosu_clock_q_request
+{
+    ETHOSU_CLOCK_Q_DISABLE   = 0, ///< Disable NPU signal ready for clock off.
+    ETHOSU_CLOCK_Q_ENABLE    = 1, ///< Enable NPU signal ready for clock off when stop+idle state reached.
+    ETHOSU_CLOCK_Q_UNCHANGED = 2  ///< Keep current clock q setting
+};
+
+enum ethosu_power_q_request
+{
+    ETHOSU_POWER_Q_DISABLE   = 0, ///< Disable NPU signal ready for power off.
+    ETHOSU_POWER_Q_ENABLE    = 1, ///< Enable NPU signal ready for power off when stop+idle state reached.
+    ETHOSU_POWER_Q_UNCHANGED = 2  ///< Keep current power q setting
+};
+
+struct ethosu_id
+{
+    uint32_t version_status; ///< Version status
+    uint32_t version_minor;  ///< Version minor
+    uint32_t version_major;  ///< Version major
+    uint32_t product_major;  ///< Product major
+    uint32_t arch_patch_rev; ///< Architecture version patch
+    uint32_t arch_minor_rev; ///< Architecture version minor
+    uint32_t arch_major_rev; ///< Architecture version major
+};
+
+struct ethosu_config
+{
+    uint32_t macs_per_cc;        ///< MACs per clock cycle
+    uint32_t cmd_stream_version; ///< NPU command stream version
+    uint32_t custom_dma;         ///< Custom DMA enabled
+};
+
+struct ethosu_hw_info
+{
+    struct ethosu_id version;
+    struct ethosu_config cfg;
+};
+#endif // ETHOSU_TYPES_H
diff --git a/src/ethosu55_interface.h b/src/ethosu55_interface.h
index 0d1ee6c..2d6d4fc 100644
--- a/src/ethosu55_interface.h
+++ b/src/ethosu55_interface.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019-2021 Arm Limited. All rights reserved.
+ * Copyright (c) 2020-2021 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -35,15 +35,32 @@
 #define STRUCT struct
 #else
 #define STRUCT
-#include <stdexcept>
 #endif
 
+#if defined(__cplusplus) && defined(NPU_DISASSEMBLE)
+#include <iomanip>
+#include <sstream>
+#include <vector>
+#endif
+
+#if defined(__cplusplus) && !defined(NPU_NAMESPACE)
+#define NPU_NAMESPACE npu
+#endif
+
+#ifdef __cplusplus
+#include <cstring>
+#include <limits>
+#endif
+
+#ifdef __cplusplus
+namespace NPU_NAMESPACE
+{
+#endif
 #define NNX_ARCH_VERSION_MAJOR 1
-#define NNX_ARCH_VERSION_MINOR 0
-#define NNX_ARCH_VERSION_PATCH 6
+#define NNX_ARCH_VERSION_MINOR 1
+#define NNX_ARCH_VERSION_PATCH 0
 
 // Register offsets
-
 //
 // Register subpage BASE
 //
@@ -51,8 +68,8 @@
 #define NPU_REG_STATUS 0x0004
 #define NPU_REG_CMD 0x0008
 #define NPU_REG_RESET 0x000C
-#define NPU_REG_QBASE0 0x0010
-#define NPU_REG_QBASE1 0x0014
+#define NPU_REG_QBASE 0x0010
+#define NPU_REG_QBASE_HI 0x0014
 #define NPU_REG_QREAD 0x0018
 #define NPU_REG_QCONFIG 0x001C
 #define NPU_REG_QSIZE 0x0020
@@ -64,28 +81,14 @@
 #define NPU_REG_AXI_LIMIT1 0x0044
 #define NPU_REG_AXI_LIMIT2 0x0048
 #define NPU_REG_AXI_LIMIT3 0x004C
-#define BASE_REGISTERS_SIZE 0x0050
+#define BASE_REGISTERS_SIZE 0x0080
 
 //
 // Register subpage BASE_POINTERS
 //
-#define NPU_REG_BASEP0 0x0080
-#define NPU_REG_BASEP1 0x0084
-#define NPU_REG_BASEP2 0x0088
-#define NPU_REG_BASEP3 0x008C
-#define NPU_REG_BASEP4 0x0090
-#define NPU_REG_BASEP5 0x0094
-#define NPU_REG_BASEP6 0x0098
-#define NPU_REG_BASEP7 0x009C
-#define NPU_REG_BASEP8 0x00A0
-#define NPU_REG_BASEP9 0x00A4
-#define NPU_REG_BASEP10 0x00A8
-#define NPU_REG_BASEP11 0x00AC
-#define NPU_REG_BASEP12 0x00B0
-#define NPU_REG_BASEP13 0x00B4
-#define NPU_REG_BASEP14 0x00B8
-#define NPU_REG_BASEP15 0x00BC
-#define BASE_POINTERS_REGISTERS_SIZE 0x00C0
+#define NPU_REG_BASEP_BASE 0x0080
+#define NPU_REG_BASEP_ARRLEN 0x0008
+#define BASE_POINTERS_REGISTERS_SIZE 0x0100
 
 //
 // Register subpage DEBUG
@@ -98,27 +101,8 @@
 #define NPU_REG_CLKFORCE 0x0140
 #define NPU_REG_DEBUG_ADDRESS 0x0144
 #define NPU_REG_DEBUG_MISC 0x0148
-#define NPU_REG_DEBUGCORE 0x014C
 #define NPU_REG_DEBUG_BLOCK 0x0150
-#define DEBUG_REGISTERS_SIZE 0x0154
-
-//
-// Register subpage ID
-//
-#define NPU_REG_REVISION 0x0FC0
-#define NPU_REG_PID4 0x0FD0
-#define NPU_REG_PID5 0x0FD4
-#define NPU_REG_PID6 0x0FD8
-#define NPU_REG_PID7 0x0FDC
-#define NPU_REG_PID0 0x0FE0
-#define NPU_REG_PID1 0x0FE4
-#define NPU_REG_PID2 0x0FE8
-#define NPU_REG_PID3 0x0FEC
-#define NPU_REG_CID0 0x0FF0
-#define NPU_REG_CID1 0x0FF4
-#define NPU_REG_CID2 0x0FF8
-#define NPU_REG_CID3 0x0FFC
-#define ID_REGISTERS_SIZE 0x1000
+#define DEBUG_REGISTERS_SIZE 0x0180
 
 //
 // Register subpage PMU
@@ -130,404 +114,11 @@
 #define NPU_REG_PMOVSCLR 0x0190
 #define NPU_REG_PMINTSET 0x0194
 #define NPU_REG_PMINTCLR 0x0198
-#define NPU_REG_PMCCNTR_LO 0x01A0
+#define NPU_REG_PMCCNTR 0x01A0
 #define NPU_REG_PMCCNTR_HI 0x01A4
 #define NPU_REG_PMCCNTR_CFG 0x01A8
 #define NPU_REG_PMCAXI_CHAN 0x01AC
-#define NPU_REG_PMEVCNTR0 0x0300
-#define NPU_REG_PMEVCNTR1 0x0304
-#define NPU_REG_PMEVCNTR2 0x0308
-#define NPU_REG_PMEVCNTR3 0x030C
-#define NPU_REG_PMEVTYPER0 0x0380
-#define NPU_REG_PMEVTYPER1 0x0384
-#define NPU_REG_PMEVTYPER2 0x0388
-#define NPU_REG_PMEVTYPER3 0x038C
-#define PMU_REGISTERS_SIZE 0x0390
-
-//
-// Register subpage SHARED_BUFFER
-//
-#define NPU_REG_SHARED_BUFFER0 0x0400
-#define NPU_REG_SHARED_BUFFER1 0x0404
-#define NPU_REG_SHARED_BUFFER2 0x0408
-#define NPU_REG_SHARED_BUFFER3 0x040C
-#define NPU_REG_SHARED_BUFFER4 0x0410
-#define NPU_REG_SHARED_BUFFER5 0x0414
-#define NPU_REG_SHARED_BUFFER6 0x0418
-#define NPU_REG_SHARED_BUFFER7 0x041C
-#define NPU_REG_SHARED_BUFFER8 0x0420
-#define NPU_REG_SHARED_BUFFER9 0x0424
-#define NPU_REG_SHARED_BUFFER10 0x0428
-#define NPU_REG_SHARED_BUFFER11 0x042C
-#define NPU_REG_SHARED_BUFFER12 0x0430
-#define NPU_REG_SHARED_BUFFER13 0x0434
-#define NPU_REG_SHARED_BUFFER14 0x0438
-#define NPU_REG_SHARED_BUFFER15 0x043C
-#define NPU_REG_SHARED_BUFFER16 0x0440
-#define NPU_REG_SHARED_BUFFER17 0x0444
-#define NPU_REG_SHARED_BUFFER18 0x0448
-#define NPU_REG_SHARED_BUFFER19 0x044C
-#define NPU_REG_SHARED_BUFFER20 0x0450
-#define NPU_REG_SHARED_BUFFER21 0x0454
-#define NPU_REG_SHARED_BUFFER22 0x0458
-#define NPU_REG_SHARED_BUFFER23 0x045C
-#define NPU_REG_SHARED_BUFFER24 0x0460
-#define NPU_REG_SHARED_BUFFER25 0x0464
-#define NPU_REG_SHARED_BUFFER26 0x0468
-#define NPU_REG_SHARED_BUFFER27 0x046C
-#define NPU_REG_SHARED_BUFFER28 0x0470
-#define NPU_REG_SHARED_BUFFER29 0x0474
-#define NPU_REG_SHARED_BUFFER30 0x0478
-#define NPU_REG_SHARED_BUFFER31 0x047C
-#define NPU_REG_SHARED_BUFFER32 0x0480
-#define NPU_REG_SHARED_BUFFER33 0x0484
-#define NPU_REG_SHARED_BUFFER34 0x0488
-#define NPU_REG_SHARED_BUFFER35 0x048C
-#define NPU_REG_SHARED_BUFFER36 0x0490
-#define NPU_REG_SHARED_BUFFER37 0x0494
-#define NPU_REG_SHARED_BUFFER38 0x0498
-#define NPU_REG_SHARED_BUFFER39 0x049C
-#define NPU_REG_SHARED_BUFFER40 0x04A0
-#define NPU_REG_SHARED_BUFFER41 0x04A4
-#define NPU_REG_SHARED_BUFFER42 0x04A8
-#define NPU_REG_SHARED_BUFFER43 0x04AC
-#define NPU_REG_SHARED_BUFFER44 0x04B0
-#define NPU_REG_SHARED_BUFFER45 0x04B4
-#define NPU_REG_SHARED_BUFFER46 0x04B8
-#define NPU_REG_SHARED_BUFFER47 0x04BC
-#define NPU_REG_SHARED_BUFFER48 0x04C0
-#define NPU_REG_SHARED_BUFFER49 0x04C4
-#define NPU_REG_SHARED_BUFFER50 0x04C8
-#define NPU_REG_SHARED_BUFFER51 0x04CC
-#define NPU_REG_SHARED_BUFFER52 0x04D0
-#define NPU_REG_SHARED_BUFFER53 0x04D4
-#define NPU_REG_SHARED_BUFFER54 0x04D8
-#define NPU_REG_SHARED_BUFFER55 0x04DC
-#define NPU_REG_SHARED_BUFFER56 0x04E0
-#define NPU_REG_SHARED_BUFFER57 0x04E4
-#define NPU_REG_SHARED_BUFFER58 0x04E8
-#define NPU_REG_SHARED_BUFFER59 0x04EC
-#define NPU_REG_SHARED_BUFFER60 0x04F0
-#define NPU_REG_SHARED_BUFFER61 0x04F4
-#define NPU_REG_SHARED_BUFFER62 0x04F8
-#define NPU_REG_SHARED_BUFFER63 0x04FC
-#define NPU_REG_SHARED_BUFFER64 0x0500
-#define NPU_REG_SHARED_BUFFER65 0x0504
-#define NPU_REG_SHARED_BUFFER66 0x0508
-#define NPU_REG_SHARED_BUFFER67 0x050C
-#define NPU_REG_SHARED_BUFFER68 0x0510
-#define NPU_REG_SHARED_BUFFER69 0x0514
-#define NPU_REG_SHARED_BUFFER70 0x0518
-#define NPU_REG_SHARED_BUFFER71 0x051C
-#define NPU_REG_SHARED_BUFFER72 0x0520
-#define NPU_REG_SHARED_BUFFER73 0x0524
-#define NPU_REG_SHARED_BUFFER74 0x0528
-#define NPU_REG_SHARED_BUFFER75 0x052C
-#define NPU_REG_SHARED_BUFFER76 0x0530
-#define NPU_REG_SHARED_BUFFER77 0x0534
-#define NPU_REG_SHARED_BUFFER78 0x0538
-#define NPU_REG_SHARED_BUFFER79 0x053C
-#define NPU_REG_SHARED_BUFFER80 0x0540
-#define NPU_REG_SHARED_BUFFER81 0x0544
-#define NPU_REG_SHARED_BUFFER82 0x0548
-#define NPU_REG_SHARED_BUFFER83 0x054C
-#define NPU_REG_SHARED_BUFFER84 0x0550
-#define NPU_REG_SHARED_BUFFER85 0x0554
-#define NPU_REG_SHARED_BUFFER86 0x0558
-#define NPU_REG_SHARED_BUFFER87 0x055C
-#define NPU_REG_SHARED_BUFFER88 0x0560
-#define NPU_REG_SHARED_BUFFER89 0x0564
-#define NPU_REG_SHARED_BUFFER90 0x0568
-#define NPU_REG_SHARED_BUFFER91 0x056C
-#define NPU_REG_SHARED_BUFFER92 0x0570
-#define NPU_REG_SHARED_BUFFER93 0x0574
-#define NPU_REG_SHARED_BUFFER94 0x0578
-#define NPU_REG_SHARED_BUFFER95 0x057C
-#define NPU_REG_SHARED_BUFFER96 0x0580
-#define NPU_REG_SHARED_BUFFER97 0x0584
-#define NPU_REG_SHARED_BUFFER98 0x0588
-#define NPU_REG_SHARED_BUFFER99 0x058C
-#define NPU_REG_SHARED_BUFFER100 0x0590
-#define NPU_REG_SHARED_BUFFER101 0x0594
-#define NPU_REG_SHARED_BUFFER102 0x0598
-#define NPU_REG_SHARED_BUFFER103 0x059C
-#define NPU_REG_SHARED_BUFFER104 0x05A0
-#define NPU_REG_SHARED_BUFFER105 0x05A4
-#define NPU_REG_SHARED_BUFFER106 0x05A8
-#define NPU_REG_SHARED_BUFFER107 0x05AC
-#define NPU_REG_SHARED_BUFFER108 0x05B0
-#define NPU_REG_SHARED_BUFFER109 0x05B4
-#define NPU_REG_SHARED_BUFFER110 0x05B8
-#define NPU_REG_SHARED_BUFFER111 0x05BC
-#define NPU_REG_SHARED_BUFFER112 0x05C0
-#define NPU_REG_SHARED_BUFFER113 0x05C4
-#define NPU_REG_SHARED_BUFFER114 0x05C8
-#define NPU_REG_SHARED_BUFFER115 0x05CC
-#define NPU_REG_SHARED_BUFFER116 0x05D0
-#define NPU_REG_SHARED_BUFFER117 0x05D4
-#define NPU_REG_SHARED_BUFFER118 0x05D8
-#define NPU_REG_SHARED_BUFFER119 0x05DC
-#define NPU_REG_SHARED_BUFFER120 0x05E0
-#define NPU_REG_SHARED_BUFFER121 0x05E4
-#define NPU_REG_SHARED_BUFFER122 0x05E8
-#define NPU_REG_SHARED_BUFFER123 0x05EC
-#define NPU_REG_SHARED_BUFFER124 0x05F0
-#define NPU_REG_SHARED_BUFFER125 0x05F4
-#define NPU_REG_SHARED_BUFFER126 0x05F8
-#define NPU_REG_SHARED_BUFFER127 0x05FC
-#define NPU_REG_SHARED_BUFFER128 0x0600
-#define NPU_REG_SHARED_BUFFER129 0x0604
-#define NPU_REG_SHARED_BUFFER130 0x0608
-#define NPU_REG_SHARED_BUFFER131 0x060C
-#define NPU_REG_SHARED_BUFFER132 0x0610
-#define NPU_REG_SHARED_BUFFER133 0x0614
-#define NPU_REG_SHARED_BUFFER134 0x0618
-#define NPU_REG_SHARED_BUFFER135 0x061C
-#define NPU_REG_SHARED_BUFFER136 0x0620
-#define NPU_REG_SHARED_BUFFER137 0x0624
-#define NPU_REG_SHARED_BUFFER138 0x0628
-#define NPU_REG_SHARED_BUFFER139 0x062C
-#define NPU_REG_SHARED_BUFFER140 0x0630
-#define NPU_REG_SHARED_BUFFER141 0x0634
-#define NPU_REG_SHARED_BUFFER142 0x0638
-#define NPU_REG_SHARED_BUFFER143 0x063C
-#define NPU_REG_SHARED_BUFFER144 0x0640
-#define NPU_REG_SHARED_BUFFER145 0x0644
-#define NPU_REG_SHARED_BUFFER146 0x0648
-#define NPU_REG_SHARED_BUFFER147 0x064C
-#define NPU_REG_SHARED_BUFFER148 0x0650
-#define NPU_REG_SHARED_BUFFER149 0x0654
-#define NPU_REG_SHARED_BUFFER150 0x0658
-#define NPU_REG_SHARED_BUFFER151 0x065C
-#define NPU_REG_SHARED_BUFFER152 0x0660
-#define NPU_REG_SHARED_BUFFER153 0x0664
-#define NPU_REG_SHARED_BUFFER154 0x0668
-#define NPU_REG_SHARED_BUFFER155 0x066C
-#define NPU_REG_SHARED_BUFFER156 0x0670
-#define NPU_REG_SHARED_BUFFER157 0x0674
-#define NPU_REG_SHARED_BUFFER158 0x0678
-#define NPU_REG_SHARED_BUFFER159 0x067C
-#define NPU_REG_SHARED_BUFFER160 0x0680
-#define NPU_REG_SHARED_BUFFER161 0x0684
-#define NPU_REG_SHARED_BUFFER162 0x0688
-#define NPU_REG_SHARED_BUFFER163 0x068C
-#define NPU_REG_SHARED_BUFFER164 0x0690
-#define NPU_REG_SHARED_BUFFER165 0x0694
-#define NPU_REG_SHARED_BUFFER166 0x0698
-#define NPU_REG_SHARED_BUFFER167 0x069C
-#define NPU_REG_SHARED_BUFFER168 0x06A0
-#define NPU_REG_SHARED_BUFFER169 0x06A4
-#define NPU_REG_SHARED_BUFFER170 0x06A8
-#define NPU_REG_SHARED_BUFFER171 0x06AC
-#define NPU_REG_SHARED_BUFFER172 0x06B0
-#define NPU_REG_SHARED_BUFFER173 0x06B4
-#define NPU_REG_SHARED_BUFFER174 0x06B8
-#define NPU_REG_SHARED_BUFFER175 0x06BC
-#define NPU_REG_SHARED_BUFFER176 0x06C0
-#define NPU_REG_SHARED_BUFFER177 0x06C4
-#define NPU_REG_SHARED_BUFFER178 0x06C8
-#define NPU_REG_SHARED_BUFFER179 0x06CC
-#define NPU_REG_SHARED_BUFFER180 0x06D0
-#define NPU_REG_SHARED_BUFFER181 0x06D4
-#define NPU_REG_SHARED_BUFFER182 0x06D8
-#define NPU_REG_SHARED_BUFFER183 0x06DC
-#define NPU_REG_SHARED_BUFFER184 0x06E0
-#define NPU_REG_SHARED_BUFFER185 0x06E4
-#define NPU_REG_SHARED_BUFFER186 0x06E8
-#define NPU_REG_SHARED_BUFFER187 0x06EC
-#define NPU_REG_SHARED_BUFFER188 0x06F0
-#define NPU_REG_SHARED_BUFFER189 0x06F4
-#define NPU_REG_SHARED_BUFFER190 0x06F8
-#define NPU_REG_SHARED_BUFFER191 0x06FC
-#define NPU_REG_SHARED_BUFFER192 0x0700
-#define NPU_REG_SHARED_BUFFER193 0x0704
-#define NPU_REG_SHARED_BUFFER194 0x0708
-#define NPU_REG_SHARED_BUFFER195 0x070C
-#define NPU_REG_SHARED_BUFFER196 0x0710
-#define NPU_REG_SHARED_BUFFER197 0x0714
-#define NPU_REG_SHARED_BUFFER198 0x0718
-#define NPU_REG_SHARED_BUFFER199 0x071C
-#define NPU_REG_SHARED_BUFFER200 0x0720
-#define NPU_REG_SHARED_BUFFER201 0x0724
-#define NPU_REG_SHARED_BUFFER202 0x0728
-#define NPU_REG_SHARED_BUFFER203 0x072C
-#define NPU_REG_SHARED_BUFFER204 0x0730
-#define NPU_REG_SHARED_BUFFER205 0x0734
-#define NPU_REG_SHARED_BUFFER206 0x0738
-#define NPU_REG_SHARED_BUFFER207 0x073C
-#define NPU_REG_SHARED_BUFFER208 0x0740
-#define NPU_REG_SHARED_BUFFER209 0x0744
-#define NPU_REG_SHARED_BUFFER210 0x0748
-#define NPU_REG_SHARED_BUFFER211 0x074C
-#define NPU_REG_SHARED_BUFFER212 0x0750
-#define NPU_REG_SHARED_BUFFER213 0x0754
-#define NPU_REG_SHARED_BUFFER214 0x0758
-#define NPU_REG_SHARED_BUFFER215 0x075C
-#define NPU_REG_SHARED_BUFFER216 0x0760
-#define NPU_REG_SHARED_BUFFER217 0x0764
-#define NPU_REG_SHARED_BUFFER218 0x0768
-#define NPU_REG_SHARED_BUFFER219 0x076C
-#define NPU_REG_SHARED_BUFFER220 0x0770
-#define NPU_REG_SHARED_BUFFER221 0x0774
-#define NPU_REG_SHARED_BUFFER222 0x0778
-#define NPU_REG_SHARED_BUFFER223 0x077C
-#define NPU_REG_SHARED_BUFFER224 0x0780
-#define NPU_REG_SHARED_BUFFER225 0x0784
-#define NPU_REG_SHARED_BUFFER226 0x0788
-#define NPU_REG_SHARED_BUFFER227 0x078C
-#define NPU_REG_SHARED_BUFFER228 0x0790
-#define NPU_REG_SHARED_BUFFER229 0x0794
-#define NPU_REG_SHARED_BUFFER230 0x0798
-#define NPU_REG_SHARED_BUFFER231 0x079C
-#define NPU_REG_SHARED_BUFFER232 0x07A0
-#define NPU_REG_SHARED_BUFFER233 0x07A4
-#define NPU_REG_SHARED_BUFFER234 0x07A8
-#define NPU_REG_SHARED_BUFFER235 0x07AC
-#define NPU_REG_SHARED_BUFFER236 0x07B0
-#define NPU_REG_SHARED_BUFFER237 0x07B4
-#define NPU_REG_SHARED_BUFFER238 0x07B8
-#define NPU_REG_SHARED_BUFFER239 0x07BC
-#define NPU_REG_SHARED_BUFFER240 0x07C0
-#define NPU_REG_SHARED_BUFFER241 0x07C4
-#define NPU_REG_SHARED_BUFFER242 0x07C8
-#define NPU_REG_SHARED_BUFFER243 0x07CC
-#define NPU_REG_SHARED_BUFFER244 0x07D0
-#define NPU_REG_SHARED_BUFFER245 0x07D4
-#define NPU_REG_SHARED_BUFFER246 0x07D8
-#define NPU_REG_SHARED_BUFFER247 0x07DC
-#define NPU_REG_SHARED_BUFFER248 0x07E0
-#define NPU_REG_SHARED_BUFFER249 0x07E4
-#define NPU_REG_SHARED_BUFFER250 0x07E8
-#define NPU_REG_SHARED_BUFFER251 0x07EC
-#define NPU_REG_SHARED_BUFFER252 0x07F0
-#define NPU_REG_SHARED_BUFFER253 0x07F4
-#define NPU_REG_SHARED_BUFFER254 0x07F8
-#define NPU_REG_SHARED_BUFFER255 0x07FC
-#define SHARED_BUFFER_REGISTERS_SIZE 0x0800
-
-//
-// Register subpage TSU
-//
-#define NPU_REG_IFM_PAD_TOP 0x0800
-#define NPU_REG_IFM_PAD_LEFT 0x0804
-#define NPU_REG_IFM_PAD_RIGHT 0x0808
-#define NPU_REG_IFM_PAD_BOTTOM 0x080C
-#define NPU_REG_IFM_DEPTH_M1 0x0810
-#define NPU_REG_IFM_PRECISION 0x0814
-#define NPU_REG_IFM_UPSCALE 0x081C
-#define NPU_REG_IFM_ZERO_POINT 0x0824
-#define NPU_REG_IFM_WIDTH0_M1 0x0828
-#define NPU_REG_IFM_HEIGHT0_M1 0x082C
-#define NPU_REG_IFM_HEIGHT1_M1 0x0830
-#define NPU_REG_IFM_IB_END 0x0834
-#define NPU_REG_IFM_REGION 0x083C
-#define NPU_REG_OFM_WIDTH_M1 0x0844
-#define NPU_REG_OFM_HEIGHT_M1 0x0848
-#define NPU_REG_OFM_DEPTH_M1 0x084C
-#define NPU_REG_OFM_PRECISION 0x0850
-#define NPU_REG_OFM_BLK_WIDTH_M1 0x0854
-#define NPU_REG_OFM_BLK_HEIGHT_M1 0x0858
-#define NPU_REG_OFM_BLK_DEPTH_M1 0x085C
-#define NPU_REG_OFM_ZERO_POINT 0x0860
-#define NPU_REG_OFM_WIDTH0_M1 0x0868
-#define NPU_REG_OFM_HEIGHT0_M1 0x086C
-#define NPU_REG_OFM_HEIGHT1_M1 0x0870
-#define NPU_REG_OFM_REGION 0x087C
-#define NPU_REG_KERNEL_WIDTH_M1 0x0880
-#define NPU_REG_KERNEL_HEIGHT_M1 0x0884
-#define NPU_REG_KERNEL_STRIDE 0x0888
-#define NPU_REG_PARALLEL_MODE 0x088C
-#define NPU_REG_ACC_FORMAT 0x0890
-#define NPU_REG_ACTIVATION 0x0894
-#define NPU_REG_ACTIVATION_MIN 0x0898
-#define NPU_REG_ACTIVATION_MAX 0x089C
-#define NPU_REG_WEIGHT_REGION 0x08A0
-#define NPU_REG_SCALE_REGION 0x08A4
-#define NPU_REG_AB_START 0x08B4
-#define NPU_REG_BLOCKDEP 0x08BC
-#define NPU_REG_DMA0_SRC_REGION 0x08C0
-#define NPU_REG_DMA0_DST_REGION 0x08C4
-#define NPU_REG_DMA0_SIZE0 0x08C8
-#define NPU_REG_DMA0_SIZE1 0x08CC
-#define NPU_REG_IFM2_BROADCAST 0x0900
-#define NPU_REG_IFM2_SCALAR 0x0904
-#define NPU_REG_IFM2_PRECISION 0x0914
-#define NPU_REG_IFM2_ZERO_POINT 0x0924
-#define NPU_REG_IFM2_WIDTH0_M1 0x0928
-#define NPU_REG_IFM2_HEIGHT0_M1 0x092C
-#define NPU_REG_IFM2_HEIGHT1_M1 0x0930
-#define NPU_REG_IFM2_IB_START 0x0934
-#define NPU_REG_IFM2_REGION 0x093C
-#define NPU_REG_IFM_BASE0 0x0A00
-#define NPU_REG_IFM_BASE0_HI 0x0A04
-#define NPU_REG_IFM_BASE1 0x0A08
-#define NPU_REG_IFM_BASE1_HI 0x0A0C
-#define NPU_REG_IFM_BASE2 0x0A10
-#define NPU_REG_IFM_BASE2_HI 0x0A14
-#define NPU_REG_IFM_BASE3 0x0A18
-#define NPU_REG_IFM_BASE3_HI 0x0A1C
-#define NPU_REG_IFM_STRIDE_X 0x0A20
-#define NPU_REG_IFM_STRIDE_X_HI 0x0A24
-#define NPU_REG_IFM_STRIDE_Y 0x0A28
-#define NPU_REG_IFM_STRIDE_Y_HI 0x0A2C
-#define NPU_REG_IFM_STRIDE_C 0x0A30
-#define NPU_REG_IFM_STRIDE_C_HI 0x0A34
-#define NPU_REG_OFM_BASE0 0x0A40
-#define NPU_REG_OFM_BASE0_HI 0x0A44
-#define NPU_REG_OFM_BASE1 0x0A48
-#define NPU_REG_OFM_BASE1_HI 0x0A4C
-#define NPU_REG_OFM_BASE2 0x0A50
-#define NPU_REG_OFM_BASE2_HI 0x0A54
-#define NPU_REG_OFM_BASE3 0x0A58
-#define NPU_REG_OFM_BASE3_HI 0x0A5C
-#define NPU_REG_OFM_STRIDE_X 0x0A60
-#define NPU_REG_OFM_STRIDE_X_HI 0x0A64
-#define NPU_REG_OFM_STRIDE_Y 0x0A68
-#define NPU_REG_OFM_STRIDE_Y_HI 0x0A6C
-#define NPU_REG_OFM_STRIDE_C 0x0A70
-#define NPU_REG_OFM_STRIDE_C_HI 0x0A74
-#define NPU_REG_WEIGHT_BASE 0x0A80
-#define NPU_REG_WEIGHT_BASE_HI 0x0A84
-#define NPU_REG_WEIGHT_LENGTH 0x0A88
-#define NPU_REG_SCALE_BASE 0x0A90
-#define NPU_REG_SCALE_BASE_HI 0x0A94
-#define NPU_REG_SCALE_LENGTH 0x0A98
-#define NPU_REG_OFM_SCALE 0x0AA0
-#define NPU_REG_OFM_SCALE_SHIFT 0x0AA4
-#define NPU_REG_OPA_SCALE 0x0AA8
-#define NPU_REG_OPA_SCALE_SHIFT 0x0AAC
-#define NPU_REG_OPB_SCALE 0x0AB0
-#define NPU_REG_DMA0_SRC 0x0AC0
-#define NPU_REG_DMA0_SRC_HI 0x0AC4
-#define NPU_REG_DMA0_DST 0x0AC8
-#define NPU_REG_DMA0_DST_HI 0x0ACC
-#define NPU_REG_DMA0_LEN 0x0AD0
-#define NPU_REG_DMA0_LEN_HI 0x0AD4
-#define NPU_REG_DMA0_SKIP0 0x0AD8
-#define NPU_REG_DMA0_SKIP0_HI 0x0ADC
-#define NPU_REG_DMA0_SKIP1 0x0AE0
-#define NPU_REG_DMA0_SKIP1_HI 0x0AE4
-#define NPU_REG_IFM2_BASE0 0x0B00
-#define NPU_REG_IFM2_BASE0_HI 0x0B04
-#define NPU_REG_IFM2_BASE1 0x0B08
-#define NPU_REG_IFM2_BASE1_HI 0x0B0C
-#define NPU_REG_IFM2_BASE2 0x0B10
-#define NPU_REG_IFM2_BASE2_HI 0x0B14
-#define NPU_REG_IFM2_BASE3 0x0B18
-#define NPU_REG_IFM2_BASE3_HI 0x0B1C
-#define NPU_REG_IFM2_STRIDE_X 0x0B20
-#define NPU_REG_IFM2_STRIDE_X_HI 0x0B24
-#define NPU_REG_IFM2_STRIDE_Y 0x0B28
-#define NPU_REG_IFM2_STRIDE_Y_HI 0x0B2C
-#define NPU_REG_IFM2_STRIDE_C 0x0B30
-#define NPU_REG_IFM2_STRIDE_C_HI 0x0B34
-#define NPU_REG_WEIGHT1_BASE 0x0B40
-#define NPU_REG_WEIGHT1_BASE_HI 0x0B44
-#define NPU_REG_WEIGHT1_LENGTH 0x0B48
-#define NPU_REG_SCALE1_BASE 0x0B50
-#define NPU_REG_SCALE1_BASE_HI 0x0B54
-#define NPU_REG_SCALE1_LENGTH 0x0B58
-#define TSU_REGISTERS_SIZE 0x0B5C
+#define PMU_REGISTERS_SIZE 0x0200
 
 //
 // Register subpage TSU_DEBUG
@@ -571,47 +162,225 @@
 #define NPU_REG_CURRENT_CMD 0x02BC
 #define TSU_DEBUG_REGISTERS_SIZE 0x02C0
 
+//
+// Register subpage PMU_COUNTERS
+//
+#define NPU_REG_PMEVCNTR_BASE 0x0300
+#define NPU_REG_PMEVCNTR_ARRLEN 0x0004
+#define NPU_REG_PMEVTYPER_BASE 0x0380
+#define NPU_REG_PMEVTYPER_ARRLEN 0x0004
+#define PMU_COUNTERS_REGISTERS_SIZE 0x0400
+
+//
+// Register subpage SHARED_BUFFER
+//
+#define NPU_REG_SHARED_BUFFER_BASE 0x0400
+#define NPU_REG_SHARED_BUFFER_ARRLEN 0x0100
+#define SHARED_BUFFER_REGISTERS_SIZE 0x0800
+
+//
+// Register subpage TSU_IFM
+//
+#define NPU_REG_IFM_PAD_TOP 0x0800
+#define NPU_REG_IFM_PAD_LEFT 0x0804
+#define NPU_REG_IFM_PAD_RIGHT 0x0808
+#define NPU_REG_IFM_PAD_BOTTOM 0x080C
+#define NPU_REG_IFM_DEPTH_M1 0x0810
+#define NPU_REG_IFM_PRECISION 0x0814
+#define NPU_REG_IFM_UPSCALE 0x081C
+#define NPU_REG_IFM_ZERO_POINT 0x0824
+#define NPU_REG_IFM_WIDTH0_M1 0x0828
+#define NPU_REG_IFM_HEIGHT0_M1 0x082C
+#define NPU_REG_IFM_HEIGHT1_M1 0x0830
+#define NPU_REG_IFM_IB_END 0x0834
+#define NPU_REG_IFM_REGION 0x083C
+#define TSU_IFM_REGISTERS_SIZE 0x0840
+
+//
+// Register subpage TSU_OFM
+//
+#define NPU_REG_OFM_WIDTH_M1 0x0844
+#define NPU_REG_OFM_HEIGHT_M1 0x0848
+#define NPU_REG_OFM_DEPTH_M1 0x084C
+#define NPU_REG_OFM_PRECISION 0x0850
+#define NPU_REG_OFM_BLK_WIDTH_M1 0x0854
+#define NPU_REG_OFM_BLK_HEIGHT_M1 0x0858
+#define NPU_REG_OFM_BLK_DEPTH_M1 0x085C
+#define NPU_REG_OFM_ZERO_POINT 0x0860
+#define NPU_REG_OFM_WIDTH0_M1 0x0868
+#define NPU_REG_OFM_HEIGHT0_M1 0x086C
+#define NPU_REG_OFM_HEIGHT1_M1 0x0870
+#define NPU_REG_OFM_REGION 0x087C
+#define TSU_OFM_REGISTERS_SIZE 0x0880
+
+//
+// Register subpage TSU_KERNEL
+//
+#define NPU_REG_KERNEL_WIDTH_M1 0x0880
+#define NPU_REG_KERNEL_HEIGHT_M1 0x0884
+#define NPU_REG_KERNEL_STRIDE 0x0888
+#define NPU_REG_ACC_FORMAT 0x0890
+#define NPU_REG_ACTIVATION 0x0894
+#define NPU_REG_ACTIVATION_MIN 0x0898
+#define NPU_REG_ACTIVATION_MAX 0x089C
+#define NPU_REG_WEIGHT_REGION 0x08A0
+#define NPU_REG_SCALE_REGION 0x08A4
+#define NPU_REG_AB_START 0x08B4
+#define NPU_REG_BLOCKDEP 0x08BC
+#define TSU_KERNEL_REGISTERS_SIZE 0x08C0
+
+//
+// Register subpage TSU_DMA
+//
+#define NPU_REG_DMA0_SRC_REGION 0x08C0
+#define NPU_REG_DMA0_DST_REGION 0x08C4
+#define NPU_REG_DMA0_SIZE0 0x08C8
+#define NPU_REG_DMA0_SIZE1 0x08CC
+#define TSU_DMA_REGISTERS_SIZE 0x0900
+
+//
+// Register subpage TSU_IFM2
+//
+#define NPU_REG_IFM2_BROADCAST 0x0900
+#define NPU_REG_IFM2_SCALAR 0x0904
+#define NPU_REG_IFM2_PRECISION 0x0914
+#define NPU_REG_IFM2_ZERO_POINT 0x0924
+#define NPU_REG_IFM2_WIDTH0_M1 0x0928
+#define NPU_REG_IFM2_HEIGHT0_M1 0x092C
+#define NPU_REG_IFM2_HEIGHT1_M1 0x0930
+#define NPU_REG_IFM2_IB_START 0x0934
+#define NPU_REG_IFM2_REGION 0x093C
+#define TSU_IFM2_REGISTERS_SIZE 0x0940
+
+//
+// Register subpage TSU_IFM_BASE
+//
+#define NPU_REG_IFM_BASE0 0x0A00
+#define NPU_REG_IFM_BASE0_HI 0x0A04
+#define NPU_REG_IFM_BASE1 0x0A08
+#define NPU_REG_IFM_BASE1_HI 0x0A0C
+#define NPU_REG_IFM_BASE2 0x0A10
+#define NPU_REG_IFM_BASE2_HI 0x0A14
+#define NPU_REG_IFM_BASE3 0x0A18
+#define NPU_REG_IFM_BASE3_HI 0x0A1C
+#define NPU_REG_IFM_STRIDE_X 0x0A20
+#define NPU_REG_IFM_STRIDE_X_HI 0x0A24
+#define NPU_REG_IFM_STRIDE_Y 0x0A28
+#define NPU_REG_IFM_STRIDE_Y_HI 0x0A2C
+#define NPU_REG_IFM_STRIDE_C 0x0A30
+#define NPU_REG_IFM_STRIDE_C_HI 0x0A34
+#define TSU_IFM_BASE_REGISTERS_SIZE 0x0A40
+
+//
+// Register subpage TSU_OFM_BASE
+//
+#define NPU_REG_OFM_BASE0 0x0A40
+#define NPU_REG_OFM_BASE0_HI 0x0A44
+#define NPU_REG_OFM_BASE1 0x0A48
+#define NPU_REG_OFM_BASE1_HI 0x0A4C
+#define NPU_REG_OFM_BASE2 0x0A50
+#define NPU_REG_OFM_BASE2_HI 0x0A54
+#define NPU_REG_OFM_BASE3 0x0A58
+#define NPU_REG_OFM_BASE3_HI 0x0A5C
+#define NPU_REG_OFM_STRIDE_X 0x0A60
+#define NPU_REG_OFM_STRIDE_X_HI 0x0A64
+#define NPU_REG_OFM_STRIDE_Y 0x0A68
+#define NPU_REG_OFM_STRIDE_Y_HI 0x0A6C
+#define NPU_REG_OFM_STRIDE_C 0x0A70
+#define NPU_REG_OFM_STRIDE_C_HI 0x0A74
+#define TSU_OFM_BASE_REGISTERS_SIZE 0x0A80
+
+//
+// Register subpage TSU_WS_BASE
+//
+#define NPU_REG_WEIGHT_BASE 0x0A80
+#define NPU_REG_WEIGHT_BASE_HI 0x0A84
+#define NPU_REG_WEIGHT_LENGTH 0x0A88
+#define NPU_REG_SCALE_BASE 0x0A90
+#define NPU_REG_SCALE_BASE_HI 0x0A94
+#define NPU_REG_SCALE_LENGTH 0x0A98
+#define NPU_REG_OFM_SCALE 0x0AA0
+#define NPU_REG_OFM_SCALE_SHIFT 0x0AA4
+#define NPU_REG_OPA_SCALE 0x0AA8
+#define NPU_REG_OPA_SCALE_SHIFT 0x0AAC
+#define NPU_REG_OPB_SCALE 0x0AB0
+#define TSU_WS_BASE_REGISTERS_SIZE 0x0AC0
+
+//
+// Register subpage TSU_DMA_BASE
+//
+#define NPU_REG_DMA0_SRC 0x0AC0
+#define NPU_REG_DMA0_SRC_HI 0x0AC4
+#define NPU_REG_DMA0_DST 0x0AC8
+#define NPU_REG_DMA0_DST_HI 0x0ACC
+#define NPU_REG_DMA0_LEN 0x0AD0
+#define NPU_REG_DMA0_LEN_HI 0x0AD4
+#define TSU_DMA_BASE_REGISTERS_SIZE 0x0B00
+
+//
+// Register subpage TSU_IFM2_BASE
+//
+#define NPU_REG_IFM2_BASE0 0x0B00
+#define NPU_REG_IFM2_BASE0_HI 0x0B04
+#define NPU_REG_IFM2_BASE1 0x0B08
+#define NPU_REG_IFM2_BASE1_HI 0x0B0C
+#define NPU_REG_IFM2_BASE2 0x0B10
+#define NPU_REG_IFM2_BASE2_HI 0x0B14
+#define NPU_REG_IFM2_BASE3 0x0B18
+#define NPU_REG_IFM2_BASE3_HI 0x0B1C
+#define NPU_REG_IFM2_STRIDE_X 0x0B20
+#define NPU_REG_IFM2_STRIDE_X_HI 0x0B24
+#define NPU_REG_IFM2_STRIDE_Y 0x0B28
+#define NPU_REG_IFM2_STRIDE_Y_HI 0x0B2C
+#define NPU_REG_IFM2_STRIDE_C 0x0B30
+#define NPU_REG_IFM2_STRIDE_C_HI 0x0B34
+#define TSU_IFM2_BASE_REGISTERS_SIZE 0x0B40
+
+//
+// Register subpage TSU_WS1_BASE
+//
+#define TSU_WS1_BASE_REGISTERS_SIZE 0x0B80
+
+//
+// Register subpage TSU_USER_BASE
+//
+#define NPU_REG_USER_DEFINED_BASE 0x0B80
+#define NPU_REG_USER_DEFINED_ARRLEN 0x0008
+#define TSU_USER_BASE_REGISTERS_SIZE 0x0BC0
+
+//
+// Register subpage TSU_DMA_EBASE
+//
+#define TSU_DMA_EBASE_REGISTERS_SIZE 0x0C00
+
+//
+// Register subpage ID
+//
+#define NPU_REG_REVISION 0x0FC0
+#define NPU_REG_PID4 0x0FD0
+#define NPU_REG_PID5 0x0FD4
+#define NPU_REG_PID6 0x0FD8
+#define NPU_REG_PID7 0x0FDC
+#define NPU_REG_PID0 0x0FE0
+#define NPU_REG_PID1 0x0FE4
+#define NPU_REG_PID2 0x0FE8
+#define NPU_REG_PID3 0x0FEC
+#define NPU_REG_CID0 0x0FF0
+#define NPU_REG_CID1 0x0FF4
+#define NPU_REG_CID2 0x0FF8
+#define NPU_REG_CID3 0x0FFC
+#define ID_REGISTERS_SIZE 0x1000
+
 #ifdef __cplusplus
-
 // Enum types
-
-enum class acc_format : uint16_t
+enum class acc_format : uint8_t
 {
-    INT_32BIT = 0,
-    INT_40BIT = 1,
-    FP_S5_10  = 2,
+    I32 = 0,
+    I40 = 1,
+    F16 = 2,
 };
 
-enum class activation : uint16_t
-{
-    NONE      = 0,
-    TANH      = 3,
-    SIGMOID   = 4,
-    LUT_START = 16,
-    LUT_END   = 23,
-};
-
-enum class axi_mem_encoding_type : uint8_t
-{
-    DEVICE_NON_BUFFERABLE                 = 0x0,
-    DEVICE_BUFFERABLE                     = 0x1,
-    NORMAL_NON_CACHEABLE_NON_BUFFERABLE   = 0x2,
-    NORMAL_NON_CACHEABLE_BUFFERABLE       = 0x3,
-    WRITE_THROUGH_NO_ALLOCATE             = 0x4,
-    WRITE_THROUGH_READ_ALLOCATE           = 0x5,
-    WRITE_THROUGH_WRITE_ALLOCATE          = 0x6,
-    WRITE_THROUGH_READ_AND_WRITE_ALLOCATE = 0x7,
-    WRITE_BACK_NO_ALLOCATE                = 0x8,
-    WRITE_BACK_READ_ALLOCATE              = 0x9,
-    WRITE_BACK_WRITE_ALLOCATE             = 0xA,
-    WRITE_BACK_READ_AND_WRITE_ALLOCATE    = 0xB,
-    RESERVED_12                           = 0xC,
-    RESERVED_13                           = 0xD,
-    RESERVED_14                           = 0xE,
-    RESERVED_15                           = 0xF,
-};
-
-enum class clip_range : uint8_t
+enum class activation_clip_range : uint8_t
 {
     OFM_PRECISION = 0,
     FORCE_UINT8   = 2,
@@ -619,118 +388,205 @@
     FORCE_INT16   = 5,
 };
 
-enum class cmd0 : uint16_t
-{
-    NPU_OP_STOP               = 0x000,
-    NPU_OP_IRQ                = 0x001,
-    NPU_OP_CONV               = 0x002,
-    NPU_OP_DEPTHWISE          = 0x003,
-    NPU_OP_POOL               = 0x005,
-    NPU_OP_ELEMENTWISE        = 0x006,
-    NPU_OP_DMA_START          = 0x010,
-    NPU_OP_DMA_WAIT           = 0x011,
-    NPU_OP_KERNEL_WAIT        = 0x012,
-    NPU_OP_PMU_MASK           = 0x013,
-    NPU_SET_IFM_PAD_TOP       = 0x100,
-    NPU_SET_IFM_PAD_LEFT      = 0x101,
-    NPU_SET_IFM_PAD_RIGHT     = 0x102,
-    NPU_SET_IFM_PAD_BOTTOM    = 0x103,
-    NPU_SET_IFM_DEPTH_M1      = 0x104,
-    NPU_SET_IFM_PRECISION     = 0x105,
-    NPU_SET_IFM_UPSCALE       = 0x107,
-    NPU_SET_IFM_ZERO_POINT    = 0x109,
-    NPU_SET_IFM_WIDTH0_M1     = 0x10A,
-    NPU_SET_IFM_HEIGHT0_M1    = 0x10B,
-    NPU_SET_IFM_HEIGHT1_M1    = 0x10C,
-    NPU_SET_IFM_IB_END        = 0x10D,
-    NPU_SET_IFM_REGION        = 0x10F,
-    NPU_SET_OFM_WIDTH_M1      = 0x111,
-    NPU_SET_OFM_HEIGHT_M1     = 0x112,
-    NPU_SET_OFM_DEPTH_M1      = 0x113,
-    NPU_SET_OFM_PRECISION     = 0x114,
-    NPU_SET_OFM_BLK_WIDTH_M1  = 0x115,
-    NPU_SET_OFM_BLK_HEIGHT_M1 = 0x116,
-    NPU_SET_OFM_BLK_DEPTH_M1  = 0x117,
-    NPU_SET_OFM_ZERO_POINT    = 0x118,
-    NPU_SET_OFM_WIDTH0_M1     = 0x11A,
-    NPU_SET_OFM_HEIGHT0_M1    = 0x11B,
-    NPU_SET_OFM_HEIGHT1_M1    = 0x11C,
-    NPU_SET_OFM_REGION        = 0x11F,
-    NPU_SET_KERNEL_WIDTH_M1   = 0x120,
-    NPU_SET_KERNEL_HEIGHT_M1  = 0x121,
-    NPU_SET_KERNEL_STRIDE     = 0x122,
-    NPU_SET_PARALLEL_MODE     = 0x123,
-    NPU_SET_ACC_FORMAT        = 0x124,
-    NPU_SET_ACTIVATION        = 0x125,
-    NPU_SET_ACTIVATION_MIN    = 0x126,
-    NPU_SET_ACTIVATION_MAX    = 0x127,
-    NPU_SET_WEIGHT_REGION     = 0x128,
-    NPU_SET_SCALE_REGION      = 0x129,
-    NPU_SET_AB_START          = 0x12D,
-    NPU_SET_BLOCKDEP          = 0x12F,
-    NPU_SET_DMA0_SRC_REGION   = 0x130,
-    NPU_SET_DMA0_DST_REGION   = 0x131,
-    NPU_SET_DMA0_SIZE0        = 0x132,
-    NPU_SET_DMA0_SIZE1        = 0x133,
-    NPU_SET_IFM2_BROADCAST    = 0x180,
-    NPU_SET_IFM2_SCALAR       = 0x181,
-    NPU_SET_IFM2_PRECISION    = 0x185,
-    NPU_SET_IFM2_ZERO_POINT   = 0x189,
-    NPU_SET_IFM2_WIDTH0_M1    = 0x18A,
-    NPU_SET_IFM2_HEIGHT0_M1   = 0x18B,
-    NPU_SET_IFM2_HEIGHT1_M1   = 0x18C,
-    NPU_SET_IFM2_IB_START     = 0x18D,
-    NPU_SET_IFM2_REGION       = 0x18F,
-};
-
-enum class cmd1 : uint16_t
-{
-    NPU_SET_IFM_BASE0      = 0x000,
-    NPU_SET_IFM_BASE1      = 0x001,
-    NPU_SET_IFM_BASE2      = 0x002,
-    NPU_SET_IFM_BASE3      = 0x003,
-    NPU_SET_IFM_STRIDE_X   = 0x004,
-    NPU_SET_IFM_STRIDE_Y   = 0x005,
-    NPU_SET_IFM_STRIDE_C   = 0x006,
-    NPU_SET_OFM_BASE0      = 0x010,
-    NPU_SET_OFM_BASE1      = 0x011,
-    NPU_SET_OFM_BASE2      = 0x012,
-    NPU_SET_OFM_BASE3      = 0x013,
-    NPU_SET_OFM_STRIDE_X   = 0x014,
-    NPU_SET_OFM_STRIDE_Y   = 0x015,
-    NPU_SET_OFM_STRIDE_C   = 0x016,
-    NPU_SET_WEIGHT_BASE    = 0x020,
-    NPU_SET_WEIGHT_LENGTH  = 0x021,
-    NPU_SET_SCALE_BASE     = 0x022,
-    NPU_SET_SCALE_LENGTH   = 0x023,
-    NPU_SET_OFM_SCALE      = 0x024,
-    NPU_SET_OPA_SCALE      = 0x025,
-    NPU_SET_OPB_SCALE      = 0x026,
-    NPU_SET_DMA0_SRC       = 0x030,
-    NPU_SET_DMA0_DST       = 0x031,
-    NPU_SET_DMA0_LEN       = 0x032,
-    NPU_SET_DMA0_SKIP0     = 0x033,
-    NPU_SET_DMA0_SKIP1     = 0x034,
-    NPU_SET_IFM2_BASE0     = 0x080,
-    NPU_SET_IFM2_BASE1     = 0x081,
-    NPU_SET_IFM2_BASE2     = 0x082,
-    NPU_SET_IFM2_BASE3     = 0x083,
-    NPU_SET_IFM2_STRIDE_X  = 0x084,
-    NPU_SET_IFM2_STRIDE_Y  = 0x085,
-    NPU_SET_IFM2_STRIDE_C  = 0x086,
-    NPU_SET_WEIGHT1_BASE   = 0x090,
-    NPU_SET_WEIGHT1_LENGTH = 0x091,
-    NPU_SET_SCALE1_BASE    = 0x092,
-    NPU_SET_SCALE1_LENGTH  = 0x093,
-};
-
-enum class data_format : uint8_t
+enum class activation_format : uint8_t
 {
     NHWC    = 0,
     NHCWB16 = 1,
 };
 
-enum class elementwise_mode : uint16_t
+enum class activation_function : uint8_t
+{
+    RELU    = 0,
+    TANH    = 3,
+    SIGMOID = 4,
+    TABLE_0 = 16,
+    TABLE_1 = 17,
+    TABLE_2 = 18,
+    TABLE_3 = 19,
+    TABLE_4 = 20,
+    TABLE_5 = 21,
+    TABLE_6 = 22,
+    TABLE_7 = 23,
+};
+
+enum class activation_precision : uint8_t
+{
+    B8  = 0,
+    B16 = 1,
+    B32 = 2,
+    B64 = 3,
+};
+
+enum class activation_type : uint8_t
+{
+    UNSIGNED = 0,
+    SIGNED   = 1,
+};
+
+enum class axi_mem_encoding : uint8_t
+{
+    DEVICE_NON_BUFFERABLE                 = 0,
+    DEVICE_BUFFERABLE                     = 1,
+    NORMAL_NON_CACHEABLE_NON_BUFFERABLE   = 2,
+    NORMAL_NON_CACHEABLE_BUFFERABLE       = 3,
+    WRITE_THROUGH_NO_ALLOCATE             = 4,
+    WRITE_THROUGH_READ_ALLOCATE           = 5,
+    WRITE_THROUGH_WRITE_ALLOCATE          = 6,
+    WRITE_THROUGH_READ_AND_WRITE_ALLOCATE = 7,
+    WRITE_BACK_NO_ALLOCATE                = 8,
+    WRITE_BACK_READ_ALLOCATE              = 9,
+    WRITE_BACK_WRITE_ALLOCATE             = 10,
+    WRITE_BACK_READ_AND_WRITE_ALLOCATE    = 11,
+};
+
+enum class broadcast_mode : uint8_t
+{
+    DISABLE = 0,
+    ENABLE  = 1,
+};
+
+enum class cmd0_opcode : uint16_t
+{
+    NPU_OP_STOP               = 0,
+    NPU_OP_IRQ                = 1,
+    NPU_OP_CONV               = 2,
+    NPU_OP_DEPTHWISE          = 3,
+    NPU_OP_POOL               = 5,
+    NPU_OP_ELEMENTWISE        = 6,
+    NPU_OP_DMA_START          = 16,
+    NPU_OP_DMA_WAIT           = 17,
+    NPU_OP_KERNEL_WAIT        = 18,
+    NPU_OP_PMU_MASK           = 19,
+    NPU_SET_IFM_PAD_TOP       = 256,
+    NPU_SET_IFM_PAD_LEFT      = 257,
+    NPU_SET_IFM_PAD_RIGHT     = 258,
+    NPU_SET_IFM_PAD_BOTTOM    = 259,
+    NPU_SET_IFM_DEPTH_M1      = 260,
+    NPU_SET_IFM_PRECISION     = 261,
+    NPU_SET_IFM_UPSCALE       = 263,
+    NPU_SET_IFM_ZERO_POINT    = 265,
+    NPU_SET_IFM_WIDTH0_M1     = 266,
+    NPU_SET_IFM_HEIGHT0_M1    = 267,
+    NPU_SET_IFM_HEIGHT1_M1    = 268,
+    NPU_SET_IFM_IB_END        = 269,
+    NPU_SET_IFM_REGION        = 271,
+    NPU_SET_OFM_WIDTH_M1      = 273,
+    NPU_SET_OFM_HEIGHT_M1     = 274,
+    NPU_SET_OFM_DEPTH_M1      = 275,
+    NPU_SET_OFM_PRECISION     = 276,
+    NPU_SET_OFM_BLK_WIDTH_M1  = 277,
+    NPU_SET_OFM_BLK_HEIGHT_M1 = 278,
+    NPU_SET_OFM_BLK_DEPTH_M1  = 279,
+    NPU_SET_OFM_ZERO_POINT    = 280,
+    NPU_SET_OFM_WIDTH0_M1     = 282,
+    NPU_SET_OFM_HEIGHT0_M1    = 283,
+    NPU_SET_OFM_HEIGHT1_M1    = 284,
+    NPU_SET_OFM_REGION        = 287,
+    NPU_SET_KERNEL_WIDTH_M1   = 288,
+    NPU_SET_KERNEL_HEIGHT_M1  = 289,
+    NPU_SET_KERNEL_STRIDE     = 290,
+    NPU_SET_ACC_FORMAT        = 292,
+    NPU_SET_ACTIVATION        = 293,
+    NPU_SET_ACTIVATION_MIN    = 294,
+    NPU_SET_ACTIVATION_MAX    = 295,
+    NPU_SET_WEIGHT_REGION     = 296,
+    NPU_SET_SCALE_REGION      = 297,
+    NPU_SET_AB_START          = 301,
+    NPU_SET_BLOCKDEP          = 303,
+    NPU_SET_DMA0_SRC_REGION   = 304,
+    NPU_SET_DMA0_DST_REGION   = 305,
+    NPU_SET_DMA0_SIZE0        = 306,
+    NPU_SET_DMA0_SIZE1        = 307,
+    NPU_SET_IFM2_BROADCAST    = 384,
+    NPU_SET_IFM2_SCALAR       = 385,
+    NPU_SET_IFM2_PRECISION    = 389,
+    NPU_SET_IFM2_ZERO_POINT   = 393,
+    NPU_SET_IFM2_WIDTH0_M1    = 394,
+    NPU_SET_IFM2_HEIGHT0_M1   = 395,
+    NPU_SET_IFM2_HEIGHT1_M1   = 396,
+    NPU_SET_IFM2_IB_START     = 397,
+    NPU_SET_IFM2_REGION       = 399,
+};
+
+enum class cmd1_opcode : uint16_t
+{
+    NPU_SET_IFM_BASE0     = 0,
+    NPU_SET_IFM_BASE1     = 1,
+    NPU_SET_IFM_BASE2     = 2,
+    NPU_SET_IFM_BASE3     = 3,
+    NPU_SET_IFM_STRIDE_X  = 4,
+    NPU_SET_IFM_STRIDE_Y  = 5,
+    NPU_SET_IFM_STRIDE_C  = 6,
+    NPU_SET_OFM_BASE0     = 16,
+    NPU_SET_OFM_BASE1     = 17,
+    NPU_SET_OFM_BASE2     = 18,
+    NPU_SET_OFM_BASE3     = 19,
+    NPU_SET_OFM_STRIDE_X  = 20,
+    NPU_SET_OFM_STRIDE_Y  = 21,
+    NPU_SET_OFM_STRIDE_C  = 22,
+    NPU_SET_WEIGHT_BASE   = 32,
+    NPU_SET_WEIGHT_LENGTH = 33,
+    NPU_SET_SCALE_BASE    = 34,
+    NPU_SET_SCALE_LENGTH  = 35,
+    NPU_SET_OFM_SCALE     = 36,
+    NPU_SET_OPA_SCALE     = 37,
+    NPU_SET_OPB_SCALE     = 38,
+    NPU_SET_DMA0_SRC      = 48,
+    NPU_SET_DMA0_DST      = 49,
+    NPU_SET_DMA0_LEN      = 50,
+    NPU_SET_IFM2_BASE0    = 128,
+    NPU_SET_IFM2_BASE1    = 129,
+    NPU_SET_IFM2_BASE2    = 130,
+    NPU_SET_IFM2_BASE3    = 131,
+    NPU_SET_IFM2_STRIDE_X = 132,
+    NPU_SET_IFM2_STRIDE_Y = 133,
+    NPU_SET_IFM2_STRIDE_C = 134,
+    NPU_SET_USER_DEFINED0 = 160,
+    NPU_SET_USER_DEFINED1 = 161,
+    NPU_SET_USER_DEFINED2 = 162,
+    NPU_SET_USER_DEFINED3 = 163,
+    NPU_SET_USER_DEFINED4 = 164,
+    NPU_SET_USER_DEFINED5 = 165,
+    NPU_SET_USER_DEFINED6 = 166,
+    NPU_SET_USER_DEFINED7 = 167,
+};
+
+enum class cmd_ctrl : uint8_t
+{
+    CMD0_CTRL = 0,
+    CMD1_CTRL = 1,
+};
+
+enum class custom_dma_cs : uint8_t
+{
+    DISABLE = 0,
+    ENABLE  = 1,
+};
+
+enum class custom_dma : uint8_t
+{
+    NOT_IMPLEMENTED = 0,
+    IMPLEMENTED     = 1,
+};
+
+enum class dma_fault_src : uint8_t
+{
+    AXI_M0 = 0,
+    AXI_M1 = 1,
+};
+
+enum class dma_region_mode : uint8_t
+{
+    EXTERNAL = 0,
+    INTERNAL = 1,
+};
+
+enum class dma_stride_mode : uint8_t
+{
+    D1 = 0,
+};
+
+enum class elementwise_mode : uint8_t
 {
     MUL   = 0,
     ADD   = 1,
@@ -744,31 +600,52 @@
     SHL   = 9,
 };
 
-enum class ifm_precision : uint8_t
+enum class functional_safety : uint8_t
 {
-    U8  = 0,
-    S8  = 1,
-    U16 = 4,
-    S16 = 5,
-    S32 = 9,
+    NOT_IMPLEMENTED = 0,
+    IMPLEMENTED     = 1,
+};
+
+enum class ifm2_operand_order : uint8_t
+{
+    ORDER_B = 0,
+    ORDER_A = 1,
 };
 
 enum class ifm_scale_mode : uint8_t
 {
-    SCALE_16BIT     = 0,
-    SCALE_OPA_32BIT = 1,
-    SCALE_OPB_32BIT = 2,
+    OPA_OPB_16 = 0,
+    OPA_32     = 1,
+    OPB_32     = 2,
 };
 
-enum class macs_per_cc : uint8_t
+enum class ifm_upscale_mode : uint8_t
 {
-    MACS_PER_CC_IS_5 = 0x5,
-    MACS_PER_CC_IS_6 = 0x6,
-    MACS_PER_CC_IS_7 = 0x7,
-    MACS_PER_CC_IS_8 = 0x8,
+    NONE    = 0,
+    NEAREST = 1,
+    ZEROS   = 2,
 };
 
-enum class memory_type : uint8_t
+enum class kernel_decomposition : uint8_t
+{
+    D8X8 = 0,
+    D4X4 = 1,
+};
+
+enum class kernel_dilation : uint8_t
+{
+    NONE = 0,
+    X2   = 1,
+};
+
+enum class max_beats : uint8_t
+{
+    B64  = 0,
+    B128 = 1,
+    B256 = 2,
+};
+
+enum class mem_attr : uint8_t
 {
     AXI0_OUTSTANDING_COUNTER0 = 0,
     AXI0_OUTSTANDING_COUNTER1 = 1,
@@ -776,94 +653,102 @@
     AXI1_OUTSTANDING_COUNTER3 = 3,
 };
 
-enum class ofm_precision : uint8_t
+enum class ofm_scale_mode : uint8_t
 {
-    U8  = 0,
-    S8  = 1,
-    U16 = 2,
-    S16 = 3,
-    S32 = 5,
+    PER_CHANNEL = 0,
+    GLOBAL      = 1,
 };
 
-enum class pmu_event_type : uint16_t
+enum class pmu_axi_channel : uint8_t
 {
-    NO_EVENT                     = 0x00,
-    CYCLE                        = 0x11,
-    NPU_IDLE                     = 0x20,
-    CC_STALLED_ON_BLOCKDEP       = 0x21,
-    CC_STALLED_ON_SHRAM_RECONFIG = 0x22,
-    NPU_ACTIVE                   = 0x23,
-    MAC_ACTIVE                   = 0x30,
-    MAC_ACTIVE_8BIT              = 0x31,
-    MAC_ACTIVE_16BIT             = 0x32,
-    MAC_DPU_ACTIVE               = 0x33,
-    MAC_STALLED_BY_WD_ACC        = 0x34,
-    MAC_STALLED_BY_WD            = 0x35,
-    MAC_STALLED_BY_ACC           = 0x36,
-    MAC_STALLED_BY_IB            = 0x37,
-    MAC_ACTIVE_32BIT             = 0x38,
-    MAC_STALLED_BY_INT_W         = 0x39,
-    MAC_STALLED_BY_INT_ACC       = 0x3A,
-    AO_ACTIVE                    = 0x40,
-    AO_ACTIVE_8BIT               = 0x41,
-    AO_ACTIVE_16BIT              = 0x42,
-    AO_STALLED_BY_OFMP_OB        = 0x43,
-    AO_STALLED_BY_OFMP           = 0x44,
-    AO_STALLED_BY_OB             = 0x45,
-    AO_STALLED_BY_ACC_IB         = 0x46,
-    AO_STALLED_BY_ACC            = 0x47,
-    AO_STALLED_BY_IB             = 0x48,
-    WD_ACTIVE                    = 0x50,
-    WD_STALLED                   = 0x51,
-    WD_STALLED_BY_WS             = 0x52,
-    WD_STALLED_BY_WD_BUF         = 0x53,
-    WD_PARSE_ACTIVE              = 0x54,
-    WD_PARSE_STALLED             = 0x55,
-    WD_PARSE_STALLED_IN          = 0x56,
-    WD_PARSE_STALLED_OUT         = 0x57,
-    WD_TRANS_WS                  = 0x58,
-    WD_TRANS_WB                  = 0x59,
-    WD_TRANS_DW0                 = 0x5a,
-    WD_TRANS_DW1                 = 0x5b,
-    AXI0_RD_TRANS_ACCEPTED       = 0x80,
-    AXI0_RD_TRANS_COMPLETED      = 0x81,
-    AXI0_RD_DATA_BEAT_RECEIVED   = 0x82,
-    AXI0_RD_TRAN_REQ_STALLED     = 0x83,
-    AXI0_WR_TRANS_ACCEPTED       = 0x84,
-    AXI0_WR_TRANS_COMPLETED_M    = 0x85,
-    AXI0_WR_TRANS_COMPLETED_S    = 0x86,
-    AXI0_WR_DATA_BEAT_WRITTEN    = 0x87,
-    AXI0_WR_TRAN_REQ_STALLED     = 0x88,
-    AXI0_WR_DATA_BEAT_STALLED    = 0x89,
-    AXI0_ENABLED_CYCLES          = 0x8c,
-    AXI0_RD_STALL_LIMIT          = 0x8e,
-    AXI0_WR_STALL_LIMIT          = 0x8f,
-    AXI1_RD_TRANS_ACCEPTED       = 0x180,
-    AXI1_RD_TRANS_COMPLETED      = 0x181,
-    AXI1_RD_DATA_BEAT_RECEIVED   = 0x182,
-    AXI1_RD_TRAN_REQ_STALLED     = 0x183,
-    AXI1_WR_TRANS_ACCEPTED       = 0x184,
-    AXI1_WR_TRANS_COMPLETED_M    = 0x185,
-    AXI1_WR_TRANS_COMPLETED_S    = 0x186,
-    AXI1_WR_DATA_BEAT_WRITTEN    = 0x187,
-    AXI1_WR_TRAN_REQ_STALLED     = 0x188,
-    AXI1_WR_DATA_BEAT_STALLED    = 0x189,
-    AXI1_ENABLED_CYCLES          = 0x18c,
-    AXI1_RD_STALL_LIMIT          = 0x18e,
-    AXI1_WR_STALL_LIMIT          = 0x18f,
-    AXI_LATENCY_ANY              = 0xa0,
-    AXI_LATENCY_32               = 0xa1,
-    AXI_LATENCY_64               = 0xa2,
-    AXI_LATENCY_128              = 0xa3,
-    AXI_LATENCY_256              = 0xa4,
-    AXI_LATENCY_512              = 0xa5,
-    AXI_LATENCY_1024             = 0xa6,
-    ECC_DMA                      = 0xb0,
-    ECC_SB0                      = 0xb1,
-    ECC_SB1                      = 0x1b1,
+    RD_CMD        = 0,
+    RD_IFM        = 1,
+    RD_WEIGHTS    = 2,
+    RD_SCALE_BIAS = 3,
+    RD_MEM2MEM    = 4,
+    WR_OFM        = 8,
+    WR_MEM2MEM    = 9,
 };
 
-enum class pooling_mode : uint16_t
+enum class pmu_event : uint16_t
+{
+    NO_EVENT                     = 0,
+    CYCLE                        = 17,
+    NPU_IDLE                     = 32,
+    CC_STALLED_ON_BLOCKDEP       = 33,
+    CC_STALLED_ON_SHRAM_RECONFIG = 34,
+    NPU_ACTIVE                   = 35,
+    MAC_ACTIVE                   = 48,
+    MAC_ACTIVE_8BIT              = 49,
+    MAC_ACTIVE_16BIT             = 50,
+    MAC_DPU_ACTIVE               = 51,
+    MAC_STALLED_BY_WD_ACC        = 52,
+    MAC_STALLED_BY_WD            = 53,
+    MAC_STALLED_BY_ACC           = 54,
+    MAC_STALLED_BY_IB            = 55,
+    MAC_ACTIVE_32BIT             = 56,
+    MAC_STALLED_BY_INT_W         = 57,
+    MAC_STALLED_BY_INT_ACC       = 58,
+    AO_ACTIVE                    = 64,
+    AO_ACTIVE_8BIT               = 65,
+    AO_ACTIVE_16BIT              = 66,
+    AO_STALLED_BY_OFMP_OB        = 67,
+    AO_STALLED_BY_OFMP           = 68,
+    AO_STALLED_BY_OB             = 69,
+    AO_STALLED_BY_ACC_IB         = 70,
+    AO_STALLED_BY_ACC            = 71,
+    AO_STALLED_BY_IB             = 72,
+    WD_ACTIVE                    = 80,
+    WD_STALLED                   = 81,
+    WD_STALLED_BY_WS             = 82,
+    WD_STALLED_BY_WD_BUF         = 83,
+    WD_PARSE_ACTIVE              = 84,
+    WD_PARSE_STALLED             = 85,
+    WD_PARSE_STALLED_IN          = 86,
+    WD_PARSE_STALLED_OUT         = 87,
+    WD_TRANS_WS                  = 88,
+    WD_TRANS_WB                  = 89,
+    WD_TRANS_DW0                 = 90,
+    WD_TRANS_DW1                 = 91,
+    AXI0_RD_TRANS_ACCEPTED       = 128,
+    AXI0_RD_TRANS_COMPLETED      = 129,
+    AXI0_RD_DATA_BEAT_RECEIVED   = 130,
+    AXI0_RD_TRAN_REQ_STALLED     = 131,
+    AXI0_WR_TRANS_ACCEPTED       = 132,
+    AXI0_WR_TRANS_COMPLETED_M    = 133,
+    AXI0_WR_TRANS_COMPLETED_S    = 134,
+    AXI0_WR_DATA_BEAT_WRITTEN    = 135,
+    AXI0_WR_TRAN_REQ_STALLED     = 136,
+    AXI0_WR_DATA_BEAT_STALLED    = 137,
+    AXI0_ENABLED_CYCLES          = 140,
+    AXI0_RD_STALL_LIMIT          = 142,
+    AXI0_WR_STALL_LIMIT          = 143,
+    AXI_LATENCY_ANY              = 160,
+    AXI_LATENCY_32               = 161,
+    AXI_LATENCY_64               = 162,
+    AXI_LATENCY_128              = 163,
+    AXI_LATENCY_256              = 164,
+    AXI_LATENCY_512              = 165,
+    AXI_LATENCY_1024             = 166,
+    ECC_DMA                      = 176,
+    ECC_SB0                      = 177,
+    AXI1_RD_TRANS_ACCEPTED       = 384,
+    AXI1_RD_TRANS_COMPLETED      = 385,
+    AXI1_RD_DATA_BEAT_RECEIVED   = 386,
+    AXI1_RD_TRAN_REQ_STALLED     = 387,
+    AXI1_WR_TRANS_ACCEPTED       = 388,
+    AXI1_WR_TRANS_COMPLETED_M    = 389,
+    AXI1_WR_TRANS_COMPLETED_S    = 390,
+    AXI1_WR_DATA_BEAT_WRITTEN    = 391,
+    AXI1_WR_TRAN_REQ_STALLED     = 392,
+    AXI1_WR_DATA_BEAT_STALLED    = 393,
+    AXI1_ENABLED_CYCLES          = 396,
+    AXI1_RD_STALL_LIMIT          = 398,
+    AXI1_WR_STALL_LIMIT          = 399,
+    ECC_SB1                      = 433,
+};
+
+enum class pooling_mode : uint8_t
 {
     MAX        = 0,
     AVERAGE    = 1,
@@ -876,16 +761,9 @@
     PRIVILEGED = 1,
 };
 
-enum class resampling_mode : uint8_t
+enum class round_mode : uint8_t
 {
-    NONE      = 0,
-    NEAREST   = 1,
-    TRANSPOSE = 2,
-};
-
-enum class rounding : uint8_t
-{
-    TFL      = 0,
+    DBL      = 0,
     TRUNCATE = 1,
     NATURAL  = 2,
 };
@@ -896,182 +774,246 @@
     NON_SECURE = 1,
 };
 
-enum class shram_size : uint8_t
-{
-    SHRAM_96KB = 0x60,
-    SHRAM_48KB = 0x30,
-    SHRAM_24KB = 0x18,
-    SHRAM_16KB = 0x10,
-};
-
 enum class state : uint8_t
 {
     STOPPED = 0,
     RUNNING = 1,
 };
 
-enum class stride_mode : uint8_t
+enum class wd_core_slice_state : uint8_t
 {
-    STRIDE_MODE_1D = 0,
-    STRIDE_MODE_2D = 1,
-    STRIDE_MODE_3D = 2,
+    HEADER  = 0,
+    PALETTE = 1,
+    WEIGHTS = 2,
+};
+
+enum class wd_ctrl_state : uint8_t
+{
+    IDLE     = 0,
+    DRAIN    = 1,
+    OFD_INIT = 2,
+    OFD_RUN  = 3,
+};
+
+enum class weight_order : uint8_t
+{
+    DEPTH_FIRST       = 0,
+    PART_KERNEL_FIRST = 1,
 };
 
 #else
 
 enum acc_format
 {
-    ACC_FORMAT_INT_32BIT = 0,
-    ACC_FORMAT_INT_40BIT = 1,
-    ACC_FORMAT_FP_S5_10  = 2,
+    ACC_FORMAT_I32 = 0,
+    ACC_FORMAT_I40 = 1,
+    ACC_FORMAT_F16 = 2,
 };
 
-enum activation
+enum activation_clip_range
 {
-    ACTIVATION_NONE      = 0,
-    ACTIVATION_TANH      = 3,
-    ACTIVATION_SIGMOID   = 4,
-    ACTIVATION_LUT_START = 16,
-    ACTIVATION_LUT_END   = 23,
+    ACTIVATION_CLIP_RANGE_OFM_PRECISION = 0,
+    ACTIVATION_CLIP_RANGE_FORCE_UINT8   = 2,
+    ACTIVATION_CLIP_RANGE_FORCE_INT8    = 3,
+    ACTIVATION_CLIP_RANGE_FORCE_INT16   = 5,
 };
 
-enum axi_mem_encoding_type
+enum activation_format
 {
-    AXI_MEM_ENCODING_TYPE_DEVICE_NON_BUFFERABLE                 = 0x0,
-    AXI_MEM_ENCODING_TYPE_DEVICE_BUFFERABLE                     = 0x1,
-    AXI_MEM_ENCODING_TYPE_NORMAL_NON_CACHEABLE_NON_BUFFERABLE   = 0x2,
-    AXI_MEM_ENCODING_TYPE_NORMAL_NON_CACHEABLE_BUFFERABLE       = 0x3,
-    AXI_MEM_ENCODING_TYPE_WRITE_THROUGH_NO_ALLOCATE             = 0x4,
-    AXI_MEM_ENCODING_TYPE_WRITE_THROUGH_READ_ALLOCATE           = 0x5,
-    AXI_MEM_ENCODING_TYPE_WRITE_THROUGH_WRITE_ALLOCATE          = 0x6,
-    AXI_MEM_ENCODING_TYPE_WRITE_THROUGH_READ_AND_WRITE_ALLOCATE = 0x7,
-    AXI_MEM_ENCODING_TYPE_WRITE_BACK_NO_ALLOCATE                = 0x8,
-    AXI_MEM_ENCODING_TYPE_WRITE_BACK_READ_ALLOCATE              = 0x9,
-    AXI_MEM_ENCODING_TYPE_WRITE_BACK_WRITE_ALLOCATE             = 0xA,
-    AXI_MEM_ENCODING_TYPE_WRITE_BACK_READ_AND_WRITE_ALLOCATE    = 0xB,
-    AXI_MEM_ENCODING_TYPE_RESERVED_12                           = 0xC,
-    AXI_MEM_ENCODING_TYPE_RESERVED_13                           = 0xD,
-    AXI_MEM_ENCODING_TYPE_RESERVED_14                           = 0xE,
-    AXI_MEM_ENCODING_TYPE_RESERVED_15                           = 0xF,
+    ACTIVATION_FORMAT_NHWC    = 0,
+    ACTIVATION_FORMAT_NHCWB16 = 1,
 };
 
-enum clip_range
+enum activation_function
 {
-    CLIP_RANGE_OFM_PRECISION = 0,
-    CLIP_RANGE_FORCE_UINT8   = 2,
-    CLIP_RANGE_FORCE_INT8    = 3,
-    CLIP_RANGE_FORCE_INT16   = 5,
+    ACTIVATION_FUNCTION_RELU    = 0,
+    ACTIVATION_FUNCTION_TANH    = 3,
+    ACTIVATION_FUNCTION_SIGMOID = 4,
+    ACTIVATION_FUNCTION_TABLE_0 = 16,
+    ACTIVATION_FUNCTION_TABLE_1 = 17,
+    ACTIVATION_FUNCTION_TABLE_2 = 18,
+    ACTIVATION_FUNCTION_TABLE_3 = 19,
+    ACTIVATION_FUNCTION_TABLE_4 = 20,
+    ACTIVATION_FUNCTION_TABLE_5 = 21,
+    ACTIVATION_FUNCTION_TABLE_6 = 22,
+    ACTIVATION_FUNCTION_TABLE_7 = 23,
 };
 
-enum cmd0
+enum activation_precision
 {
-    CMD0_NPU_OP_STOP               = 0x000,
-    CMD0_NPU_OP_IRQ                = 0x001,
-    CMD0_NPU_OP_CONV               = 0x002,
-    CMD0_NPU_OP_DEPTHWISE          = 0x003,
-    CMD0_NPU_OP_POOL               = 0x005,
-    CMD0_NPU_OP_ELEMENTWISE        = 0x006,
-    CMD0_NPU_OP_DMA_START          = 0x010,
-    CMD0_NPU_OP_DMA_WAIT           = 0x011,
-    CMD0_NPU_OP_KERNEL_WAIT        = 0x012,
-    CMD0_NPU_OP_PMU_MASK           = 0x013,
-    CMD0_NPU_SET_IFM_PAD_TOP       = 0x100,
-    CMD0_NPU_SET_IFM_PAD_LEFT      = 0x101,
-    CMD0_NPU_SET_IFM_PAD_RIGHT     = 0x102,
-    CMD0_NPU_SET_IFM_PAD_BOTTOM    = 0x103,
-    CMD0_NPU_SET_IFM_DEPTH_M1      = 0x104,
-    CMD0_NPU_SET_IFM_PRECISION     = 0x105,
-    CMD0_NPU_SET_IFM_UPSCALE       = 0x107,
-    CMD0_NPU_SET_IFM_ZERO_POINT    = 0x109,
-    CMD0_NPU_SET_IFM_WIDTH0_M1     = 0x10A,
-    CMD0_NPU_SET_IFM_HEIGHT0_M1    = 0x10B,
-    CMD0_NPU_SET_IFM_HEIGHT1_M1    = 0x10C,
-    CMD0_NPU_SET_IFM_IB_END        = 0x10D,
-    CMD0_NPU_SET_IFM_REGION        = 0x10F,
-    CMD0_NPU_SET_OFM_WIDTH_M1      = 0x111,
-    CMD0_NPU_SET_OFM_HEIGHT_M1     = 0x112,
-    CMD0_NPU_SET_OFM_DEPTH_M1      = 0x113,
-    CMD0_NPU_SET_OFM_PRECISION     = 0x114,
-    CMD0_NPU_SET_OFM_BLK_WIDTH_M1  = 0x115,
-    CMD0_NPU_SET_OFM_BLK_HEIGHT_M1 = 0x116,
-    CMD0_NPU_SET_OFM_BLK_DEPTH_M1  = 0x117,
-    CMD0_NPU_SET_OFM_ZERO_POINT    = 0x118,
-    CMD0_NPU_SET_OFM_WIDTH0_M1     = 0x11A,
-    CMD0_NPU_SET_OFM_HEIGHT0_M1    = 0x11B,
-    CMD0_NPU_SET_OFM_HEIGHT1_M1    = 0x11C,
-    CMD0_NPU_SET_OFM_REGION        = 0x11F,
-    CMD0_NPU_SET_KERNEL_WIDTH_M1   = 0x120,
-    CMD0_NPU_SET_KERNEL_HEIGHT_M1  = 0x121,
-    CMD0_NPU_SET_KERNEL_STRIDE     = 0x122,
-    CMD0_NPU_SET_PARALLEL_MODE     = 0x123,
-    CMD0_NPU_SET_ACC_FORMAT        = 0x124,
-    CMD0_NPU_SET_ACTIVATION        = 0x125,
-    CMD0_NPU_SET_ACTIVATION_MIN    = 0x126,
-    CMD0_NPU_SET_ACTIVATION_MAX    = 0x127,
-    CMD0_NPU_SET_WEIGHT_REGION     = 0x128,
-    CMD0_NPU_SET_SCALE_REGION      = 0x129,
-    CMD0_NPU_SET_AB_START          = 0x12D,
-    CMD0_NPU_SET_BLOCKDEP          = 0x12F,
-    CMD0_NPU_SET_DMA0_SRC_REGION   = 0x130,
-    CMD0_NPU_SET_DMA0_DST_REGION   = 0x131,
-    CMD0_NPU_SET_DMA0_SIZE0        = 0x132,
-    CMD0_NPU_SET_DMA0_SIZE1        = 0x133,
-    CMD0_NPU_SET_IFM2_BROADCAST    = 0x180,
-    CMD0_NPU_SET_IFM2_SCALAR       = 0x181,
-    CMD0_NPU_SET_IFM2_PRECISION    = 0x185,
-    CMD0_NPU_SET_IFM2_ZERO_POINT   = 0x189,
-    CMD0_NPU_SET_IFM2_WIDTH0_M1    = 0x18A,
-    CMD0_NPU_SET_IFM2_HEIGHT0_M1   = 0x18B,
-    CMD0_NPU_SET_IFM2_HEIGHT1_M1   = 0x18C,
-    CMD0_NPU_SET_IFM2_IB_START     = 0x18D,
-    CMD0_NPU_SET_IFM2_REGION       = 0x18F,
+    ACTIVATION_PRECISION_B8  = 0,
+    ACTIVATION_PRECISION_B16 = 1,
+    ACTIVATION_PRECISION_B32 = 2,
+    ACTIVATION_PRECISION_B64 = 3,
 };
 
-enum cmd1
+enum activation_type
 {
-    CMD1_NPU_SET_IFM_BASE0      = 0x000,
-    CMD1_NPU_SET_IFM_BASE1      = 0x001,
-    CMD1_NPU_SET_IFM_BASE2      = 0x002,
-    CMD1_NPU_SET_IFM_BASE3      = 0x003,
-    CMD1_NPU_SET_IFM_STRIDE_X   = 0x004,
-    CMD1_NPU_SET_IFM_STRIDE_Y   = 0x005,
-    CMD1_NPU_SET_IFM_STRIDE_C   = 0x006,
-    CMD1_NPU_SET_OFM_BASE0      = 0x010,
-    CMD1_NPU_SET_OFM_BASE1      = 0x011,
-    CMD1_NPU_SET_OFM_BASE2      = 0x012,
-    CMD1_NPU_SET_OFM_BASE3      = 0x013,
-    CMD1_NPU_SET_OFM_STRIDE_X   = 0x014,
-    CMD1_NPU_SET_OFM_STRIDE_Y   = 0x015,
-    CMD1_NPU_SET_OFM_STRIDE_C   = 0x016,
-    CMD1_NPU_SET_WEIGHT_BASE    = 0x020,
-    CMD1_NPU_SET_WEIGHT_LENGTH  = 0x021,
-    CMD1_NPU_SET_SCALE_BASE     = 0x022,
-    CMD1_NPU_SET_SCALE_LENGTH   = 0x023,
-    CMD1_NPU_SET_OFM_SCALE      = 0x024,
-    CMD1_NPU_SET_OPA_SCALE      = 0x025,
-    CMD1_NPU_SET_OPB_SCALE      = 0x026,
-    CMD1_NPU_SET_DMA0_SRC       = 0x030,
-    CMD1_NPU_SET_DMA0_DST       = 0x031,
-    CMD1_NPU_SET_DMA0_LEN       = 0x032,
-    CMD1_NPU_SET_DMA0_SKIP0     = 0x033,
-    CMD1_NPU_SET_DMA0_SKIP1     = 0x034,
-    CMD1_NPU_SET_IFM2_BASE0     = 0x080,
-    CMD1_NPU_SET_IFM2_BASE1     = 0x081,
-    CMD1_NPU_SET_IFM2_BASE2     = 0x082,
-    CMD1_NPU_SET_IFM2_BASE3     = 0x083,
-    CMD1_NPU_SET_IFM2_STRIDE_X  = 0x084,
-    CMD1_NPU_SET_IFM2_STRIDE_Y  = 0x085,
-    CMD1_NPU_SET_IFM2_STRIDE_C  = 0x086,
-    CMD1_NPU_SET_WEIGHT1_BASE   = 0x090,
-    CMD1_NPU_SET_WEIGHT1_LENGTH = 0x091,
-    CMD1_NPU_SET_SCALE1_BASE    = 0x092,
-    CMD1_NPU_SET_SCALE1_LENGTH  = 0x093,
+    ACTIVATION_TYPE_UNSIGNED = 0,
+    ACTIVATION_TYPE_SIGNED   = 1,
 };
 
-enum data_format
+enum axi_mem_encoding
 {
-    DATA_FORMAT_NHWC    = 0,
-    DATA_FORMAT_NHCWB16 = 1,
+    AXI_MEM_ENCODING_DEVICE_NON_BUFFERABLE                 = 0,
+    AXI_MEM_ENCODING_DEVICE_BUFFERABLE                     = 1,
+    AXI_MEM_ENCODING_NORMAL_NON_CACHEABLE_NON_BUFFERABLE   = 2,
+    AXI_MEM_ENCODING_NORMAL_NON_CACHEABLE_BUFFERABLE       = 3,
+    AXI_MEM_ENCODING_WRITE_THROUGH_NO_ALLOCATE             = 4,
+    AXI_MEM_ENCODING_WRITE_THROUGH_READ_ALLOCATE           = 5,
+    AXI_MEM_ENCODING_WRITE_THROUGH_WRITE_ALLOCATE          = 6,
+    AXI_MEM_ENCODING_WRITE_THROUGH_READ_AND_WRITE_ALLOCATE = 7,
+    AXI_MEM_ENCODING_WRITE_BACK_NO_ALLOCATE                = 8,
+    AXI_MEM_ENCODING_WRITE_BACK_READ_ALLOCATE              = 9,
+    AXI_MEM_ENCODING_WRITE_BACK_WRITE_ALLOCATE             = 10,
+    AXI_MEM_ENCODING_WRITE_BACK_READ_AND_WRITE_ALLOCATE    = 11,
+};
+
+enum broadcast_mode
+{
+    BROADCAST_MODE_DISABLE = 0,
+    BROADCAST_MODE_ENABLE  = 1,
+};
+
+enum cmd0_opcode
+{
+    CMD0_OPCODE_NPU_OP_STOP               = 0,
+    CMD0_OPCODE_NPU_OP_IRQ                = 1,
+    CMD0_OPCODE_NPU_OP_CONV               = 2,
+    CMD0_OPCODE_NPU_OP_DEPTHWISE          = 3,
+    CMD0_OPCODE_NPU_OP_POOL               = 5,
+    CMD0_OPCODE_NPU_OP_ELEMENTWISE        = 6,
+    CMD0_OPCODE_NPU_OP_DMA_START          = 16,
+    CMD0_OPCODE_NPU_OP_DMA_WAIT           = 17,
+    CMD0_OPCODE_NPU_OP_KERNEL_WAIT        = 18,
+    CMD0_OPCODE_NPU_OP_PMU_MASK           = 19,
+    CMD0_OPCODE_NPU_SET_IFM_PAD_TOP       = 256,
+    CMD0_OPCODE_NPU_SET_IFM_PAD_LEFT      = 257,
+    CMD0_OPCODE_NPU_SET_IFM_PAD_RIGHT     = 258,
+    CMD0_OPCODE_NPU_SET_IFM_PAD_BOTTOM    = 259,
+    CMD0_OPCODE_NPU_SET_IFM_DEPTH_M1      = 260,
+    CMD0_OPCODE_NPU_SET_IFM_PRECISION     = 261,
+    CMD0_OPCODE_NPU_SET_IFM_UPSCALE       = 263,
+    CMD0_OPCODE_NPU_SET_IFM_ZERO_POINT    = 265,
+    CMD0_OPCODE_NPU_SET_IFM_WIDTH0_M1     = 266,
+    CMD0_OPCODE_NPU_SET_IFM_HEIGHT0_M1    = 267,
+    CMD0_OPCODE_NPU_SET_IFM_HEIGHT1_M1    = 268,
+    CMD0_OPCODE_NPU_SET_IFM_IB_END        = 269,
+    CMD0_OPCODE_NPU_SET_IFM_REGION        = 271,
+    CMD0_OPCODE_NPU_SET_OFM_WIDTH_M1      = 273,
+    CMD0_OPCODE_NPU_SET_OFM_HEIGHT_M1     = 274,
+    CMD0_OPCODE_NPU_SET_OFM_DEPTH_M1      = 275,
+    CMD0_OPCODE_NPU_SET_OFM_PRECISION     = 276,
+    CMD0_OPCODE_NPU_SET_OFM_BLK_WIDTH_M1  = 277,
+    CMD0_OPCODE_NPU_SET_OFM_BLK_HEIGHT_M1 = 278,
+    CMD0_OPCODE_NPU_SET_OFM_BLK_DEPTH_M1  = 279,
+    CMD0_OPCODE_NPU_SET_OFM_ZERO_POINT    = 280,
+    CMD0_OPCODE_NPU_SET_OFM_WIDTH0_M1     = 282,
+    CMD0_OPCODE_NPU_SET_OFM_HEIGHT0_M1    = 283,
+    CMD0_OPCODE_NPU_SET_OFM_HEIGHT1_M1    = 284,
+    CMD0_OPCODE_NPU_SET_OFM_REGION        = 287,
+    CMD0_OPCODE_NPU_SET_KERNEL_WIDTH_M1   = 288,
+    CMD0_OPCODE_NPU_SET_KERNEL_HEIGHT_M1  = 289,
+    CMD0_OPCODE_NPU_SET_KERNEL_STRIDE     = 290,
+    CMD0_OPCODE_NPU_SET_ACC_FORMAT        = 292,
+    CMD0_OPCODE_NPU_SET_ACTIVATION        = 293,
+    CMD0_OPCODE_NPU_SET_ACTIVATION_MIN    = 294,
+    CMD0_OPCODE_NPU_SET_ACTIVATION_MAX    = 295,
+    CMD0_OPCODE_NPU_SET_WEIGHT_REGION     = 296,
+    CMD0_OPCODE_NPU_SET_SCALE_REGION      = 297,
+    CMD0_OPCODE_NPU_SET_AB_START          = 301,
+    CMD0_OPCODE_NPU_SET_BLOCKDEP          = 303,
+    CMD0_OPCODE_NPU_SET_DMA0_SRC_REGION   = 304,
+    CMD0_OPCODE_NPU_SET_DMA0_DST_REGION   = 305,
+    CMD0_OPCODE_NPU_SET_DMA0_SIZE0        = 306,
+    CMD0_OPCODE_NPU_SET_DMA0_SIZE1        = 307,
+    CMD0_OPCODE_NPU_SET_IFM2_BROADCAST    = 384,
+    CMD0_OPCODE_NPU_SET_IFM2_SCALAR       = 385,
+    CMD0_OPCODE_NPU_SET_IFM2_PRECISION    = 389,
+    CMD0_OPCODE_NPU_SET_IFM2_ZERO_POINT   = 393,
+    CMD0_OPCODE_NPU_SET_IFM2_WIDTH0_M1    = 394,
+    CMD0_OPCODE_NPU_SET_IFM2_HEIGHT0_M1   = 395,
+    CMD0_OPCODE_NPU_SET_IFM2_HEIGHT1_M1   = 396,
+    CMD0_OPCODE_NPU_SET_IFM2_IB_START     = 397,
+    CMD0_OPCODE_NPU_SET_IFM2_REGION       = 399,
+};
+
+enum cmd1_opcode
+{
+    CMD1_OPCODE_NPU_SET_IFM_BASE0     = 0,
+    CMD1_OPCODE_NPU_SET_IFM_BASE1     = 1,
+    CMD1_OPCODE_NPU_SET_IFM_BASE2     = 2,
+    CMD1_OPCODE_NPU_SET_IFM_BASE3     = 3,
+    CMD1_OPCODE_NPU_SET_IFM_STRIDE_X  = 4,
+    CMD1_OPCODE_NPU_SET_IFM_STRIDE_Y  = 5,
+    CMD1_OPCODE_NPU_SET_IFM_STRIDE_C  = 6,
+    CMD1_OPCODE_NPU_SET_OFM_BASE0     = 16,
+    CMD1_OPCODE_NPU_SET_OFM_BASE1     = 17,
+    CMD1_OPCODE_NPU_SET_OFM_BASE2     = 18,
+    CMD1_OPCODE_NPU_SET_OFM_BASE3     = 19,
+    CMD1_OPCODE_NPU_SET_OFM_STRIDE_X  = 20,
+    CMD1_OPCODE_NPU_SET_OFM_STRIDE_Y  = 21,
+    CMD1_OPCODE_NPU_SET_OFM_STRIDE_C  = 22,
+    CMD1_OPCODE_NPU_SET_WEIGHT_BASE   = 32,
+    CMD1_OPCODE_NPU_SET_WEIGHT_LENGTH = 33,
+    CMD1_OPCODE_NPU_SET_SCALE_BASE    = 34,
+    CMD1_OPCODE_NPU_SET_SCALE_LENGTH  = 35,
+    CMD1_OPCODE_NPU_SET_OFM_SCALE     = 36,
+    CMD1_OPCODE_NPU_SET_OPA_SCALE     = 37,
+    CMD1_OPCODE_NPU_SET_OPB_SCALE     = 38,
+    CMD1_OPCODE_NPU_SET_DMA0_SRC      = 48,
+    CMD1_OPCODE_NPU_SET_DMA0_DST      = 49,
+    CMD1_OPCODE_NPU_SET_DMA0_LEN      = 50,
+    CMD1_OPCODE_NPU_SET_IFM2_BASE0    = 128,
+    CMD1_OPCODE_NPU_SET_IFM2_BASE1    = 129,
+    CMD1_OPCODE_NPU_SET_IFM2_BASE2    = 130,
+    CMD1_OPCODE_NPU_SET_IFM2_BASE3    = 131,
+    CMD1_OPCODE_NPU_SET_IFM2_STRIDE_X = 132,
+    CMD1_OPCODE_NPU_SET_IFM2_STRIDE_Y = 133,
+    CMD1_OPCODE_NPU_SET_IFM2_STRIDE_C = 134,
+    CMD1_OPCODE_NPU_SET_USER_DEFINED0 = 160,
+    CMD1_OPCODE_NPU_SET_USER_DEFINED1 = 161,
+    CMD1_OPCODE_NPU_SET_USER_DEFINED2 = 162,
+    CMD1_OPCODE_NPU_SET_USER_DEFINED3 = 163,
+    CMD1_OPCODE_NPU_SET_USER_DEFINED4 = 164,
+    CMD1_OPCODE_NPU_SET_USER_DEFINED5 = 165,
+    CMD1_OPCODE_NPU_SET_USER_DEFINED6 = 166,
+    CMD1_OPCODE_NPU_SET_USER_DEFINED7 = 167,
+};
+
+enum cmd_ctrl
+{
+    CMD_CTRL_CMD0_CTRL = 0,
+    CMD_CTRL_CMD1_CTRL = 1,
+};
+
+enum custom_dma_cs
+{
+    CUSTOM_DMA_CS_DISABLE = 0,
+    CUSTOM_DMA_CS_ENABLE  = 1,
+};
+
+enum custom_dma
+{
+    CUSTOM_DMA_NOT_IMPLEMENTED = 0,
+    CUSTOM_DMA_IMPLEMENTED     = 1,
+};
+
+enum dma_fault_src
+{
+    DMA_FAULT_SRC_AXI_M0 = 0,
+    DMA_FAULT_SRC_AXI_M1 = 1,
+};
+
+enum dma_region_mode
+{
+    DMA_REGION_MODE_EXTERNAL = 0,
+    DMA_REGION_MODE_INTERNAL = 1,
+};
+
+enum dma_stride_mode
+{
+    DMA_STRIDE_MODE_D1 = 0,
 };
 
 enum elementwise_mode
@@ -1088,123 +1030,152 @@
     ELEMENTWISE_MODE_SHL   = 9,
 };
 
-enum ifm_precision
+enum functional_safety
 {
-    IFM_PRECISION_U8  = 0,
-    IFM_PRECISION_S8  = 1,
-    IFM_PRECISION_U16 = 4,
-    IFM_PRECISION_S16 = 5,
-    IFM_PRECISION_S32 = 9,
+    FUNCTIONAL_SAFETY_NOT_IMPLEMENTED = 0,
+    FUNCTIONAL_SAFETY_IMPLEMENTED     = 1,
+};
+
+enum ifm2_operand_order
+{
+    IFM2_OPERAND_ORDER_ORDER_B = 0,
+    IFM2_OPERAND_ORDER_ORDER_A = 1,
 };
 
 enum ifm_scale_mode
 {
-    IFM_SCALE_MODE_SCALE_16BIT     = 0,
-    IFM_SCALE_MODE_SCALE_OPA_32BIT = 1,
-    IFM_SCALE_MODE_SCALE_OPB_32BIT = 2,
+    IFM_SCALE_MODE_OPA_OPB_16 = 0,
+    IFM_SCALE_MODE_OPA_32     = 1,
+    IFM_SCALE_MODE_OPB_32     = 2,
 };
 
-enum macs_per_cc
+enum ifm_upscale_mode
 {
-    MACS_PER_CC_MACS_PER_CC_IS_5 = 0x5,
-    MACS_PER_CC_MACS_PER_CC_IS_6 = 0x6,
-    MACS_PER_CC_MACS_PER_CC_IS_7 = 0x7,
-    MACS_PER_CC_MACS_PER_CC_IS_8 = 0x8,
+    IFM_UPSCALE_MODE_NONE    = 0,
+    IFM_UPSCALE_MODE_NEAREST = 1,
+    IFM_UPSCALE_MODE_ZEROS   = 2,
 };
 
-enum memory_type
+enum kernel_decomposition
 {
-    MEMORY_TYPE_AXI0_OUTSTANDING_COUNTER0 = 0,
-    MEMORY_TYPE_AXI0_OUTSTANDING_COUNTER1 = 1,
-    MEMORY_TYPE_AXI1_OUTSTANDING_COUNTER2 = 2,
-    MEMORY_TYPE_AXI1_OUTSTANDING_COUNTER3 = 3,
+    KERNEL_DECOMPOSITION_D8X8 = 0,
+    KERNEL_DECOMPOSITION_D4X4 = 1,
 };
 
-enum ofm_precision
+enum kernel_dilation
 {
-    OFM_PRECISION_U8  = 0,
-    OFM_PRECISION_S8  = 1,
-    OFM_PRECISION_U16 = 2,
-    OFM_PRECISION_S16 = 3,
-    OFM_PRECISION_S32 = 5,
+    KERNEL_DILATION_NONE = 0,
+    KERNEL_DILATION_X2   = 1,
 };
 
-enum pmu_event_type
+enum max_beats
 {
-    PMU_EVENT_TYPE_NO_EVENT                     = 0x00,
-    PMU_EVENT_TYPE_CYCLE                        = 0x11,
-    PMU_EVENT_TYPE_NPU_IDLE                     = 0x20,
-    PMU_EVENT_TYPE_CC_STALLED_ON_BLOCKDEP       = 0x21,
-    PMU_EVENT_TYPE_CC_STALLED_ON_SHRAM_RECONFIG = 0x22,
-    PMU_EVENT_TYPE_NPU_ACTIVE                   = 0x23,
-    PMU_EVENT_TYPE_MAC_ACTIVE                   = 0x30,
-    PMU_EVENT_TYPE_MAC_ACTIVE_8BIT              = 0x31,
-    PMU_EVENT_TYPE_MAC_ACTIVE_16BIT             = 0x32,
-    PMU_EVENT_TYPE_MAC_DPU_ACTIVE               = 0x33,
-    PMU_EVENT_TYPE_MAC_STALLED_BY_WD_ACC        = 0x34,
-    PMU_EVENT_TYPE_MAC_STALLED_BY_WD            = 0x35,
-    PMU_EVENT_TYPE_MAC_STALLED_BY_ACC           = 0x36,
-    PMU_EVENT_TYPE_MAC_STALLED_BY_IB            = 0x37,
-    PMU_EVENT_TYPE_MAC_ACTIVE_32BIT             = 0x38,
-    PMU_EVENT_TYPE_MAC_STALLED_BY_INT_W         = 0x39,
-    PMU_EVENT_TYPE_MAC_STALLED_BY_INT_ACC       = 0x3A,
-    PMU_EVENT_TYPE_AO_ACTIVE                    = 0x40,
-    PMU_EVENT_TYPE_AO_ACTIVE_8BIT               = 0x41,
-    PMU_EVENT_TYPE_AO_ACTIVE_16BIT              = 0x42,
-    PMU_EVENT_TYPE_AO_STALLED_BY_OFMP_OB        = 0x43,
-    PMU_EVENT_TYPE_AO_STALLED_BY_OFMP           = 0x44,
-    PMU_EVENT_TYPE_AO_STALLED_BY_OB             = 0x45,
-    PMU_EVENT_TYPE_AO_STALLED_BY_ACC_IB         = 0x46,
-    PMU_EVENT_TYPE_AO_STALLED_BY_ACC            = 0x47,
-    PMU_EVENT_TYPE_AO_STALLED_BY_IB             = 0x48,
-    PMU_EVENT_TYPE_WD_ACTIVE                    = 0x50,
-    PMU_EVENT_TYPE_WD_STALLED                   = 0x51,
-    PMU_EVENT_TYPE_WD_STALLED_BY_WS             = 0x52,
-    PMU_EVENT_TYPE_WD_STALLED_BY_WD_BUF         = 0x53,
-    PMU_EVENT_TYPE_WD_PARSE_ACTIVE              = 0x54,
-    PMU_EVENT_TYPE_WD_PARSE_STALLED             = 0x55,
-    PMU_EVENT_TYPE_WD_PARSE_STALLED_IN          = 0x56,
-    PMU_EVENT_TYPE_WD_PARSE_STALLED_OUT         = 0x57,
-    PMU_EVENT_TYPE_WD_TRANS_WS                  = 0x58,
-    PMU_EVENT_TYPE_WD_TRANS_WB                  = 0x59,
-    PMU_EVENT_TYPE_WD_TRANS_DW0                 = 0x5a,
-    PMU_EVENT_TYPE_WD_TRANS_DW1                 = 0x5b,
-    PMU_EVENT_TYPE_AXI0_RD_TRANS_ACCEPTED       = 0x80,
-    PMU_EVENT_TYPE_AXI0_RD_TRANS_COMPLETED      = 0x81,
-    PMU_EVENT_TYPE_AXI0_RD_DATA_BEAT_RECEIVED   = 0x82,
-    PMU_EVENT_TYPE_AXI0_RD_TRAN_REQ_STALLED     = 0x83,
-    PMU_EVENT_TYPE_AXI0_WR_TRANS_ACCEPTED       = 0x84,
-    PMU_EVENT_TYPE_AXI0_WR_TRANS_COMPLETED_M    = 0x85,
-    PMU_EVENT_TYPE_AXI0_WR_TRANS_COMPLETED_S    = 0x86,
-    PMU_EVENT_TYPE_AXI0_WR_DATA_BEAT_WRITTEN    = 0x87,
-    PMU_EVENT_TYPE_AXI0_WR_TRAN_REQ_STALLED     = 0x88,
-    PMU_EVENT_TYPE_AXI0_WR_DATA_BEAT_STALLED    = 0x89,
-    PMU_EVENT_TYPE_AXI0_ENABLED_CYCLES          = 0x8c,
-    PMU_EVENT_TYPE_AXI0_RD_STALL_LIMIT          = 0x8e,
-    PMU_EVENT_TYPE_AXI0_WR_STALL_LIMIT          = 0x8f,
-    PMU_EVENT_TYPE_AXI1_RD_TRANS_ACCEPTED       = 0x180,
-    PMU_EVENT_TYPE_AXI1_RD_TRANS_COMPLETED      = 0x181,
-    PMU_EVENT_TYPE_AXI1_RD_DATA_BEAT_RECEIVED   = 0x182,
-    PMU_EVENT_TYPE_AXI1_RD_TRAN_REQ_STALLED     = 0x183,
-    PMU_EVENT_TYPE_AXI1_WR_TRANS_ACCEPTED       = 0x184,
-    PMU_EVENT_TYPE_AXI1_WR_TRANS_COMPLETED_M    = 0x185,
-    PMU_EVENT_TYPE_AXI1_WR_TRANS_COMPLETED_S    = 0x186,
-    PMU_EVENT_TYPE_AXI1_WR_DATA_BEAT_WRITTEN    = 0x187,
-    PMU_EVENT_TYPE_AXI1_WR_TRAN_REQ_STALLED     = 0x188,
-    PMU_EVENT_TYPE_AXI1_WR_DATA_BEAT_STALLED    = 0x189,
-    PMU_EVENT_TYPE_AXI1_ENABLED_CYCLES          = 0x18c,
-    PMU_EVENT_TYPE_AXI1_RD_STALL_LIMIT          = 0x18e,
-    PMU_EVENT_TYPE_AXI1_WR_STALL_LIMIT          = 0x18f,
-    PMU_EVENT_TYPE_AXI_LATENCY_ANY              = 0xa0,
-    PMU_EVENT_TYPE_AXI_LATENCY_32               = 0xa1,
-    PMU_EVENT_TYPE_AXI_LATENCY_64               = 0xa2,
-    PMU_EVENT_TYPE_AXI_LATENCY_128              = 0xa3,
-    PMU_EVENT_TYPE_AXI_LATENCY_256              = 0xa4,
-    PMU_EVENT_TYPE_AXI_LATENCY_512              = 0xa5,
-    PMU_EVENT_TYPE_AXI_LATENCY_1024             = 0xa6,
-    PMU_EVENT_TYPE_ECC_DMA                      = 0xb0,
-    PMU_EVENT_TYPE_ECC_SB0                      = 0xb1,
-    PMU_EVENT_TYPE_ECC_SB1                      = 0x1b1,
+    MAX_BEATS_B64  = 0,
+    MAX_BEATS_B128 = 1,
+    MAX_BEATS_B256 = 2,
+};
+
+enum mem_attr
+{
+    MEM_ATTR_AXI0_OUTSTANDING_COUNTER0 = 0,
+    MEM_ATTR_AXI0_OUTSTANDING_COUNTER1 = 1,
+    MEM_ATTR_AXI1_OUTSTANDING_COUNTER2 = 2,
+    MEM_ATTR_AXI1_OUTSTANDING_COUNTER3 = 3,
+};
+
+enum ofm_scale_mode
+{
+    OFM_SCALE_MODE_PER_CHANNEL = 0,
+    OFM_SCALE_MODE_GLOBAL      = 1,
+};
+
+enum pmu_axi_channel
+{
+    PMU_AXI_CHANNEL_RD_CMD        = 0,
+    PMU_AXI_CHANNEL_RD_IFM        = 1,
+    PMU_AXI_CHANNEL_RD_WEIGHTS    = 2,
+    PMU_AXI_CHANNEL_RD_SCALE_BIAS = 3,
+    PMU_AXI_CHANNEL_RD_MEM2MEM    = 4,
+    PMU_AXI_CHANNEL_WR_OFM        = 8,
+    PMU_AXI_CHANNEL_WR_MEM2MEM    = 9,
+};
+
+enum pmu_event
+{
+    PMU_EVENT_NO_EVENT                     = 0,
+    PMU_EVENT_CYCLE                        = 17,
+    PMU_EVENT_NPU_IDLE                     = 32,
+    PMU_EVENT_CC_STALLED_ON_BLOCKDEP       = 33,
+    PMU_EVENT_CC_STALLED_ON_SHRAM_RECONFIG = 34,
+    PMU_EVENT_NPU_ACTIVE                   = 35,
+    PMU_EVENT_MAC_ACTIVE                   = 48,
+    PMU_EVENT_MAC_ACTIVE_8BIT              = 49,
+    PMU_EVENT_MAC_ACTIVE_16BIT             = 50,
+    PMU_EVENT_MAC_DPU_ACTIVE               = 51,
+    PMU_EVENT_MAC_STALLED_BY_WD_ACC        = 52,
+    PMU_EVENT_MAC_STALLED_BY_WD            = 53,
+    PMU_EVENT_MAC_STALLED_BY_ACC           = 54,
+    PMU_EVENT_MAC_STALLED_BY_IB            = 55,
+    PMU_EVENT_MAC_ACTIVE_32BIT             = 56,
+    PMU_EVENT_MAC_STALLED_BY_INT_W         = 57,
+    PMU_EVENT_MAC_STALLED_BY_INT_ACC       = 58,
+    PMU_EVENT_AO_ACTIVE                    = 64,
+    PMU_EVENT_AO_ACTIVE_8BIT               = 65,
+    PMU_EVENT_AO_ACTIVE_16BIT              = 66,
+    PMU_EVENT_AO_STALLED_BY_OFMP_OB        = 67,
+    PMU_EVENT_AO_STALLED_BY_OFMP           = 68,
+    PMU_EVENT_AO_STALLED_BY_OB             = 69,
+    PMU_EVENT_AO_STALLED_BY_ACC_IB         = 70,
+    PMU_EVENT_AO_STALLED_BY_ACC            = 71,
+    PMU_EVENT_AO_STALLED_BY_IB             = 72,
+    PMU_EVENT_WD_ACTIVE                    = 80,
+    PMU_EVENT_WD_STALLED                   = 81,
+    PMU_EVENT_WD_STALLED_BY_WS             = 82,
+    PMU_EVENT_WD_STALLED_BY_WD_BUF         = 83,
+    PMU_EVENT_WD_PARSE_ACTIVE              = 84,
+    PMU_EVENT_WD_PARSE_STALLED             = 85,
+    PMU_EVENT_WD_PARSE_STALLED_IN          = 86,
+    PMU_EVENT_WD_PARSE_STALLED_OUT         = 87,
+    PMU_EVENT_WD_TRANS_WS                  = 88,
+    PMU_EVENT_WD_TRANS_WB                  = 89,
+    PMU_EVENT_WD_TRANS_DW0                 = 90,
+    PMU_EVENT_WD_TRANS_DW1                 = 91,
+    PMU_EVENT_AXI0_RD_TRANS_ACCEPTED       = 128,
+    PMU_EVENT_AXI0_RD_TRANS_COMPLETED      = 129,
+    PMU_EVENT_AXI0_RD_DATA_BEAT_RECEIVED   = 130,
+    PMU_EVENT_AXI0_RD_TRAN_REQ_STALLED     = 131,
+    PMU_EVENT_AXI0_WR_TRANS_ACCEPTED       = 132,
+    PMU_EVENT_AXI0_WR_TRANS_COMPLETED_M    = 133,
+    PMU_EVENT_AXI0_WR_TRANS_COMPLETED_S    = 134,
+    PMU_EVENT_AXI0_WR_DATA_BEAT_WRITTEN    = 135,
+    PMU_EVENT_AXI0_WR_TRAN_REQ_STALLED     = 136,
+    PMU_EVENT_AXI0_WR_DATA_BEAT_STALLED    = 137,
+    PMU_EVENT_AXI0_ENABLED_CYCLES          = 140,
+    PMU_EVENT_AXI0_RD_STALL_LIMIT          = 142,
+    PMU_EVENT_AXI0_WR_STALL_LIMIT          = 143,
+    PMU_EVENT_AXI_LATENCY_ANY              = 160,
+    PMU_EVENT_AXI_LATENCY_32               = 161,
+    PMU_EVENT_AXI_LATENCY_64               = 162,
+    PMU_EVENT_AXI_LATENCY_128              = 163,
+    PMU_EVENT_AXI_LATENCY_256              = 164,
+    PMU_EVENT_AXI_LATENCY_512              = 165,
+    PMU_EVENT_AXI_LATENCY_1024             = 166,
+    PMU_EVENT_ECC_DMA                      = 176,
+    PMU_EVENT_ECC_SB0                      = 177,
+    PMU_EVENT_AXI1_RD_TRANS_ACCEPTED       = 384,
+    PMU_EVENT_AXI1_RD_TRANS_COMPLETED      = 385,
+    PMU_EVENT_AXI1_RD_DATA_BEAT_RECEIVED   = 386,
+    PMU_EVENT_AXI1_RD_TRAN_REQ_STALLED     = 387,
+    PMU_EVENT_AXI1_WR_TRANS_ACCEPTED       = 388,
+    PMU_EVENT_AXI1_WR_TRANS_COMPLETED_M    = 389,
+    PMU_EVENT_AXI1_WR_TRANS_COMPLETED_S    = 390,
+    PMU_EVENT_AXI1_WR_DATA_BEAT_WRITTEN    = 391,
+    PMU_EVENT_AXI1_WR_TRAN_REQ_STALLED     = 392,
+    PMU_EVENT_AXI1_WR_DATA_BEAT_STALLED    = 393,
+    PMU_EVENT_AXI1_ENABLED_CYCLES          = 396,
+    PMU_EVENT_AXI1_RD_STALL_LIMIT          = 398,
+    PMU_EVENT_AXI1_WR_STALL_LIMIT          = 399,
+    PMU_EVENT_ECC_SB1                      = 433,
 };
 
 enum pooling_mode
@@ -1220,18 +1191,11 @@
     PRIVILEGE_LEVEL_PRIVILEGED = 1,
 };
 
-enum resampling_mode
+enum round_mode
 {
-    RESAMPLING_MODE_NONE      = 0,
-    RESAMPLING_MODE_NEAREST   = 1,
-    RESAMPLING_MODE_TRANSPOSE = 2,
-};
-
-enum rounding
-{
-    ROUNDING_TFL      = 0,
-    ROUNDING_TRUNCATE = 1,
-    ROUNDING_NATURAL  = 2,
+    ROUND_MODE_DBL      = 0,
+    ROUND_MODE_TRUNCATE = 1,
+    ROUND_MODE_NATURAL  = 2,
 };
 
 enum security_level
@@ -1240,35 +1204,410 @@
     SECURITY_LEVEL_NON_SECURE = 1,
 };
 
-enum shram_size
-{
-    SHRAM_SIZE_SHRAM_96KB = 0x60,
-    SHRAM_SIZE_SHRAM_48KB = 0x30,
-    SHRAM_SIZE_SHRAM_24KB = 0x18,
-    SHRAM_SIZE_SHRAM_16KB = 0x10,
-};
-
 enum state
 {
     STATE_STOPPED = 0,
     STATE_RUNNING = 1,
 };
 
-enum stride_mode
+enum wd_core_slice_state
 {
-    STRIDE_MODE_STRIDE_MODE_1D = 0,
-    STRIDE_MODE_STRIDE_MODE_2D = 1,
-    STRIDE_MODE_STRIDE_MODE_3D = 2,
+    WD_CORE_SLICE_STATE_HEADER  = 0,
+    WD_CORE_SLICE_STATE_PALETTE = 1,
+    WD_CORE_SLICE_STATE_WEIGHTS = 2,
+};
+
+enum wd_ctrl_state
+{
+    WD_CTRL_STATE_IDLE     = 0,
+    WD_CTRL_STATE_DRAIN    = 1,
+    WD_CTRL_STATE_OFD_INIT = 2,
+    WD_CTRL_STATE_OFD_RUN  = 3,
+};
+
+enum weight_order
+{
+    WEIGHT_ORDER_DEPTH_FIRST       = 0,
+    WEIGHT_ORDER_PART_KERNEL_FIRST = 1,
 };
 
 #endif
 
+#ifdef NPU_DISASSEMBLE
+
+static const char *acc_format_str[] = {
+    "ACC_FORMAT_I32",
+    "ACC_FORMAT_I40",
+    "ACC_FORMAT_F16",
+};
+
+static const char *activation_clip_range_str[] = {
+    "ACTIVATION_CLIP_RANGE_OFM_PRECISION",
+    "ACTIVATION_CLIP_RANGE_FORCE_UINT8",
+    "ACTIVATION_CLIP_RANGE_FORCE_INT8",
+    "ACTIVATION_CLIP_RANGE_FORCE_INT16",
+};
+
+static const char *activation_format_str[] = {
+    "ACTIVATION_FORMAT_NHWC",
+    "ACTIVATION_FORMAT_NHCWB16",
+};
+
+static const char *activation_function_str[] = {
+    "ACTIVATION_FUNCTION_RELU",
+    "ACTIVATION_FUNCTION_TANH",
+    "ACTIVATION_FUNCTION_SIGMOID",
+    "ACTIVATION_FUNCTION_TABLE_0",
+    "ACTIVATION_FUNCTION_TABLE_1",
+    "ACTIVATION_FUNCTION_TABLE_2",
+    "ACTIVATION_FUNCTION_TABLE_3",
+    "ACTIVATION_FUNCTION_TABLE_4",
+    "ACTIVATION_FUNCTION_TABLE_5",
+    "ACTIVATION_FUNCTION_TABLE_6",
+    "ACTIVATION_FUNCTION_TABLE_7",
+};
+
+static const char *activation_precision_str[] = {
+    "ACTIVATION_PRECISION_B8",
+    "ACTIVATION_PRECISION_B16",
+    "ACTIVATION_PRECISION_B32",
+    "ACTIVATION_PRECISION_B64",
+};
+
+static const char *activation_type_str[] = {
+    "ACTIVATION_TYPE_UNSIGNED",
+    "ACTIVATION_TYPE_SIGNED",
+};
+
+static const char *axi_mem_encoding_str[] = {
+    "AXI_MEM_ENCODING_DEVICE_NON_BUFFERABLE",
+    "AXI_MEM_ENCODING_DEVICE_BUFFERABLE",
+    "AXI_MEM_ENCODING_NORMAL_NON_CACHEABLE_NON_BUFFERABLE",
+    "AXI_MEM_ENCODING_NORMAL_NON_CACHEABLE_BUFFERABLE",
+    "AXI_MEM_ENCODING_WRITE_THROUGH_NO_ALLOCATE",
+    "AXI_MEM_ENCODING_WRITE_THROUGH_READ_ALLOCATE",
+    "AXI_MEM_ENCODING_WRITE_THROUGH_WRITE_ALLOCATE",
+    "AXI_MEM_ENCODING_WRITE_THROUGH_READ_AND_WRITE_ALLOCATE",
+    "AXI_MEM_ENCODING_WRITE_BACK_NO_ALLOCATE",
+    "AXI_MEM_ENCODING_WRITE_BACK_READ_ALLOCATE",
+    "AXI_MEM_ENCODING_WRITE_BACK_WRITE_ALLOCATE",
+    "AXI_MEM_ENCODING_WRITE_BACK_READ_AND_WRITE_ALLOCATE",
+};
+
+static const char *broadcast_mode_str[] = {
+    "BROADCAST_MODE_DISABLE",
+    "BROADCAST_MODE_ENABLE",
+};
+
+static const char *cmd0_opcode_str[] = {
+    "CMD0_OPCODE_NPU_OP_STOP",
+    "CMD0_OPCODE_NPU_OP_IRQ",
+    "CMD0_OPCODE_NPU_OP_CONV",
+    "CMD0_OPCODE_NPU_OP_DEPTHWISE",
+    "CMD0_OPCODE_NPU_OP_POOL",
+    "CMD0_OPCODE_NPU_OP_ELEMENTWISE",
+    "CMD0_OPCODE_NPU_OP_DMA_START",
+    "CMD0_OPCODE_NPU_OP_DMA_WAIT",
+    "CMD0_OPCODE_NPU_OP_KERNEL_WAIT",
+    "CMD0_OPCODE_NPU_OP_PMU_MASK",
+    "CMD0_OPCODE_NPU_SET_IFM_PAD_TOP",
+    "CMD0_OPCODE_NPU_SET_IFM_PAD_LEFT",
+    "CMD0_OPCODE_NPU_SET_IFM_PAD_RIGHT",
+    "CMD0_OPCODE_NPU_SET_IFM_PAD_BOTTOM",
+    "CMD0_OPCODE_NPU_SET_IFM_DEPTH_M1",
+    "CMD0_OPCODE_NPU_SET_IFM_PRECISION",
+    "CMD0_OPCODE_NPU_SET_IFM_UPSCALE",
+    "CMD0_OPCODE_NPU_SET_IFM_ZERO_POINT",
+    "CMD0_OPCODE_NPU_SET_IFM_WIDTH0_M1",
+    "CMD0_OPCODE_NPU_SET_IFM_HEIGHT0_M1",
+    "CMD0_OPCODE_NPU_SET_IFM_HEIGHT1_M1",
+    "CMD0_OPCODE_NPU_SET_IFM_IB_END",
+    "CMD0_OPCODE_NPU_SET_IFM_REGION",
+    "CMD0_OPCODE_NPU_SET_OFM_WIDTH_M1",
+    "CMD0_OPCODE_NPU_SET_OFM_HEIGHT_M1",
+    "CMD0_OPCODE_NPU_SET_OFM_DEPTH_M1",
+    "CMD0_OPCODE_NPU_SET_OFM_PRECISION",
+    "CMD0_OPCODE_NPU_SET_OFM_BLK_WIDTH_M1",
+    "CMD0_OPCODE_NPU_SET_OFM_BLK_HEIGHT_M1",
+    "CMD0_OPCODE_NPU_SET_OFM_BLK_DEPTH_M1",
+    "CMD0_OPCODE_NPU_SET_OFM_ZERO_POINT",
+    "CMD0_OPCODE_NPU_SET_OFM_WIDTH0_M1",
+    "CMD0_OPCODE_NPU_SET_OFM_HEIGHT0_M1",
+    "CMD0_OPCODE_NPU_SET_OFM_HEIGHT1_M1",
+    "CMD0_OPCODE_NPU_SET_OFM_REGION",
+    "CMD0_OPCODE_NPU_SET_KERNEL_WIDTH_M1",
+    "CMD0_OPCODE_NPU_SET_KERNEL_HEIGHT_M1",
+    "CMD0_OPCODE_NPU_SET_KERNEL_STRIDE",
+    "CMD0_OPCODE_NPU_SET_ACC_FORMAT",
+    "CMD0_OPCODE_NPU_SET_ACTIVATION",
+    "CMD0_OPCODE_NPU_SET_ACTIVATION_MIN",
+    "CMD0_OPCODE_NPU_SET_ACTIVATION_MAX",
+    "CMD0_OPCODE_NPU_SET_WEIGHT_REGION",
+    "CMD0_OPCODE_NPU_SET_SCALE_REGION",
+    "CMD0_OPCODE_NPU_SET_AB_START",
+    "CMD0_OPCODE_NPU_SET_BLOCKDEP",
+    "CMD0_OPCODE_NPU_SET_DMA0_SRC_REGION",
+    "CMD0_OPCODE_NPU_SET_DMA0_DST_REGION",
+    "CMD0_OPCODE_NPU_SET_DMA0_SIZE0",
+    "CMD0_OPCODE_NPU_SET_DMA0_SIZE1",
+    "CMD0_OPCODE_NPU_SET_IFM2_BROADCAST",
+    "CMD0_OPCODE_NPU_SET_IFM2_SCALAR",
+    "CMD0_OPCODE_NPU_SET_IFM2_PRECISION",
+    "CMD0_OPCODE_NPU_SET_IFM2_ZERO_POINT",
+    "CMD0_OPCODE_NPU_SET_IFM2_WIDTH0_M1",
+    "CMD0_OPCODE_NPU_SET_IFM2_HEIGHT0_M1",
+    "CMD0_OPCODE_NPU_SET_IFM2_HEIGHT1_M1",
+    "CMD0_OPCODE_NPU_SET_IFM2_IB_START",
+    "CMD0_OPCODE_NPU_SET_IFM2_REGION",
+};
+
+static const char *cmd1_opcode_str[] = {
+    "CMD1_OPCODE_NPU_SET_IFM_BASE0",     "CMD1_OPCODE_NPU_SET_IFM_BASE1",     "CMD1_OPCODE_NPU_SET_IFM_BASE2",
+    "CMD1_OPCODE_NPU_SET_IFM_BASE3",     "CMD1_OPCODE_NPU_SET_IFM_STRIDE_X",  "CMD1_OPCODE_NPU_SET_IFM_STRIDE_Y",
+    "CMD1_OPCODE_NPU_SET_IFM_STRIDE_C",  "CMD1_OPCODE_NPU_SET_OFM_BASE0",     "CMD1_OPCODE_NPU_SET_OFM_BASE1",
+    "CMD1_OPCODE_NPU_SET_OFM_BASE2",     "CMD1_OPCODE_NPU_SET_OFM_BASE3",     "CMD1_OPCODE_NPU_SET_OFM_STRIDE_X",
+    "CMD1_OPCODE_NPU_SET_OFM_STRIDE_Y",  "CMD1_OPCODE_NPU_SET_OFM_STRIDE_C",  "CMD1_OPCODE_NPU_SET_WEIGHT_BASE",
+    "CMD1_OPCODE_NPU_SET_WEIGHT_LENGTH", "CMD1_OPCODE_NPU_SET_SCALE_BASE",    "CMD1_OPCODE_NPU_SET_SCALE_LENGTH",
+    "CMD1_OPCODE_NPU_SET_OFM_SCALE",     "CMD1_OPCODE_NPU_SET_OPA_SCALE",     "CMD1_OPCODE_NPU_SET_OPB_SCALE",
+    "CMD1_OPCODE_NPU_SET_DMA0_SRC",      "CMD1_OPCODE_NPU_SET_DMA0_DST",      "CMD1_OPCODE_NPU_SET_DMA0_LEN",
+    "CMD1_OPCODE_NPU_SET_IFM2_BASE0",    "CMD1_OPCODE_NPU_SET_IFM2_BASE1",    "CMD1_OPCODE_NPU_SET_IFM2_BASE2",
+    "CMD1_OPCODE_NPU_SET_IFM2_BASE3",    "CMD1_OPCODE_NPU_SET_IFM2_STRIDE_X", "CMD1_OPCODE_NPU_SET_IFM2_STRIDE_Y",
+    "CMD1_OPCODE_NPU_SET_IFM2_STRIDE_C", "CMD1_OPCODE_NPU_SET_USER_DEFINED0", "CMD1_OPCODE_NPU_SET_USER_DEFINED1",
+    "CMD1_OPCODE_NPU_SET_USER_DEFINED2", "CMD1_OPCODE_NPU_SET_USER_DEFINED3", "CMD1_OPCODE_NPU_SET_USER_DEFINED4",
+    "CMD1_OPCODE_NPU_SET_USER_DEFINED5", "CMD1_OPCODE_NPU_SET_USER_DEFINED6", "CMD1_OPCODE_NPU_SET_USER_DEFINED7",
+};
+
+static const char *cmd_ctrl_str[] = {
+    "CMD_CTRL_CMD0_CTRL",
+    "CMD_CTRL_CMD1_CTRL",
+};
+
+static const char *custom_dma_cs_str[] = {
+    "CUSTOM_DMA_CS_DISABLE",
+    "CUSTOM_DMA_CS_ENABLE",
+};
+
+static const char *custom_dma_str[] = {
+    "CUSTOM_DMA_NOT_IMPLEMENTED",
+    "CUSTOM_DMA_IMPLEMENTED",
+};
+
+static const char *dma_fault_src_str[] = {
+    "DMA_FAULT_SRC_AXI_M0",
+    "DMA_FAULT_SRC_AXI_M1",
+};
+
+static const char *dma_region_mode_str[] = {
+    "DMA_REGION_MODE_EXTERNAL",
+    "DMA_REGION_MODE_INTERNAL",
+};
+
+static const char *dma_stride_mode_str[] = {
+    "DMA_STRIDE_MODE_D1",
+};
+
+static const char *elementwise_mode_str[] = {
+    "ELEMENTWISE_MODE_MUL",
+    "ELEMENTWISE_MODE_ADD",
+    "ELEMENTWISE_MODE_SUB",
+    "ELEMENTWISE_MODE_MIN",
+    "ELEMENTWISE_MODE_MAX",
+    "ELEMENTWISE_MODE_LRELU",
+    "ELEMENTWISE_MODE_ABS",
+    "ELEMENTWISE_MODE_CLZ",
+    "ELEMENTWISE_MODE_SHR",
+    "ELEMENTWISE_MODE_SHL",
+};
+
+static const char *functional_safety_str[] = {
+    "FUNCTIONAL_SAFETY_NOT_IMPLEMENTED",
+    "FUNCTIONAL_SAFETY_IMPLEMENTED",
+};
+
+static const char *ifm2_operand_order_str[] = {
+    "IFM2_OPERAND_ORDER_ORDER_B",
+    "IFM2_OPERAND_ORDER_ORDER_A",
+};
+
+static const char *ifm_scale_mode_str[] = {
+    "IFM_SCALE_MODE_OPA_OPB_16",
+    "IFM_SCALE_MODE_OPA_32",
+    "IFM_SCALE_MODE_OPB_32",
+};
+
+static const char *ifm_upscale_mode_str[] = {
+    "IFM_UPSCALE_MODE_NONE",
+    "IFM_UPSCALE_MODE_NEAREST",
+    "IFM_UPSCALE_MODE_ZEROS",
+};
+
+static const char *kernel_decomposition_str[] = {
+    "KERNEL_DECOMPOSITION_D8X8",
+    "KERNEL_DECOMPOSITION_D4X4",
+};
+
+static const char *kernel_dilation_str[] = {
+    "KERNEL_DILATION_NONE",
+    "KERNEL_DILATION_X2",
+};
+
+static const char *max_beats_str[] = {
+    "MAX_BEATS_B64",
+    "MAX_BEATS_B128",
+    "MAX_BEATS_B256",
+};
+
+static const char *mem_attr_str[] = {
+    "MEM_ATTR_AXI0_OUTSTANDING_COUNTER0",
+    "MEM_ATTR_AXI0_OUTSTANDING_COUNTER1",
+    "MEM_ATTR_AXI1_OUTSTANDING_COUNTER2",
+    "MEM_ATTR_AXI1_OUTSTANDING_COUNTER3",
+};
+
+static const char *ofm_scale_mode_str[] = {
+    "OFM_SCALE_MODE_PER_CHANNEL",
+    "OFM_SCALE_MODE_GLOBAL",
+};
+
+static const char *pmu_axi_channel_str[] = {
+    "PMU_AXI_CHANNEL_RD_CMD",
+    "PMU_AXI_CHANNEL_RD_IFM",
+    "PMU_AXI_CHANNEL_RD_WEIGHTS",
+    "PMU_AXI_CHANNEL_RD_SCALE_BIAS",
+    "PMU_AXI_CHANNEL_RD_MEM2MEM",
+    "PMU_AXI_CHANNEL_WR_OFM",
+    "PMU_AXI_CHANNEL_WR_MEM2MEM",
+};
+
+static const char *pmu_event_str[] = {
+    "PMU_EVENT_NO_EVENT",
+    "PMU_EVENT_CYCLE",
+    "PMU_EVENT_NPU_IDLE",
+    "PMU_EVENT_CC_STALLED_ON_BLOCKDEP",
+    "PMU_EVENT_CC_STALLED_ON_SHRAM_RECONFIG",
+    "PMU_EVENT_NPU_ACTIVE",
+    "PMU_EVENT_MAC_ACTIVE",
+    "PMU_EVENT_MAC_ACTIVE_8BIT",
+    "PMU_EVENT_MAC_ACTIVE_16BIT",
+    "PMU_EVENT_MAC_DPU_ACTIVE",
+    "PMU_EVENT_MAC_STALLED_BY_WD_ACC",
+    "PMU_EVENT_MAC_STALLED_BY_WD",
+    "PMU_EVENT_MAC_STALLED_BY_ACC",
+    "PMU_EVENT_MAC_STALLED_BY_IB",
+    "PMU_EVENT_MAC_ACTIVE_32BIT",
+    "PMU_EVENT_MAC_STALLED_BY_INT_W",
+    "PMU_EVENT_MAC_STALLED_BY_INT_ACC",
+    "PMU_EVENT_AO_ACTIVE",
+    "PMU_EVENT_AO_ACTIVE_8BIT",
+    "PMU_EVENT_AO_ACTIVE_16BIT",
+    "PMU_EVENT_AO_STALLED_BY_OFMP_OB",
+    "PMU_EVENT_AO_STALLED_BY_OFMP",
+    "PMU_EVENT_AO_STALLED_BY_OB",
+    "PMU_EVENT_AO_STALLED_BY_ACC_IB",
+    "PMU_EVENT_AO_STALLED_BY_ACC",
+    "PMU_EVENT_AO_STALLED_BY_IB",
+    "PMU_EVENT_WD_ACTIVE",
+    "PMU_EVENT_WD_STALLED",
+    "PMU_EVENT_WD_STALLED_BY_WS",
+    "PMU_EVENT_WD_STALLED_BY_WD_BUF",
+    "PMU_EVENT_WD_PARSE_ACTIVE",
+    "PMU_EVENT_WD_PARSE_STALLED",
+    "PMU_EVENT_WD_PARSE_STALLED_IN",
+    "PMU_EVENT_WD_PARSE_STALLED_OUT",
+    "PMU_EVENT_WD_TRANS_WS",
+    "PMU_EVENT_WD_TRANS_WB",
+    "PMU_EVENT_WD_TRANS_DW0",
+    "PMU_EVENT_WD_TRANS_DW1",
+    "PMU_EVENT_AXI0_RD_TRANS_ACCEPTED",
+    "PMU_EVENT_AXI0_RD_TRANS_COMPLETED",
+    "PMU_EVENT_AXI0_RD_DATA_BEAT_RECEIVED",
+    "PMU_EVENT_AXI0_RD_TRAN_REQ_STALLED",
+    "PMU_EVENT_AXI0_WR_TRANS_ACCEPTED",
+    "PMU_EVENT_AXI0_WR_TRANS_COMPLETED_M",
+    "PMU_EVENT_AXI0_WR_TRANS_COMPLETED_S",
+    "PMU_EVENT_AXI0_WR_DATA_BEAT_WRITTEN",
+    "PMU_EVENT_AXI0_WR_TRAN_REQ_STALLED",
+    "PMU_EVENT_AXI0_WR_DATA_BEAT_STALLED",
+    "PMU_EVENT_AXI0_ENABLED_CYCLES",
+    "PMU_EVENT_AXI0_RD_STALL_LIMIT",
+    "PMU_EVENT_AXI0_WR_STALL_LIMIT",
+    "PMU_EVENT_AXI_LATENCY_ANY",
+    "PMU_EVENT_AXI_LATENCY_32",
+    "PMU_EVENT_AXI_LATENCY_64",
+    "PMU_EVENT_AXI_LATENCY_128",
+    "PMU_EVENT_AXI_LATENCY_256",
+    "PMU_EVENT_AXI_LATENCY_512",
+    "PMU_EVENT_AXI_LATENCY_1024",
+    "PMU_EVENT_ECC_DMA",
+    "PMU_EVENT_ECC_SB0",
+    "PMU_EVENT_AXI1_RD_TRANS_ACCEPTED",
+    "PMU_EVENT_AXI1_RD_TRANS_COMPLETED",
+    "PMU_EVENT_AXI1_RD_DATA_BEAT_RECEIVED",
+    "PMU_EVENT_AXI1_RD_TRAN_REQ_STALLED",
+    "PMU_EVENT_AXI1_WR_TRANS_ACCEPTED",
+    "PMU_EVENT_AXI1_WR_TRANS_COMPLETED_M",
+    "PMU_EVENT_AXI1_WR_TRANS_COMPLETED_S",
+    "PMU_EVENT_AXI1_WR_DATA_BEAT_WRITTEN",
+    "PMU_EVENT_AXI1_WR_TRAN_REQ_STALLED",
+    "PMU_EVENT_AXI1_WR_DATA_BEAT_STALLED",
+    "PMU_EVENT_AXI1_ENABLED_CYCLES",
+    "PMU_EVENT_AXI1_RD_STALL_LIMIT",
+    "PMU_EVENT_AXI1_WR_STALL_LIMIT",
+    "PMU_EVENT_ECC_SB1",
+};
+
+static const char *pooling_mode_str[] = {
+    "POOLING_MODE_MAX",
+    "POOLING_MODE_AVERAGE",
+    "POOLING_MODE_REDUCE_SUM",
+};
+
+static const char *privilege_level_str[] = {
+    "PRIVILEGE_LEVEL_USER",
+    "PRIVILEGE_LEVEL_PRIVILEGED",
+};
+
+static const char *round_mode_str[] = {
+    "ROUND_MODE_DBL",
+    "ROUND_MODE_TRUNCATE",
+    "ROUND_MODE_NATURAL",
+};
+
+static const char *security_level_str[] = {
+    "SECURITY_LEVEL_SECURE",
+    "SECURITY_LEVEL_NON_SECURE",
+};
+
+static const char *state_str[] = {
+    "STATE_STOPPED",
+    "STATE_RUNNING",
+};
+
+static const char *wd_core_slice_state_str[] = {
+    "WD_CORE_SLICE_STATE_HEADER",
+    "WD_CORE_SLICE_STATE_PALETTE",
+    "WD_CORE_SLICE_STATE_WEIGHTS",
+};
+
+static const char *wd_ctrl_state_str[] = {
+    "WD_CTRL_STATE_IDLE",
+    "WD_CTRL_STATE_DRAIN",
+    "WD_CTRL_STATE_OFD_INIT",
+    "WD_CTRL_STATE_OFD_RUN",
+};
+
+static const char *weight_order_str[] = {
+    "WEIGHT_ORDER_DEPTH_FIRST",
+    "WEIGHT_ORDER_PART_KERNEL_FIRST",
+};
+
+#endif
+
+// Register type structs
 // id_r - ID register
 struct id_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
@@ -1276,7 +1615,7 @@
             uint32_t version_status : 4; // This is the version of the product
             uint32_t version_minor : 4;  // This is the n for the P part of an RnPn release number
             uint32_t version_major : 4;  // This is the n for the R part of an RnPn release number
-            uint32_t product_major : 4;  // This is the X part of the ML00X product number
+            uint32_t product_major : 4;  // Product major ID number (unique per base product)
             uint32_t arch_patch_rev : 4; // This is the patch number of the architecture version a.b
             uint32_t
                 arch_minor_rev : 8; // This is the minor architecture version number, b in the architecture version a.b
@@ -1285,31 +1624,28 @@
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR id_r() :
-        version_status(static_cast<uint32_t>(1)), version_minor(static_cast<uint32_t>(0x0)),
-        version_major(static_cast<uint32_t>(0x1)), product_major(static_cast<uint32_t>(4)),
-        arch_patch_rev(static_cast<uint32_t>(6)), arch_minor_rev(static_cast<uint32_t>(0)),
-        arch_major_rev(static_cast<uint32_t>(1))
-    {
-    }
-    CONSTEXPR id_r(uint32_t init) : word(init) {}
+    CONSTEXPR id_r() : word0(269500929) {}
+    CONSTEXPR id_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     id_r copy() volatile
     {
@@ -1317,118 +1653,116 @@
     }
     CONSTEXPR uint32_t get_version_status() const
     {
-        uint32_t value = static_cast<uint32_t>(version_status);
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 0));
         return value;
     }
     uint32_t get_version_status() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(version_status);
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 0));
         return value;
     }
     CONSTEXPR id_r &set_version_status(uint32_t value)
     {
-        version_status = ((1u << 4) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 4) - 1)) << 0) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 0);
         return *this;
     }
     CONSTEXPR uint32_t get_version_minor() const
     {
-        uint32_t value = static_cast<uint32_t>(version_minor);
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 4));
         return value;
     }
     uint32_t get_version_minor() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(version_minor);
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 4));
         return value;
     }
     CONSTEXPR id_r &set_version_minor(uint32_t value)
     {
-        version_minor = ((1u << 4) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 4) - 1)) << 4) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 4);
         return *this;
     }
     CONSTEXPR uint32_t get_version_major() const
     {
-        uint32_t value = static_cast<uint32_t>(version_major);
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 8));
         return value;
     }
     uint32_t get_version_major() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(version_major);
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 8));
         return value;
     }
     CONSTEXPR id_r &set_version_major(uint32_t value)
     {
-        version_major = ((1u << 4) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 4) - 1)) << 8) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 8);
         return *this;
     }
     CONSTEXPR uint32_t get_product_major() const
     {
-        uint32_t value = static_cast<uint32_t>(product_major);
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 12));
         return value;
     }
     uint32_t get_product_major() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(product_major);
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 12));
         return value;
     }
     CONSTEXPR id_r &set_product_major(uint32_t value)
     {
-        product_major = ((1u << 4) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 4) - 1)) << 12) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 12);
         return *this;
     }
     CONSTEXPR uint32_t get_arch_patch_rev() const
     {
-        uint32_t value = static_cast<uint32_t>(arch_patch_rev);
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 16));
         return value;
     }
     uint32_t get_arch_patch_rev() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(arch_patch_rev);
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 16));
         return value;
     }
     CONSTEXPR id_r &set_arch_patch_rev(uint32_t value)
     {
-        arch_patch_rev = ((1u << 4) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 4) - 1)) << 16) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 16);
         return *this;
     }
     CONSTEXPR uint32_t get_arch_minor_rev() const
     {
-        uint32_t value = static_cast<uint32_t>(arch_minor_rev);
+        uint32_t value = static_cast<uint32_t>(((1U << 8) - 1) & (word0 >> 20));
         return value;
     }
     uint32_t get_arch_minor_rev() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(arch_minor_rev);
+        uint32_t value = static_cast<uint32_t>(((1U << 8) - 1) & (word0 >> 20));
         return value;
     }
     CONSTEXPR id_r &set_arch_minor_rev(uint32_t value)
     {
-        arch_minor_rev = ((1u << 8) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 8) - 1)) << 20) & word0) | ((((1U << 8) - 1) & static_cast<uint32_t>(value)) << 20);
         return *this;
     }
     CONSTEXPR uint32_t get_arch_major_rev() const
     {
-        uint32_t value = static_cast<uint32_t>(arch_major_rev);
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 28));
         return value;
     }
     uint32_t get_arch_major_rev() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(arch_major_rev);
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 28));
         return value;
     }
     CONSTEXPR id_r &set_arch_major_rev(uint32_t value)
     {
-        arch_major_rev = ((1u << 4) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 4) - 1)) << 28) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 28);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
 // status_r - Register describes the current operating status of the NPU
 struct status_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
@@ -1452,235 +1786,227 @@
             uint32_t ecc_fault : 1; // ECC state for internal RAMs: 0=no fault 1=ECC fault signalled. Can only be
                                     // cleared by reset
             uint32_t reserved0 : 2;
-            uint32_t faulting_interface : 1; // Faulting interface on bus abort. 0=AXI-M0 1=AXI-M1
+            uint32_t faulting_interface : 1; // Faulting interface on bus abort
             uint32_t faulting_channel : 4;  // Faulting channel on a bus abort. Read: 0=Cmd 1=IFM 2=Weights 3=Scale+Bias
                                             // 4=Mem2Mem; Write: 8=OFM 9=Mem2Mem
             uint32_t irq_history_mask : 16; // IRQ History mask
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR status_r() :
-        state(static_cast<uint32_t>(::state::STOPPED)), irq_raised(static_cast<uint32_t>(0x0)),
-        bus_status(static_cast<uint32_t>(0x0)), reset_status(static_cast<uint32_t>(0x1)),
-        cmd_parse_error(static_cast<uint32_t>(0x0)), cmd_end_reached(static_cast<uint32_t>(0x0)),
-        pmu_irq_raised(static_cast<uint32_t>(0x0)), wd_fault(static_cast<uint32_t>(0x0)),
-        ecc_fault(static_cast<uint32_t>(0x0)), reserved0(static_cast<uint32_t>(0)),
-        faulting_interface(static_cast<uint32_t>(0x0)), faulting_channel(static_cast<uint32_t>(0x0)),
-        irq_history_mask(static_cast<uint32_t>(0x0))
-    {
-    }
-    CONSTEXPR status_r(uint32_t init) : word(init) {}
+    CONSTEXPR status_r() : word0(8) {}
+    CONSTEXPR status_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     status_r copy() volatile
     {
         return *this;
     }
-    CONSTEXPR ::state get_state() const
+    CONSTEXPR NPU_NAMESPACE::state get_state() const
     {
-        ::state value = static_cast<::state>(state);
+        NPU_NAMESPACE::state value = static_cast<NPU_NAMESPACE::state>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
-    ::state get_state() const volatile
+    NPU_NAMESPACE::state get_state() const volatile
     {
-        ::state value = static_cast<::state>(state);
+        NPU_NAMESPACE::state value = static_cast<NPU_NAMESPACE::state>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
-    CONSTEXPR status_r &set_state(::state value)
+    CONSTEXPR status_r &set_state(NPU_NAMESPACE::state value)
     {
-        state = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
         return *this;
     }
     CONSTEXPR uint32_t get_irq_raised() const
     {
-        uint32_t value = static_cast<uint32_t>(irq_raised);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
     uint32_t get_irq_raised() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(irq_raised);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
     CONSTEXPR status_r &set_irq_raised(uint32_t value)
     {
-        irq_raised = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
         return *this;
     }
     CONSTEXPR uint32_t get_bus_status() const
     {
-        uint32_t value = static_cast<uint32_t>(bus_status);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
     uint32_t get_bus_status() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(bus_status);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
     CONSTEXPR status_r &set_bus_status(uint32_t value)
     {
-        bus_status = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
         return *this;
     }
     CONSTEXPR uint32_t get_reset_status() const
     {
-        uint32_t value = static_cast<uint32_t>(reset_status);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
         return value;
     }
     uint32_t get_reset_status() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(reset_status);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
         return value;
     }
     CONSTEXPR status_r &set_reset_status(uint32_t value)
     {
-        reset_status = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3);
         return *this;
     }
     CONSTEXPR uint32_t get_cmd_parse_error() const
     {
-        uint32_t value = static_cast<uint32_t>(cmd_parse_error);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4));
         return value;
     }
     uint32_t get_cmd_parse_error() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(cmd_parse_error);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4));
         return value;
     }
     CONSTEXPR status_r &set_cmd_parse_error(uint32_t value)
     {
-        cmd_parse_error = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 4) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 4);
         return *this;
     }
     CONSTEXPR uint32_t get_cmd_end_reached() const
     {
-        uint32_t value = static_cast<uint32_t>(cmd_end_reached);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5));
         return value;
     }
     uint32_t get_cmd_end_reached() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(cmd_end_reached);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5));
         return value;
     }
     CONSTEXPR status_r &set_cmd_end_reached(uint32_t value)
     {
-        cmd_end_reached = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 5) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 5);
         return *this;
     }
     CONSTEXPR uint32_t get_pmu_irq_raised() const
     {
-        uint32_t value = static_cast<uint32_t>(pmu_irq_raised);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6));
         return value;
     }
     uint32_t get_pmu_irq_raised() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(pmu_irq_raised);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6));
         return value;
     }
     CONSTEXPR status_r &set_pmu_irq_raised(uint32_t value)
     {
-        pmu_irq_raised = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 6) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 6);
         return *this;
     }
     CONSTEXPR uint32_t get_wd_fault() const
     {
-        uint32_t value = static_cast<uint32_t>(wd_fault);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7));
         return value;
     }
     uint32_t get_wd_fault() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(wd_fault);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7));
         return value;
     }
     CONSTEXPR status_r &set_wd_fault(uint32_t value)
     {
-        wd_fault = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 7) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 7);
         return *this;
     }
     CONSTEXPR uint32_t get_ecc_fault() const
     {
-        uint32_t value = static_cast<uint32_t>(ecc_fault);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 8));
         return value;
     }
     uint32_t get_ecc_fault() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(ecc_fault);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 8));
         return value;
     }
     CONSTEXPR status_r &set_ecc_fault(uint32_t value)
     {
-        ecc_fault = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 8) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 8);
         return *this;
     }
-    CONSTEXPR uint32_t get_faulting_interface() const
+    CONSTEXPR NPU_NAMESPACE::dma_fault_src get_faulting_interface() const
     {
-        uint32_t value = static_cast<uint32_t>(faulting_interface);
+        NPU_NAMESPACE::dma_fault_src value = static_cast<NPU_NAMESPACE::dma_fault_src>(((1U << 1) - 1) & (word0 >> 11));
         return value;
     }
-    uint32_t get_faulting_interface() const volatile
+    NPU_NAMESPACE::dma_fault_src get_faulting_interface() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(faulting_interface);
+        NPU_NAMESPACE::dma_fault_src value = static_cast<NPU_NAMESPACE::dma_fault_src>(((1U << 1) - 1) & (word0 >> 11));
         return value;
     }
-    CONSTEXPR status_r &set_faulting_interface(uint32_t value)
+    CONSTEXPR status_r &set_faulting_interface(NPU_NAMESPACE::dma_fault_src value)
     {
-        faulting_interface = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 11) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 11);
         return *this;
     }
     CONSTEXPR uint32_t get_faulting_channel() const
     {
-        uint32_t value = static_cast<uint32_t>(faulting_channel);
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 12));
         return value;
     }
     uint32_t get_faulting_channel() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(faulting_channel);
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 12));
         return value;
     }
     CONSTEXPR status_r &set_faulting_channel(uint32_t value)
     {
-        faulting_channel = ((1u << 4) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 4) - 1)) << 12) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 12);
         return *this;
     }
     CONSTEXPR uint32_t get_irq_history_mask() const
     {
-        uint32_t value = static_cast<uint32_t>(irq_history_mask);
+        uint32_t value = static_cast<uint32_t>(((1U << 16) - 1) & (word0 >> 16));
         return value;
     }
     uint32_t get_irq_history_mask() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(irq_history_mask);
+        uint32_t value = static_cast<uint32_t>(((1U << 16) - 1) & (word0 >> 16));
         return value;
     }
     CONSTEXPR status_r &set_irq_history_mask(uint32_t value)
     {
-        irq_history_mask = ((1u << 16) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 16) - 1)) << 16) & word0) | ((((1U << 16) - 1) & static_cast<uint32_t>(value)) << 16);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
 // cmd_r - Command register, reads as last written command
 struct cmd_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
@@ -1689,7 +2015,7 @@
                                                       // no effect
             uint32_t clear_irq : 1; // Write 1 to clear the IRQ status in the STATUS register. Writing 0 has no effect
             uint32_t clock_q_enable : 1; // Write 1 to this bit to enable clock off using clock q-interface and enable
-                                         // the master clock gate
+                                         // the requester clock gate
             uint32_t power_q_enable : 1; // Write 1 to this bit to enable power off using power q-interface
             uint32_t
                 stop_request : 1; // Write 1 to this bit to request STOP after completing any already-started commands
@@ -1698,31 +2024,28 @@
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR cmd_r() :
-        transition_to_running_state(static_cast<uint32_t>(0x0)), clear_irq(static_cast<uint32_t>(0x0)),
-        clock_q_enable(static_cast<uint32_t>(0x1)), power_q_enable(static_cast<uint32_t>(0x1)),
-        stop_request(static_cast<uint32_t>(0x0)), reserved0(static_cast<uint32_t>(0)),
-        clear_irq_history(static_cast<uint32_t>(0x0))
-    {
-    }
-    CONSTEXPR cmd_r(uint32_t init) : word(init) {}
+    CONSTEXPR cmd_r() : word0(12) {}
+    CONSTEXPR cmd_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     cmd_r copy() volatile
     {
@@ -1730,103 +2053,101 @@
     }
     CONSTEXPR uint32_t get_transition_to_running_state() const
     {
-        uint32_t value = static_cast<uint32_t>(transition_to_running_state);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
     uint32_t get_transition_to_running_state() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(transition_to_running_state);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
     CONSTEXPR cmd_r &set_transition_to_running_state(uint32_t value)
     {
-        transition_to_running_state = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
         return *this;
     }
     CONSTEXPR uint32_t get_clear_irq() const
     {
-        uint32_t value = static_cast<uint32_t>(clear_irq);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
     uint32_t get_clear_irq() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(clear_irq);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
     CONSTEXPR cmd_r &set_clear_irq(uint32_t value)
     {
-        clear_irq = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
         return *this;
     }
     CONSTEXPR uint32_t get_clock_q_enable() const
     {
-        uint32_t value = static_cast<uint32_t>(clock_q_enable);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
     uint32_t get_clock_q_enable() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(clock_q_enable);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
     CONSTEXPR cmd_r &set_clock_q_enable(uint32_t value)
     {
-        clock_q_enable = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
         return *this;
     }
     CONSTEXPR uint32_t get_power_q_enable() const
     {
-        uint32_t value = static_cast<uint32_t>(power_q_enable);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
         return value;
     }
     uint32_t get_power_q_enable() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(power_q_enable);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
         return value;
     }
     CONSTEXPR cmd_r &set_power_q_enable(uint32_t value)
     {
-        power_q_enable = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3);
         return *this;
     }
     CONSTEXPR uint32_t get_stop_request() const
     {
-        uint32_t value = static_cast<uint32_t>(stop_request);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4));
         return value;
     }
     uint32_t get_stop_request() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(stop_request);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4));
         return value;
     }
     CONSTEXPR cmd_r &set_stop_request(uint32_t value)
     {
-        stop_request = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 4) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 4);
         return *this;
     }
     CONSTEXPR uint32_t get_clear_irq_history() const
     {
-        uint32_t value = static_cast<uint32_t>(clear_irq_history);
+        uint32_t value = static_cast<uint32_t>(((1U << 16) - 1) & (word0 >> 16));
         return value;
     }
     uint32_t get_clear_irq_history() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(clear_irq_history);
+        uint32_t value = static_cast<uint32_t>(((1U << 16) - 1) & (word0 >> 16));
         return value;
     }
     CONSTEXPR cmd_r &set_clear_irq_history(uint32_t value)
     {
-        clear_irq_history = ((1u << 16) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 16) - 1)) << 16) & word0) | ((((1U << 16) - 1) & static_cast<uint32_t>(value)) << 16);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
 // reset_r - Request Reset and new security mode
 struct reset_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
@@ -1837,203 +2158,154 @@
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR reset_r() :
-        pending_CPL(static_cast<uint32_t>(::privilege_level::USER)),
-        pending_CSL(static_cast<uint32_t>(::security_level::SECURE)), reserved0(static_cast<uint32_t>(0))
-    {
-    }
-    CONSTEXPR reset_r(uint32_t init) : word(init) {}
+    CONSTEXPR reset_r() : word0(0) {}
+    CONSTEXPR reset_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     reset_r copy() volatile
     {
         return *this;
     }
-    CONSTEXPR ::privilege_level get_pending_CPL() const
+    CONSTEXPR NPU_NAMESPACE::privilege_level get_pending_CPL() const
     {
-        ::privilege_level value = static_cast<::privilege_level>(pending_CPL);
+        NPU_NAMESPACE::privilege_level value =
+            static_cast<NPU_NAMESPACE::privilege_level>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
-    ::privilege_level get_pending_CPL() const volatile
+    NPU_NAMESPACE::privilege_level get_pending_CPL() const volatile
     {
-        ::privilege_level value = static_cast<::privilege_level>(pending_CPL);
+        NPU_NAMESPACE::privilege_level value =
+            static_cast<NPU_NAMESPACE::privilege_level>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
-    CONSTEXPR reset_r &set_pending_CPL(::privilege_level value)
+    CONSTEXPR reset_r &set_pending_CPL(NPU_NAMESPACE::privilege_level value)
     {
-        pending_CPL = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
         return *this;
     }
-    CONSTEXPR ::security_level get_pending_CSL() const
+    CONSTEXPR NPU_NAMESPACE::security_level get_pending_CSL() const
     {
-        ::security_level value = static_cast<::security_level>(pending_CSL);
+        NPU_NAMESPACE::security_level value =
+            static_cast<NPU_NAMESPACE::security_level>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
-    ::security_level get_pending_CSL() const volatile
+    NPU_NAMESPACE::security_level get_pending_CSL() const volatile
     {
-        ::security_level value = static_cast<::security_level>(pending_CSL);
+        NPU_NAMESPACE::security_level value =
+            static_cast<NPU_NAMESPACE::security_level>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
-    CONSTEXPR reset_r &set_pending_CSL(::security_level value)
+    CONSTEXPR reset_r &set_pending_CSL(NPU_NAMESPACE::security_level value)
     {
-        pending_CSL = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
-// qbase0_r - Base address of command queue bits [31:0]. The address is 4 byte aligned
-struct qbase0_r
+// qbase_r - Base address of command queue. The address is 4 byte aligned
+struct qbase_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
-        uint32_t QBASE0; // The 4 byte aligned lower bytes of the base address value for the command stream
-        uint32_t word;
+        struct
+        {
+            uint32_t offset : 32; // Offset
+            uint32_t reserved0 : 32;
+        };
+        uint32_t word[2];
     };
-#ifdef __cplusplus
-  public:
-    CONSTEXPR qbase0_r() : QBASE0(static_cast<uint32_t>(0x00000000)) {}
-    CONSTEXPR qbase0_r(uint32_t init) : word(init) {}
-    CONSTEXPR void operator=(uint32_t value)
-    {
-        word = value;
-    }
-    void operator=(uint32_t value) volatile
-    {
-        word = value;
-    }
-    CONSTEXPR operator uint32_t()
-    {
-        return word;
-    }
-    operator uint32_t() volatile
-    {
-        return word;
-    }
-    qbase0_r copy() volatile
-    {
-        return *this;
-    }
-    CONSTEXPR uint32_t get_QBASE0() const
-    {
-        uint32_t value = static_cast<uint32_t>(QBASE0);
-        return value;
-    }
-    uint32_t get_QBASE0() const volatile
-    {
-        uint32_t value = static_cast<uint32_t>(QBASE0);
-        return value;
-    }
-    CONSTEXPR qbase0_r &set_QBASE0(uint32_t value)
-    {
-        QBASE0 = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
 
-// qbase1_r - Address extension bits [47:32] bits for queue base
-struct qbase1_r
-{
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
-    union
-    {
-        uint32_t QBASE1; // The 4 byte aligned upper bytes of the base address value for the command stream
-        uint32_t word;
-    };
-#ifdef __cplusplus
   public:
-    CONSTEXPR qbase1_r() : QBASE1(static_cast<uint32_t>(0x00000000)) {}
-    CONSTEXPR qbase1_r(uint32_t init) : word(init) {}
-    CONSTEXPR void operator=(uint32_t value)
+    CONSTEXPR qbase_r() : word0(0), word1(0) {}
+    CONSTEXPR qbase_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
     {
-        word = value;
     }
-    void operator=(uint32_t value) volatile
+    CONSTEXPR void operator=(uint64_t value)
     {
-        word = value;
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
     }
-    CONSTEXPR operator uint32_t()
+    void operator=(uint64_t value) volatile
     {
-        return word;
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
     }
-    operator uint32_t() volatile
+    CONSTEXPR operator uint64_t()
     {
-        return word;
+        return (static_cast<uint64_t>(word1) << 32) | word0;
     }
-    qbase1_r copy() volatile
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    qbase_r copy() volatile
     {
         return *this;
     }
-    CONSTEXPR uint32_t get_QBASE1() const
-    {
-        uint32_t value = static_cast<uint32_t>(QBASE1);
-        return value;
-    }
-    uint32_t get_QBASE1() const volatile
-    {
-        uint32_t value = static_cast<uint32_t>(QBASE1);
-        return value;
-    }
-    CONSTEXPR qbase1_r &set_QBASE1(uint32_t value)
-    {
-        QBASE1 = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
+#endif
 };
 
 // qread_r - Read offset in the command stream in bytes. Multiple of 4 in the range 0 to 16 MB
 struct qread_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
-        uint32_t QREAD; // The read offset of the current command under execution
+        struct
+        {
+            uint32_t QREAD : 32; // The read offset of the current command under execution
+        };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR qread_r() : QREAD(static_cast<uint32_t>(0x00000000)) {}
-    CONSTEXPR qread_r(uint32_t init) : word(init) {}
+    CONSTEXPR qread_r() : word0(0) {}
+    CONSTEXPR qread_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     qread_r copy() volatile
     {
@@ -2041,105 +2313,114 @@
     }
     CONSTEXPR uint32_t get_QREAD() const
     {
-        uint32_t value = static_cast<uint32_t>(QREAD);
+        uint32_t value = static_cast<uint32_t>(word0);
         return value;
     }
     uint32_t get_QREAD() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(QREAD);
+        uint32_t value = static_cast<uint32_t>(word0);
         return value;
     }
     CONSTEXPR qread_r &set_QREAD(uint32_t value)
     {
-        QREAD = static_cast<uint32_t>(value);
+        word0 = static_cast<uint32_t>(value);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
 // qconfig_r - AXI configuration for the command stream in the range 0-3. Same encoding as for REGIONCFG
 struct qconfig_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
-        uint32_t QCONFIG; // AXI configuration for the command stream in the range 0-3
+        struct
+        {
+            uint32_t cmd_region0 : 2; // Command region configuration
+            uint32_t reserved0 : 30;
+        };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR qconfig_r() : QCONFIG(static_cast<uint32_t>(0x00000000)) {}
-    CONSTEXPR qconfig_r(uint32_t init) : word(init) {}
+    CONSTEXPR qconfig_r() : word0(0) {}
+    CONSTEXPR qconfig_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     qconfig_r copy() volatile
     {
         return *this;
     }
-    CONSTEXPR uint32_t get_QCONFIG() const
+    CONSTEXPR NPU_NAMESPACE::mem_attr get_cmd_region0() const
     {
-        uint32_t value = static_cast<uint32_t>(QCONFIG);
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 0));
         return value;
     }
-    uint32_t get_QCONFIG() const volatile
+    NPU_NAMESPACE::mem_attr get_cmd_region0() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(QCONFIG);
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 0));
         return value;
     }
-    CONSTEXPR qconfig_r &set_QCONFIG(uint32_t value)
+    CONSTEXPR qconfig_r &set_cmd_region0(NPU_NAMESPACE::mem_attr value)
     {
-        QCONFIG = static_cast<uint32_t>(value);
+        word0 = (((~((1U << 2) - 1)) << 0) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 0);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
 // qsize_r - Size of the command stream in bytes. Multiple of 4 in the range 0 to 16 MB
 struct qsize_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
-        uint32_t QSIZE; // Size of the next command stream to be executed by the NPU
+        struct
+        {
+            uint32_t QSIZE : 32; // Size of the next command stream to be executed by the NPU
+        };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR qsize_r() : QSIZE(static_cast<uint32_t>(0x00000000)) {}
-    CONSTEXPR qsize_r(uint32_t init) : word(init) {}
+    CONSTEXPR qsize_r() : word0(0) {}
+    CONSTEXPR qsize_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     qsize_r copy() volatile
     {
@@ -2147,28 +2428,26 @@
     }
     CONSTEXPR uint32_t get_QSIZE() const
     {
-        uint32_t value = static_cast<uint32_t>(QSIZE);
+        uint32_t value = static_cast<uint32_t>(word0);
         return value;
     }
     uint32_t get_QSIZE() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(QSIZE);
+        uint32_t value = static_cast<uint32_t>(word0);
         return value;
     }
     CONSTEXPR qsize_r &set_QSIZE(uint32_t value)
     {
-        QSIZE = static_cast<uint32_t>(value);
+        word0 = static_cast<uint32_t>(value);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
-// prot_r - Protection level configured for the NPU when acting as an AXI master
+// prot_r - Protection level configured for the NPU when acting as an AXI requester
 struct prot_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
@@ -2179,208 +2458,244 @@
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR prot_r() :
-        active_CPL(static_cast<uint32_t>(::privilege_level::USER)),
-        active_CSL(static_cast<uint32_t>(::security_level::SECURE)), reserved0(static_cast<uint32_t>(0))
-    {
-    }
-    CONSTEXPR prot_r(uint32_t init) : word(init) {}
+    CONSTEXPR prot_r() : word0(0) {}
+    CONSTEXPR prot_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     prot_r copy() volatile
     {
         return *this;
     }
-    CONSTEXPR ::privilege_level get_active_CPL() const
+    CONSTEXPR NPU_NAMESPACE::privilege_level get_active_CPL() const
     {
-        ::privilege_level value = static_cast<::privilege_level>(active_CPL);
+        NPU_NAMESPACE::privilege_level value =
+            static_cast<NPU_NAMESPACE::privilege_level>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
-    ::privilege_level get_active_CPL() const volatile
+    NPU_NAMESPACE::privilege_level get_active_CPL() const volatile
     {
-        ::privilege_level value = static_cast<::privilege_level>(active_CPL);
+        NPU_NAMESPACE::privilege_level value =
+            static_cast<NPU_NAMESPACE::privilege_level>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
-    CONSTEXPR prot_r &set_active_CPL(::privilege_level value)
+    CONSTEXPR prot_r &set_active_CPL(NPU_NAMESPACE::privilege_level value)
     {
-        active_CPL = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
         return *this;
     }
-    CONSTEXPR ::security_level get_active_CSL() const
+    CONSTEXPR NPU_NAMESPACE::security_level get_active_CSL() const
     {
-        ::security_level value = static_cast<::security_level>(active_CSL);
+        NPU_NAMESPACE::security_level value =
+            static_cast<NPU_NAMESPACE::security_level>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
-    ::security_level get_active_CSL() const volatile
+    NPU_NAMESPACE::security_level get_active_CSL() const volatile
     {
-        ::security_level value = static_cast<::security_level>(active_CSL);
+        NPU_NAMESPACE::security_level value =
+            static_cast<NPU_NAMESPACE::security_level>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
-    CONSTEXPR prot_r &set_active_CSL(::security_level value)
+    CONSTEXPR prot_r &set_active_CSL(NPU_NAMESPACE::security_level value)
     {
-        active_CSL = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
 // config_r - RTL configuration
 struct config_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
         {
-            uint32_t macs_per_cc : 4;        // The log2(macs/clock cycle). Valid encoding range is 5 to 8 for 32 to 256
-                                             // MACs/clock cycle.
-            uint32_t cmd_stream_version : 4; // command stream version accepted by this NPU.
-            uint32_t shram_size : 8;         // Size in KB of SHRAM in the range 8 to 48.
-            uint32_t reserved0 : 11;
-            uint32_t custom_dma : 1; // Custom DMA enable bit.
-            uint32_t product : 4;    // Product configuration
+            uint32_t macs_per_cc : 4;        // The log2(macs/clock cycle)
+            uint32_t cmd_stream_version : 4; // command stream version accepted by this NPU
+            uint32_t shram_size : 8;         // Total size in KB of internal SHRAM
+            uint32_t reserved0 : 10;
+            uint32_t functional_safety : 1; // Functional safety configuration
+            uint32_t custom_dma : 1;        // Custom DMA configuration
+            uint32_t product : 4;           // Product configuration
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR config_r() :
-        macs_per_cc(static_cast<uint32_t>(0)), cmd_stream_version(static_cast<uint32_t>(0x0)),
-        shram_size(static_cast<uint32_t>(0)), reserved0(static_cast<uint32_t>(0)), product(static_cast<uint32_t>(0))
-    {
-    }
-    CONSTEXPR config_r(uint32_t init) : word(init) {}
+    CONSTEXPR config_r() : word0(0) {}
+    CONSTEXPR config_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     config_r copy() volatile
     {
         return *this;
     }
-    CONSTEXPR ::macs_per_cc get_macs_per_cc() const
+    CONSTEXPR uint32_t get_macs_per_cc() const
     {
-        ::macs_per_cc value = static_cast<::macs_per_cc>(macs_per_cc);
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 0));
         return value;
     }
-    ::macs_per_cc get_macs_per_cc() const volatile
+    uint32_t get_macs_per_cc() const volatile
     {
-        ::macs_per_cc value = static_cast<::macs_per_cc>(macs_per_cc);
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 0));
         return value;
     }
-    CONSTEXPR config_r &set_macs_per_cc(::macs_per_cc value)
+    CONSTEXPR config_r &set_macs_per_cc(uint32_t value)
     {
-        macs_per_cc = ((1u << 4) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 4) - 1)) << 0) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 0);
         return *this;
     }
     CONSTEXPR uint32_t get_cmd_stream_version() const
     {
-        uint32_t value = static_cast<uint32_t>(cmd_stream_version);
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 4));
         return value;
     }
     uint32_t get_cmd_stream_version() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(cmd_stream_version);
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 4));
         return value;
     }
     CONSTEXPR config_r &set_cmd_stream_version(uint32_t value)
     {
-        cmd_stream_version = ((1u << 4) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 4) - 1)) << 4) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 4);
         return *this;
     }
-    CONSTEXPR ::shram_size get_shram_size() const
+    CONSTEXPR uint32_t get_shram_size() const
     {
-        ::shram_size value = static_cast<::shram_size>(shram_size);
+        uint32_t value = static_cast<uint32_t>(((1U << 8) - 1) & (word0 >> 8));
         return value;
     }
-    ::shram_size get_shram_size() const volatile
+    uint32_t get_shram_size() const volatile
     {
-        ::shram_size value = static_cast<::shram_size>(shram_size);
+        uint32_t value = static_cast<uint32_t>(((1U << 8) - 1) & (word0 >> 8));
         return value;
     }
-    CONSTEXPR config_r &set_shram_size(::shram_size value)
+    CONSTEXPR config_r &set_shram_size(uint32_t value)
     {
-        shram_size = ((1u << 8) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 8) - 1)) << 8) & word0) | ((((1U << 8) - 1) & static_cast<uint32_t>(value)) << 8);
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::functional_safety get_functional_safety() const
+    {
+        NPU_NAMESPACE::functional_safety value =
+            static_cast<NPU_NAMESPACE::functional_safety>(((1U << 1) - 1) & (word0 >> 26));
+        return value;
+    }
+    NPU_NAMESPACE::functional_safety get_functional_safety() const volatile
+    {
+        NPU_NAMESPACE::functional_safety value =
+            static_cast<NPU_NAMESPACE::functional_safety>(((1U << 1) - 1) & (word0 >> 26));
+        return value;
+    }
+    CONSTEXPR config_r &set_functional_safety(NPU_NAMESPACE::functional_safety value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 26) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 26);
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::custom_dma get_custom_dma() const
+    {
+        NPU_NAMESPACE::custom_dma value = static_cast<NPU_NAMESPACE::custom_dma>(((1U << 1) - 1) & (word0 >> 27));
+        return value;
+    }
+    NPU_NAMESPACE::custom_dma get_custom_dma() const volatile
+    {
+        NPU_NAMESPACE::custom_dma value = static_cast<NPU_NAMESPACE::custom_dma>(((1U << 1) - 1) & (word0 >> 27));
+        return value;
+    }
+    CONSTEXPR config_r &set_custom_dma(NPU_NAMESPACE::custom_dma value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 27) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 27);
         return *this;
     }
     CONSTEXPR uint32_t get_product() const
     {
-        uint32_t value = static_cast<uint32_t>(product);
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 28));
         return value;
     }
     uint32_t get_product() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(product);
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 28));
         return value;
     }
     CONSTEXPR config_r &set_product(uint32_t value)
     {
-        product = ((1u << 4) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 4) - 1)) << 28) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 28);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
 // lock_r - Lock register. This register is designed for driver use and does not affect NPU functionality
 struct lock_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
-        uint32_t LOCK; // 32 bit value for LOCK configuration
+        struct
+        {
+            uint32_t LOCK : 32; // 32 bit value for LOCK configuration
+        };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR lock_r() : LOCK(static_cast<uint32_t>(0x00000000)) {}
-    CONSTEXPR lock_r(uint32_t init) : word(init) {}
+    CONSTEXPR lock_r() : word0(0) {}
+    CONSTEXPR lock_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     lock_r copy() volatile
     {
@@ -2388,1518 +2703,705 @@
     }
     CONSTEXPR uint32_t get_LOCK() const
     {
-        uint32_t value = static_cast<uint32_t>(LOCK);
+        uint32_t value = static_cast<uint32_t>(word0);
         return value;
     }
     uint32_t get_LOCK() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(LOCK);
+        uint32_t value = static_cast<uint32_t>(word0);
         return value;
     }
     CONSTEXPR lock_r &set_LOCK(uint32_t value)
     {
-        LOCK = static_cast<uint32_t>(value);
+        word0 = static_cast<uint32_t>(value);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
 // regioncfg_r - Region memory type configuration. Bits[2*k+1:2*k] give the memory type for REGION[k]
 struct regioncfg_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
         {
-            uint32_t region0 : 2; // Bits for Region0 Configurion
-            uint32_t region1 : 2; // Bits for Region1 Configurion
-            uint32_t region2 : 2; // Bits for Region2 Configurion
-            uint32_t region3 : 2; // Bits for Region3 Configurion
-            uint32_t region4 : 2; // Bits for Region4 Configurion
-            uint32_t region5 : 2; // Bits for Region5 Configurion
-            uint32_t region6 : 2; // Bits for Region6 Configurion
-            uint32_t region7 : 2; // Bits for Region7 Configurion
+            uint32_t region0 : 2; // Bits for Region0 Configuration
+            uint32_t region1 : 2; // Bits for Region1 Configuration
+            uint32_t region2 : 2; // Bits for Region2 Configuration
+            uint32_t region3 : 2; // Bits for Region3 Configuration
+            uint32_t region4 : 2; // Bits for Region4 Configuration
+            uint32_t region5 : 2; // Bits for Region5 Configuration
+            uint32_t region6 : 2; // Bits for Region6 Configuration
+            uint32_t region7 : 2; // Bits for Region7 Configuration
             uint32_t reserved0 : 16;
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR regioncfg_r() :
-        region0(static_cast<uint32_t>(::memory_type::AXI0_OUTSTANDING_COUNTER0)),
-        region1(static_cast<uint32_t>(::memory_type::AXI0_OUTSTANDING_COUNTER0)),
-        region2(static_cast<uint32_t>(::memory_type::AXI0_OUTSTANDING_COUNTER0)),
-        region3(static_cast<uint32_t>(::memory_type::AXI0_OUTSTANDING_COUNTER0)),
-        region4(static_cast<uint32_t>(::memory_type::AXI0_OUTSTANDING_COUNTER0)),
-        region5(static_cast<uint32_t>(::memory_type::AXI0_OUTSTANDING_COUNTER0)),
-        region6(static_cast<uint32_t>(::memory_type::AXI0_OUTSTANDING_COUNTER0)),
-        region7(static_cast<uint32_t>(::memory_type::AXI0_OUTSTANDING_COUNTER0)), reserved0(static_cast<uint32_t>(0))
-    {
-    }
-    CONSTEXPR regioncfg_r(uint32_t init) : word(init) {}
+    CONSTEXPR regioncfg_r() : word0(0) {}
+    CONSTEXPR regioncfg_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     regioncfg_r copy() volatile
     {
         return *this;
     }
-    CONSTEXPR ::memory_type get_region0() const
+    CONSTEXPR NPU_NAMESPACE::mem_attr get_region0() const
     {
-        ::memory_type value = static_cast<::memory_type>(region0);
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 0));
         return value;
     }
-    ::memory_type get_region0() const volatile
+    NPU_NAMESPACE::mem_attr get_region0() const volatile
     {
-        ::memory_type value = static_cast<::memory_type>(region0);
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 0));
         return value;
     }
-    CONSTEXPR regioncfg_r &set_region0(::memory_type value)
+    CONSTEXPR regioncfg_r &set_region0(NPU_NAMESPACE::mem_attr value)
     {
-        region0 = ((1u << 2) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 2) - 1)) << 0) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 0);
         return *this;
     }
-    CONSTEXPR ::memory_type get_region1() const
+    CONSTEXPR NPU_NAMESPACE::mem_attr get_region1() const
     {
-        ::memory_type value = static_cast<::memory_type>(region1);
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 2));
         return value;
     }
-    ::memory_type get_region1() const volatile
+    NPU_NAMESPACE::mem_attr get_region1() const volatile
     {
-        ::memory_type value = static_cast<::memory_type>(region1);
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 2));
         return value;
     }
-    CONSTEXPR regioncfg_r &set_region1(::memory_type value)
+    CONSTEXPR regioncfg_r &set_region1(NPU_NAMESPACE::mem_attr value)
     {
-        region1 = ((1u << 2) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 2) - 1)) << 2) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 2);
         return *this;
     }
-    CONSTEXPR ::memory_type get_region2() const
+    CONSTEXPR NPU_NAMESPACE::mem_attr get_region2() const
     {
-        ::memory_type value = static_cast<::memory_type>(region2);
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 4));
         return value;
     }
-    ::memory_type get_region2() const volatile
+    NPU_NAMESPACE::mem_attr get_region2() const volatile
     {
-        ::memory_type value = static_cast<::memory_type>(region2);
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 4));
         return value;
     }
-    CONSTEXPR regioncfg_r &set_region2(::memory_type value)
+    CONSTEXPR regioncfg_r &set_region2(NPU_NAMESPACE::mem_attr value)
     {
-        region2 = ((1u << 2) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 2) - 1)) << 4) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 4);
         return *this;
     }
-    CONSTEXPR ::memory_type get_region3() const
+    CONSTEXPR NPU_NAMESPACE::mem_attr get_region3() const
     {
-        ::memory_type value = static_cast<::memory_type>(region3);
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 6));
         return value;
     }
-    ::memory_type get_region3() const volatile
+    NPU_NAMESPACE::mem_attr get_region3() const volatile
     {
-        ::memory_type value = static_cast<::memory_type>(region3);
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 6));
         return value;
     }
-    CONSTEXPR regioncfg_r &set_region3(::memory_type value)
+    CONSTEXPR regioncfg_r &set_region3(NPU_NAMESPACE::mem_attr value)
     {
-        region3 = ((1u << 2) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 2) - 1)) << 6) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 6);
         return *this;
     }
-    CONSTEXPR ::memory_type get_region4() const
+    CONSTEXPR NPU_NAMESPACE::mem_attr get_region4() const
     {
-        ::memory_type value = static_cast<::memory_type>(region4);
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 8));
         return value;
     }
-    ::memory_type get_region4() const volatile
+    NPU_NAMESPACE::mem_attr get_region4() const volatile
     {
-        ::memory_type value = static_cast<::memory_type>(region4);
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 8));
         return value;
     }
-    CONSTEXPR regioncfg_r &set_region4(::memory_type value)
+    CONSTEXPR regioncfg_r &set_region4(NPU_NAMESPACE::mem_attr value)
     {
-        region4 = ((1u << 2) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 2) - 1)) << 8) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 8);
         return *this;
     }
-    CONSTEXPR ::memory_type get_region5() const
+    CONSTEXPR NPU_NAMESPACE::mem_attr get_region5() const
     {
-        ::memory_type value = static_cast<::memory_type>(region5);
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 10));
         return value;
     }
-    ::memory_type get_region5() const volatile
+    NPU_NAMESPACE::mem_attr get_region5() const volatile
     {
-        ::memory_type value = static_cast<::memory_type>(region5);
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 10));
         return value;
     }
-    CONSTEXPR regioncfg_r &set_region5(::memory_type value)
+    CONSTEXPR regioncfg_r &set_region5(NPU_NAMESPACE::mem_attr value)
     {
-        region5 = ((1u << 2) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 2) - 1)) << 10) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 10);
         return *this;
     }
-    CONSTEXPR ::memory_type get_region6() const
+    CONSTEXPR NPU_NAMESPACE::mem_attr get_region6() const
     {
-        ::memory_type value = static_cast<::memory_type>(region6);
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 12));
         return value;
     }
-    ::memory_type get_region6() const volatile
+    NPU_NAMESPACE::mem_attr get_region6() const volatile
     {
-        ::memory_type value = static_cast<::memory_type>(region6);
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 12));
         return value;
     }
-    CONSTEXPR regioncfg_r &set_region6(::memory_type value)
+    CONSTEXPR regioncfg_r &set_region6(NPU_NAMESPACE::mem_attr value)
     {
-        region6 = ((1u << 2) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 2) - 1)) << 12) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 12);
         return *this;
     }
-    CONSTEXPR ::memory_type get_region7() const
+    CONSTEXPR NPU_NAMESPACE::mem_attr get_region7() const
     {
-        ::memory_type value = static_cast<::memory_type>(region7);
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 14));
         return value;
     }
-    ::memory_type get_region7() const volatile
+    NPU_NAMESPACE::mem_attr get_region7() const volatile
     {
-        ::memory_type value = static_cast<::memory_type>(region7);
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 14));
         return value;
     }
-    CONSTEXPR regioncfg_r &set_region7(::memory_type value)
+    CONSTEXPR regioncfg_r &set_region7(NPU_NAMESPACE::mem_attr value)
     {
-        region7 = ((1u << 2) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 2) - 1)) << 14) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 14);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
 // axi_limit0_r - AXI limits for port 0 counter 0
 struct axi_limit0_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
         {
-            uint32_t max_beats : 2; // Burst split alignment: 0=64 bytes, 1=128 bytes, 2=256 bytes, 3=reserved
+            uint32_t max_beats : 2; // Burst split alignment
             uint32_t reserved0 : 2;
             uint32_t memtype : 4; // Memtype to be used to encode AxCACHE signals
             uint32_t reserved1 : 8;
             uint32_t
-                max_outstanding_read_m1 : 8; // Maximum number of outstanding AXI read transactions - 1 in range 0 to 31
-            uint32_t max_outstanding_write_m1 : 8; // Maximum number of outstanding AXI write transactions - 1 in range
+                max_outstanding_read_m1 : 5; // Maximum number of outstanding AXI read transactions - 1 in range 0 to 31
+            uint32_t reserved2 : 3;
+            uint32_t max_outstanding_write_m1 : 4; // Maximum number of outstanding AXI write transactions - 1 in range
                                                    // 0 to 15
+            uint32_t reserved3 : 4;
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR axi_limit0_r() :
-        max_beats(static_cast<uint32_t>(0x0)), reserved0(static_cast<uint32_t>(0)),
-        memtype(static_cast<uint32_t>(::axi_mem_encoding_type::DEVICE_NON_BUFFERABLE)),
-        reserved1(static_cast<uint32_t>(0)), max_outstanding_read_m1(static_cast<uint32_t>(0x00)),
-        max_outstanding_write_m1(static_cast<uint32_t>(0x00))
-    {
-    }
-    CONSTEXPR axi_limit0_r(uint32_t init) : word(init) {}
+    CONSTEXPR axi_limit0_r() : word0(0) {}
+    CONSTEXPR axi_limit0_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     axi_limit0_r copy() volatile
     {
         return *this;
     }
-    CONSTEXPR uint32_t get_max_beats() const
+    CONSTEXPR NPU_NAMESPACE::max_beats get_max_beats() const
     {
-        uint32_t value = static_cast<uint32_t>(max_beats);
+        NPU_NAMESPACE::max_beats value = static_cast<NPU_NAMESPACE::max_beats>(((1U << 2) - 1) & (word0 >> 0));
         return value;
     }
-    uint32_t get_max_beats() const volatile
+    NPU_NAMESPACE::max_beats get_max_beats() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(max_beats);
+        NPU_NAMESPACE::max_beats value = static_cast<NPU_NAMESPACE::max_beats>(((1U << 2) - 1) & (word0 >> 0));
         return value;
     }
-    CONSTEXPR axi_limit0_r &set_max_beats(uint32_t value)
+    CONSTEXPR axi_limit0_r &set_max_beats(NPU_NAMESPACE::max_beats value)
     {
-        max_beats = ((1u << 2) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 2) - 1)) << 0) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 0);
         return *this;
     }
-    CONSTEXPR ::axi_mem_encoding_type get_memtype() const
+    CONSTEXPR NPU_NAMESPACE::axi_mem_encoding get_memtype() const
     {
-        ::axi_mem_encoding_type value = static_cast<::axi_mem_encoding_type>(memtype);
+        NPU_NAMESPACE::axi_mem_encoding value =
+            static_cast<NPU_NAMESPACE::axi_mem_encoding>(((1U << 4) - 1) & (word0 >> 4));
         return value;
     }
-    ::axi_mem_encoding_type get_memtype() const volatile
+    NPU_NAMESPACE::axi_mem_encoding get_memtype() const volatile
     {
-        ::axi_mem_encoding_type value = static_cast<::axi_mem_encoding_type>(memtype);
+        NPU_NAMESPACE::axi_mem_encoding value =
+            static_cast<NPU_NAMESPACE::axi_mem_encoding>(((1U << 4) - 1) & (word0 >> 4));
         return value;
     }
-    CONSTEXPR axi_limit0_r &set_memtype(::axi_mem_encoding_type value)
+    CONSTEXPR axi_limit0_r &set_memtype(NPU_NAMESPACE::axi_mem_encoding value)
     {
-        memtype = ((1u << 4) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 4) - 1)) << 4) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 4);
         return *this;
     }
     CONSTEXPR uint32_t get_max_outstanding_read_m1() const
     {
-        uint32_t value = static_cast<uint32_t>(max_outstanding_read_m1);
+        uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 16));
         return value;
     }
     uint32_t get_max_outstanding_read_m1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(max_outstanding_read_m1);
+        uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 16));
         return value;
     }
     CONSTEXPR axi_limit0_r &set_max_outstanding_read_m1(uint32_t value)
     {
-        max_outstanding_read_m1 = ((1u << 8) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 5) - 1)) << 16) & word0) | ((((1U << 5) - 1) & static_cast<uint32_t>(value)) << 16);
         return *this;
     }
     CONSTEXPR uint32_t get_max_outstanding_write_m1() const
     {
-        uint32_t value = static_cast<uint32_t>(max_outstanding_write_m1);
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 24));
         return value;
     }
     uint32_t get_max_outstanding_write_m1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(max_outstanding_write_m1);
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 24));
         return value;
     }
     CONSTEXPR axi_limit0_r &set_max_outstanding_write_m1(uint32_t value)
     {
-        max_outstanding_write_m1 = ((1u << 8) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 4) - 1)) << 24) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 24);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
 // axi_limit1_r - AXI limits for port 0 counter 1
 struct axi_limit1_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
         {
-            uint32_t max_beats : 2; // Burst split alignment: 0=64 bytes, 1=128 bytes, 2=256 bytes, 3=reserved
+            uint32_t max_beats : 2; // Burst split alignment
             uint32_t reserved0 : 2;
             uint32_t memtype : 4; // Memtype to be used to encode AxCACHE signals
             uint32_t reserved1 : 8;
             uint32_t
-                max_outstanding_read_m1 : 8; // Maximum number of outstanding AXI read transactions - 1 in range 0 to 31
-            uint32_t max_outstanding_write_m1 : 8; // Maximum number of outstanding AXI write transactions - 1 in range
+                max_outstanding_read_m1 : 5; // Maximum number of outstanding AXI read transactions - 1 in range 0 to 31
+            uint32_t reserved2 : 3;
+            uint32_t max_outstanding_write_m1 : 4; // Maximum number of outstanding AXI write transactions - 1 in range
                                                    // 0 to 15
+            uint32_t reserved3 : 4;
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR axi_limit1_r() :
-        max_beats(static_cast<uint32_t>(0x0)), reserved0(static_cast<uint32_t>(0)),
-        memtype(static_cast<uint32_t>(::axi_mem_encoding_type::DEVICE_NON_BUFFERABLE)),
-        reserved1(static_cast<uint32_t>(0)), max_outstanding_read_m1(static_cast<uint32_t>(0x00)),
-        max_outstanding_write_m1(static_cast<uint32_t>(0x00))
-    {
-    }
-    CONSTEXPR axi_limit1_r(uint32_t init) : word(init) {}
+    CONSTEXPR axi_limit1_r() : word0(0) {}
+    CONSTEXPR axi_limit1_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     axi_limit1_r copy() volatile
     {
         return *this;
     }
-    CONSTEXPR uint32_t get_max_beats() const
+    CONSTEXPR NPU_NAMESPACE::max_beats get_max_beats() const
     {
-        uint32_t value = static_cast<uint32_t>(max_beats);
+        NPU_NAMESPACE::max_beats value = static_cast<NPU_NAMESPACE::max_beats>(((1U << 2) - 1) & (word0 >> 0));
         return value;
     }
-    uint32_t get_max_beats() const volatile
+    NPU_NAMESPACE::max_beats get_max_beats() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(max_beats);
+        NPU_NAMESPACE::max_beats value = static_cast<NPU_NAMESPACE::max_beats>(((1U << 2) - 1) & (word0 >> 0));
         return value;
     }
-    CONSTEXPR axi_limit1_r &set_max_beats(uint32_t value)
+    CONSTEXPR axi_limit1_r &set_max_beats(NPU_NAMESPACE::max_beats value)
     {
-        max_beats = ((1u << 2) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 2) - 1)) << 0) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 0);
         return *this;
     }
-    CONSTEXPR ::axi_mem_encoding_type get_memtype() const
+    CONSTEXPR NPU_NAMESPACE::axi_mem_encoding get_memtype() const
     {
-        ::axi_mem_encoding_type value = static_cast<::axi_mem_encoding_type>(memtype);
+        NPU_NAMESPACE::axi_mem_encoding value =
+            static_cast<NPU_NAMESPACE::axi_mem_encoding>(((1U << 4) - 1) & (word0 >> 4));
         return value;
     }
-    ::axi_mem_encoding_type get_memtype() const volatile
+    NPU_NAMESPACE::axi_mem_encoding get_memtype() const volatile
     {
-        ::axi_mem_encoding_type value = static_cast<::axi_mem_encoding_type>(memtype);
+        NPU_NAMESPACE::axi_mem_encoding value =
+            static_cast<NPU_NAMESPACE::axi_mem_encoding>(((1U << 4) - 1) & (word0 >> 4));
         return value;
     }
-    CONSTEXPR axi_limit1_r &set_memtype(::axi_mem_encoding_type value)
+    CONSTEXPR axi_limit1_r &set_memtype(NPU_NAMESPACE::axi_mem_encoding value)
     {
-        memtype = ((1u << 4) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 4) - 1)) << 4) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 4);
         return *this;
     }
     CONSTEXPR uint32_t get_max_outstanding_read_m1() const
     {
-        uint32_t value = static_cast<uint32_t>(max_outstanding_read_m1);
+        uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 16));
         return value;
     }
     uint32_t get_max_outstanding_read_m1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(max_outstanding_read_m1);
+        uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 16));
         return value;
     }
     CONSTEXPR axi_limit1_r &set_max_outstanding_read_m1(uint32_t value)
     {
-        max_outstanding_read_m1 = ((1u << 8) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 5) - 1)) << 16) & word0) | ((((1U << 5) - 1) & static_cast<uint32_t>(value)) << 16);
         return *this;
     }
     CONSTEXPR uint32_t get_max_outstanding_write_m1() const
     {
-        uint32_t value = static_cast<uint32_t>(max_outstanding_write_m1);
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 24));
         return value;
     }
     uint32_t get_max_outstanding_write_m1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(max_outstanding_write_m1);
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 24));
         return value;
     }
     CONSTEXPR axi_limit1_r &set_max_outstanding_write_m1(uint32_t value)
     {
-        max_outstanding_write_m1 = ((1u << 8) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 4) - 1)) << 24) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 24);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
 // axi_limit2_r - AXI limits for port 1 counter 2
 struct axi_limit2_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
         {
-            uint32_t max_beats : 2; // Burst split alignment: 0=64 bytes, 1=128 bytes, 2=256 bytes, 3=reserved
+            uint32_t max_beats : 2; // Burst split alignment
             uint32_t reserved0 : 2;
             uint32_t memtype : 4; // Memtype to be used to encode AxCACHE signals
             uint32_t reserved1 : 8;
             uint32_t
-                max_outstanding_read_m1 : 8; // Maximum number of outstanding AXI read transactions - 1 in range 0 to 31
-            uint32_t max_outstanding_write_m1 : 8; // Maximum number of outstanding AXI write transactions - 1 in range
+                max_outstanding_read_m1 : 5; // Maximum number of outstanding AXI read transactions - 1 in range 0 to 31
+            uint32_t reserved2 : 3;
+            uint32_t max_outstanding_write_m1 : 4; // Maximum number of outstanding AXI write transactions - 1 in range
                                                    // 0 to 15
+            uint32_t reserved3 : 4;
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR axi_limit2_r() :
-        max_beats(static_cast<uint32_t>(0x0)), reserved0(static_cast<uint32_t>(0)),
-        memtype(static_cast<uint32_t>(::axi_mem_encoding_type::DEVICE_NON_BUFFERABLE)),
-        reserved1(static_cast<uint32_t>(0)), max_outstanding_read_m1(static_cast<uint32_t>(0x00)),
-        max_outstanding_write_m1(static_cast<uint32_t>(0x00))
-    {
-    }
-    CONSTEXPR axi_limit2_r(uint32_t init) : word(init) {}
+    CONSTEXPR axi_limit2_r() : word0(0) {}
+    CONSTEXPR axi_limit2_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     axi_limit2_r copy() volatile
     {
         return *this;
     }
-    CONSTEXPR uint32_t get_max_beats() const
+    CONSTEXPR NPU_NAMESPACE::max_beats get_max_beats() const
     {
-        uint32_t value = static_cast<uint32_t>(max_beats);
+        NPU_NAMESPACE::max_beats value = static_cast<NPU_NAMESPACE::max_beats>(((1U << 2) - 1) & (word0 >> 0));
         return value;
     }
-    uint32_t get_max_beats() const volatile
+    NPU_NAMESPACE::max_beats get_max_beats() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(max_beats);
+        NPU_NAMESPACE::max_beats value = static_cast<NPU_NAMESPACE::max_beats>(((1U << 2) - 1) & (word0 >> 0));
         return value;
     }
-    CONSTEXPR axi_limit2_r &set_max_beats(uint32_t value)
+    CONSTEXPR axi_limit2_r &set_max_beats(NPU_NAMESPACE::max_beats value)
     {
-        max_beats = ((1u << 2) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 2) - 1)) << 0) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 0);
         return *this;
     }
-    CONSTEXPR ::axi_mem_encoding_type get_memtype() const
+    CONSTEXPR NPU_NAMESPACE::axi_mem_encoding get_memtype() const
     {
-        ::axi_mem_encoding_type value = static_cast<::axi_mem_encoding_type>(memtype);
+        NPU_NAMESPACE::axi_mem_encoding value =
+            static_cast<NPU_NAMESPACE::axi_mem_encoding>(((1U << 4) - 1) & (word0 >> 4));
         return value;
     }
-    ::axi_mem_encoding_type get_memtype() const volatile
+    NPU_NAMESPACE::axi_mem_encoding get_memtype() const volatile
     {
-        ::axi_mem_encoding_type value = static_cast<::axi_mem_encoding_type>(memtype);
+        NPU_NAMESPACE::axi_mem_encoding value =
+            static_cast<NPU_NAMESPACE::axi_mem_encoding>(((1U << 4) - 1) & (word0 >> 4));
         return value;
     }
-    CONSTEXPR axi_limit2_r &set_memtype(::axi_mem_encoding_type value)
+    CONSTEXPR axi_limit2_r &set_memtype(NPU_NAMESPACE::axi_mem_encoding value)
     {
-        memtype = ((1u << 4) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 4) - 1)) << 4) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 4);
         return *this;
     }
     CONSTEXPR uint32_t get_max_outstanding_read_m1() const
     {
-        uint32_t value = static_cast<uint32_t>(max_outstanding_read_m1);
+        uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 16));
         return value;
     }
     uint32_t get_max_outstanding_read_m1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(max_outstanding_read_m1);
+        uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 16));
         return value;
     }
     CONSTEXPR axi_limit2_r &set_max_outstanding_read_m1(uint32_t value)
     {
-        max_outstanding_read_m1 = ((1u << 8) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 5) - 1)) << 16) & word0) | ((((1U << 5) - 1) & static_cast<uint32_t>(value)) << 16);
         return *this;
     }
     CONSTEXPR uint32_t get_max_outstanding_write_m1() const
     {
-        uint32_t value = static_cast<uint32_t>(max_outstanding_write_m1);
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 24));
         return value;
     }
     uint32_t get_max_outstanding_write_m1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(max_outstanding_write_m1);
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 24));
         return value;
     }
     CONSTEXPR axi_limit2_r &set_max_outstanding_write_m1(uint32_t value)
     {
-        max_outstanding_write_m1 = ((1u << 8) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 4) - 1)) << 24) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 24);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
 // axi_limit3_r - AXI limits for port 1 counter 3
 struct axi_limit3_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
         {
-            uint32_t max_beats : 2; // Burst split alignment: 0=64 bytes, 1=128 bytes, 2=256 bytes, 3=reserved
+            uint32_t max_beats : 2; // Burst split alignment
             uint32_t reserved0 : 2;
             uint32_t memtype : 4; // Memtype to be used to encode AxCACHE signals
             uint32_t reserved1 : 8;
             uint32_t
-                max_outstanding_read_m1 : 8; // Maximum number of outstanding AXI read transactions - 1 in range 0 to 31
-            uint32_t max_outstanding_write_m1 : 8; // Maximum number of outstanding AXI write transactions - 1 in range
+                max_outstanding_read_m1 : 5; // Maximum number of outstanding AXI read transactions - 1 in range 0 to 31
+            uint32_t reserved2 : 3;
+            uint32_t max_outstanding_write_m1 : 4; // Maximum number of outstanding AXI write transactions - 1 in range
                                                    // 0 to 15
+            uint32_t reserved3 : 4;
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR axi_limit3_r() :
-        max_beats(static_cast<uint32_t>(0x0)), reserved0(static_cast<uint32_t>(0)),
-        memtype(static_cast<uint32_t>(::axi_mem_encoding_type::DEVICE_NON_BUFFERABLE)),
-        reserved1(static_cast<uint32_t>(0)), max_outstanding_read_m1(static_cast<uint32_t>(0x00)),
-        max_outstanding_write_m1(static_cast<uint32_t>(0x00))
-    {
-    }
-    CONSTEXPR axi_limit3_r(uint32_t init) : word(init) {}
+    CONSTEXPR axi_limit3_r() : word0(0) {}
+    CONSTEXPR axi_limit3_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     axi_limit3_r copy() volatile
     {
         return *this;
     }
-    CONSTEXPR uint32_t get_max_beats() const
+    CONSTEXPR NPU_NAMESPACE::max_beats get_max_beats() const
     {
-        uint32_t value = static_cast<uint32_t>(max_beats);
+        NPU_NAMESPACE::max_beats value = static_cast<NPU_NAMESPACE::max_beats>(((1U << 2) - 1) & (word0 >> 0));
         return value;
     }
-    uint32_t get_max_beats() const volatile
+    NPU_NAMESPACE::max_beats get_max_beats() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(max_beats);
+        NPU_NAMESPACE::max_beats value = static_cast<NPU_NAMESPACE::max_beats>(((1U << 2) - 1) & (word0 >> 0));
         return value;
     }
-    CONSTEXPR axi_limit3_r &set_max_beats(uint32_t value)
+    CONSTEXPR axi_limit3_r &set_max_beats(NPU_NAMESPACE::max_beats value)
     {
-        max_beats = ((1u << 2) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 2) - 1)) << 0) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 0);
         return *this;
     }
-    CONSTEXPR ::axi_mem_encoding_type get_memtype() const
+    CONSTEXPR NPU_NAMESPACE::axi_mem_encoding get_memtype() const
     {
-        ::axi_mem_encoding_type value = static_cast<::axi_mem_encoding_type>(memtype);
+        NPU_NAMESPACE::axi_mem_encoding value =
+            static_cast<NPU_NAMESPACE::axi_mem_encoding>(((1U << 4) - 1) & (word0 >> 4));
         return value;
     }
-    ::axi_mem_encoding_type get_memtype() const volatile
+    NPU_NAMESPACE::axi_mem_encoding get_memtype() const volatile
     {
-        ::axi_mem_encoding_type value = static_cast<::axi_mem_encoding_type>(memtype);
+        NPU_NAMESPACE::axi_mem_encoding value =
+            static_cast<NPU_NAMESPACE::axi_mem_encoding>(((1U << 4) - 1) & (word0 >> 4));
         return value;
     }
-    CONSTEXPR axi_limit3_r &set_memtype(::axi_mem_encoding_type value)
+    CONSTEXPR axi_limit3_r &set_memtype(NPU_NAMESPACE::axi_mem_encoding value)
     {
-        memtype = ((1u << 4) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 4) - 1)) << 4) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 4);
         return *this;
     }
     CONSTEXPR uint32_t get_max_outstanding_read_m1() const
     {
-        uint32_t value = static_cast<uint32_t>(max_outstanding_read_m1);
+        uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 16));
         return value;
     }
     uint32_t get_max_outstanding_read_m1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(max_outstanding_read_m1);
+        uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 16));
         return value;
     }
     CONSTEXPR axi_limit3_r &set_max_outstanding_read_m1(uint32_t value)
     {
-        max_outstanding_read_m1 = ((1u << 8) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 5) - 1)) << 16) & word0) | ((((1U << 5) - 1) & static_cast<uint32_t>(value)) << 16);
         return *this;
     }
     CONSTEXPR uint32_t get_max_outstanding_write_m1() const
     {
-        uint32_t value = static_cast<uint32_t>(max_outstanding_write_m1);
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 24));
         return value;
     }
     uint32_t get_max_outstanding_write_m1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(max_outstanding_write_m1);
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 24));
         return value;
     }
     CONSTEXPR axi_limit3_r &set_max_outstanding_write_m1(uint32_t value)
     {
-        max_outstanding_write_m1 = ((1u << 8) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 4) - 1)) << 24) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 24);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
-// basep0_r - Lower 32 bits of the Base pointer for region index 0
-struct basep0_r
+// basep_r - The driver can use this address to relocate the command stream on region 0
+struct basep_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
-    union
-    {
-        uint32_t addr_word; // The low word of the 64-bit address
-        uint32_t word;
-    };
-#ifdef __cplusplus
-  public:
-    CONSTEXPR basep0_r() : addr_word(static_cast<uint32_t>(0)) {}
-    CONSTEXPR basep0_r(uint32_t init) : word(init) {}
-    CONSTEXPR void operator=(uint32_t value)
-    {
-        word = value;
-    }
-    void operator=(uint32_t value) volatile
-    {
-        word = value;
-    }
-    CONSTEXPR operator uint32_t()
-    {
-        return word;
-    }
-    operator uint32_t() volatile
-    {
-        return word;
-    }
-    basep0_r copy() volatile
-    {
-        return *this;
-    }
-    CONSTEXPR uint32_t get_addr_word() const
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    uint32_t get_addr_word() const volatile
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    CONSTEXPR basep0_r &set_addr_word(uint32_t value)
-    {
-        addr_word = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// basep1_r - Upper 32 bits of the Base pointer for region index 0
-struct basep1_r
-{
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
-    union
-    {
-        uint32_t addr_word; // The high word of the 64-bit address
-        uint32_t word;
-    };
-#ifdef __cplusplus
-  public:
-    CONSTEXPR basep1_r() : addr_word(static_cast<uint32_t>(0)) {}
-    CONSTEXPR basep1_r(uint32_t init) : word(init) {}
-    CONSTEXPR void operator=(uint32_t value)
-    {
-        word = value;
-    }
-    void operator=(uint32_t value) volatile
-    {
-        word = value;
-    }
-    CONSTEXPR operator uint32_t()
-    {
-        return word;
-    }
-    operator uint32_t() volatile
-    {
-        return word;
-    }
-    basep1_r copy() volatile
-    {
-        return *this;
-    }
-    CONSTEXPR uint32_t get_addr_word() const
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    uint32_t get_addr_word() const volatile
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    CONSTEXPR basep1_r &set_addr_word(uint32_t value)
-    {
-        addr_word = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// basep2_r - Lower 32 bits of the Base pointer for region index 1
-struct basep2_r
-{
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
-    union
-    {
-        uint32_t addr_word; // The low word of the 64-bit address
-        uint32_t word;
-    };
-#ifdef __cplusplus
-  public:
-    CONSTEXPR basep2_r() : addr_word(static_cast<uint32_t>(0)) {}
-    CONSTEXPR basep2_r(uint32_t init) : word(init) {}
-    CONSTEXPR void operator=(uint32_t value)
-    {
-        word = value;
-    }
-    void operator=(uint32_t value) volatile
-    {
-        word = value;
-    }
-    CONSTEXPR operator uint32_t()
-    {
-        return word;
-    }
-    operator uint32_t() volatile
-    {
-        return word;
-    }
-    basep2_r copy() volatile
-    {
-        return *this;
-    }
-    CONSTEXPR uint32_t get_addr_word() const
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    uint32_t get_addr_word() const volatile
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    CONSTEXPR basep2_r &set_addr_word(uint32_t value)
-    {
-        addr_word = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// basep3_r - Upper 32 bits of the Base pointer for region index 1
-struct basep3_r
-{
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
-    union
-    {
-        uint32_t addr_word; // The high word of the 64-bit address
-        uint32_t word;
-    };
-#ifdef __cplusplus
-  public:
-    CONSTEXPR basep3_r() : addr_word(static_cast<uint32_t>(0)) {}
-    CONSTEXPR basep3_r(uint32_t init) : word(init) {}
-    CONSTEXPR void operator=(uint32_t value)
-    {
-        word = value;
-    }
-    void operator=(uint32_t value) volatile
-    {
-        word = value;
-    }
-    CONSTEXPR operator uint32_t()
-    {
-        return word;
-    }
-    operator uint32_t() volatile
-    {
-        return word;
-    }
-    basep3_r copy() volatile
-    {
-        return *this;
-    }
-    CONSTEXPR uint32_t get_addr_word() const
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    uint32_t get_addr_word() const volatile
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    CONSTEXPR basep3_r &set_addr_word(uint32_t value)
-    {
-        addr_word = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// basep4_r - Lower 32 bits of the Base pointer for region index 2
-struct basep4_r
-{
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
-    union
-    {
-        uint32_t addr_word; // The low word of the 64-bit address
-        uint32_t word;
-    };
-#ifdef __cplusplus
-  public:
-    CONSTEXPR basep4_r() : addr_word(static_cast<uint32_t>(0)) {}
-    CONSTEXPR basep4_r(uint32_t init) : word(init) {}
-    CONSTEXPR void operator=(uint32_t value)
-    {
-        word = value;
-    }
-    void operator=(uint32_t value) volatile
-    {
-        word = value;
-    }
-    CONSTEXPR operator uint32_t()
-    {
-        return word;
-    }
-    operator uint32_t() volatile
-    {
-        return word;
-    }
-    basep4_r copy() volatile
-    {
-        return *this;
-    }
-    CONSTEXPR uint32_t get_addr_word() const
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    uint32_t get_addr_word() const volatile
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    CONSTEXPR basep4_r &set_addr_word(uint32_t value)
-    {
-        addr_word = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// basep5_r - Upper 32 bits of the Base pointer for region index 2
-struct basep5_r
-{
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
-    union
-    {
-        uint32_t addr_word; // The high word of the 64-bit address
-        uint32_t word;
-    };
-#ifdef __cplusplus
-  public:
-    CONSTEXPR basep5_r() : addr_word(static_cast<uint32_t>(0)) {}
-    CONSTEXPR basep5_r(uint32_t init) : word(init) {}
-    CONSTEXPR void operator=(uint32_t value)
-    {
-        word = value;
-    }
-    void operator=(uint32_t value) volatile
-    {
-        word = value;
-    }
-    CONSTEXPR operator uint32_t()
-    {
-        return word;
-    }
-    operator uint32_t() volatile
-    {
-        return word;
-    }
-    basep5_r copy() volatile
-    {
-        return *this;
-    }
-    CONSTEXPR uint32_t get_addr_word() const
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    uint32_t get_addr_word() const volatile
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    CONSTEXPR basep5_r &set_addr_word(uint32_t value)
-    {
-        addr_word = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// basep6_r - Lower 32 bits of the Base pointer for region index 3
-struct basep6_r
-{
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
-    union
-    {
-        uint32_t addr_word; // The low word of the 64-bit address
-        uint32_t word;
-    };
-#ifdef __cplusplus
-  public:
-    CONSTEXPR basep6_r() : addr_word(static_cast<uint32_t>(0)) {}
-    CONSTEXPR basep6_r(uint32_t init) : word(init) {}
-    CONSTEXPR void operator=(uint32_t value)
-    {
-        word = value;
-    }
-    void operator=(uint32_t value) volatile
-    {
-        word = value;
-    }
-    CONSTEXPR operator uint32_t()
-    {
-        return word;
-    }
-    operator uint32_t() volatile
-    {
-        return word;
-    }
-    basep6_r copy() volatile
-    {
-        return *this;
-    }
-    CONSTEXPR uint32_t get_addr_word() const
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    uint32_t get_addr_word() const volatile
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    CONSTEXPR basep6_r &set_addr_word(uint32_t value)
-    {
-        addr_word = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// basep7_r - Upper 32 bits of the Base pointer for region index 3
-struct basep7_r
-{
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
-    union
-    {
-        uint32_t addr_word; // The high word of the 64-bit address
-        uint32_t word;
-    };
-#ifdef __cplusplus
-  public:
-    CONSTEXPR basep7_r() : addr_word(static_cast<uint32_t>(0)) {}
-    CONSTEXPR basep7_r(uint32_t init) : word(init) {}
-    CONSTEXPR void operator=(uint32_t value)
-    {
-        word = value;
-    }
-    void operator=(uint32_t value) volatile
-    {
-        word = value;
-    }
-    CONSTEXPR operator uint32_t()
-    {
-        return word;
-    }
-    operator uint32_t() volatile
-    {
-        return word;
-    }
-    basep7_r copy() volatile
-    {
-        return *this;
-    }
-    CONSTEXPR uint32_t get_addr_word() const
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    uint32_t get_addr_word() const volatile
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    CONSTEXPR basep7_r &set_addr_word(uint32_t value)
-    {
-        addr_word = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// basep8_r - Lower 32 bits of the Base pointer for region index 4
-struct basep8_r
-{
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
-    union
-    {
-        uint32_t addr_word; // The low word of the 64-bit address
-        uint32_t word;
-    };
-#ifdef __cplusplus
-  public:
-    CONSTEXPR basep8_r() : addr_word(static_cast<uint32_t>(0)) {}
-    CONSTEXPR basep8_r(uint32_t init) : word(init) {}
-    CONSTEXPR void operator=(uint32_t value)
-    {
-        word = value;
-    }
-    void operator=(uint32_t value) volatile
-    {
-        word = value;
-    }
-    CONSTEXPR operator uint32_t()
-    {
-        return word;
-    }
-    operator uint32_t() volatile
-    {
-        return word;
-    }
-    basep8_r copy() volatile
-    {
-        return *this;
-    }
-    CONSTEXPR uint32_t get_addr_word() const
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    uint32_t get_addr_word() const volatile
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    CONSTEXPR basep8_r &set_addr_word(uint32_t value)
-    {
-        addr_word = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// basep9_r - Upper 32 bits of the Base pointer for region index 4
-struct basep9_r
-{
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
-    union
-    {
-        uint32_t addr_word; // The high word of the 64-bit address
-        uint32_t word;
-    };
-#ifdef __cplusplus
-  public:
-    CONSTEXPR basep9_r() : addr_word(static_cast<uint32_t>(0)) {}
-    CONSTEXPR basep9_r(uint32_t init) : word(init) {}
-    CONSTEXPR void operator=(uint32_t value)
-    {
-        word = value;
-    }
-    void operator=(uint32_t value) volatile
-    {
-        word = value;
-    }
-    CONSTEXPR operator uint32_t()
-    {
-        return word;
-    }
-    operator uint32_t() volatile
-    {
-        return word;
-    }
-    basep9_r copy() volatile
-    {
-        return *this;
-    }
-    CONSTEXPR uint32_t get_addr_word() const
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    uint32_t get_addr_word() const volatile
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    CONSTEXPR basep9_r &set_addr_word(uint32_t value)
-    {
-        addr_word = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// basep10_r - Lower 32 bits of the Base pointer for region index 5
-struct basep10_r
-{
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
-    union
-    {
-        uint32_t addr_word; // The low word of the 64-bit address
-        uint32_t word;
-    };
-#ifdef __cplusplus
-  public:
-    CONSTEXPR basep10_r() : addr_word(static_cast<uint32_t>(0)) {}
-    CONSTEXPR basep10_r(uint32_t init) : word(init) {}
-    CONSTEXPR void operator=(uint32_t value)
-    {
-        word = value;
-    }
-    void operator=(uint32_t value) volatile
-    {
-        word = value;
-    }
-    CONSTEXPR operator uint32_t()
-    {
-        return word;
-    }
-    operator uint32_t() volatile
-    {
-        return word;
-    }
-    basep10_r copy() volatile
-    {
-        return *this;
-    }
-    CONSTEXPR uint32_t get_addr_word() const
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    uint32_t get_addr_word() const volatile
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    CONSTEXPR basep10_r &set_addr_word(uint32_t value)
-    {
-        addr_word = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// basep11_r - Upper 32 bits of the Base pointer for region index 5
-struct basep11_r
-{
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
-    union
-    {
-        uint32_t addr_word; // The high word of the 64-bit address
-        uint32_t word;
-    };
-#ifdef __cplusplus
-  public:
-    CONSTEXPR basep11_r() : addr_word(static_cast<uint32_t>(0)) {}
-    CONSTEXPR basep11_r(uint32_t init) : word(init) {}
-    CONSTEXPR void operator=(uint32_t value)
-    {
-        word = value;
-    }
-    void operator=(uint32_t value) volatile
-    {
-        word = value;
-    }
-    CONSTEXPR operator uint32_t()
-    {
-        return word;
-    }
-    operator uint32_t() volatile
-    {
-        return word;
-    }
-    basep11_r copy() volatile
-    {
-        return *this;
-    }
-    CONSTEXPR uint32_t get_addr_word() const
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    uint32_t get_addr_word() const volatile
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    CONSTEXPR basep11_r &set_addr_word(uint32_t value)
-    {
-        addr_word = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// basep12_r - Lower 32 bits of the Base pointer for region index 6
-struct basep12_r
-{
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
-    union
-    {
-        uint32_t addr_word; // The low word of the 64-bit address
-        uint32_t word;
-    };
-#ifdef __cplusplus
-  public:
-    CONSTEXPR basep12_r() : addr_word(static_cast<uint32_t>(0)) {}
-    CONSTEXPR basep12_r(uint32_t init) : word(init) {}
-    CONSTEXPR void operator=(uint32_t value)
-    {
-        word = value;
-    }
-    void operator=(uint32_t value) volatile
-    {
-        word = value;
-    }
-    CONSTEXPR operator uint32_t()
-    {
-        return word;
-    }
-    operator uint32_t() volatile
-    {
-        return word;
-    }
-    basep12_r copy() volatile
-    {
-        return *this;
-    }
-    CONSTEXPR uint32_t get_addr_word() const
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    uint32_t get_addr_word() const volatile
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    CONSTEXPR basep12_r &set_addr_word(uint32_t value)
-    {
-        addr_word = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// basep13_r - Upper 32 bits of the Base pointer for region index 6
-struct basep13_r
-{
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
-    union
-    {
-        uint32_t addr_word; // The high word of the 64-bit address
-        uint32_t word;
-    };
-#ifdef __cplusplus
-  public:
-    CONSTEXPR basep13_r() : addr_word(static_cast<uint32_t>(0)) {}
-    CONSTEXPR basep13_r(uint32_t init) : word(init) {}
-    CONSTEXPR void operator=(uint32_t value)
-    {
-        word = value;
-    }
-    void operator=(uint32_t value) volatile
-    {
-        word = value;
-    }
-    CONSTEXPR operator uint32_t()
-    {
-        return word;
-    }
-    operator uint32_t() volatile
-    {
-        return word;
-    }
-    basep13_r copy() volatile
-    {
-        return *this;
-    }
-    CONSTEXPR uint32_t get_addr_word() const
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    uint32_t get_addr_word() const volatile
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    CONSTEXPR basep13_r &set_addr_word(uint32_t value)
-    {
-        addr_word = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// basep14_r - Lower 32 bits of the Base pointer for region index 7
-struct basep14_r
-{
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
-    union
-    {
-        uint32_t addr_word; // The low word of the 64-bit address
-        uint32_t word;
-    };
-#ifdef __cplusplus
-  public:
-    CONSTEXPR basep14_r() : addr_word(static_cast<uint32_t>(0)) {}
-    CONSTEXPR basep14_r(uint32_t init) : word(init) {}
-    CONSTEXPR void operator=(uint32_t value)
-    {
-        word = value;
-    }
-    void operator=(uint32_t value) volatile
-    {
-        word = value;
-    }
-    CONSTEXPR operator uint32_t()
-    {
-        return word;
-    }
-    operator uint32_t() volatile
-    {
-        return word;
-    }
-    basep14_r copy() volatile
-    {
-        return *this;
-    }
-    CONSTEXPR uint32_t get_addr_word() const
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    uint32_t get_addr_word() const volatile
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    CONSTEXPR basep14_r &set_addr_word(uint32_t value)
-    {
-        addr_word = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// basep15_r - Upper 32 bits of the Base pointer for region index 7
-struct basep15_r
-{
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
-    union
-    {
-        uint32_t addr_word; // The high word of the 64-bit address
-        uint32_t word;
-    };
-#ifdef __cplusplus
-  public:
-    CONSTEXPR basep15_r() : addr_word(static_cast<uint32_t>(0)) {}
-    CONSTEXPR basep15_r(uint32_t init) : word(init) {}
-    CONSTEXPR void operator=(uint32_t value)
-    {
-        word = value;
-    }
-    void operator=(uint32_t value) volatile
-    {
-        word = value;
-    }
-    CONSTEXPR operator uint32_t()
-    {
-        return word;
-    }
-    operator uint32_t() volatile
-    {
-        return word;
-    }
-    basep15_r copy() volatile
-    {
-        return *this;
-    }
-    CONSTEXPR uint32_t get_addr_word() const
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    uint32_t get_addr_word() const volatile
-    {
-        uint32_t value = static_cast<uint32_t>(addr_word);
-        return value;
-    }
-    CONSTEXPR basep15_r &set_addr_word(uint32_t value)
-    {
-        addr_word = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// wd_status_r - WD_STATUS of core DEBUGCORE
-struct wd_status_r
-{
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
         {
-            uint32_t core_slice_state : 2; // STATE_HEADER=0, STATE_PALETTE=1, STATE_WEIGHTS=2
+            uint32_t offset : 32; // Offset
+            uint32_t reserved0 : 32;
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR basep_r() : word0(0), word1(0) {}
+    CONSTEXPR basep_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    basep_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// wd_status_r - WD_STATUS
+struct wd_status_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t core_slice_state : 2; // WD core slice parser state
             uint32_t core_idle : 1;        // Core idle
-            uint32_t ctrl_state : 2;       // IDLE=0, DRAIN=1, OFD_INIT=2, OFD_RUN=3
+            uint32_t ctrl_state : 2;       // WD control state
             uint32_t ctrl_idle : 1;        // All stripe jobs idle (all weights consumed)
             uint32_t write_buf_index0 : 3; // current write index for next data from core
             uint32_t write_buf_valid0 : 1; // write buf valid (full)
@@ -3912,212 +3414,207 @@
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR wd_status_r() :
-        core_slice_state(static_cast<uint32_t>(0)), core_idle(static_cast<uint32_t>(0)),
-        ctrl_state(static_cast<uint32_t>(0)), ctrl_idle(static_cast<uint32_t>(0)),
-        write_buf_index0(static_cast<uint32_t>(0)), write_buf_valid0(static_cast<uint32_t>(0)),
-        write_buf_idle0(static_cast<uint32_t>(0)), write_buf_index1(static_cast<uint32_t>(0)),
-        write_buf_valid1(static_cast<uint32_t>(0)), write_buf_idle1(static_cast<uint32_t>(0)),
-        events(static_cast<uint32_t>(0)), reserved0(static_cast<uint32_t>(0))
-    {
-    }
-    CONSTEXPR wd_status_r(uint32_t init) : word(init) {}
+    CONSTEXPR wd_status_r() : word0(0) {}
+    CONSTEXPR wd_status_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     wd_status_r copy() volatile
     {
         return *this;
     }
-    CONSTEXPR uint32_t get_core_slice_state() const
+    CONSTEXPR NPU_NAMESPACE::wd_core_slice_state get_core_slice_state() const
     {
-        uint32_t value = static_cast<uint32_t>(core_slice_state);
+        NPU_NAMESPACE::wd_core_slice_state value =
+            static_cast<NPU_NAMESPACE::wd_core_slice_state>(((1U << 2) - 1) & (word0 >> 0));
         return value;
     }
-    uint32_t get_core_slice_state() const volatile
+    NPU_NAMESPACE::wd_core_slice_state get_core_slice_state() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(core_slice_state);
+        NPU_NAMESPACE::wd_core_slice_state value =
+            static_cast<NPU_NAMESPACE::wd_core_slice_state>(((1U << 2) - 1) & (word0 >> 0));
         return value;
     }
-    CONSTEXPR wd_status_r &set_core_slice_state(uint32_t value)
+    CONSTEXPR wd_status_r &set_core_slice_state(NPU_NAMESPACE::wd_core_slice_state value)
     {
-        core_slice_state = ((1u << 2) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 2) - 1)) << 0) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 0);
         return *this;
     }
     CONSTEXPR uint32_t get_core_idle() const
     {
-        uint32_t value = static_cast<uint32_t>(core_idle);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
     uint32_t get_core_idle() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(core_idle);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
     CONSTEXPR wd_status_r &set_core_idle(uint32_t value)
     {
-        core_idle = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
         return *this;
     }
-    CONSTEXPR uint32_t get_ctrl_state() const
+    CONSTEXPR NPU_NAMESPACE::wd_ctrl_state get_ctrl_state() const
     {
-        uint32_t value = static_cast<uint32_t>(ctrl_state);
+        NPU_NAMESPACE::wd_ctrl_state value = static_cast<NPU_NAMESPACE::wd_ctrl_state>(((1U << 2) - 1) & (word0 >> 3));
         return value;
     }
-    uint32_t get_ctrl_state() const volatile
+    NPU_NAMESPACE::wd_ctrl_state get_ctrl_state() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(ctrl_state);
+        NPU_NAMESPACE::wd_ctrl_state value = static_cast<NPU_NAMESPACE::wd_ctrl_state>(((1U << 2) - 1) & (word0 >> 3));
         return value;
     }
-    CONSTEXPR wd_status_r &set_ctrl_state(uint32_t value)
+    CONSTEXPR wd_status_r &set_ctrl_state(NPU_NAMESPACE::wd_ctrl_state value)
     {
-        ctrl_state = ((1u << 2) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 2) - 1)) << 3) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 3);
         return *this;
     }
     CONSTEXPR uint32_t get_ctrl_idle() const
     {
-        uint32_t value = static_cast<uint32_t>(ctrl_idle);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5));
         return value;
     }
     uint32_t get_ctrl_idle() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(ctrl_idle);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5));
         return value;
     }
     CONSTEXPR wd_status_r &set_ctrl_idle(uint32_t value)
     {
-        ctrl_idle = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 5) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 5);
         return *this;
     }
     CONSTEXPR uint32_t get_write_buf_index0() const
     {
-        uint32_t value = static_cast<uint32_t>(write_buf_index0);
+        uint32_t value = static_cast<uint32_t>(((1U << 3) - 1) & (word0 >> 6));
         return value;
     }
     uint32_t get_write_buf_index0() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(write_buf_index0);
+        uint32_t value = static_cast<uint32_t>(((1U << 3) - 1) & (word0 >> 6));
         return value;
     }
     CONSTEXPR wd_status_r &set_write_buf_index0(uint32_t value)
     {
-        write_buf_index0 = ((1u << 3) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 3) - 1)) << 6) & word0) | ((((1U << 3) - 1) & static_cast<uint32_t>(value)) << 6);
         return *this;
     }
     CONSTEXPR uint32_t get_write_buf_valid0() const
     {
-        uint32_t value = static_cast<uint32_t>(write_buf_valid0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 9));
         return value;
     }
     uint32_t get_write_buf_valid0() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(write_buf_valid0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 9));
         return value;
     }
     CONSTEXPR wd_status_r &set_write_buf_valid0(uint32_t value)
     {
-        write_buf_valid0 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 9) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 9);
         return *this;
     }
     CONSTEXPR uint32_t get_write_buf_idle0() const
     {
-        uint32_t value = static_cast<uint32_t>(write_buf_idle0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10));
         return value;
     }
     uint32_t get_write_buf_idle0() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(write_buf_idle0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10));
         return value;
     }
     CONSTEXPR wd_status_r &set_write_buf_idle0(uint32_t value)
     {
-        write_buf_idle0 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 10) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 10);
         return *this;
     }
     CONSTEXPR uint32_t get_write_buf_index1() const
     {
-        uint32_t value = static_cast<uint32_t>(write_buf_index1);
+        uint32_t value = static_cast<uint32_t>(((1U << 3) - 1) & (word0 >> 11));
         return value;
     }
     uint32_t get_write_buf_index1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(write_buf_index1);
+        uint32_t value = static_cast<uint32_t>(((1U << 3) - 1) & (word0 >> 11));
         return value;
     }
     CONSTEXPR wd_status_r &set_write_buf_index1(uint32_t value)
     {
-        write_buf_index1 = ((1u << 3) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 3) - 1)) << 11) & word0) | ((((1U << 3) - 1) & static_cast<uint32_t>(value)) << 11);
         return *this;
     }
     CONSTEXPR uint32_t get_write_buf_valid1() const
     {
-        uint32_t value = static_cast<uint32_t>(write_buf_valid1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 14));
         return value;
     }
     uint32_t get_write_buf_valid1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(write_buf_valid1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 14));
         return value;
     }
     CONSTEXPR wd_status_r &set_write_buf_valid1(uint32_t value)
     {
-        write_buf_valid1 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 14) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 14);
         return *this;
     }
     CONSTEXPR uint32_t get_write_buf_idle1() const
     {
-        uint32_t value = static_cast<uint32_t>(write_buf_idle1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 15));
         return value;
     }
     uint32_t get_write_buf_idle1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(write_buf_idle1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 15));
         return value;
     }
     CONSTEXPR wd_status_r &set_write_buf_idle1(uint32_t value)
     {
-        write_buf_idle1 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 15) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 15);
         return *this;
     }
     CONSTEXPR uint32_t get_events() const
     {
-        uint32_t value = static_cast<uint32_t>(events);
+        uint32_t value = static_cast<uint32_t>(((1U << 12) - 1) & (word0 >> 16));
         return value;
     }
     uint32_t get_events() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(events);
+        uint32_t value = static_cast<uint32_t>(((1U << 12) - 1) & (word0 >> 16));
         return value;
     }
     CONSTEXPR wd_status_r &set_events(uint32_t value)
     {
-        events = ((1u << 12) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 12) - 1)) << 16) & word0) | ((((1U << 12) - 1) & static_cast<uint32_t>(value)) << 16);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
-// mac_status_r - MAC_STATUS of core DEBUGCORE
+// mac_status_r - MAC_STATUS
 struct mac_status_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
@@ -4143,36 +3640,28 @@
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR mac_status_r() :
-        block_cfg_valid(static_cast<uint32_t>(0)), trav_en(static_cast<uint32_t>(0)),
-        wait_for_ib(static_cast<uint32_t>(0)), wait_for_acc_buf(static_cast<uint32_t>(0)),
-        wait_for_weights(static_cast<uint32_t>(0)), stall_stripe(static_cast<uint32_t>(0)),
-        dw_sel(static_cast<uint32_t>(0)), wait_for_dw0_ready(static_cast<uint32_t>(0)),
-        wait_for_dw1_ready(static_cast<uint32_t>(0)), acc_buf_sel_ai(static_cast<uint32_t>(0)),
-        wait_for_acc0_ready(static_cast<uint32_t>(0)), wait_for_acc1_ready(static_cast<uint32_t>(0)),
-        acc_buf_sel_aa(static_cast<uint32_t>(0)), acc0_valid(static_cast<uint32_t>(0)),
-        acc1_valid(static_cast<uint32_t>(0)), reserved0(static_cast<uint32_t>(0)), events(static_cast<uint32_t>(0)),
-        reserved1(static_cast<uint32_t>(0))
-    {
-    }
-    CONSTEXPR mac_status_r(uint32_t init) : word(init) {}
+    CONSTEXPR mac_status_r() : word0(0) {}
+    CONSTEXPR mac_status_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     mac_status_r copy() volatile
     {
@@ -4180,297 +3669,291 @@
     }
     CONSTEXPR uint32_t get_block_cfg_valid() const
     {
-        uint32_t value = static_cast<uint32_t>(block_cfg_valid);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
     uint32_t get_block_cfg_valid() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(block_cfg_valid);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
     CONSTEXPR mac_status_r &set_block_cfg_valid(uint32_t value)
     {
-        block_cfg_valid = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
         return *this;
     }
     CONSTEXPR uint32_t get_trav_en() const
     {
-        uint32_t value = static_cast<uint32_t>(trav_en);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
     uint32_t get_trav_en() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(trav_en);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
     CONSTEXPR mac_status_r &set_trav_en(uint32_t value)
     {
-        trav_en = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
         return *this;
     }
     CONSTEXPR uint32_t get_wait_for_ib() const
     {
-        uint32_t value = static_cast<uint32_t>(wait_for_ib);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
     uint32_t get_wait_for_ib() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(wait_for_ib);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
     CONSTEXPR mac_status_r &set_wait_for_ib(uint32_t value)
     {
-        wait_for_ib = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
         return *this;
     }
     CONSTEXPR uint32_t get_wait_for_acc_buf() const
     {
-        uint32_t value = static_cast<uint32_t>(wait_for_acc_buf);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
         return value;
     }
     uint32_t get_wait_for_acc_buf() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(wait_for_acc_buf);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
         return value;
     }
     CONSTEXPR mac_status_r &set_wait_for_acc_buf(uint32_t value)
     {
-        wait_for_acc_buf = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3);
         return *this;
     }
     CONSTEXPR uint32_t get_wait_for_weights() const
     {
-        uint32_t value = static_cast<uint32_t>(wait_for_weights);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4));
         return value;
     }
     uint32_t get_wait_for_weights() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(wait_for_weights);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4));
         return value;
     }
     CONSTEXPR mac_status_r &set_wait_for_weights(uint32_t value)
     {
-        wait_for_weights = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 4) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 4);
         return *this;
     }
     CONSTEXPR uint32_t get_stall_stripe() const
     {
-        uint32_t value = static_cast<uint32_t>(stall_stripe);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5));
         return value;
     }
     uint32_t get_stall_stripe() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(stall_stripe);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5));
         return value;
     }
     CONSTEXPR mac_status_r &set_stall_stripe(uint32_t value)
     {
-        stall_stripe = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 5) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 5);
         return *this;
     }
     CONSTEXPR uint32_t get_dw_sel() const
     {
-        uint32_t value = static_cast<uint32_t>(dw_sel);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6));
         return value;
     }
     uint32_t get_dw_sel() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(dw_sel);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6));
         return value;
     }
     CONSTEXPR mac_status_r &set_dw_sel(uint32_t value)
     {
-        dw_sel = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 6) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 6);
         return *this;
     }
     CONSTEXPR uint32_t get_wait_for_dw0_ready() const
     {
-        uint32_t value = static_cast<uint32_t>(wait_for_dw0_ready);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7));
         return value;
     }
     uint32_t get_wait_for_dw0_ready() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(wait_for_dw0_ready);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7));
         return value;
     }
     CONSTEXPR mac_status_r &set_wait_for_dw0_ready(uint32_t value)
     {
-        wait_for_dw0_ready = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 7) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 7);
         return *this;
     }
     CONSTEXPR uint32_t get_wait_for_dw1_ready() const
     {
-        uint32_t value = static_cast<uint32_t>(wait_for_dw1_ready);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 8));
         return value;
     }
     uint32_t get_wait_for_dw1_ready() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(wait_for_dw1_ready);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 8));
         return value;
     }
     CONSTEXPR mac_status_r &set_wait_for_dw1_ready(uint32_t value)
     {
-        wait_for_dw1_ready = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 8) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 8);
         return *this;
     }
     CONSTEXPR uint32_t get_acc_buf_sel_ai() const
     {
-        uint32_t value = static_cast<uint32_t>(acc_buf_sel_ai);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 9));
         return value;
     }
     uint32_t get_acc_buf_sel_ai() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(acc_buf_sel_ai);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 9));
         return value;
     }
     CONSTEXPR mac_status_r &set_acc_buf_sel_ai(uint32_t value)
     {
-        acc_buf_sel_ai = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 9) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 9);
         return *this;
     }
     CONSTEXPR uint32_t get_wait_for_acc0_ready() const
     {
-        uint32_t value = static_cast<uint32_t>(wait_for_acc0_ready);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10));
         return value;
     }
     uint32_t get_wait_for_acc0_ready() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(wait_for_acc0_ready);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10));
         return value;
     }
     CONSTEXPR mac_status_r &set_wait_for_acc0_ready(uint32_t value)
     {
-        wait_for_acc0_ready = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 10) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 10);
         return *this;
     }
     CONSTEXPR uint32_t get_wait_for_acc1_ready() const
     {
-        uint32_t value = static_cast<uint32_t>(wait_for_acc1_ready);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 11));
         return value;
     }
     uint32_t get_wait_for_acc1_ready() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(wait_for_acc1_ready);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 11));
         return value;
     }
     CONSTEXPR mac_status_r &set_wait_for_acc1_ready(uint32_t value)
     {
-        wait_for_acc1_ready = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 11) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 11);
         return *this;
     }
     CONSTEXPR uint32_t get_acc_buf_sel_aa() const
     {
-        uint32_t value = static_cast<uint32_t>(acc_buf_sel_aa);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 12));
         return value;
     }
     uint32_t get_acc_buf_sel_aa() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(acc_buf_sel_aa);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 12));
         return value;
     }
     CONSTEXPR mac_status_r &set_acc_buf_sel_aa(uint32_t value)
     {
-        acc_buf_sel_aa = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 12) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 12);
         return *this;
     }
     CONSTEXPR uint32_t get_acc0_valid() const
     {
-        uint32_t value = static_cast<uint32_t>(acc0_valid);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 13));
         return value;
     }
     uint32_t get_acc0_valid() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(acc0_valid);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 13));
         return value;
     }
     CONSTEXPR mac_status_r &set_acc0_valid(uint32_t value)
     {
-        acc0_valid = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 13) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 13);
         return *this;
     }
     CONSTEXPR uint32_t get_acc1_valid() const
     {
-        uint32_t value = static_cast<uint32_t>(acc1_valid);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 14));
         return value;
     }
     uint32_t get_acc1_valid() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(acc1_valid);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 14));
         return value;
     }
     CONSTEXPR mac_status_r &set_acc1_valid(uint32_t value)
     {
-        acc1_valid = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 14) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 14);
         return *this;
     }
     CONSTEXPR uint32_t get_events() const
     {
-        uint32_t value = static_cast<uint32_t>(events);
+        uint32_t value = static_cast<uint32_t>(((1U << 11) - 1) & (word0 >> 16));
         return value;
     }
     uint32_t get_events() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(events);
+        uint32_t value = static_cast<uint32_t>(((1U << 11) - 1) & (word0 >> 16));
         return value;
     }
     CONSTEXPR mac_status_r &set_events(uint32_t value)
     {
-        events = ((1u << 11) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 11) - 1)) << 16) & word0) | ((((1U << 11) - 1) & static_cast<uint32_t>(value)) << 16);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
-// ao_status_r - AO_STATUS of core DEBUGCORE
+// ao_status_r - AO_STATUS
 struct ao_status_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
         {
-            uint32_t cmd_sbw_valid : 1; // Block command to shared buffer write module is valid.
-            uint32_t cmd_act_valid : 1; // Block command to activation function module is valid.
-            uint32_t cmd_ctl_valid : 1; // Block command to control module is valid.
-            uint32_t cmd_scl_valid : 1; // Block command to scale module is valid.
-            uint32_t cmd_sbr_valid : 1; // Block command to shared buffer read module is valid.
-            uint32_t cmd_ofm_valid : 1; // Block command to ofm parameter module is valid.
-            uint32_t blk_cmd_ready : 1; // Ready to accept block command.
-            uint32_t blk_cmd_valid : 1; // Block command from CC is valid.
+            uint32_t cmd_sbw_valid : 1; // Block command to shared buffer write module is valid
+            uint32_t cmd_act_valid : 1; // Block command to activation function module is valid
+            uint32_t cmd_ctl_valid : 1; // Block command to control module is valid
+            uint32_t cmd_scl_valid : 1; // Block command to scale module is valid
+            uint32_t cmd_sbr_valid : 1; // Block command to shared buffer read module is valid
+            uint32_t cmd_ofm_valid : 1; // Block command to ofm parameter module is valid
+            uint32_t blk_cmd_ready : 1; // Ready to accept block command
+            uint32_t blk_cmd_valid : 1; // Block command from CC is valid
             uint32_t reserved0 : 8;
-            uint32_t events : 8; // Mapped to AO events described in Appendix A.
+            uint32_t events : 8; // Mapped to AO events described in Appendix A
             uint32_t reserved1 : 8;
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR ao_status_r() :
-        cmd_sbw_valid(static_cast<uint32_t>(0)), cmd_act_valid(static_cast<uint32_t>(0)),
-        cmd_ctl_valid(static_cast<uint32_t>(0)), cmd_scl_valid(static_cast<uint32_t>(0)),
-        cmd_sbr_valid(static_cast<uint32_t>(0)), cmd_ofm_valid(static_cast<uint32_t>(0)),
-        blk_cmd_ready(static_cast<uint32_t>(0)), blk_cmd_valid(static_cast<uint32_t>(0)),
-        reserved0(static_cast<uint32_t>(0)), events(static_cast<uint32_t>(0)), reserved1(static_cast<uint32_t>(0))
-    {
-    }
-    CONSTEXPR ao_status_r(uint32_t init) : word(init) {}
+    CONSTEXPR ao_status_r() : word0(0) {}
+    CONSTEXPR ao_status_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     ao_status_r copy() volatile
     {
@@ -4478,1162 +3961,1130 @@
     }
     CONSTEXPR uint32_t get_cmd_sbw_valid() const
     {
-        uint32_t value = static_cast<uint32_t>(cmd_sbw_valid);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
     uint32_t get_cmd_sbw_valid() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(cmd_sbw_valid);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
     CONSTEXPR ao_status_r &set_cmd_sbw_valid(uint32_t value)
     {
-        cmd_sbw_valid = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
         return *this;
     }
     CONSTEXPR uint32_t get_cmd_act_valid() const
     {
-        uint32_t value = static_cast<uint32_t>(cmd_act_valid);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
     uint32_t get_cmd_act_valid() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(cmd_act_valid);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
     CONSTEXPR ao_status_r &set_cmd_act_valid(uint32_t value)
     {
-        cmd_act_valid = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
         return *this;
     }
     CONSTEXPR uint32_t get_cmd_ctl_valid() const
     {
-        uint32_t value = static_cast<uint32_t>(cmd_ctl_valid);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
     uint32_t get_cmd_ctl_valid() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(cmd_ctl_valid);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
     CONSTEXPR ao_status_r &set_cmd_ctl_valid(uint32_t value)
     {
-        cmd_ctl_valid = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
         return *this;
     }
     CONSTEXPR uint32_t get_cmd_scl_valid() const
     {
-        uint32_t value = static_cast<uint32_t>(cmd_scl_valid);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
         return value;
     }
     uint32_t get_cmd_scl_valid() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(cmd_scl_valid);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
         return value;
     }
     CONSTEXPR ao_status_r &set_cmd_scl_valid(uint32_t value)
     {
-        cmd_scl_valid = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3);
         return *this;
     }
     CONSTEXPR uint32_t get_cmd_sbr_valid() const
     {
-        uint32_t value = static_cast<uint32_t>(cmd_sbr_valid);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4));
         return value;
     }
     uint32_t get_cmd_sbr_valid() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(cmd_sbr_valid);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4));
         return value;
     }
     CONSTEXPR ao_status_r &set_cmd_sbr_valid(uint32_t value)
     {
-        cmd_sbr_valid = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 4) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 4);
         return *this;
     }
     CONSTEXPR uint32_t get_cmd_ofm_valid() const
     {
-        uint32_t value = static_cast<uint32_t>(cmd_ofm_valid);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5));
         return value;
     }
     uint32_t get_cmd_ofm_valid() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(cmd_ofm_valid);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5));
         return value;
     }
     CONSTEXPR ao_status_r &set_cmd_ofm_valid(uint32_t value)
     {
-        cmd_ofm_valid = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 5) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 5);
         return *this;
     }
     CONSTEXPR uint32_t get_blk_cmd_ready() const
     {
-        uint32_t value = static_cast<uint32_t>(blk_cmd_ready);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6));
         return value;
     }
     uint32_t get_blk_cmd_ready() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(blk_cmd_ready);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6));
         return value;
     }
     CONSTEXPR ao_status_r &set_blk_cmd_ready(uint32_t value)
     {
-        blk_cmd_ready = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 6) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 6);
         return *this;
     }
     CONSTEXPR uint32_t get_blk_cmd_valid() const
     {
-        uint32_t value = static_cast<uint32_t>(blk_cmd_valid);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7));
         return value;
     }
     uint32_t get_blk_cmd_valid() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(blk_cmd_valid);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7));
         return value;
     }
     CONSTEXPR ao_status_r &set_blk_cmd_valid(uint32_t value)
     {
-        blk_cmd_valid = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 7) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 7);
         return *this;
     }
     CONSTEXPR uint32_t get_events() const
     {
-        uint32_t value = static_cast<uint32_t>(events);
+        uint32_t value = static_cast<uint32_t>(((1U << 8) - 1) & (word0 >> 16));
         return value;
     }
     uint32_t get_events() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(events);
+        uint32_t value = static_cast<uint32_t>(((1U << 8) - 1) & (word0 >> 16));
         return value;
     }
     CONSTEXPR ao_status_r &set_events(uint32_t value)
     {
-        events = ((1u << 8) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 8) - 1)) << 16) & word0) | ((((1U << 8) - 1) & static_cast<uint32_t>(value)) << 16);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
-// dma_status0_r - DMA_STATUS0 of core DEBUGCORE
+// dma_status0_r - DMA_STATUS0
 struct dma_status0_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
         {
-            uint32_t CMD_IDLE : 1; // When this bit is high means that the CMD block is not busy in generating addresses
-                                   // for a CMD job.
-            uint32_t IFM_IDLE : 1; // When this bit is high means that there are no ongoing IFM jobs
-            uint32_t WGT_IDLE_C0 : 1; // When this bit is high means that the WGT block is not busy in generating
+            uint32_t cmd_idle : 1; // When this bit is high means that the CMD block is not busy in generating addresses
+                                   // for a CMD job
+            uint32_t ifm_idle : 1; // When this bit is high means that there are no ongoing IFM jobs
+            uint32_t wgt_idle_c0 : 1; // When this bit is high means that the WGT block is not busy in generating
                                       // addresses for a WGT job
-            uint32_t BAS_IDLE_C0 : 1; // When this bit is high means that the BAS block is not busy in generating
+            uint32_t bas_idle_c0 : 1; // When this bit is high means that the BAS block is not busy in generating
                                       // addresses for a BAS job
-            uint32_t M2M_IDLE : 1;    // When this bit is high means that there are no ongoing M2M jobs
-            uint32_t OFM_IDLE : 1;    // When this bit is high means that there are no ongoing OFM jobs
-            uint32_t HALT_REQ : 1;    // CPM has requested to HALT AXI bus before soft reset
-            uint32_t HALT_ACK : 1;    // DMA is in condition to halt the AXI bus since there are no pending transactions
-            uint32_t PAUSE_REQ : 1;   // CC has requested to pause the AXI
-            uint32_t PAUSE_ACK : 1; // DMA is in condition to pause the AXI bus since there are no pending transactions
-            uint32_t IB0_AI_VALID_C0 : 1;       // Data for AI to be read in IFM input buffer 0 - Core 0
-            uint32_t IB0_AI_READY_C0 : 1;       // Data consumed from AI in IFM input buffer 0 - Core 0
-            uint32_t IB1_AI_VALID_C0 : 1;       // Data for AI to be read in IFM input buffer 1 - Core 0
-            uint32_t IB1_AI_READY_C0 : 1;       // Data consumed from AI in IFM input buffer 1 - Core 0
-            uint32_t IB0_AO_VALID_C0 : 1;       // Data for AO to be read in IFM input buffer 0 - Core 0
-            uint32_t IB0_AO_READY_C0 : 1;       // Data consumed from AO in IFM input buffer 0 - Core 0
-            uint32_t IB1_AO_VALID_C0 : 1;       // Data for AO to be read in IFM input buffer 0 - Core 0
-            uint32_t IB1_AO_READY_C0 : 1;       // Data consumed from AO in IFM input buffer 1 - Core 0
-            uint32_t OB0_VALID_C0 : 1;          // Data for DMA ready to be consumed in OFM output buffer 0 -  Core 0
-            uint32_t OB0_READY_C0 : 1;          // Data consumed from DMA in OFM output buffer 0 - Core 0
-            uint32_t OB1_VALID_C0 : 1;          // Data for DMA ready to be consumed in OFM output buffer 1 -  Core 0
-            uint32_t OB1_READY_C0 : 1;          // Data consumed from DMA in OFM output buffer 1 - Core 0
-            uint32_t CMD_VALID : 1;             // New command word for CC to be consumed
-            uint32_t CMD_READY : 1;             // command word consumed by CC
-            uint32_t WD_BITSTREAM_VALID_C0 : 1; // New weight word for WD to be consumed - Core 0
-            uint32_t WD_BITSTREAM_READY_C0 : 1; // Weight word consumed by WD - Core 0
-            uint32_t BS_BITSTREAM_VALID_C0 : 1; // New BaS word for AO to be consumed - Core 0
-            uint32_t BS_BITSTREAM_READY_C0 : 1; // BaS word consumed by AO - Core 0
-            uint32_t AXI0_AR_STALLED : 1; // Read transfer request stalled on arready low AXI0 (due to memory system)
-            uint32_t AXI0_RD_LIMIT_STALL : 1; // Read stalled due to one AXI0 limit counter being reached
-            uint32_t AXI0_AW_STALLED : 1; // Write transfer request stalled on awready low AXI0 (due to memory system)
-            uint32_t AXI0_W_STALLED : 1;  // Write transfer stalled on awready low AXI0 (due to memory system)
+            uint32_t m2m_idle : 1;    // When this bit is high means that there are no ongoing M2M jobs
+            uint32_t ofm_idle : 1;    // When this bit is high means that there are no ongoing OFM jobs
+            uint32_t halt_req : 1;    // CPM has requested to HALT AXI bus before soft reset
+            uint32_t halt_ack : 1;    // DMA is in condition to halt the AXI bus since there are no pending transactions
+            uint32_t pause_req : 1;   // CC has requested to pause the AXI
+            uint32_t pause_ack : 1; // DMA is in condition to pause the AXI bus since there are no pending transactions
+            uint32_t ib0_ai_valid_c0 : 1;       // Data for AI to be read in IFM input buffer 0 - Core 0
+            uint32_t ib0_ai_ready_c0 : 1;       // Data consumed from AI in IFM input buffer 0 - Core 0
+            uint32_t ib1_ai_valid_c0 : 1;       // Data for AI to be read in IFM input buffer 1 - Core 0
+            uint32_t ib1_ai_ready_c0 : 1;       // Data consumed from AI in IFM input buffer 1 - Core 0
+            uint32_t ib0_ao_valid_c0 : 1;       // Data for AO to be read in IFM input buffer 0 - Core 0
+            uint32_t ib0_ao_ready_c0 : 1;       // Data consumed from AO in IFM input buffer 0 - Core 0
+            uint32_t ib1_ao_valid_c0 : 1;       // Data for AO to be read in IFM input buffer 0 - Core 0
+            uint32_t ib1_ao_ready_c0 : 1;       // Data consumed from AO in IFM input buffer 1 - Core 0
+            uint32_t ob0_valid_c0 : 1;          // Data for DMA ready to be consumed in OFM output buffer 0 -  Core 0
+            uint32_t ob0_ready_c0 : 1;          // Data consumed from DMA in OFM output buffer 0 - Core 0
+            uint32_t ob1_valid_c0 : 1;          // Data for DMA ready to be consumed in OFM output buffer 1 -  Core 0
+            uint32_t ob1_ready_c0 : 1;          // Data consumed from DMA in OFM output buffer 1 - Core 0
+            uint32_t cmd_valid : 1;             // New command word for CC to be consumed
+            uint32_t cmd_ready : 1;             // command word consumed by CC
+            uint32_t wd_bitstream_valid_c0 : 1; // New weight word for WD to be consumed - Core 0
+            uint32_t wd_bitstream_ready_c0 : 1; // Weight word consumed by WD - Core 0
+            uint32_t bs_bitstream_valid_c0 : 1; // New BaS word for AO to be consumed - Core 0
+            uint32_t bs_bitstream_ready_c0 : 1; // BaS word consumed by AO - Core 0
+            uint32_t axi0_ar_stalled : 1; // Read transfer request stalled on arready low AXI0 (due to memory system)
+            uint32_t axi0_rd_limit_stall : 1; // Read stalled due to one AXI0 limit counter being reached
+            uint32_t axi0_aw_stalled : 1; // Write transfer request stalled on awready low AXI0 (due to memory system)
+            uint32_t axi0_w_stalled : 1;  // Write transfer stalled on awready low AXI0 (due to memory system)
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR dma_status0_r() :
-        CMD_IDLE(static_cast<uint32_t>(0)), IFM_IDLE(static_cast<uint32_t>(0)), WGT_IDLE_C0(static_cast<uint32_t>(0)),
-        BAS_IDLE_C0(static_cast<uint32_t>(0)), M2M_IDLE(static_cast<uint32_t>(0)), OFM_IDLE(static_cast<uint32_t>(0)),
-        HALT_REQ(static_cast<uint32_t>(0)), HALT_ACK(static_cast<uint32_t>(0)), PAUSE_REQ(static_cast<uint32_t>(0)),
-        PAUSE_ACK(static_cast<uint32_t>(0)), IB0_AI_VALID_C0(static_cast<uint32_t>(0)),
-        IB0_AI_READY_C0(static_cast<uint32_t>(0)), IB1_AI_VALID_C0(static_cast<uint32_t>(0)),
-        IB1_AI_READY_C0(static_cast<uint32_t>(0)), IB0_AO_VALID_C0(static_cast<uint32_t>(0)),
-        IB0_AO_READY_C0(static_cast<uint32_t>(0)), IB1_AO_VALID_C0(static_cast<uint32_t>(0)),
-        IB1_AO_READY_C0(static_cast<uint32_t>(0)), OB0_VALID_C0(static_cast<uint32_t>(0)),
-        OB0_READY_C0(static_cast<uint32_t>(0)), OB1_VALID_C0(static_cast<uint32_t>(0)),
-        OB1_READY_C0(static_cast<uint32_t>(0)), CMD_VALID(static_cast<uint32_t>(0)),
-        CMD_READY(static_cast<uint32_t>(0)), WD_BITSTREAM_VALID_C0(static_cast<uint32_t>(0)),
-        WD_BITSTREAM_READY_C0(static_cast<uint32_t>(0)), BS_BITSTREAM_VALID_C0(static_cast<uint32_t>(0)),
-        BS_BITSTREAM_READY_C0(static_cast<uint32_t>(0)), AXI0_AR_STALLED(static_cast<uint32_t>(0)),
-        AXI0_RD_LIMIT_STALL(static_cast<uint32_t>(0)), AXI0_AW_STALLED(static_cast<uint32_t>(0)),
-        AXI0_W_STALLED(static_cast<uint32_t>(0))
-    {
-    }
-    CONSTEXPR dma_status0_r(uint32_t init) : word(init) {}
+    CONSTEXPR dma_status0_r() : word0(0) {}
+    CONSTEXPR dma_status0_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     dma_status0_r copy() volatile
     {
         return *this;
     }
-    CONSTEXPR uint32_t get_CMD_IDLE() const
+    CONSTEXPR uint32_t get_cmd_idle() const
     {
-        uint32_t value = static_cast<uint32_t>(CMD_IDLE);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
-    uint32_t get_CMD_IDLE() const volatile
+    uint32_t get_cmd_idle() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(CMD_IDLE);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_CMD_IDLE(uint32_t value)
+    CONSTEXPR dma_status0_r &set_cmd_idle(uint32_t value)
     {
-        CMD_IDLE = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
         return *this;
     }
-    CONSTEXPR uint32_t get_IFM_IDLE() const
+    CONSTEXPR uint32_t get_ifm_idle() const
     {
-        uint32_t value = static_cast<uint32_t>(IFM_IDLE);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
-    uint32_t get_IFM_IDLE() const volatile
+    uint32_t get_ifm_idle() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(IFM_IDLE);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_IFM_IDLE(uint32_t value)
+    CONSTEXPR dma_status0_r &set_ifm_idle(uint32_t value)
     {
-        IFM_IDLE = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
         return *this;
     }
-    CONSTEXPR uint32_t get_WGT_IDLE_C0() const
+    CONSTEXPR uint32_t get_wgt_idle_c0() const
     {
-        uint32_t value = static_cast<uint32_t>(WGT_IDLE_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
-    uint32_t get_WGT_IDLE_C0() const volatile
+    uint32_t get_wgt_idle_c0() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(WGT_IDLE_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_WGT_IDLE_C0(uint32_t value)
+    CONSTEXPR dma_status0_r &set_wgt_idle_c0(uint32_t value)
     {
-        WGT_IDLE_C0 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
         return *this;
     }
-    CONSTEXPR uint32_t get_BAS_IDLE_C0() const
+    CONSTEXPR uint32_t get_bas_idle_c0() const
     {
-        uint32_t value = static_cast<uint32_t>(BAS_IDLE_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
         return value;
     }
-    uint32_t get_BAS_IDLE_C0() const volatile
+    uint32_t get_bas_idle_c0() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(BAS_IDLE_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_BAS_IDLE_C0(uint32_t value)
+    CONSTEXPR dma_status0_r &set_bas_idle_c0(uint32_t value)
     {
-        BAS_IDLE_C0 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3);
         return *this;
     }
-    CONSTEXPR uint32_t get_M2M_IDLE() const
+    CONSTEXPR uint32_t get_m2m_idle() const
     {
-        uint32_t value = static_cast<uint32_t>(M2M_IDLE);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4));
         return value;
     }
-    uint32_t get_M2M_IDLE() const volatile
+    uint32_t get_m2m_idle() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(M2M_IDLE);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_M2M_IDLE(uint32_t value)
+    CONSTEXPR dma_status0_r &set_m2m_idle(uint32_t value)
     {
-        M2M_IDLE = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 4) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 4);
         return *this;
     }
-    CONSTEXPR uint32_t get_OFM_IDLE() const
+    CONSTEXPR uint32_t get_ofm_idle() const
     {
-        uint32_t value = static_cast<uint32_t>(OFM_IDLE);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5));
         return value;
     }
-    uint32_t get_OFM_IDLE() const volatile
+    uint32_t get_ofm_idle() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(OFM_IDLE);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_OFM_IDLE(uint32_t value)
+    CONSTEXPR dma_status0_r &set_ofm_idle(uint32_t value)
     {
-        OFM_IDLE = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 5) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 5);
         return *this;
     }
-    CONSTEXPR uint32_t get_HALT_REQ() const
+    CONSTEXPR uint32_t get_halt_req() const
     {
-        uint32_t value = static_cast<uint32_t>(HALT_REQ);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6));
         return value;
     }
-    uint32_t get_HALT_REQ() const volatile
+    uint32_t get_halt_req() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(HALT_REQ);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_HALT_REQ(uint32_t value)
+    CONSTEXPR dma_status0_r &set_halt_req(uint32_t value)
     {
-        HALT_REQ = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 6) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 6);
         return *this;
     }
-    CONSTEXPR uint32_t get_HALT_ACK() const
+    CONSTEXPR uint32_t get_halt_ack() const
     {
-        uint32_t value = static_cast<uint32_t>(HALT_ACK);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7));
         return value;
     }
-    uint32_t get_HALT_ACK() const volatile
+    uint32_t get_halt_ack() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(HALT_ACK);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_HALT_ACK(uint32_t value)
+    CONSTEXPR dma_status0_r &set_halt_ack(uint32_t value)
     {
-        HALT_ACK = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 7) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 7);
         return *this;
     }
-    CONSTEXPR uint32_t get_PAUSE_REQ() const
+    CONSTEXPR uint32_t get_pause_req() const
     {
-        uint32_t value = static_cast<uint32_t>(PAUSE_REQ);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 8));
         return value;
     }
-    uint32_t get_PAUSE_REQ() const volatile
+    uint32_t get_pause_req() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(PAUSE_REQ);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 8));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_PAUSE_REQ(uint32_t value)
+    CONSTEXPR dma_status0_r &set_pause_req(uint32_t value)
     {
-        PAUSE_REQ = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 8) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 8);
         return *this;
     }
-    CONSTEXPR uint32_t get_PAUSE_ACK() const
+    CONSTEXPR uint32_t get_pause_ack() const
     {
-        uint32_t value = static_cast<uint32_t>(PAUSE_ACK);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 9));
         return value;
     }
-    uint32_t get_PAUSE_ACK() const volatile
+    uint32_t get_pause_ack() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(PAUSE_ACK);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 9));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_PAUSE_ACK(uint32_t value)
+    CONSTEXPR dma_status0_r &set_pause_ack(uint32_t value)
     {
-        PAUSE_ACK = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 9) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 9);
         return *this;
     }
-    CONSTEXPR uint32_t get_IB0_AI_VALID_C0() const
+    CONSTEXPR uint32_t get_ib0_ai_valid_c0() const
     {
-        uint32_t value = static_cast<uint32_t>(IB0_AI_VALID_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10));
         return value;
     }
-    uint32_t get_IB0_AI_VALID_C0() const volatile
+    uint32_t get_ib0_ai_valid_c0() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(IB0_AI_VALID_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_IB0_AI_VALID_C0(uint32_t value)
+    CONSTEXPR dma_status0_r &set_ib0_ai_valid_c0(uint32_t value)
     {
-        IB0_AI_VALID_C0 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 10) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 10);
         return *this;
     }
-    CONSTEXPR uint32_t get_IB0_AI_READY_C0() const
+    CONSTEXPR uint32_t get_ib0_ai_ready_c0() const
     {
-        uint32_t value = static_cast<uint32_t>(IB0_AI_READY_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 11));
         return value;
     }
-    uint32_t get_IB0_AI_READY_C0() const volatile
+    uint32_t get_ib0_ai_ready_c0() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(IB0_AI_READY_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 11));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_IB0_AI_READY_C0(uint32_t value)
+    CONSTEXPR dma_status0_r &set_ib0_ai_ready_c0(uint32_t value)
     {
-        IB0_AI_READY_C0 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 11) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 11);
         return *this;
     }
-    CONSTEXPR uint32_t get_IB1_AI_VALID_C0() const
+    CONSTEXPR uint32_t get_ib1_ai_valid_c0() const
     {
-        uint32_t value = static_cast<uint32_t>(IB1_AI_VALID_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 12));
         return value;
     }
-    uint32_t get_IB1_AI_VALID_C0() const volatile
+    uint32_t get_ib1_ai_valid_c0() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(IB1_AI_VALID_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 12));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_IB1_AI_VALID_C0(uint32_t value)
+    CONSTEXPR dma_status0_r &set_ib1_ai_valid_c0(uint32_t value)
     {
-        IB1_AI_VALID_C0 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 12) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 12);
         return *this;
     }
-    CONSTEXPR uint32_t get_IB1_AI_READY_C0() const
+    CONSTEXPR uint32_t get_ib1_ai_ready_c0() const
     {
-        uint32_t value = static_cast<uint32_t>(IB1_AI_READY_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 13));
         return value;
     }
-    uint32_t get_IB1_AI_READY_C0() const volatile
+    uint32_t get_ib1_ai_ready_c0() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(IB1_AI_READY_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 13));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_IB1_AI_READY_C0(uint32_t value)
+    CONSTEXPR dma_status0_r &set_ib1_ai_ready_c0(uint32_t value)
     {
-        IB1_AI_READY_C0 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 13) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 13);
         return *this;
     }
-    CONSTEXPR uint32_t get_IB0_AO_VALID_C0() const
+    CONSTEXPR uint32_t get_ib0_ao_valid_c0() const
     {
-        uint32_t value = static_cast<uint32_t>(IB0_AO_VALID_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 14));
         return value;
     }
-    uint32_t get_IB0_AO_VALID_C0() const volatile
+    uint32_t get_ib0_ao_valid_c0() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(IB0_AO_VALID_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 14));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_IB0_AO_VALID_C0(uint32_t value)
+    CONSTEXPR dma_status0_r &set_ib0_ao_valid_c0(uint32_t value)
     {
-        IB0_AO_VALID_C0 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 14) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 14);
         return *this;
     }
-    CONSTEXPR uint32_t get_IB0_AO_READY_C0() const
+    CONSTEXPR uint32_t get_ib0_ao_ready_c0() const
     {
-        uint32_t value = static_cast<uint32_t>(IB0_AO_READY_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 15));
         return value;
     }
-    uint32_t get_IB0_AO_READY_C0() const volatile
+    uint32_t get_ib0_ao_ready_c0() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(IB0_AO_READY_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 15));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_IB0_AO_READY_C0(uint32_t value)
+    CONSTEXPR dma_status0_r &set_ib0_ao_ready_c0(uint32_t value)
     {
-        IB0_AO_READY_C0 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 15) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 15);
         return *this;
     }
-    CONSTEXPR uint32_t get_IB1_AO_VALID_C0() const
+    CONSTEXPR uint32_t get_ib1_ao_valid_c0() const
     {
-        uint32_t value = static_cast<uint32_t>(IB1_AO_VALID_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 16));
         return value;
     }
-    uint32_t get_IB1_AO_VALID_C0() const volatile
+    uint32_t get_ib1_ao_valid_c0() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(IB1_AO_VALID_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 16));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_IB1_AO_VALID_C0(uint32_t value)
+    CONSTEXPR dma_status0_r &set_ib1_ao_valid_c0(uint32_t value)
     {
-        IB1_AO_VALID_C0 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 16) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 16);
         return *this;
     }
-    CONSTEXPR uint32_t get_IB1_AO_READY_C0() const
+    CONSTEXPR uint32_t get_ib1_ao_ready_c0() const
     {
-        uint32_t value = static_cast<uint32_t>(IB1_AO_READY_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 17));
         return value;
     }
-    uint32_t get_IB1_AO_READY_C0() const volatile
+    uint32_t get_ib1_ao_ready_c0() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(IB1_AO_READY_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 17));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_IB1_AO_READY_C0(uint32_t value)
+    CONSTEXPR dma_status0_r &set_ib1_ao_ready_c0(uint32_t value)
     {
-        IB1_AO_READY_C0 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 17) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 17);
         return *this;
     }
-    CONSTEXPR uint32_t get_OB0_VALID_C0() const
+    CONSTEXPR uint32_t get_ob0_valid_c0() const
     {
-        uint32_t value = static_cast<uint32_t>(OB0_VALID_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 18));
         return value;
     }
-    uint32_t get_OB0_VALID_C0() const volatile
+    uint32_t get_ob0_valid_c0() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(OB0_VALID_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 18));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_OB0_VALID_C0(uint32_t value)
+    CONSTEXPR dma_status0_r &set_ob0_valid_c0(uint32_t value)
     {
-        OB0_VALID_C0 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 18) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 18);
         return *this;
     }
-    CONSTEXPR uint32_t get_OB0_READY_C0() const
+    CONSTEXPR uint32_t get_ob0_ready_c0() const
     {
-        uint32_t value = static_cast<uint32_t>(OB0_READY_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 19));
         return value;
     }
-    uint32_t get_OB0_READY_C0() const volatile
+    uint32_t get_ob0_ready_c0() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(OB0_READY_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 19));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_OB0_READY_C0(uint32_t value)
+    CONSTEXPR dma_status0_r &set_ob0_ready_c0(uint32_t value)
     {
-        OB0_READY_C0 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 19) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 19);
         return *this;
     }
-    CONSTEXPR uint32_t get_OB1_VALID_C0() const
+    CONSTEXPR uint32_t get_ob1_valid_c0() const
     {
-        uint32_t value = static_cast<uint32_t>(OB1_VALID_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 20));
         return value;
     }
-    uint32_t get_OB1_VALID_C0() const volatile
+    uint32_t get_ob1_valid_c0() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(OB1_VALID_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 20));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_OB1_VALID_C0(uint32_t value)
+    CONSTEXPR dma_status0_r &set_ob1_valid_c0(uint32_t value)
     {
-        OB1_VALID_C0 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 20) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 20);
         return *this;
     }
-    CONSTEXPR uint32_t get_OB1_READY_C0() const
+    CONSTEXPR uint32_t get_ob1_ready_c0() const
     {
-        uint32_t value = static_cast<uint32_t>(OB1_READY_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 21));
         return value;
     }
-    uint32_t get_OB1_READY_C0() const volatile
+    uint32_t get_ob1_ready_c0() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(OB1_READY_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 21));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_OB1_READY_C0(uint32_t value)
+    CONSTEXPR dma_status0_r &set_ob1_ready_c0(uint32_t value)
     {
-        OB1_READY_C0 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 21) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 21);
         return *this;
     }
-    CONSTEXPR uint32_t get_CMD_VALID() const
+    CONSTEXPR uint32_t get_cmd_valid() const
     {
-        uint32_t value = static_cast<uint32_t>(CMD_VALID);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 22));
         return value;
     }
-    uint32_t get_CMD_VALID() const volatile
+    uint32_t get_cmd_valid() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(CMD_VALID);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 22));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_CMD_VALID(uint32_t value)
+    CONSTEXPR dma_status0_r &set_cmd_valid(uint32_t value)
     {
-        CMD_VALID = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 22) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 22);
         return *this;
     }
-    CONSTEXPR uint32_t get_CMD_READY() const
+    CONSTEXPR uint32_t get_cmd_ready() const
     {
-        uint32_t value = static_cast<uint32_t>(CMD_READY);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 23));
         return value;
     }
-    uint32_t get_CMD_READY() const volatile
+    uint32_t get_cmd_ready() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(CMD_READY);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 23));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_CMD_READY(uint32_t value)
+    CONSTEXPR dma_status0_r &set_cmd_ready(uint32_t value)
     {
-        CMD_READY = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 23) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 23);
         return *this;
     }
-    CONSTEXPR uint32_t get_WD_BITSTREAM_VALID_C0() const
+    CONSTEXPR uint32_t get_wd_bitstream_valid_c0() const
     {
-        uint32_t value = static_cast<uint32_t>(WD_BITSTREAM_VALID_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 24));
         return value;
     }
-    uint32_t get_WD_BITSTREAM_VALID_C0() const volatile
+    uint32_t get_wd_bitstream_valid_c0() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(WD_BITSTREAM_VALID_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 24));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_WD_BITSTREAM_VALID_C0(uint32_t value)
+    CONSTEXPR dma_status0_r &set_wd_bitstream_valid_c0(uint32_t value)
     {
-        WD_BITSTREAM_VALID_C0 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 24) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 24);
         return *this;
     }
-    CONSTEXPR uint32_t get_WD_BITSTREAM_READY_C0() const
+    CONSTEXPR uint32_t get_wd_bitstream_ready_c0() const
     {
-        uint32_t value = static_cast<uint32_t>(WD_BITSTREAM_READY_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 25));
         return value;
     }
-    uint32_t get_WD_BITSTREAM_READY_C0() const volatile
+    uint32_t get_wd_bitstream_ready_c0() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(WD_BITSTREAM_READY_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 25));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_WD_BITSTREAM_READY_C0(uint32_t value)
+    CONSTEXPR dma_status0_r &set_wd_bitstream_ready_c0(uint32_t value)
     {
-        WD_BITSTREAM_READY_C0 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 25) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 25);
         return *this;
     }
-    CONSTEXPR uint32_t get_BS_BITSTREAM_VALID_C0() const
+    CONSTEXPR uint32_t get_bs_bitstream_valid_c0() const
     {
-        uint32_t value = static_cast<uint32_t>(BS_BITSTREAM_VALID_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 26));
         return value;
     }
-    uint32_t get_BS_BITSTREAM_VALID_C0() const volatile
+    uint32_t get_bs_bitstream_valid_c0() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(BS_BITSTREAM_VALID_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 26));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_BS_BITSTREAM_VALID_C0(uint32_t value)
+    CONSTEXPR dma_status0_r &set_bs_bitstream_valid_c0(uint32_t value)
     {
-        BS_BITSTREAM_VALID_C0 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 26) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 26);
         return *this;
     }
-    CONSTEXPR uint32_t get_BS_BITSTREAM_READY_C0() const
+    CONSTEXPR uint32_t get_bs_bitstream_ready_c0() const
     {
-        uint32_t value = static_cast<uint32_t>(BS_BITSTREAM_READY_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 27));
         return value;
     }
-    uint32_t get_BS_BITSTREAM_READY_C0() const volatile
+    uint32_t get_bs_bitstream_ready_c0() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(BS_BITSTREAM_READY_C0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 27));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_BS_BITSTREAM_READY_C0(uint32_t value)
+    CONSTEXPR dma_status0_r &set_bs_bitstream_ready_c0(uint32_t value)
     {
-        BS_BITSTREAM_READY_C0 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 27) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 27);
         return *this;
     }
-    CONSTEXPR uint32_t get_AXI0_AR_STALLED() const
+    CONSTEXPR uint32_t get_axi0_ar_stalled() const
     {
-        uint32_t value = static_cast<uint32_t>(AXI0_AR_STALLED);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 28));
         return value;
     }
-    uint32_t get_AXI0_AR_STALLED() const volatile
+    uint32_t get_axi0_ar_stalled() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(AXI0_AR_STALLED);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 28));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_AXI0_AR_STALLED(uint32_t value)
+    CONSTEXPR dma_status0_r &set_axi0_ar_stalled(uint32_t value)
     {
-        AXI0_AR_STALLED = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 28) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 28);
         return *this;
     }
-    CONSTEXPR uint32_t get_AXI0_RD_LIMIT_STALL() const
+    CONSTEXPR uint32_t get_axi0_rd_limit_stall() const
     {
-        uint32_t value = static_cast<uint32_t>(AXI0_RD_LIMIT_STALL);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 29));
         return value;
     }
-    uint32_t get_AXI0_RD_LIMIT_STALL() const volatile
+    uint32_t get_axi0_rd_limit_stall() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(AXI0_RD_LIMIT_STALL);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 29));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_AXI0_RD_LIMIT_STALL(uint32_t value)
+    CONSTEXPR dma_status0_r &set_axi0_rd_limit_stall(uint32_t value)
     {
-        AXI0_RD_LIMIT_STALL = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 29) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 29);
         return *this;
     }
-    CONSTEXPR uint32_t get_AXI0_AW_STALLED() const
+    CONSTEXPR uint32_t get_axi0_aw_stalled() const
     {
-        uint32_t value = static_cast<uint32_t>(AXI0_AW_STALLED);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 30));
         return value;
     }
-    uint32_t get_AXI0_AW_STALLED() const volatile
+    uint32_t get_axi0_aw_stalled() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(AXI0_AW_STALLED);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 30));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_AXI0_AW_STALLED(uint32_t value)
+    CONSTEXPR dma_status0_r &set_axi0_aw_stalled(uint32_t value)
     {
-        AXI0_AW_STALLED = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 30) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 30);
         return *this;
     }
-    CONSTEXPR uint32_t get_AXI0_W_STALLED() const
+    CONSTEXPR uint32_t get_axi0_w_stalled() const
     {
-        uint32_t value = static_cast<uint32_t>(AXI0_W_STALLED);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31));
         return value;
     }
-    uint32_t get_AXI0_W_STALLED() const volatile
+    uint32_t get_axi0_w_stalled() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(AXI0_W_STALLED);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31));
         return value;
     }
-    CONSTEXPR dma_status0_r &set_AXI0_W_STALLED(uint32_t value)
+    CONSTEXPR dma_status0_r &set_axi0_w_stalled(uint32_t value)
     {
-        AXI0_W_STALLED = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 31) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 31);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
-// dma_status1_r - DMA_STATUS1 of core DEBUGCORE
+// dma_status1_r - DMA_STATUS1
 struct dma_status1_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
         {
-            uint32_t AXI0_WR_LIMIT_STALL : 1; // Write stalled due to one AXI0 limit counter being reached
-            uint32_t AXI1_AR_STALLED : 1; // Read transfer request stalled on arready low AXI1 (due to memory system)
-            uint32_t AXI1_RD_LIMIT_STALL : 1; // Read stalled due to one AXI1 limit counter being reached
-            uint32_t AXI1_WR_STALLED : 1; // Write transfer request stalled on awready low AXI1 (due to memory system)
-            uint32_t AXI1_W_STALLED : 1;  // Write transfer stalled on wready low AXI1 (due to memory system)
-            uint32_t AXI1_WR_LIMIT_STALL : 1; // Write stalled due to one AXI1 limit counter being reached
-            uint32_t WGT_IDLE_C1 : 1;     // When this bit is high means that the WGT block is not busy in generating
+            uint32_t axi0_wr_limit_stall : 1; // Write stalled due to one AXI0 limit counter being reached
+            uint32_t axi1_ar_stalled : 1; // Read transfer request stalled on arready low AXI1 (due to memory system)
+            uint32_t axi1_rd_limit_stall : 1; // Read stalled due to one AXI1 limit counter being reached
+            uint32_t axi1_wr_stalled : 1; // Write transfer request stalled on awready low AXI1 (due to memory system)
+            uint32_t axi1_w_stalled : 1;  // Write transfer stalled on wready low AXI1 (due to memory system)
+            uint32_t axi1_wr_limit_stall : 1; // Write stalled due to one AXI1 limit counter being reached
+            uint32_t wgt_idle_c1 : 1;     // When this bit is high means that the WGT block is not busy in generating
                                           // addresses for a WGT job
-            uint32_t BAS_IDLE_C1 : 1;     // When this bit is high means that the BAS block is not busy in generating
-                                          // addresses for a BAS job.
-            uint32_t IB0_AI_VALID_C1 : 1; // Data for AI to be read in IFM input buffer 0 - Core 1
-            uint32_t IB0_AI_READY_C1 : 1; // Data consumed from AI in IFM input buffer 0 - Core 1
-            uint32_t IB1_AI_VALID_C1 : 1; // Data for AI to be read in IFM input buffer 1 - Core 1
-            uint32_t IB1_AI_READY_C1 : 1; // Data consumed from AI in IFM input buffer 1 - Core 1
-            uint32_t IB0_AO_VALID_C1 : 1; // Data for AO to be read in IFM input buffer 0 - Core 1
-            uint32_t IB0_AO_READY_C1 : 1; // Data consumed from AO in IFM input buffer 0 - Core 1
-            uint32_t IB1_AO_VALID_C1 : 1; // Data for AO to be read in IFM input buffer 0 - Core 1
-            uint32_t IB1_AO_READY_C1 : 1; // Data consumed from AO in IFM input buffer 1 - Core 1
-            uint32_t OB0_VALID_C1 : 1;    // Data for DMA ready to be consumed in OFM output buffer 0 - Core 1
-            uint32_t OB0_READY_C1 : 1;    // Data consumed from DMA in OFM output buffer 0 - Core 1
-            uint32_t OB1_VALID_C1 : 1;    // Data for DMA ready to be consumed in OFM output buffer 1 - Core 1
-            uint32_t OB1_READY_C1 : 1;    // Data consumed from DMA in OFM output buffer 1 - Core 1
-            uint32_t WD_BITSTREAM_VALID_C1 : 1; // New weight word for WD to be consumed - Core 1
-            uint32_t WD_BITSTREAM_READY_C1 : 1; // Weight word consumed by WD - Core 1
-            uint32_t BS_BITSTREAM_VALID_C1 : 1; // New BaS word for AO to be consumed - Core 1
-            uint32_t BS_BITSTREAM_READY_C1 : 1; // BaS word consumed by AO - Core 1
+            uint32_t bas_idle_c1 : 1;     // When this bit is high means that the BAS block is not busy in generating
+                                          // addresses for a BAS job
+            uint32_t ib0_ai_valid_c1 : 1; // Data for AI to be read in IFM input buffer 0 - Core 1
+            uint32_t ib0_ai_ready_c1 : 1; // Data consumed from AI in IFM input buffer 0 - Core 1
+            uint32_t ib1_ai_valid_c1 : 1; // Data for AI to be read in IFM input buffer 1 - Core 1
+            uint32_t ib1_ai_ready_c1 : 1; // Data consumed from AI in IFM input buffer 1 - Core 1
+            uint32_t ib0_ao_valid_c1 : 1; // Data for AO to be read in IFM input buffer 0 - Core 1
+            uint32_t ib0_ao_ready_c1 : 1; // Data consumed from AO in IFM input buffer 0 - Core 1
+            uint32_t ib1_ao_valid_c1 : 1; // Data for AO to be read in IFM input buffer 0 - Core 1
+            uint32_t ib1_ao_ready_c1 : 1; // Data consumed from AO in IFM input buffer 1 - Core 1
+            uint32_t ob0_valid_c1 : 1;    // Data for DMA ready to be consumed in OFM output buffer 0 - Core 1
+            uint32_t ob0_ready_c1 : 1;    // Data consumed from DMA in OFM output buffer 0 - Core 1
+            uint32_t ob1_valid_c1 : 1;    // Data for DMA ready to be consumed in OFM output buffer 1 - Core 1
+            uint32_t ob1_ready_c1 : 1;    // Data consumed from DMA in OFM output buffer 1 - Core 1
+            uint32_t wd_bitstream_valid_c1 : 1; // New weight word for WD to be consumed - Core 1
+            uint32_t wd_bitstream_ready_c1 : 1; // Weight word consumed by WD - Core 1
+            uint32_t bs_bitstream_valid_c1 : 1; // New BaS word for AO to be consumed - Core 1
+            uint32_t bs_bitstream_ready_c1 : 1; // BaS word consumed by AO - Core 1
             uint32_t reserved0 : 8;
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR dma_status1_r() :
-        AXI0_WR_LIMIT_STALL(static_cast<uint32_t>(0)), AXI1_AR_STALLED(static_cast<uint32_t>(0)),
-        AXI1_RD_LIMIT_STALL(static_cast<uint32_t>(0)), AXI1_WR_STALLED(static_cast<uint32_t>(0)),
-        AXI1_W_STALLED(static_cast<uint32_t>(0)), AXI1_WR_LIMIT_STALL(static_cast<uint32_t>(0)),
-        WGT_IDLE_C1(static_cast<uint32_t>(0)), BAS_IDLE_C1(static_cast<uint32_t>(0)),
-        IB0_AI_VALID_C1(static_cast<uint32_t>(0)), IB0_AI_READY_C1(static_cast<uint32_t>(0)),
-        IB1_AI_VALID_C1(static_cast<uint32_t>(0)), IB1_AI_READY_C1(static_cast<uint32_t>(0)),
-        IB0_AO_VALID_C1(static_cast<uint32_t>(0)), IB0_AO_READY_C1(static_cast<uint32_t>(0)),
-        IB1_AO_VALID_C1(static_cast<uint32_t>(0)), IB1_AO_READY_C1(static_cast<uint32_t>(0)),
-        OB0_VALID_C1(static_cast<uint32_t>(0)), OB0_READY_C1(static_cast<uint32_t>(0)),
-        OB1_VALID_C1(static_cast<uint32_t>(0)), OB1_READY_C1(static_cast<uint32_t>(0)),
-        WD_BITSTREAM_VALID_C1(static_cast<uint32_t>(0)), WD_BITSTREAM_READY_C1(static_cast<uint32_t>(0)),
-        BS_BITSTREAM_VALID_C1(static_cast<uint32_t>(0)), BS_BITSTREAM_READY_C1(static_cast<uint32_t>(0)),
-        reserved0(static_cast<uint32_t>(0))
-    {
-    }
-    CONSTEXPR dma_status1_r(uint32_t init) : word(init) {}
+    CONSTEXPR dma_status1_r() : word0(0) {}
+    CONSTEXPR dma_status1_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     dma_status1_r copy() volatile
     {
         return *this;
     }
-    CONSTEXPR uint32_t get_AXI0_WR_LIMIT_STALL() const
+    CONSTEXPR uint32_t get_axi0_wr_limit_stall() const
     {
-        uint32_t value = static_cast<uint32_t>(AXI0_WR_LIMIT_STALL);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
-    uint32_t get_AXI0_WR_LIMIT_STALL() const volatile
+    uint32_t get_axi0_wr_limit_stall() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(AXI0_WR_LIMIT_STALL);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
-    CONSTEXPR dma_status1_r &set_AXI0_WR_LIMIT_STALL(uint32_t value)
+    CONSTEXPR dma_status1_r &set_axi0_wr_limit_stall(uint32_t value)
     {
-        AXI0_WR_LIMIT_STALL = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
         return *this;
     }
-    CONSTEXPR uint32_t get_AXI1_AR_STALLED() const
+    CONSTEXPR uint32_t get_axi1_ar_stalled() const
     {
-        uint32_t value = static_cast<uint32_t>(AXI1_AR_STALLED);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
-    uint32_t get_AXI1_AR_STALLED() const volatile
+    uint32_t get_axi1_ar_stalled() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(AXI1_AR_STALLED);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
-    CONSTEXPR dma_status1_r &set_AXI1_AR_STALLED(uint32_t value)
+    CONSTEXPR dma_status1_r &set_axi1_ar_stalled(uint32_t value)
     {
-        AXI1_AR_STALLED = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
         return *this;
     }
-    CONSTEXPR uint32_t get_AXI1_RD_LIMIT_STALL() const
+    CONSTEXPR uint32_t get_axi1_rd_limit_stall() const
     {
-        uint32_t value = static_cast<uint32_t>(AXI1_RD_LIMIT_STALL);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
-    uint32_t get_AXI1_RD_LIMIT_STALL() const volatile
+    uint32_t get_axi1_rd_limit_stall() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(AXI1_RD_LIMIT_STALL);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
-    CONSTEXPR dma_status1_r &set_AXI1_RD_LIMIT_STALL(uint32_t value)
+    CONSTEXPR dma_status1_r &set_axi1_rd_limit_stall(uint32_t value)
     {
-        AXI1_RD_LIMIT_STALL = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
         return *this;
     }
-    CONSTEXPR uint32_t get_AXI1_WR_STALLED() const
+    CONSTEXPR uint32_t get_axi1_wr_stalled() const
     {
-        uint32_t value = static_cast<uint32_t>(AXI1_WR_STALLED);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
         return value;
     }
-    uint32_t get_AXI1_WR_STALLED() const volatile
+    uint32_t get_axi1_wr_stalled() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(AXI1_WR_STALLED);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
         return value;
     }
-    CONSTEXPR dma_status1_r &set_AXI1_WR_STALLED(uint32_t value)
+    CONSTEXPR dma_status1_r &set_axi1_wr_stalled(uint32_t value)
     {
-        AXI1_WR_STALLED = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3);
         return *this;
     }
-    CONSTEXPR uint32_t get_AXI1_W_STALLED() const
+    CONSTEXPR uint32_t get_axi1_w_stalled() const
     {
-        uint32_t value = static_cast<uint32_t>(AXI1_W_STALLED);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4));
         return value;
     }
-    uint32_t get_AXI1_W_STALLED() const volatile
+    uint32_t get_axi1_w_stalled() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(AXI1_W_STALLED);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4));
         return value;
     }
-    CONSTEXPR dma_status1_r &set_AXI1_W_STALLED(uint32_t value)
+    CONSTEXPR dma_status1_r &set_axi1_w_stalled(uint32_t value)
     {
-        AXI1_W_STALLED = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 4) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 4);
         return *this;
     }
-    CONSTEXPR uint32_t get_AXI1_WR_LIMIT_STALL() const
+    CONSTEXPR uint32_t get_axi1_wr_limit_stall() const
     {
-        uint32_t value = static_cast<uint32_t>(AXI1_WR_LIMIT_STALL);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5));
         return value;
     }
-    uint32_t get_AXI1_WR_LIMIT_STALL() const volatile
+    uint32_t get_axi1_wr_limit_stall() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(AXI1_WR_LIMIT_STALL);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5));
         return value;
     }
-    CONSTEXPR dma_status1_r &set_AXI1_WR_LIMIT_STALL(uint32_t value)
+    CONSTEXPR dma_status1_r &set_axi1_wr_limit_stall(uint32_t value)
     {
-        AXI1_WR_LIMIT_STALL = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 5) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 5);
         return *this;
     }
-    CONSTEXPR uint32_t get_WGT_IDLE_C1() const
+    CONSTEXPR uint32_t get_wgt_idle_c1() const
     {
-        uint32_t value = static_cast<uint32_t>(WGT_IDLE_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6));
         return value;
     }
-    uint32_t get_WGT_IDLE_C1() const volatile
+    uint32_t get_wgt_idle_c1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(WGT_IDLE_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6));
         return value;
     }
-    CONSTEXPR dma_status1_r &set_WGT_IDLE_C1(uint32_t value)
+    CONSTEXPR dma_status1_r &set_wgt_idle_c1(uint32_t value)
     {
-        WGT_IDLE_C1 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 6) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 6);
         return *this;
     }
-    CONSTEXPR uint32_t get_BAS_IDLE_C1() const
+    CONSTEXPR uint32_t get_bas_idle_c1() const
     {
-        uint32_t value = static_cast<uint32_t>(BAS_IDLE_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7));
         return value;
     }
-    uint32_t get_BAS_IDLE_C1() const volatile
+    uint32_t get_bas_idle_c1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(BAS_IDLE_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7));
         return value;
     }
-    CONSTEXPR dma_status1_r &set_BAS_IDLE_C1(uint32_t value)
+    CONSTEXPR dma_status1_r &set_bas_idle_c1(uint32_t value)
     {
-        BAS_IDLE_C1 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 7) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 7);
         return *this;
     }
-    CONSTEXPR uint32_t get_IB0_AI_VALID_C1() const
+    CONSTEXPR uint32_t get_ib0_ai_valid_c1() const
     {
-        uint32_t value = static_cast<uint32_t>(IB0_AI_VALID_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 8));
         return value;
     }
-    uint32_t get_IB0_AI_VALID_C1() const volatile
+    uint32_t get_ib0_ai_valid_c1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(IB0_AI_VALID_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 8));
         return value;
     }
-    CONSTEXPR dma_status1_r &set_IB0_AI_VALID_C1(uint32_t value)
+    CONSTEXPR dma_status1_r &set_ib0_ai_valid_c1(uint32_t value)
     {
-        IB0_AI_VALID_C1 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 8) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 8);
         return *this;
     }
-    CONSTEXPR uint32_t get_IB0_AI_READY_C1() const
+    CONSTEXPR uint32_t get_ib0_ai_ready_c1() const
     {
-        uint32_t value = static_cast<uint32_t>(IB0_AI_READY_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 9));
         return value;
     }
-    uint32_t get_IB0_AI_READY_C1() const volatile
+    uint32_t get_ib0_ai_ready_c1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(IB0_AI_READY_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 9));
         return value;
     }
-    CONSTEXPR dma_status1_r &set_IB0_AI_READY_C1(uint32_t value)
+    CONSTEXPR dma_status1_r &set_ib0_ai_ready_c1(uint32_t value)
     {
-        IB0_AI_READY_C1 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 9) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 9);
         return *this;
     }
-    CONSTEXPR uint32_t get_IB1_AI_VALID_C1() const
+    CONSTEXPR uint32_t get_ib1_ai_valid_c1() const
     {
-        uint32_t value = static_cast<uint32_t>(IB1_AI_VALID_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10));
         return value;
     }
-    uint32_t get_IB1_AI_VALID_C1() const volatile
+    uint32_t get_ib1_ai_valid_c1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(IB1_AI_VALID_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10));
         return value;
     }
-    CONSTEXPR dma_status1_r &set_IB1_AI_VALID_C1(uint32_t value)
+    CONSTEXPR dma_status1_r &set_ib1_ai_valid_c1(uint32_t value)
     {
-        IB1_AI_VALID_C1 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 10) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 10);
         return *this;
     }
-    CONSTEXPR uint32_t get_IB1_AI_READY_C1() const
+    CONSTEXPR uint32_t get_ib1_ai_ready_c1() const
     {
-        uint32_t value = static_cast<uint32_t>(IB1_AI_READY_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 11));
         return value;
     }
-    uint32_t get_IB1_AI_READY_C1() const volatile
+    uint32_t get_ib1_ai_ready_c1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(IB1_AI_READY_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 11));
         return value;
     }
-    CONSTEXPR dma_status1_r &set_IB1_AI_READY_C1(uint32_t value)
+    CONSTEXPR dma_status1_r &set_ib1_ai_ready_c1(uint32_t value)
     {
-        IB1_AI_READY_C1 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 11) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 11);
         return *this;
     }
-    CONSTEXPR uint32_t get_IB0_AO_VALID_C1() const
+    CONSTEXPR uint32_t get_ib0_ao_valid_c1() const
     {
-        uint32_t value = static_cast<uint32_t>(IB0_AO_VALID_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 12));
         return value;
     }
-    uint32_t get_IB0_AO_VALID_C1() const volatile
+    uint32_t get_ib0_ao_valid_c1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(IB0_AO_VALID_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 12));
         return value;
     }
-    CONSTEXPR dma_status1_r &set_IB0_AO_VALID_C1(uint32_t value)
+    CONSTEXPR dma_status1_r &set_ib0_ao_valid_c1(uint32_t value)
     {
-        IB0_AO_VALID_C1 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 12) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 12);
         return *this;
     }
-    CONSTEXPR uint32_t get_IB0_AO_READY_C1() const
+    CONSTEXPR uint32_t get_ib0_ao_ready_c1() const
     {
-        uint32_t value = static_cast<uint32_t>(IB0_AO_READY_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 13));
         return value;
     }
-    uint32_t get_IB0_AO_READY_C1() const volatile
+    uint32_t get_ib0_ao_ready_c1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(IB0_AO_READY_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 13));
         return value;
     }
-    CONSTEXPR dma_status1_r &set_IB0_AO_READY_C1(uint32_t value)
+    CONSTEXPR dma_status1_r &set_ib0_ao_ready_c1(uint32_t value)
     {
-        IB0_AO_READY_C1 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 13) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 13);
         return *this;
     }
-    CONSTEXPR uint32_t get_IB1_AO_VALID_C1() const
+    CONSTEXPR uint32_t get_ib1_ao_valid_c1() const
     {
-        uint32_t value = static_cast<uint32_t>(IB1_AO_VALID_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 14));
         return value;
     }
-    uint32_t get_IB1_AO_VALID_C1() const volatile
+    uint32_t get_ib1_ao_valid_c1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(IB1_AO_VALID_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 14));
         return value;
     }
-    CONSTEXPR dma_status1_r &set_IB1_AO_VALID_C1(uint32_t value)
+    CONSTEXPR dma_status1_r &set_ib1_ao_valid_c1(uint32_t value)
     {
-        IB1_AO_VALID_C1 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 14) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 14);
         return *this;
     }
-    CONSTEXPR uint32_t get_IB1_AO_READY_C1() const
+    CONSTEXPR uint32_t get_ib1_ao_ready_c1() const
     {
-        uint32_t value = static_cast<uint32_t>(IB1_AO_READY_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 15));
         return value;
     }
-    uint32_t get_IB1_AO_READY_C1() const volatile
+    uint32_t get_ib1_ao_ready_c1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(IB1_AO_READY_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 15));
         return value;
     }
-    CONSTEXPR dma_status1_r &set_IB1_AO_READY_C1(uint32_t value)
+    CONSTEXPR dma_status1_r &set_ib1_ao_ready_c1(uint32_t value)
     {
-        IB1_AO_READY_C1 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 15) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 15);
         return *this;
     }
-    CONSTEXPR uint32_t get_OB0_VALID_C1() const
+    CONSTEXPR uint32_t get_ob0_valid_c1() const
     {
-        uint32_t value = static_cast<uint32_t>(OB0_VALID_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 16));
         return value;
     }
-    uint32_t get_OB0_VALID_C1() const volatile
+    uint32_t get_ob0_valid_c1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(OB0_VALID_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 16));
         return value;
     }
-    CONSTEXPR dma_status1_r &set_OB0_VALID_C1(uint32_t value)
+    CONSTEXPR dma_status1_r &set_ob0_valid_c1(uint32_t value)
     {
-        OB0_VALID_C1 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 16) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 16);
         return *this;
     }
-    CONSTEXPR uint32_t get_OB0_READY_C1() const
+    CONSTEXPR uint32_t get_ob0_ready_c1() const
     {
-        uint32_t value = static_cast<uint32_t>(OB0_READY_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 17));
         return value;
     }
-    uint32_t get_OB0_READY_C1() const volatile
+    uint32_t get_ob0_ready_c1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(OB0_READY_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 17));
         return value;
     }
-    CONSTEXPR dma_status1_r &set_OB0_READY_C1(uint32_t value)
+    CONSTEXPR dma_status1_r &set_ob0_ready_c1(uint32_t value)
     {
-        OB0_READY_C1 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 17) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 17);
         return *this;
     }
-    CONSTEXPR uint32_t get_OB1_VALID_C1() const
+    CONSTEXPR uint32_t get_ob1_valid_c1() const
     {
-        uint32_t value = static_cast<uint32_t>(OB1_VALID_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 18));
         return value;
     }
-    uint32_t get_OB1_VALID_C1() const volatile
+    uint32_t get_ob1_valid_c1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(OB1_VALID_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 18));
         return value;
     }
-    CONSTEXPR dma_status1_r &set_OB1_VALID_C1(uint32_t value)
+    CONSTEXPR dma_status1_r &set_ob1_valid_c1(uint32_t value)
     {
-        OB1_VALID_C1 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 18) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 18);
         return *this;
     }
-    CONSTEXPR uint32_t get_OB1_READY_C1() const
+    CONSTEXPR uint32_t get_ob1_ready_c1() const
     {
-        uint32_t value = static_cast<uint32_t>(OB1_READY_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 19));
         return value;
     }
-    uint32_t get_OB1_READY_C1() const volatile
+    uint32_t get_ob1_ready_c1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(OB1_READY_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 19));
         return value;
     }
-    CONSTEXPR dma_status1_r &set_OB1_READY_C1(uint32_t value)
+    CONSTEXPR dma_status1_r &set_ob1_ready_c1(uint32_t value)
     {
-        OB1_READY_C1 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 19) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 19);
         return *this;
     }
-    CONSTEXPR uint32_t get_WD_BITSTREAM_VALID_C1() const
+    CONSTEXPR uint32_t get_wd_bitstream_valid_c1() const
     {
-        uint32_t value = static_cast<uint32_t>(WD_BITSTREAM_VALID_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 20));
         return value;
     }
-    uint32_t get_WD_BITSTREAM_VALID_C1() const volatile
+    uint32_t get_wd_bitstream_valid_c1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(WD_BITSTREAM_VALID_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 20));
         return value;
     }
-    CONSTEXPR dma_status1_r &set_WD_BITSTREAM_VALID_C1(uint32_t value)
+    CONSTEXPR dma_status1_r &set_wd_bitstream_valid_c1(uint32_t value)
     {
-        WD_BITSTREAM_VALID_C1 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 20) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 20);
         return *this;
     }
-    CONSTEXPR uint32_t get_WD_BITSTREAM_READY_C1() const
+    CONSTEXPR uint32_t get_wd_bitstream_ready_c1() const
     {
-        uint32_t value = static_cast<uint32_t>(WD_BITSTREAM_READY_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 21));
         return value;
     }
-    uint32_t get_WD_BITSTREAM_READY_C1() const volatile
+    uint32_t get_wd_bitstream_ready_c1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(WD_BITSTREAM_READY_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 21));
         return value;
     }
-    CONSTEXPR dma_status1_r &set_WD_BITSTREAM_READY_C1(uint32_t value)
+    CONSTEXPR dma_status1_r &set_wd_bitstream_ready_c1(uint32_t value)
     {
-        WD_BITSTREAM_READY_C1 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 21) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 21);
         return *this;
     }
-    CONSTEXPR uint32_t get_BS_BITSTREAM_VALID_C1() const
+    CONSTEXPR uint32_t get_bs_bitstream_valid_c1() const
     {
-        uint32_t value = static_cast<uint32_t>(BS_BITSTREAM_VALID_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 22));
         return value;
     }
-    uint32_t get_BS_BITSTREAM_VALID_C1() const volatile
+    uint32_t get_bs_bitstream_valid_c1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(BS_BITSTREAM_VALID_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 22));
         return value;
     }
-    CONSTEXPR dma_status1_r &set_BS_BITSTREAM_VALID_C1(uint32_t value)
+    CONSTEXPR dma_status1_r &set_bs_bitstream_valid_c1(uint32_t value)
     {
-        BS_BITSTREAM_VALID_C1 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 22) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 22);
         return *this;
     }
-    CONSTEXPR uint32_t get_BS_BITSTREAM_READY_C1() const
+    CONSTEXPR uint32_t get_bs_bitstream_ready_c1() const
     {
-        uint32_t value = static_cast<uint32_t>(BS_BITSTREAM_READY_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 23));
         return value;
     }
-    uint32_t get_BS_BITSTREAM_READY_C1() const volatile
+    uint32_t get_bs_bitstream_ready_c1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(BS_BITSTREAM_READY_C1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 23));
         return value;
     }
-    CONSTEXPR dma_status1_r &set_BS_BITSTREAM_READY_C1(uint32_t value)
+    CONSTEXPR dma_status1_r &set_bs_bitstream_ready_c1(uint32_t value)
     {
-        BS_BITSTREAM_READY_C1 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 23) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 23);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
 // clkforce_r - Force clocks on for clock gating
 struct clkforce_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
@@ -5648,30 +5099,28 @@
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR clkforce_r() :
-        top_level_clk(static_cast<uint32_t>(0)), cc_clk(static_cast<uint32_t>(0)), dma_clk(static_cast<uint32_t>(0)),
-        mac_clk(static_cast<uint32_t>(0)), ao_clk(static_cast<uint32_t>(0)), wd_clk(static_cast<uint32_t>(0)),
-        reserved0(static_cast<uint32_t>(0))
-    {
-    }
-    CONSTEXPR clkforce_r(uint32_t init) : word(init) {}
+    CONSTEXPR clkforce_r() : word0(0) {}
+    CONSTEXPR clkforce_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     clkforce_r copy() volatile
     {
@@ -5679,740 +5128,273 @@
     }
     CONSTEXPR uint32_t get_top_level_clk() const
     {
-        uint32_t value = static_cast<uint32_t>(top_level_clk);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
     uint32_t get_top_level_clk() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(top_level_clk);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
     CONSTEXPR clkforce_r &set_top_level_clk(uint32_t value)
     {
-        top_level_clk = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
         return *this;
     }
     CONSTEXPR uint32_t get_cc_clk() const
     {
-        uint32_t value = static_cast<uint32_t>(cc_clk);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
     uint32_t get_cc_clk() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(cc_clk);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
     CONSTEXPR clkforce_r &set_cc_clk(uint32_t value)
     {
-        cc_clk = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
         return *this;
     }
     CONSTEXPR uint32_t get_dma_clk() const
     {
-        uint32_t value = static_cast<uint32_t>(dma_clk);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
     uint32_t get_dma_clk() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(dma_clk);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
     CONSTEXPR clkforce_r &set_dma_clk(uint32_t value)
     {
-        dma_clk = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
         return *this;
     }
     CONSTEXPR uint32_t get_mac_clk() const
     {
-        uint32_t value = static_cast<uint32_t>(mac_clk);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
         return value;
     }
     uint32_t get_mac_clk() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(mac_clk);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
         return value;
     }
     CONSTEXPR clkforce_r &set_mac_clk(uint32_t value)
     {
-        mac_clk = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3);
         return *this;
     }
     CONSTEXPR uint32_t get_ao_clk() const
     {
-        uint32_t value = static_cast<uint32_t>(ao_clk);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4));
         return value;
     }
     uint32_t get_ao_clk() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(ao_clk);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4));
         return value;
     }
     CONSTEXPR clkforce_r &set_ao_clk(uint32_t value)
     {
-        ao_clk = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 4) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 4);
         return *this;
     }
     CONSTEXPR uint32_t get_wd_clk() const
     {
-        uint32_t value = static_cast<uint32_t>(wd_clk);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5));
         return value;
     }
     uint32_t get_wd_clk() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(wd_clk);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5));
         return value;
     }
     CONSTEXPR clkforce_r &set_wd_clk(uint32_t value)
     {
-        wd_clk = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 5) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 5);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
-// pid4_r - Peripheral ID byte 4 (Arm=code 4)
-struct pid4_r
+// debug_address_r - Set debug address for register reads 0x400-0x7FF. The address must be 1KB aligned
+struct debug_address_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
-        uint32_t PID4; // Byte 4 of Peripheral ID (Lower 8 bits valid)
+        struct
+        {
+            uint32_t addr : 32; // Register address
+        };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR pid4_r() : PID4(static_cast<uint32_t>(0x04)) {}
-    CONSTEXPR pid4_r(uint32_t init) : word(init) {}
+    CONSTEXPR debug_address_r() : word0(0) {}
+    CONSTEXPR debug_address_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
-    pid4_r copy() volatile
+    debug_address_r copy() volatile
     {
         return *this;
     }
-    CONSTEXPR uint32_t get_PID4() const
+    CONSTEXPR uint32_t get_addr() const
     {
-        uint32_t value = static_cast<uint32_t>(PID4);
+        uint32_t value = static_cast<uint32_t>(word0);
         return value;
     }
-    uint32_t get_PID4() const volatile
+    uint32_t get_addr() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(PID4);
+        uint32_t value = static_cast<uint32_t>(word0);
         return value;
     }
-    CONSTEXPR pid4_r &set_PID4(uint32_t value)
+    CONSTEXPR debug_address_r &set_addr(uint32_t value)
     {
-        PID4 = static_cast<uint32_t>(value);
+        word0 = static_cast<uint32_t>(value);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
-// pid5_r - Peripheral ID byte 5 (reserved)
-struct pid5_r
+// debug_misc_r - 32-bit read/write register for driver debug use. This does not affect NPU function
+struct debug_misc_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
-        uint32_t PID5; // Byte 5 of Peripheral ID (Lower 8 bits valid)
+        struct
+        {
+            uint32_t misc : 32; // Debug misc
+        };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR pid5_r() : PID5(static_cast<uint32_t>(0x00)) {}
-    CONSTEXPR pid5_r(uint32_t init) : word(init) {}
+    CONSTEXPR debug_misc_r() : word0(0) {}
+    CONSTEXPR debug_misc_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
-    pid5_r copy() volatile
+    debug_misc_r copy() volatile
     {
         return *this;
     }
-    CONSTEXPR uint32_t get_PID5() const
+    CONSTEXPR uint32_t get_misc() const
     {
-        uint32_t value = static_cast<uint32_t>(PID5);
+        uint32_t value = static_cast<uint32_t>(word0);
         return value;
     }
-    uint32_t get_PID5() const volatile
+    uint32_t get_misc() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(PID5);
+        uint32_t value = static_cast<uint32_t>(word0);
         return value;
     }
-    CONSTEXPR pid5_r &set_PID5(uint32_t value)
+    CONSTEXPR debug_misc_r &set_misc(uint32_t value)
     {
-        PID5 = static_cast<uint32_t>(value);
+        word0 = static_cast<uint32_t>(value);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
-// pid6_r - Peripheral ID byte 6 (reserved)
-struct pid6_r
+// debug_block_r - Set from which of four block banks the TSU registers are read. 0 = read from the current bank 256+n =
+// force to read from bank n where n is in the range 0 to 3
+struct debug_block_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
-        uint32_t PID6; // Byte 6 of Peripheral ID (Lower 8 bits valid)
+        struct
+        {
+            uint32_t block : 32; // Debug block
+        };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR pid6_r() : PID6(static_cast<uint32_t>(0x00)) {}
-    CONSTEXPR pid6_r(uint32_t init) : word(init) {}
+    CONSTEXPR debug_block_r() : word0(0) {}
+    CONSTEXPR debug_block_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
-    pid6_r copy() volatile
+    debug_block_r copy() volatile
     {
         return *this;
     }
-    CONSTEXPR uint32_t get_PID6() const
+    CONSTEXPR uint32_t get_block() const
     {
-        uint32_t value = static_cast<uint32_t>(PID6);
+        uint32_t value = static_cast<uint32_t>(word0);
         return value;
     }
-    uint32_t get_PID6() const volatile
+    uint32_t get_block() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(PID6);
+        uint32_t value = static_cast<uint32_t>(word0);
         return value;
     }
-    CONSTEXPR pid6_r &set_PID6(uint32_t value)
+    CONSTEXPR debug_block_r &set_block(uint32_t value)
     {
-        PID6 = static_cast<uint32_t>(value);
+        word0 = static_cast<uint32_t>(value);
         return *this;
     }
-#endif //__cplusplus
-};
-
-// pid7_r - Peripheral ID byte 7 (reserved)
-struct pid7_r
-{
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
-    union
-    {
-        uint32_t PID7; // Byte 7 of Peripheral ID (Lower 8 bits valid)
-        uint32_t word;
-    };
-#ifdef __cplusplus
-  public:
-    CONSTEXPR pid7_r() : PID7(static_cast<uint32_t>(0x00)) {}
-    CONSTEXPR pid7_r(uint32_t init) : word(init) {}
-    CONSTEXPR void operator=(uint32_t value)
-    {
-        word = value;
-    }
-    void operator=(uint32_t value) volatile
-    {
-        word = value;
-    }
-    CONSTEXPR operator uint32_t()
-    {
-        return word;
-    }
-    operator uint32_t() volatile
-    {
-        return word;
-    }
-    pid7_r copy() volatile
-    {
-        return *this;
-    }
-    CONSTEXPR uint32_t get_PID7() const
-    {
-        uint32_t value = static_cast<uint32_t>(PID7);
-        return value;
-    }
-    uint32_t get_PID7() const volatile
-    {
-        uint32_t value = static_cast<uint32_t>(PID7);
-        return value;
-    }
-    CONSTEXPR pid7_r &set_PID7(uint32_t value)
-    {
-        PID7 = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// pid0_r - Peripheral ID byte 0. This is bits[7:0] of the part number.
-struct pid0_r
-{
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
-    union
-    {
-        uint32_t PID0; // Byte 0 of Peripheral ID (Lower 8 bits valid)
-        uint32_t word;
-    };
-#ifdef __cplusplus
-  public:
-    CONSTEXPR pid0_r() : PID0(static_cast<uint32_t>(0x80)) {}
-    CONSTEXPR pid0_r(uint32_t init) : word(init) {}
-    CONSTEXPR void operator=(uint32_t value)
-    {
-        word = value;
-    }
-    void operator=(uint32_t value) volatile
-    {
-        word = value;
-    }
-    CONSTEXPR operator uint32_t()
-    {
-        return word;
-    }
-    operator uint32_t() volatile
-    {
-        return word;
-    }
-    pid0_r copy() volatile
-    {
-        return *this;
-    }
-    CONSTEXPR uint32_t get_PID0() const
-    {
-        uint32_t value = static_cast<uint32_t>(PID0);
-        return value;
-    }
-    uint32_t get_PID0() const volatile
-    {
-        uint32_t value = static_cast<uint32_t>(PID0);
-        return value;
-    }
-    CONSTEXPR pid0_r &set_PID0(uint32_t value)
-    {
-        PID0 = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// pid1_r - Peripheral ID byte 1. This is bits[11:8] of the part number in bits[3:0], and bits[3:0] of the Arm ID in
-// bits[7:4].
-struct pid1_r
-{
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
-    union
-    {
-        uint32_t PID1; // Byte 1 of Peripheral ID (Lower 8 bits valid)
-        uint32_t word;
-    };
-#ifdef __cplusplus
-  public:
-    CONSTEXPR pid1_r() : PID1(static_cast<uint32_t>(0xB5)) {}
-    CONSTEXPR pid1_r(uint32_t init) : word(init) {}
-    CONSTEXPR void operator=(uint32_t value)
-    {
-        word = value;
-    }
-    void operator=(uint32_t value) volatile
-    {
-        word = value;
-    }
-    CONSTEXPR operator uint32_t()
-    {
-        return word;
-    }
-    operator uint32_t() volatile
-    {
-        return word;
-    }
-    pid1_r copy() volatile
-    {
-        return *this;
-    }
-    CONSTEXPR uint32_t get_PID1() const
-    {
-        uint32_t value = static_cast<uint32_t>(PID1);
-        return value;
-    }
-    uint32_t get_PID1() const volatile
-    {
-        uint32_t value = static_cast<uint32_t>(PID1);
-        return value;
-    }
-    CONSTEXPR pid1_r &set_PID1(uint32_t value)
-    {
-        PID1 = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// pid2_r - Peripheral ID byte 2. This is bits[6:4] of the Arm ID in bits[2:0], and bit 3 indicates format B.
-struct pid2_r
-{
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
-    union
-    {
-        uint32_t PID2; // Byte 2 of Peripheral ID (Lower 8 bits valid)
-        uint32_t word;
-    };
-#ifdef __cplusplus
-  public:
-    CONSTEXPR pid2_r() : PID2(static_cast<uint32_t>(0x0B)) {}
-    CONSTEXPR pid2_r(uint32_t init) : word(init) {}
-    CONSTEXPR void operator=(uint32_t value)
-    {
-        word = value;
-    }
-    void operator=(uint32_t value) volatile
-    {
-        word = value;
-    }
-    CONSTEXPR operator uint32_t()
-    {
-        return word;
-    }
-    operator uint32_t() volatile
-    {
-        return word;
-    }
-    pid2_r copy() volatile
-    {
-        return *this;
-    }
-    CONSTEXPR uint32_t get_PID2() const
-    {
-        uint32_t value = static_cast<uint32_t>(PID2);
-        return value;
-    }
-    uint32_t get_PID2() const volatile
-    {
-        uint32_t value = static_cast<uint32_t>(PID2);
-        return value;
-    }
-    CONSTEXPR pid2_r &set_PID2(uint32_t value)
-    {
-        PID2 = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// pid3_r - Peripheral ID byte 3.
-struct pid3_r
-{
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
-    union
-    {
-        uint32_t PID3; // Byte 1 of Peripheral ID (Lower 8 bits valid)
-        uint32_t word;
-    };
-#ifdef __cplusplus
-  public:
-    CONSTEXPR pid3_r() : PID3(static_cast<uint32_t>(0x0)) {}
-    CONSTEXPR pid3_r(uint32_t init) : word(init) {}
-    CONSTEXPR void operator=(uint32_t value)
-    {
-        word = value;
-    }
-    void operator=(uint32_t value) volatile
-    {
-        word = value;
-    }
-    CONSTEXPR operator uint32_t()
-    {
-        return word;
-    }
-    operator uint32_t() volatile
-    {
-        return word;
-    }
-    pid3_r copy() volatile
-    {
-        return *this;
-    }
-    CONSTEXPR uint32_t get_PID3() const
-    {
-        uint32_t value = static_cast<uint32_t>(PID3);
-        return value;
-    }
-    uint32_t get_PID3() const volatile
-    {
-        uint32_t value = static_cast<uint32_t>(PID3);
-        return value;
-    }
-    CONSTEXPR pid3_r &set_PID3(uint32_t value)
-    {
-        PID3 = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// cid0_r - Component ID byte 0.
-struct cid0_r
-{
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
-    union
-    {
-        uint32_t CID0; // Byte 0 of Component ID (Lower 8 bits valid)
-        uint32_t word;
-    };
-#ifdef __cplusplus
-  public:
-    CONSTEXPR cid0_r() : CID0(static_cast<uint32_t>(0x0D)) {}
-    CONSTEXPR cid0_r(uint32_t init) : word(init) {}
-    CONSTEXPR void operator=(uint32_t value)
-    {
-        word = value;
-    }
-    void operator=(uint32_t value) volatile
-    {
-        word = value;
-    }
-    CONSTEXPR operator uint32_t()
-    {
-        return word;
-    }
-    operator uint32_t() volatile
-    {
-        return word;
-    }
-    cid0_r copy() volatile
-    {
-        return *this;
-    }
-    CONSTEXPR uint32_t get_CID0() const
-    {
-        uint32_t value = static_cast<uint32_t>(CID0);
-        return value;
-    }
-    uint32_t get_CID0() const volatile
-    {
-        uint32_t value = static_cast<uint32_t>(CID0);
-        return value;
-    }
-    CONSTEXPR cid0_r &set_CID0(uint32_t value)
-    {
-        CID0 = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// cid1_r - Component ID byte 1.
-struct cid1_r
-{
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
-    union
-    {
-        uint32_t CID1; // Byte 1 of Component ID (Lower 8 bits valid)
-        uint32_t word;
-    };
-#ifdef __cplusplus
-  public:
-    CONSTEXPR cid1_r() : CID1(static_cast<uint32_t>(0xF0)) {}
-    CONSTEXPR cid1_r(uint32_t init) : word(init) {}
-    CONSTEXPR void operator=(uint32_t value)
-    {
-        word = value;
-    }
-    void operator=(uint32_t value) volatile
-    {
-        word = value;
-    }
-    CONSTEXPR operator uint32_t()
-    {
-        return word;
-    }
-    operator uint32_t() volatile
-    {
-        return word;
-    }
-    cid1_r copy() volatile
-    {
-        return *this;
-    }
-    CONSTEXPR uint32_t get_CID1() const
-    {
-        uint32_t value = static_cast<uint32_t>(CID1);
-        return value;
-    }
-    uint32_t get_CID1() const volatile
-    {
-        uint32_t value = static_cast<uint32_t>(CID1);
-        return value;
-    }
-    CONSTEXPR cid1_r &set_CID1(uint32_t value)
-    {
-        CID1 = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// cid2_r - Component ID byte 2.
-struct cid2_r
-{
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
-    union
-    {
-        uint32_t CID2; // Byte 2 of Component ID (Lower 8 bits valid)
-        uint32_t word;
-    };
-#ifdef __cplusplus
-  public:
-    CONSTEXPR cid2_r() : CID2(static_cast<uint32_t>(0x05)) {}
-    CONSTEXPR cid2_r(uint32_t init) : word(init) {}
-    CONSTEXPR void operator=(uint32_t value)
-    {
-        word = value;
-    }
-    void operator=(uint32_t value) volatile
-    {
-        word = value;
-    }
-    CONSTEXPR operator uint32_t()
-    {
-        return word;
-    }
-    operator uint32_t() volatile
-    {
-        return word;
-    }
-    cid2_r copy() volatile
-    {
-        return *this;
-    }
-    CONSTEXPR uint32_t get_CID2() const
-    {
-        uint32_t value = static_cast<uint32_t>(CID2);
-        return value;
-    }
-    uint32_t get_CID2() const volatile
-    {
-        uint32_t value = static_cast<uint32_t>(CID2);
-        return value;
-    }
-    CONSTEXPR cid2_r &set_CID2(uint32_t value)
-    {
-        CID2 = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// cid3_r - Component ID byte 3.
-struct cid3_r
-{
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
-    union
-    {
-        uint32_t CID3; // Byte 3 of Component ID (Lower 8 bits valid)
-        uint32_t word;
-    };
-#ifdef __cplusplus
-  public:
-    CONSTEXPR cid3_r() : CID3(static_cast<uint32_t>(0xB1)) {}
-    CONSTEXPR cid3_r(uint32_t init) : word(init) {}
-    CONSTEXPR void operator=(uint32_t value)
-    {
-        word = value;
-    }
-    void operator=(uint32_t value) volatile
-    {
-        word = value;
-    }
-    CONSTEXPR operator uint32_t()
-    {
-        return word;
-    }
-    operator uint32_t() volatile
-    {
-        return word;
-    }
-    cid3_r copy() volatile
-    {
-        return *this;
-    }
-    CONSTEXPR uint32_t get_CID3() const
-    {
-        uint32_t value = static_cast<uint32_t>(CID3);
-        return value;
-    }
-    uint32_t get_CID3() const volatile
-    {
-        uint32_t value = static_cast<uint32_t>(CID3);
-        return value;
-    }
-    CONSTEXPR cid3_r &set_CID3(uint32_t value)
-    {
-        CID3 = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
+#endif
 };
 
 // pmcr_r - PMU Register control
 struct pmcr_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
@@ -6427,31 +5409,28 @@
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR pmcr_r() :
-        cnt_en(static_cast<uint32_t>(0x0)), event_cnt_rst(static_cast<uint32_t>(0)),
-        cycle_cnt_rst(static_cast<uint32_t>(0)), mask_en(static_cast<uint32_t>(0x0)),
-        reserved0(static_cast<uint32_t>(0)), num_event_cnt(static_cast<uint32_t>(0x04)),
-        reserved1(static_cast<uint32_t>(0))
-    {
-    }
-    CONSTEXPR pmcr_r(uint32_t init) : word(init) {}
+    CONSTEXPR pmcr_r() : word0(8192) {}
+    CONSTEXPR pmcr_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     pmcr_r copy() volatile
     {
@@ -6459,88 +5438,86 @@
     }
     CONSTEXPR uint32_t get_cnt_en() const
     {
-        uint32_t value = static_cast<uint32_t>(cnt_en);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
     uint32_t get_cnt_en() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(cnt_en);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
     CONSTEXPR pmcr_r &set_cnt_en(uint32_t value)
     {
-        cnt_en = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
         return *this;
     }
     CONSTEXPR uint32_t get_event_cnt_rst() const
     {
-        uint32_t value = static_cast<uint32_t>(event_cnt_rst);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
     uint32_t get_event_cnt_rst() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(event_cnt_rst);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
     CONSTEXPR pmcr_r &set_event_cnt_rst(uint32_t value)
     {
-        event_cnt_rst = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
         return *this;
     }
     CONSTEXPR uint32_t get_cycle_cnt_rst() const
     {
-        uint32_t value = static_cast<uint32_t>(cycle_cnt_rst);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
     uint32_t get_cycle_cnt_rst() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(cycle_cnt_rst);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
     CONSTEXPR pmcr_r &set_cycle_cnt_rst(uint32_t value)
     {
-        cycle_cnt_rst = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
         return *this;
     }
     CONSTEXPR uint32_t get_mask_en() const
     {
-        uint32_t value = static_cast<uint32_t>(mask_en);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
         return value;
     }
     uint32_t get_mask_en() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(mask_en);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
         return value;
     }
     CONSTEXPR pmcr_r &set_mask_en(uint32_t value)
     {
-        mask_en = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3);
         return *this;
     }
     CONSTEXPR uint32_t get_num_event_cnt() const
     {
-        uint32_t value = static_cast<uint32_t>(num_event_cnt);
+        uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 11));
         return value;
     }
     uint32_t get_num_event_cnt() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(num_event_cnt);
+        uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 11));
         return value;
     }
     CONSTEXPR pmcr_r &set_num_event_cnt(uint32_t value)
     {
-        num_event_cnt = ((1u << 5) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 5) - 1)) << 11) & word0) | ((((1U << 5) - 1) & static_cast<uint32_t>(value)) << 11);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
 // pmcntenset_r - Count enable set register
 struct pmcntenset_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
@@ -6554,30 +5531,28 @@
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR pmcntenset_r() :
-        EVENT_CNT_0(static_cast<uint32_t>(0)), EVENT_CNT_1(static_cast<uint32_t>(0)),
-        EVENT_CNT_2(static_cast<uint32_t>(0)), EVENT_CNT_3(static_cast<uint32_t>(0)),
-        reserved0(static_cast<uint32_t>(0)), CYCLE_CNT(static_cast<uint32_t>(0))
-    {
-    }
-    CONSTEXPR pmcntenset_r(uint32_t init) : word(init) {}
+    CONSTEXPR pmcntenset_r() : word0(0) {}
+    CONSTEXPR pmcntenset_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     pmcntenset_r copy() volatile
     {
@@ -6585,88 +5560,86 @@
     }
     CONSTEXPR uint32_t get_EVENT_CNT_0() const
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
     uint32_t get_EVENT_CNT_0() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
     CONSTEXPR pmcntenset_r &set_EVENT_CNT_0(uint32_t value)
     {
-        EVENT_CNT_0 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
         return *this;
     }
     CONSTEXPR uint32_t get_EVENT_CNT_1() const
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
     uint32_t get_EVENT_CNT_1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
     CONSTEXPR pmcntenset_r &set_EVENT_CNT_1(uint32_t value)
     {
-        EVENT_CNT_1 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
         return *this;
     }
     CONSTEXPR uint32_t get_EVENT_CNT_2() const
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_2);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
     uint32_t get_EVENT_CNT_2() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_2);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
     CONSTEXPR pmcntenset_r &set_EVENT_CNT_2(uint32_t value)
     {
-        EVENT_CNT_2 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
         return *this;
     }
     CONSTEXPR uint32_t get_EVENT_CNT_3() const
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_3);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
         return value;
     }
     uint32_t get_EVENT_CNT_3() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_3);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
         return value;
     }
     CONSTEXPR pmcntenset_r &set_EVENT_CNT_3(uint32_t value)
     {
-        EVENT_CNT_3 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3);
         return *this;
     }
     CONSTEXPR uint32_t get_CYCLE_CNT() const
     {
-        uint32_t value = static_cast<uint32_t>(CYCLE_CNT);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31));
         return value;
     }
     uint32_t get_CYCLE_CNT() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(CYCLE_CNT);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31));
         return value;
     }
     CONSTEXPR pmcntenset_r &set_CYCLE_CNT(uint32_t value)
     {
-        CYCLE_CNT = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 31) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 31);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
 // pmcntenclr_r - Count enable clear register
 struct pmcntenclr_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
@@ -6680,30 +5653,28 @@
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR pmcntenclr_r() :
-        EVENT_CNT_0(static_cast<uint32_t>(0)), EVENT_CNT_1(static_cast<uint32_t>(0)),
-        EVENT_CNT_2(static_cast<uint32_t>(0)), EVENT_CNT_3(static_cast<uint32_t>(0)),
-        reserved0(static_cast<uint32_t>(0)), CYCLE_CNT(static_cast<uint32_t>(0))
-    {
-    }
-    CONSTEXPR pmcntenclr_r(uint32_t init) : word(init) {}
+    CONSTEXPR pmcntenclr_r() : word0(0) {}
+    CONSTEXPR pmcntenclr_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     pmcntenclr_r copy() volatile
     {
@@ -6711,88 +5682,86 @@
     }
     CONSTEXPR uint32_t get_EVENT_CNT_0() const
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
     uint32_t get_EVENT_CNT_0() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_0);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
     CONSTEXPR pmcntenclr_r &set_EVENT_CNT_0(uint32_t value)
     {
-        EVENT_CNT_0 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
         return *this;
     }
     CONSTEXPR uint32_t get_EVENT_CNT_1() const
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
     uint32_t get_EVENT_CNT_1() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_1);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
     CONSTEXPR pmcntenclr_r &set_EVENT_CNT_1(uint32_t value)
     {
-        EVENT_CNT_1 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
         return *this;
     }
     CONSTEXPR uint32_t get_EVENT_CNT_2() const
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_2);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
     uint32_t get_EVENT_CNT_2() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_2);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
     CONSTEXPR pmcntenclr_r &set_EVENT_CNT_2(uint32_t value)
     {
-        EVENT_CNT_2 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
         return *this;
     }
     CONSTEXPR uint32_t get_EVENT_CNT_3() const
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_3);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
         return value;
     }
     uint32_t get_EVENT_CNT_3() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_3);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
         return value;
     }
     CONSTEXPR pmcntenclr_r &set_EVENT_CNT_3(uint32_t value)
     {
-        EVENT_CNT_3 = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3);
         return *this;
     }
     CONSTEXPR uint32_t get_CYCLE_CNT() const
     {
-        uint32_t value = static_cast<uint32_t>(CYCLE_CNT);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31));
         return value;
     }
     uint32_t get_CYCLE_CNT() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(CYCLE_CNT);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31));
         return value;
     }
     CONSTEXPR pmcntenclr_r &set_CYCLE_CNT(uint32_t value)
     {
-        CYCLE_CNT = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 31) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 31);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
 // pmovsset_r - Overflow flag status set register
 struct pmovsset_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
@@ -6806,30 +5775,28 @@
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR pmovsset_r() :
-        EVENT_CNT_0_OVF(static_cast<uint32_t>(0)), EVENT_CNT_1_OVF(static_cast<uint32_t>(0)),
-        EVENT_CNT_2_OVF(static_cast<uint32_t>(0)), EVENT_CNT_3_OVF(static_cast<uint32_t>(0)),
-        reserved0(static_cast<uint32_t>(0)), CYCLE_CNT_OVF(static_cast<uint32_t>(0))
-    {
-    }
-    CONSTEXPR pmovsset_r(uint32_t init) : word(init) {}
+    CONSTEXPR pmovsset_r() : word0(0) {}
+    CONSTEXPR pmovsset_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     pmovsset_r copy() volatile
     {
@@ -6837,88 +5804,86 @@
     }
     CONSTEXPR uint32_t get_EVENT_CNT_0_OVF() const
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_0_OVF);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
     uint32_t get_EVENT_CNT_0_OVF() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_0_OVF);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
     CONSTEXPR pmovsset_r &set_EVENT_CNT_0_OVF(uint32_t value)
     {
-        EVENT_CNT_0_OVF = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
         return *this;
     }
     CONSTEXPR uint32_t get_EVENT_CNT_1_OVF() const
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_1_OVF);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
     uint32_t get_EVENT_CNT_1_OVF() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_1_OVF);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
     CONSTEXPR pmovsset_r &set_EVENT_CNT_1_OVF(uint32_t value)
     {
-        EVENT_CNT_1_OVF = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
         return *this;
     }
     CONSTEXPR uint32_t get_EVENT_CNT_2_OVF() const
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_2_OVF);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
     uint32_t get_EVENT_CNT_2_OVF() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_2_OVF);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
     CONSTEXPR pmovsset_r &set_EVENT_CNT_2_OVF(uint32_t value)
     {
-        EVENT_CNT_2_OVF = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
         return *this;
     }
     CONSTEXPR uint32_t get_EVENT_CNT_3_OVF() const
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_3_OVF);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
         return value;
     }
     uint32_t get_EVENT_CNT_3_OVF() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_3_OVF);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
         return value;
     }
     CONSTEXPR pmovsset_r &set_EVENT_CNT_3_OVF(uint32_t value)
     {
-        EVENT_CNT_3_OVF = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3);
         return *this;
     }
     CONSTEXPR uint32_t get_CYCLE_CNT_OVF() const
     {
-        uint32_t value = static_cast<uint32_t>(CYCLE_CNT_OVF);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31));
         return value;
     }
     uint32_t get_CYCLE_CNT_OVF() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(CYCLE_CNT_OVF);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31));
         return value;
     }
     CONSTEXPR pmovsset_r &set_CYCLE_CNT_OVF(uint32_t value)
     {
-        CYCLE_CNT_OVF = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 31) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 31);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
 // pmovsclr_r - Overflow flag status clear register
 struct pmovsclr_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
@@ -6932,30 +5897,28 @@
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR pmovsclr_r() :
-        EVENT_CNT_0_OVF(static_cast<uint32_t>(0)), EVENT_CNT_1_OVF(static_cast<uint32_t>(0)),
-        EVENT_CNT_2_OVF(static_cast<uint32_t>(0)), EVENT_CNT_3_OVF(static_cast<uint32_t>(0)),
-        reserved0(static_cast<uint32_t>(0)), CYCLE_CNT_OVF(static_cast<uint32_t>(0))
-    {
-    }
-    CONSTEXPR pmovsclr_r(uint32_t init) : word(init) {}
+    CONSTEXPR pmovsclr_r() : word0(0) {}
+    CONSTEXPR pmovsclr_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     pmovsclr_r copy() volatile
     {
@@ -6963,88 +5926,86 @@
     }
     CONSTEXPR uint32_t get_EVENT_CNT_0_OVF() const
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_0_OVF);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
     uint32_t get_EVENT_CNT_0_OVF() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_0_OVF);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
     CONSTEXPR pmovsclr_r &set_EVENT_CNT_0_OVF(uint32_t value)
     {
-        EVENT_CNT_0_OVF = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
         return *this;
     }
     CONSTEXPR uint32_t get_EVENT_CNT_1_OVF() const
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_1_OVF);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
     uint32_t get_EVENT_CNT_1_OVF() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_1_OVF);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
     CONSTEXPR pmovsclr_r &set_EVENT_CNT_1_OVF(uint32_t value)
     {
-        EVENT_CNT_1_OVF = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
         return *this;
     }
     CONSTEXPR uint32_t get_EVENT_CNT_2_OVF() const
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_2_OVF);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
     uint32_t get_EVENT_CNT_2_OVF() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_2_OVF);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
     CONSTEXPR pmovsclr_r &set_EVENT_CNT_2_OVF(uint32_t value)
     {
-        EVENT_CNT_2_OVF = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
         return *this;
     }
     CONSTEXPR uint32_t get_EVENT_CNT_3_OVF() const
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_3_OVF);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
         return value;
     }
     uint32_t get_EVENT_CNT_3_OVF() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_3_OVF);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
         return value;
     }
     CONSTEXPR pmovsclr_r &set_EVENT_CNT_3_OVF(uint32_t value)
     {
-        EVENT_CNT_3_OVF = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3);
         return *this;
     }
     CONSTEXPR uint32_t get_CYCLE_CNT_OVF() const
     {
-        uint32_t value = static_cast<uint32_t>(CYCLE_CNT_OVF);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31));
         return value;
     }
     uint32_t get_CYCLE_CNT_OVF() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(CYCLE_CNT_OVF);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31));
         return value;
     }
     CONSTEXPR pmovsclr_r &set_CYCLE_CNT_OVF(uint32_t value)
     {
-        CYCLE_CNT_OVF = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 31) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 31);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
 // pmintset_r - Interrupt enable set register
 struct pmintset_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
@@ -7058,30 +6019,28 @@
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR pmintset_r() :
-        EVENT_CNT_0_INT(static_cast<uint32_t>(0)), EVENT_CNT_1_INT(static_cast<uint32_t>(0)),
-        EVENT_CNT_2_INT(static_cast<uint32_t>(0)), EVENT_CNT_3_INT(static_cast<uint32_t>(0)),
-        reserved0(static_cast<uint32_t>(0)), CYCLE_CNT_INT(static_cast<uint32_t>(0))
-    {
-    }
-    CONSTEXPR pmintset_r(uint32_t init) : word(init) {}
+    CONSTEXPR pmintset_r() : word0(0) {}
+    CONSTEXPR pmintset_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     pmintset_r copy() volatile
     {
@@ -7089,88 +6048,86 @@
     }
     CONSTEXPR uint32_t get_EVENT_CNT_0_INT() const
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_0_INT);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
     uint32_t get_EVENT_CNT_0_INT() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_0_INT);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
     CONSTEXPR pmintset_r &set_EVENT_CNT_0_INT(uint32_t value)
     {
-        EVENT_CNT_0_INT = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
         return *this;
     }
     CONSTEXPR uint32_t get_EVENT_CNT_1_INT() const
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_1_INT);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
     uint32_t get_EVENT_CNT_1_INT() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_1_INT);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
     CONSTEXPR pmintset_r &set_EVENT_CNT_1_INT(uint32_t value)
     {
-        EVENT_CNT_1_INT = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
         return *this;
     }
     CONSTEXPR uint32_t get_EVENT_CNT_2_INT() const
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_2_INT);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
     uint32_t get_EVENT_CNT_2_INT() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_2_INT);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
     CONSTEXPR pmintset_r &set_EVENT_CNT_2_INT(uint32_t value)
     {
-        EVENT_CNT_2_INT = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
         return *this;
     }
     CONSTEXPR uint32_t get_EVENT_CNT_3_INT() const
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_3_INT);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
         return value;
     }
     uint32_t get_EVENT_CNT_3_INT() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_3_INT);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
         return value;
     }
     CONSTEXPR pmintset_r &set_EVENT_CNT_3_INT(uint32_t value)
     {
-        EVENT_CNT_3_INT = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3);
         return *this;
     }
     CONSTEXPR uint32_t get_CYCLE_CNT_INT() const
     {
-        uint32_t value = static_cast<uint32_t>(CYCLE_CNT_INT);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31));
         return value;
     }
     uint32_t get_CYCLE_CNT_INT() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(CYCLE_CNT_INT);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31));
         return value;
     }
     CONSTEXPR pmintset_r &set_CYCLE_CNT_INT(uint32_t value)
     {
-        CYCLE_CNT_INT = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 31) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 31);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
 // pmintclr_r - Interrupt enable clear register
 struct pmintclr_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
@@ -7184,30 +6141,28 @@
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR pmintclr_r() :
-        EVENT_CNT_0_INT(static_cast<uint32_t>(0)), EVENT_CNT_1_INT(static_cast<uint32_t>(0)),
-        EVENT_CNT_2_INT(static_cast<uint32_t>(0)), EVENT_CNT_3_INT(static_cast<uint32_t>(0)),
-        reserved0(static_cast<uint32_t>(0)), CYCLE_CNT_INT(static_cast<uint32_t>(0))
-    {
-    }
-    CONSTEXPR pmintclr_r(uint32_t init) : word(init) {}
+    CONSTEXPR pmintclr_r() : word0(0) {}
+    CONSTEXPR pmintclr_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     pmintclr_r copy() volatile
     {
@@ -7215,198 +6170,137 @@
     }
     CONSTEXPR uint32_t get_EVENT_CNT_0_INT() const
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_0_INT);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
     uint32_t get_EVENT_CNT_0_INT() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_0_INT);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
         return value;
     }
     CONSTEXPR pmintclr_r &set_EVENT_CNT_0_INT(uint32_t value)
     {
-        EVENT_CNT_0_INT = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
         return *this;
     }
     CONSTEXPR uint32_t get_EVENT_CNT_1_INT() const
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_1_INT);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
     uint32_t get_EVENT_CNT_1_INT() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_1_INT);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
         return value;
     }
     CONSTEXPR pmintclr_r &set_EVENT_CNT_1_INT(uint32_t value)
     {
-        EVENT_CNT_1_INT = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
         return *this;
     }
     CONSTEXPR uint32_t get_EVENT_CNT_2_INT() const
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_2_INT);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
     uint32_t get_EVENT_CNT_2_INT() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_2_INT);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
         return value;
     }
     CONSTEXPR pmintclr_r &set_EVENT_CNT_2_INT(uint32_t value)
     {
-        EVENT_CNT_2_INT = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
         return *this;
     }
     CONSTEXPR uint32_t get_EVENT_CNT_3_INT() const
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_3_INT);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
         return value;
     }
     uint32_t get_EVENT_CNT_3_INT() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(EVENT_CNT_3_INT);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
         return value;
     }
     CONSTEXPR pmintclr_r &set_EVENT_CNT_3_INT(uint32_t value)
     {
-        EVENT_CNT_3_INT = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3);
         return *this;
     }
     CONSTEXPR uint32_t get_CYCLE_CNT_INT() const
     {
-        uint32_t value = static_cast<uint32_t>(CYCLE_CNT_INT);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31));
         return value;
     }
     uint32_t get_CYCLE_CNT_INT() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(CYCLE_CNT_INT);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31));
         return value;
     }
     CONSTEXPR pmintclr_r &set_CYCLE_CNT_INT(uint32_t value)
     {
-        CYCLE_CNT_INT = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 31) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 31);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
-// pmccntr_lo_r - Performance monitor cycle count low register
-struct pmccntr_lo_r
+// pmccntr_r - Performance monitor cycle count register
+struct pmccntr_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
-    union
-    {
-        uint32_t CYCLE_CNT_LO; // Cycle count low
-        uint32_t word;
-    };
-#ifdef __cplusplus
-  public:
-    CONSTEXPR pmccntr_lo_r() : CYCLE_CNT_LO(static_cast<uint32_t>(0x00000000)) {}
-    CONSTEXPR pmccntr_lo_r(uint32_t init) : word(init) {}
-    CONSTEXPR void operator=(uint32_t value)
-    {
-        word = value;
-    }
-    void operator=(uint32_t value) volatile
-    {
-        word = value;
-    }
-    CONSTEXPR operator uint32_t()
-    {
-        return word;
-    }
-    operator uint32_t() volatile
-    {
-        return word;
-    }
-    pmccntr_lo_r copy() volatile
-    {
-        return *this;
-    }
-    CONSTEXPR uint32_t get_CYCLE_CNT_LO() const
-    {
-        uint32_t value = static_cast<uint32_t>(CYCLE_CNT_LO);
-        return value;
-    }
-    uint32_t get_CYCLE_CNT_LO() const volatile
-    {
-        uint32_t value = static_cast<uint32_t>(CYCLE_CNT_LO);
-        return value;
-    }
-    CONSTEXPR pmccntr_lo_r &set_CYCLE_CNT_LO(uint32_t value)
-    {
-        CYCLE_CNT_LO = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// pmccntr_hi_r - Performance monitor cycle count high register
-struct pmccntr_hi_r
-{
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
         {
-            uint32_t CYCLE_CNT_HI : 16; // Cycle count high
+            uint32_t CYCLE_CNT_LO : 32; // Cycle count - LSB
+            uint32_t CYCLE_CNT_HI : 16; // Cycle count - MSB
             uint32_t reserved0 : 16;
         };
-        uint32_t word;
+        uint32_t word[2];
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
   public:
-    CONSTEXPR pmccntr_hi_r() : CYCLE_CNT_HI(static_cast<uint32_t>(0x0000)), reserved0(static_cast<uint32_t>(0)) {}
-    CONSTEXPR pmccntr_hi_r(uint32_t init) : word(init) {}
-    CONSTEXPR void operator=(uint32_t value)
+    CONSTEXPR pmccntr_r() : word0(0), word1(0) {}
+    CONSTEXPR pmccntr_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
     {
-        word = value;
     }
-    void operator=(uint32_t value) volatile
+    CONSTEXPR void operator=(uint64_t value)
     {
-        word = value;
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
     }
-    CONSTEXPR operator uint32_t()
+    void operator=(uint64_t value) volatile
     {
-        return word;
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
     }
-    operator uint32_t() volatile
+    CONSTEXPR operator uint64_t()
     {
-        return word;
+        return (static_cast<uint64_t>(word1) << 32) | word0;
     }
-    pmccntr_hi_r copy() volatile
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    pmccntr_r copy() volatile
     {
         return *this;
     }
-    CONSTEXPR uint32_t get_CYCLE_CNT_HI() const
-    {
-        uint32_t value = static_cast<uint32_t>(CYCLE_CNT_HI);
-        return value;
-    }
-    uint32_t get_CYCLE_CNT_HI() const volatile
-    {
-        uint32_t value = static_cast<uint32_t>(CYCLE_CNT_HI);
-        return value;
-    }
-    CONSTEXPR pmccntr_hi_r &set_CYCLE_CNT_HI(uint32_t value)
-    {
-        CYCLE_CNT_HI = ((1u << 16) - 1) & static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
+#endif
 };
 
 // pmccntr_cfg_r - Set start/stop event on the cycle counter
 struct pmccntr_cfg_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
@@ -7418,171 +6312,1881 @@
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR pmccntr_cfg_r() :
-        CYCLE_CNT_CFG_START(static_cast<uint32_t>(0x00)), reserved0(static_cast<uint32_t>(0)),
-        CYCLE_CNT_CFG_STOP(static_cast<uint32_t>(0x00)), reserved1(static_cast<uint32_t>(0))
-    {
-    }
-    CONSTEXPR pmccntr_cfg_r(uint32_t init) : word(init) {}
+    CONSTEXPR pmccntr_cfg_r() : word0(0) {}
+    CONSTEXPR pmccntr_cfg_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     pmccntr_cfg_r copy() volatile
     {
         return *this;
     }
-    CONSTEXPR uint32_t get_CYCLE_CNT_CFG_START() const
+    CONSTEXPR NPU_NAMESPACE::pmu_event get_CYCLE_CNT_CFG_START() const
     {
-        uint32_t value = static_cast<uint32_t>(CYCLE_CNT_CFG_START);
+        NPU_NAMESPACE::pmu_event value = static_cast<NPU_NAMESPACE::pmu_event>(((1U << 10) - 1) & (word0 >> 0));
         return value;
     }
-    uint32_t get_CYCLE_CNT_CFG_START() const volatile
+    NPU_NAMESPACE::pmu_event get_CYCLE_CNT_CFG_START() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(CYCLE_CNT_CFG_START);
+        NPU_NAMESPACE::pmu_event value = static_cast<NPU_NAMESPACE::pmu_event>(((1U << 10) - 1) & (word0 >> 0));
         return value;
     }
-    CONSTEXPR pmccntr_cfg_r &set_CYCLE_CNT_CFG_START(uint32_t value)
+    CONSTEXPR pmccntr_cfg_r &set_CYCLE_CNT_CFG_START(NPU_NAMESPACE::pmu_event value)
     {
-        CYCLE_CNT_CFG_START = ((1u << 10) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 10) - 1)) << 0) & word0) | ((((1U << 10) - 1) & static_cast<uint32_t>(value)) << 0);
         return *this;
     }
-    CONSTEXPR uint32_t get_CYCLE_CNT_CFG_STOP() const
+    CONSTEXPR NPU_NAMESPACE::pmu_event get_CYCLE_CNT_CFG_STOP() const
     {
-        uint32_t value = static_cast<uint32_t>(CYCLE_CNT_CFG_STOP);
+        NPU_NAMESPACE::pmu_event value = static_cast<NPU_NAMESPACE::pmu_event>(((1U << 10) - 1) & (word0 >> 16));
         return value;
     }
-    uint32_t get_CYCLE_CNT_CFG_STOP() const volatile
+    NPU_NAMESPACE::pmu_event get_CYCLE_CNT_CFG_STOP() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(CYCLE_CNT_CFG_STOP);
+        NPU_NAMESPACE::pmu_event value = static_cast<NPU_NAMESPACE::pmu_event>(((1U << 10) - 1) & (word0 >> 16));
         return value;
     }
-    CONSTEXPR pmccntr_cfg_r &set_CYCLE_CNT_CFG_STOP(uint32_t value)
+    CONSTEXPR pmccntr_cfg_r &set_CYCLE_CNT_CFG_STOP(NPU_NAMESPACE::pmu_event value)
     {
-        CYCLE_CNT_CFG_STOP = ((1u << 10) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 10) - 1)) << 16) & word0) | ((((1U << 10) - 1) & static_cast<uint32_t>(value)) << 16);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
 // pmcaxi_chan_r - Set which AXI channel to monitor for latency measurements in PMU
 struct pmcaxi_chan_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
         {
-            uint32_t CH_SEL : 4; // Channel number to monitor for latency measurements (Read: 0=Cmd 1=IFM 2=Weights
-                                 // 3=Scale+Bias 4=Mem2Mem; Write: 8=OFM 9=Mem2Mem)
+            uint32_t CH_SEL : 4; // Channel select for latency measurements
             uint32_t reserved0 : 4;
-            uint32_t AXI_CNT_SEL : 2;  // AXI counter to monitor for latency measurements (0=AXI0 counter0, 1=AXI0
-                                       // counter1, 2=AXI1 counter 2, 3=AXI counter3)
-            uint32_t BW_CH_SEL_EN : 1; // Bandwidth channel selector enable: {0=AXI bw events measured for all channels,
-                                       // 1=AXI bw events measured for channel specified by CH_SEL
+            uint32_t AXI_CNT_SEL : 2;  // AXI counter to monitor for latency measurements
+            uint32_t BW_CH_SEL_EN : 1; // Bandwidth channel selector
             uint32_t reserved1 : 21;
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR pmcaxi_chan_r() :
-        CH_SEL(static_cast<uint32_t>(0x0)), reserved0(static_cast<uint32_t>(0)),
-        AXI_CNT_SEL(static_cast<uint32_t>(0x000000)), BW_CH_SEL_EN(static_cast<uint32_t>(0x000000)),
-        reserved1(static_cast<uint32_t>(0))
-    {
-    }
-    CONSTEXPR pmcaxi_chan_r(uint32_t init) : word(init) {}
+    CONSTEXPR pmcaxi_chan_r() : word0(0) {}
+    CONSTEXPR pmcaxi_chan_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
     pmcaxi_chan_r copy() volatile
     {
         return *this;
     }
-    CONSTEXPR uint32_t get_CH_SEL() const
+    CONSTEXPR NPU_NAMESPACE::pmu_axi_channel get_CH_SEL() const
     {
-        uint32_t value = static_cast<uint32_t>(CH_SEL);
+        NPU_NAMESPACE::pmu_axi_channel value =
+            static_cast<NPU_NAMESPACE::pmu_axi_channel>(((1U << 4) - 1) & (word0 >> 0));
         return value;
     }
-    uint32_t get_CH_SEL() const volatile
+    NPU_NAMESPACE::pmu_axi_channel get_CH_SEL() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(CH_SEL);
+        NPU_NAMESPACE::pmu_axi_channel value =
+            static_cast<NPU_NAMESPACE::pmu_axi_channel>(((1U << 4) - 1) & (word0 >> 0));
         return value;
     }
-    CONSTEXPR pmcaxi_chan_r &set_CH_SEL(uint32_t value)
+    CONSTEXPR pmcaxi_chan_r &set_CH_SEL(NPU_NAMESPACE::pmu_axi_channel value)
     {
-        CH_SEL = ((1u << 4) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 4) - 1)) << 0) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 0);
         return *this;
     }
     CONSTEXPR uint32_t get_AXI_CNT_SEL() const
     {
-        uint32_t value = static_cast<uint32_t>(AXI_CNT_SEL);
+        uint32_t value = static_cast<uint32_t>(((1U << 2) - 1) & (word0 >> 8));
         return value;
     }
     uint32_t get_AXI_CNT_SEL() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(AXI_CNT_SEL);
+        uint32_t value = static_cast<uint32_t>(((1U << 2) - 1) & (word0 >> 8));
         return value;
     }
     CONSTEXPR pmcaxi_chan_r &set_AXI_CNT_SEL(uint32_t value)
     {
-        AXI_CNT_SEL = ((1u << 2) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 2) - 1)) << 8) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 8);
         return *this;
     }
     CONSTEXPR uint32_t get_BW_CH_SEL_EN() const
     {
-        uint32_t value = static_cast<uint32_t>(BW_CH_SEL_EN);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10));
         return value;
     }
     uint32_t get_BW_CH_SEL_EN() const volatile
     {
-        uint32_t value = static_cast<uint32_t>(BW_CH_SEL_EN);
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10));
         return value;
     }
     CONSTEXPR pmcaxi_chan_r &set_BW_CH_SEL_EN(uint32_t value)
     {
-        BW_CH_SEL_EN = ((1u << 1) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 1) - 1)) << 10) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 10);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
-// pmevtyper0_r - Performance monitor event type register 0
-struct pmevtyper0_r
+// kernel_x_r - Kernel X offset of in kernel decomposition
+struct kernel_x_r
 {
-#ifdef __cplusplus
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
   private:
-#endif //__cplusplus
+    uint32_t word0;
+
+  public:
+    CONSTEXPR kernel_x_r() : word0(0) {}
+    CONSTEXPR kernel_x_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    kernel_x_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR kernel_x_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// kernel_y_r - Kernel Y offset of in kernel decomposition
+struct kernel_y_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR kernel_y_r() : word0(0) {}
+    CONSTEXPR kernel_y_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    kernel_y_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR kernel_y_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// kernel_w_m1_r - Kernel (width-1) of current block
+struct kernel_w_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR kernel_w_m1_r() : word0(0) {}
+    CONSTEXPR kernel_w_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    kernel_w_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR kernel_w_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// kernel_h_m1_r - Kernel (height-1) of current block
+struct kernel_h_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR kernel_h_m1_r() : word0(0) {}
+    CONSTEXPR kernel_h_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    kernel_h_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR kernel_h_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_cblk_width_m1_r - OFM current block (width-1)
+struct ofm_cblk_width_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_cblk_width_m1_r() : word0(0) {}
+    CONSTEXPR ofm_cblk_width_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_cblk_width_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_cblk_width_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_cblk_height_m1_r - OFM current block (height-1)
+struct ofm_cblk_height_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_cblk_height_m1_r() : word0(0) {}
+    CONSTEXPR ofm_cblk_height_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_cblk_height_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_cblk_height_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_cblk_depth_m1_r - OFM current block (depth-1)
+struct ofm_cblk_depth_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_cblk_depth_m1_r() : word0(0) {}
+    CONSTEXPR ofm_cblk_depth_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_cblk_depth_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_cblk_depth_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_cblk_depth_m1_r - IFM current block (depth-1)
+struct ifm_cblk_depth_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_cblk_depth_m1_r() : word0(0) {}
+    CONSTEXPR ifm_cblk_depth_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_cblk_depth_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_cblk_depth_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_x_r - Block X coordinate in OFM
+struct ofm_x_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_x_r() : word0(0) {}
+    CONSTEXPR ofm_x_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_x_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_x_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_y_r - Block Y coordinate in OFM
+struct ofm_y_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_y_r() : word0(0) {}
+    CONSTEXPR ofm_y_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_y_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_y_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_z_r - Block Z (channel) coordinate in OFM
+struct ofm_z_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_z_r() : word0(0) {}
+    CONSTEXPR ofm_z_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_z_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_z_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_z_r - Block Z (channel) coordinate in IFM
+struct ifm_z_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_z_r() : word0(0) {}
+    CONSTEXPR ifm_z_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_z_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_z_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// pad_top_r - Block top pad
+struct pad_top_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pad_top_r() : word0(0) {}
+    CONSTEXPR pad_top_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pad_top_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR pad_top_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// pad_left_r - Block left pad
+struct pad_left_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pad_left_r() : word0(0) {}
+    CONSTEXPR pad_left_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pad_left_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR pad_left_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_cblk_width_r - IFM current block derived width
+struct ifm_cblk_width_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_cblk_width_r() : word0(0) {}
+    CONSTEXPR ifm_cblk_width_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_cblk_width_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_cblk_width_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_cblk_height_r - IFM current block derived height
+struct ifm_cblk_height_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_cblk_height_r() : word0(0) {}
+    CONSTEXPR ifm_cblk_height_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_cblk_height_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_cblk_height_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// dma_ifm_src_r - DMA IFM channel source position on AXI
+struct dma_ifm_src_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t offset : 32; // Offset
+            uint32_t reserved0 : 32;
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR dma_ifm_src_r() : word0(0), word1(0) {}
+    CONSTEXPR dma_ifm_src_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    dma_ifm_src_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// dma_ifm_dst_r - DMA IFM channel destination position in SHRAM
+struct dma_ifm_dst_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR dma_ifm_dst_r() : word0(0) {}
+    CONSTEXPR dma_ifm_dst_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    dma_ifm_dst_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR dma_ifm_dst_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// dma_ofm_src_r - DMA OFM channel source position in SHRAM
+struct dma_ofm_src_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR dma_ofm_src_r() : word0(0) {}
+    CONSTEXPR dma_ofm_src_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    dma_ofm_src_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR dma_ofm_src_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// dma_ofm_dst_r - DMA OFM channel destination position on AXI
+struct dma_ofm_dst_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t offset : 32; // Offset
+            uint32_t reserved0 : 32;
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR dma_ofm_dst_r() : word0(0), word1(0) {}
+    CONSTEXPR dma_ofm_dst_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    dma_ofm_dst_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// dma_weight_src_r - DMA weight channel source position on AXI
+struct dma_weight_src_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t offset : 32; // Offset
+            uint32_t reserved0 : 32;
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR dma_weight_src_r() : word0(0), word1(0) {}
+    CONSTEXPR dma_weight_src_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    dma_weight_src_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// dma_cmd_src_r - DMA command channel source position on AXI
+struct dma_cmd_src_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t offset : 32; // Offset
+            uint32_t reserved0 : 32;
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR dma_cmd_src_r() : word0(0), word1(0) {}
+    CONSTEXPR dma_cmd_src_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    dma_cmd_src_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// dma_cmd_size_r - DMA command channel number of bytes buffered
+struct dma_cmd_size_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR dma_cmd_size_r() : word0(0) {}
+    CONSTEXPR dma_cmd_size_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    dma_cmd_size_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR dma_cmd_size_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// dma_m2m_src_r - DMA memory to memory source position on AXI
+struct dma_m2m_src_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t offset : 32; // Offset
+            uint32_t reserved0 : 32;
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR dma_m2m_src_r() : word0(0), word1(0) {}
+    CONSTEXPR dma_m2m_src_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    dma_m2m_src_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// dma_m2m_dst_r - DMA memory to memory destination position on AXI
+struct dma_m2m_dst_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t offset : 32; // Offset
+            uint32_t reserved0 : 32;
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR dma_m2m_dst_r() : word0(0), word1(0) {}
+    CONSTEXPR dma_m2m_dst_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    dma_m2m_dst_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// current_qread_r - QREAD position being issued (rather than completed)
+struct current_qread_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR current_qread_r() : word0(0) {}
+    CONSTEXPR current_qread_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    current_qread_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR current_qread_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// dma_scale_src_r - DMA scale and bias channel source position on AXI
+struct dma_scale_src_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t offset : 32; // Offset
+            uint32_t reserved0 : 32;
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR dma_scale_src_r() : word0(0), word1(0) {}
+    CONSTEXPR dma_scale_src_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    dma_scale_src_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// current_block_r - 0-3. Current block bank being executed by the TSU or last one executed if TSU is stopped
+struct current_block_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR current_block_r() : word0(0) {}
+    CONSTEXPR current_block_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    current_block_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR current_block_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// current_op_r - Current NPU OP command being executed by the TSU
+struct current_op_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR current_op_r() : word0(0) {}
+    CONSTEXPR current_op_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    current_op_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR current_op_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// current_cmd_r - Current 32-bit command being parsed by the command stream parser
+struct current_cmd_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR current_cmd_r() : word0(0) {}
+    CONSTEXPR current_cmd_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    current_cmd_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR current_cmd_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// pmevcntr_r - Performance monitor event 0 count register
+struct pmevcntr_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t count : 32; // Count word
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pmevcntr_r() : word0(0) {}
+    CONSTEXPR pmevcntr_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pmevcntr_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_count() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_count() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR pmevcntr_r &set_count(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// pmevtyper_r - Performance monitor event type register 0
+struct pmevtyper_r
+{
+#ifndef __cplusplus
     union
     {
         struct
@@ -7592,547 +8196,5577 @@
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR pmevtyper0_r() :
-        EV_TYPE(static_cast<uint32_t>(::pmu_event_type::NO_EVENT)), reserved0(static_cast<uint32_t>(0))
-    {
-    }
-    CONSTEXPR pmevtyper0_r(uint32_t init) : word(init) {}
+    CONSTEXPR pmevtyper_r() : word0(0) {}
+    CONSTEXPR pmevtyper_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
-    pmevtyper0_r copy() volatile
+    pmevtyper_r copy() volatile
     {
         return *this;
     }
-    CONSTEXPR ::pmu_event_type get_EV_TYPE() const
+    CONSTEXPR NPU_NAMESPACE::pmu_event get_EV_TYPE() const
     {
-        ::pmu_event_type value = static_cast<::pmu_event_type>(EV_TYPE);
+        NPU_NAMESPACE::pmu_event value = static_cast<NPU_NAMESPACE::pmu_event>(((1U << 10) - 1) & (word0 >> 0));
         return value;
     }
-    ::pmu_event_type get_EV_TYPE() const volatile
+    NPU_NAMESPACE::pmu_event get_EV_TYPE() const volatile
     {
-        ::pmu_event_type value = static_cast<::pmu_event_type>(EV_TYPE);
+        NPU_NAMESPACE::pmu_event value = static_cast<NPU_NAMESPACE::pmu_event>(((1U << 10) - 1) & (word0 >> 0));
         return value;
     }
-    CONSTEXPR pmevtyper0_r &set_EV_TYPE(::pmu_event_type value)
+    CONSTEXPR pmevtyper_r &set_EV_TYPE(NPU_NAMESPACE::pmu_event value)
     {
-        EV_TYPE = ((1u << 10) - 1) & static_cast<uint32_t>(value);
+        word0 = (((~((1U << 10) - 1)) << 0) & word0) | ((((1U << 10) - 1) & static_cast<uint32_t>(value)) << 0);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
-// pmevtyper1_r - Performance monitor event type register 1
-struct pmevtyper1_r
+// shared_buffer_r - Shared buffer debug access. Only valid in STOPPED state
+struct shared_buffer_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
         {
-            uint32_t EV_TYPE : 10; // Event Type
-            uint32_t reserved0 : 22;
+            uint32_t mem_word : 32; // Memory word
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR pmevtyper1_r() :
-        EV_TYPE(static_cast<uint32_t>(::pmu_event_type::NO_EVENT)), reserved0(static_cast<uint32_t>(0))
-    {
-    }
-    CONSTEXPR pmevtyper1_r(uint32_t init) : word(init) {}
+    CONSTEXPR shared_buffer_r() : word0(0) {}
+    CONSTEXPR shared_buffer_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
-    pmevtyper1_r copy() volatile
+    shared_buffer_r copy() volatile
     {
         return *this;
     }
-    CONSTEXPR ::pmu_event_type get_EV_TYPE() const
+    CONSTEXPR uint32_t get_mem_word() const
     {
-        ::pmu_event_type value = static_cast<::pmu_event_type>(EV_TYPE);
+        uint32_t value = static_cast<uint32_t>(word0);
         return value;
     }
-    ::pmu_event_type get_EV_TYPE() const volatile
+    uint32_t get_mem_word() const volatile
     {
-        ::pmu_event_type value = static_cast<::pmu_event_type>(EV_TYPE);
+        uint32_t value = static_cast<uint32_t>(word0);
         return value;
     }
-    CONSTEXPR pmevtyper1_r &set_EV_TYPE(::pmu_event_type value)
+    CONSTEXPR shared_buffer_r &set_mem_word(uint32_t value)
     {
-        EV_TYPE = ((1u << 10) - 1) & static_cast<uint32_t>(value);
+        word0 = static_cast<uint32_t>(value);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
-// pmevtyper2_r - Performance monitor event type register 2
-struct pmevtyper2_r
+// ifm_pad_top_r - None
+struct ifm_pad_top_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
         {
-            uint32_t EV_TYPE : 10; // Event Type
-            uint32_t reserved0 : 22;
+            uint32_t value : 32; // 32-bit register value
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR pmevtyper2_r() :
-        EV_TYPE(static_cast<uint32_t>(::pmu_event_type::NO_EVENT)), reserved0(static_cast<uint32_t>(0))
-    {
-    }
-    CONSTEXPR pmevtyper2_r(uint32_t init) : word(init) {}
+    CONSTEXPR ifm_pad_top_r() : word0(0) {}
+    CONSTEXPR ifm_pad_top_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
-    pmevtyper2_r copy() volatile
+    ifm_pad_top_r copy() volatile
     {
         return *this;
     }
-    CONSTEXPR ::pmu_event_type get_EV_TYPE() const
+    CONSTEXPR uint32_t get_value() const
     {
-        ::pmu_event_type value = static_cast<::pmu_event_type>(EV_TYPE);
+        uint32_t value = static_cast<uint32_t>(word0);
         return value;
     }
-    ::pmu_event_type get_EV_TYPE() const volatile
+    uint32_t get_value() const volatile
     {
-        ::pmu_event_type value = static_cast<::pmu_event_type>(EV_TYPE);
+        uint32_t value = static_cast<uint32_t>(word0);
         return value;
     }
-    CONSTEXPR pmevtyper2_r &set_EV_TYPE(::pmu_event_type value)
+    CONSTEXPR ifm_pad_top_r &set_value(uint32_t value)
     {
-        EV_TYPE = ((1u << 10) - 1) & static_cast<uint32_t>(value);
+        word0 = static_cast<uint32_t>(value);
         return *this;
     }
-#endif //__cplusplus
+#endif
 };
 
-// pmevtyper3_r - Performance monitor event type register 3
-struct pmevtyper3_r
+// ifm_pad_left_r - None
+struct ifm_pad_left_r
 {
-#ifdef __cplusplus
-  private:
-#endif //__cplusplus
+#ifndef __cplusplus
     union
     {
         struct
         {
-            uint32_t EV_TYPE : 10; // Event Type
-            uint32_t reserved0 : 22;
+            uint32_t value : 32; // 32-bit register value
         };
         uint32_t word;
     };
-#ifdef __cplusplus
+#else
+  private:
+    uint32_t word0;
+
   public:
-    CONSTEXPR pmevtyper3_r() :
-        EV_TYPE(static_cast<uint32_t>(::pmu_event_type::NO_EVENT)), reserved0(static_cast<uint32_t>(0))
-    {
-    }
-    CONSTEXPR pmevtyper3_r(uint32_t init) : word(init) {}
+    CONSTEXPR ifm_pad_left_r() : word0(0) {}
+    CONSTEXPR ifm_pad_left_r(uint32_t init) : word0(init) {}
     CONSTEXPR void operator=(uint32_t value)
     {
-        word = value;
+        word0 = value;
     }
     void operator=(uint32_t value) volatile
     {
-        word = value;
+        word0 = value;
     }
     CONSTEXPR operator uint32_t()
     {
-        return word;
+        return word0;
     }
     operator uint32_t() volatile
     {
-        return word;
+        return word0;
     }
-    pmevtyper3_r copy() volatile
+    ifm_pad_left_r copy() volatile
     {
         return *this;
     }
-    CONSTEXPR ::pmu_event_type get_EV_TYPE() const
+    CONSTEXPR uint32_t get_value() const
     {
-        ::pmu_event_type value = static_cast<::pmu_event_type>(EV_TYPE);
+        uint32_t value = static_cast<uint32_t>(word0);
         return value;
     }
-    ::pmu_event_type get_EV_TYPE() const volatile
+    uint32_t get_value() const volatile
     {
-        ::pmu_event_type value = static_cast<::pmu_event_type>(EV_TYPE);
+        uint32_t value = static_cast<uint32_t>(word0);
         return value;
     }
-    CONSTEXPR pmevtyper3_r &set_EV_TYPE(::pmu_event_type value)
+    CONSTEXPR ifm_pad_left_r &set_value(uint32_t value)
     {
-        EV_TYPE = ((1u << 10) - 1) & static_cast<uint32_t>(value);
+        word0 = static_cast<uint32_t>(value);
         return *this;
     }
-#endif //__cplusplus
+#endif
+};
+
+// ifm_pad_right_r - None
+struct ifm_pad_right_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_pad_right_r() : word0(0) {}
+    CONSTEXPR ifm_pad_right_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_pad_right_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_pad_right_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_pad_bottom_r - None
+struct ifm_pad_bottom_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_pad_bottom_r() : word0(0) {}
+    CONSTEXPR ifm_pad_bottom_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_pad_bottom_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_pad_bottom_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_depth_m1_r - None
+struct ifm_depth_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_depth_m1_r() : word0(0) {}
+    CONSTEXPR ifm_depth_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_depth_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_depth_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_precision_r - None
+struct ifm_precision_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_precision_r() : word0(0) {}
+    CONSTEXPR ifm_precision_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_precision_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_precision_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_upscale_r - None
+struct ifm_upscale_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_upscale_r() : word0(0) {}
+    CONSTEXPR ifm_upscale_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_upscale_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_upscale_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_zero_point_r - None
+struct ifm_zero_point_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_zero_point_r() : word0(0) {}
+    CONSTEXPR ifm_zero_point_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_zero_point_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_zero_point_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_width0_m1_r - None
+struct ifm_width0_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_width0_m1_r() : word0(0) {}
+    CONSTEXPR ifm_width0_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_width0_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_width0_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_height0_m1_r - None
+struct ifm_height0_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_height0_m1_r() : word0(0) {}
+    CONSTEXPR ifm_height0_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_height0_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_height0_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_height1_m1_r - None
+struct ifm_height1_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_height1_m1_r() : word0(0) {}
+    CONSTEXPR ifm_height1_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_height1_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_height1_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_ib_end_r - None
+struct ifm_ib_end_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_ib_end_r() : word0(0) {}
+    CONSTEXPR ifm_ib_end_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_ib_end_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_ib_end_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_region_r - None
+struct ifm_region_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_region_r() : word0(0) {}
+    CONSTEXPR ifm_region_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_region_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_region_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_width_m1_r - None
+struct ofm_width_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_width_m1_r() : word0(0) {}
+    CONSTEXPR ofm_width_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_width_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_width_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_height_m1_r - None
+struct ofm_height_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_height_m1_r() : word0(0) {}
+    CONSTEXPR ofm_height_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_height_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_height_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_depth_m1_r - None
+struct ofm_depth_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_depth_m1_r() : word0(0) {}
+    CONSTEXPR ofm_depth_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_depth_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_depth_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_precision_r - None
+struct ofm_precision_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_precision_r() : word0(0) {}
+    CONSTEXPR ofm_precision_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_precision_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_precision_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_blk_width_m1_r - None
+struct ofm_blk_width_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_blk_width_m1_r() : word0(0) {}
+    CONSTEXPR ofm_blk_width_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_blk_width_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_blk_width_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_blk_height_m1_r - None
+struct ofm_blk_height_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_blk_height_m1_r() : word0(0) {}
+    CONSTEXPR ofm_blk_height_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_blk_height_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_blk_height_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_blk_depth_m1_r - None
+struct ofm_blk_depth_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_blk_depth_m1_r() : word0(0) {}
+    CONSTEXPR ofm_blk_depth_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_blk_depth_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_blk_depth_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_zero_point_r - None
+struct ofm_zero_point_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_zero_point_r() : word0(0) {}
+    CONSTEXPR ofm_zero_point_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_zero_point_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_zero_point_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_width0_m1_r - None
+struct ofm_width0_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_width0_m1_r() : word0(0) {}
+    CONSTEXPR ofm_width0_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_width0_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_width0_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_height0_m1_r - None
+struct ofm_height0_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_height0_m1_r() : word0(0) {}
+    CONSTEXPR ofm_height0_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_height0_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_height0_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_height1_m1_r - None
+struct ofm_height1_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_height1_m1_r() : word0(0) {}
+    CONSTEXPR ofm_height1_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_height1_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_height1_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_region_r - None
+struct ofm_region_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_region_r() : word0(0) {}
+    CONSTEXPR ofm_region_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_region_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_region_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// kernel_width_m1_r - None
+struct kernel_width_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR kernel_width_m1_r() : word0(0) {}
+    CONSTEXPR kernel_width_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    kernel_width_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR kernel_width_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// kernel_height_m1_r - None
+struct kernel_height_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR kernel_height_m1_r() : word0(0) {}
+    CONSTEXPR kernel_height_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    kernel_height_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR kernel_height_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// kernel_stride_r - None
+struct kernel_stride_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR kernel_stride_r() : word0(0) {}
+    CONSTEXPR kernel_stride_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    kernel_stride_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR kernel_stride_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// acc_format_r - None
+struct acc_format_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR acc_format_r() : word0(0) {}
+    CONSTEXPR acc_format_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    acc_format_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR acc_format_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// activation_r - None
+struct activation_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR activation_r() : word0(0) {}
+    CONSTEXPR activation_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    activation_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR activation_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// activation_min_r - None
+struct activation_min_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR activation_min_r() : word0(0) {}
+    CONSTEXPR activation_min_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    activation_min_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR activation_min_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// activation_max_r - None
+struct activation_max_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR activation_max_r() : word0(0) {}
+    CONSTEXPR activation_max_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    activation_max_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR activation_max_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// weight_region_r - None
+struct weight_region_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR weight_region_r() : word0(0) {}
+    CONSTEXPR weight_region_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    weight_region_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR weight_region_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// scale_region_r - None
+struct scale_region_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR scale_region_r() : word0(0) {}
+    CONSTEXPR scale_region_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    scale_region_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR scale_region_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ab_start_r - None
+struct ab_start_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ab_start_r() : word0(0) {}
+    CONSTEXPR ab_start_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ab_start_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ab_start_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// blockdep_r - None
+struct blockdep_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR blockdep_r() : word0(0) {}
+    CONSTEXPR blockdep_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    blockdep_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR blockdep_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// dma0_src_region_r - None
+struct dma0_src_region_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR dma0_src_region_r() : word0(0) {}
+    CONSTEXPR dma0_src_region_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    dma0_src_region_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR dma0_src_region_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// dma0_dst_region_r - None
+struct dma0_dst_region_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR dma0_dst_region_r() : word0(0) {}
+    CONSTEXPR dma0_dst_region_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    dma0_dst_region_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR dma0_dst_region_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// dma0_size0_r - None
+struct dma0_size0_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR dma0_size0_r() : word0(0) {}
+    CONSTEXPR dma0_size0_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    dma0_size0_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR dma0_size0_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// dma0_size1_r - None
+struct dma0_size1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR dma0_size1_r() : word0(0) {}
+    CONSTEXPR dma0_size1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    dma0_size1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR dma0_size1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm2_broadcast_r - None
+struct ifm2_broadcast_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm2_broadcast_r() : word0(0) {}
+    CONSTEXPR ifm2_broadcast_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm2_broadcast_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm2_broadcast_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm2_scalar_r - None
+struct ifm2_scalar_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm2_scalar_r() : word0(0) {}
+    CONSTEXPR ifm2_scalar_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm2_scalar_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm2_scalar_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm2_precision_r - None
+struct ifm2_precision_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm2_precision_r() : word0(0) {}
+    CONSTEXPR ifm2_precision_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm2_precision_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm2_precision_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm2_zero_point_r - None
+struct ifm2_zero_point_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm2_zero_point_r() : word0(0) {}
+    CONSTEXPR ifm2_zero_point_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm2_zero_point_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm2_zero_point_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm2_width0_m1_r - None
+struct ifm2_width0_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm2_width0_m1_r() : word0(0) {}
+    CONSTEXPR ifm2_width0_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm2_width0_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm2_width0_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm2_height0_m1_r - None
+struct ifm2_height0_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm2_height0_m1_r() : word0(0) {}
+    CONSTEXPR ifm2_height0_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm2_height0_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm2_height0_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm2_height1_m1_r - None
+struct ifm2_height1_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm2_height1_m1_r() : word0(0) {}
+    CONSTEXPR ifm2_height1_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm2_height1_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm2_height1_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm2_ib_start_r - None
+struct ifm2_ib_start_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm2_ib_start_r() : word0(0) {}
+    CONSTEXPR ifm2_ib_start_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm2_ib_start_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm2_ib_start_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm2_region_r - None
+struct ifm2_region_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm2_region_r() : word0(0) {}
+    CONSTEXPR ifm2_region_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm2_region_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm2_region_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_base0_r - None
+struct ifm_base0_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ifm_base0_r() : word0(0), word1(0) {}
+    CONSTEXPR ifm_base0_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ifm_base0_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ifm_base1_r - None
+struct ifm_base1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ifm_base1_r() : word0(0), word1(0) {}
+    CONSTEXPR ifm_base1_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ifm_base1_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ifm_base2_r - None
+struct ifm_base2_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ifm_base2_r() : word0(0), word1(0) {}
+    CONSTEXPR ifm_base2_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ifm_base2_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ifm_base3_r - None
+struct ifm_base3_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ifm_base3_r() : word0(0), word1(0) {}
+    CONSTEXPR ifm_base3_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ifm_base3_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ifm_stride_x_r - None
+struct ifm_stride_x_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ifm_stride_x_r() : word0(0), word1(0) {}
+    CONSTEXPR ifm_stride_x_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ifm_stride_x_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ifm_stride_y_r - None
+struct ifm_stride_y_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ifm_stride_y_r() : word0(0), word1(0) {}
+    CONSTEXPR ifm_stride_y_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ifm_stride_y_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ifm_stride_c_r - None
+struct ifm_stride_c_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ifm_stride_c_r() : word0(0), word1(0) {}
+    CONSTEXPR ifm_stride_c_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ifm_stride_c_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ofm_base0_r - None
+struct ofm_base0_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ofm_base0_r() : word0(0), word1(0) {}
+    CONSTEXPR ofm_base0_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ofm_base0_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ofm_base1_r - None
+struct ofm_base1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ofm_base1_r() : word0(0), word1(0) {}
+    CONSTEXPR ofm_base1_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ofm_base1_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ofm_base2_r - None
+struct ofm_base2_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ofm_base2_r() : word0(0), word1(0) {}
+    CONSTEXPR ofm_base2_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ofm_base2_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ofm_base3_r - None
+struct ofm_base3_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ofm_base3_r() : word0(0), word1(0) {}
+    CONSTEXPR ofm_base3_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ofm_base3_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ofm_stride_x_r - None
+struct ofm_stride_x_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ofm_stride_x_r() : word0(0), word1(0) {}
+    CONSTEXPR ofm_stride_x_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ofm_stride_x_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ofm_stride_y_r - None
+struct ofm_stride_y_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ofm_stride_y_r() : word0(0), word1(0) {}
+    CONSTEXPR ofm_stride_y_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ofm_stride_y_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ofm_stride_c_r - None
+struct ofm_stride_c_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ofm_stride_c_r() : word0(0), word1(0) {}
+    CONSTEXPR ofm_stride_c_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ofm_stride_c_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// weight_base_r - None
+struct weight_base_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR weight_base_r() : word0(0), word1(0) {}
+    CONSTEXPR weight_base_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    weight_base_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// weight_length_r - None
+struct weight_length_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR weight_length_r() : word0(0) {}
+    CONSTEXPR weight_length_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    weight_length_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR weight_length_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// scale_base_r - None
+struct scale_base_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR scale_base_r() : word0(0), word1(0) {}
+    CONSTEXPR scale_base_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    scale_base_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// scale_length_r - None
+struct scale_length_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR scale_length_r() : word0(0) {}
+    CONSTEXPR scale_length_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    scale_length_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR scale_length_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_scale_r - None
+struct ofm_scale_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_scale_r() : word0(0) {}
+    CONSTEXPR ofm_scale_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_scale_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_scale_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_scale_shift_r - None
+struct ofm_scale_shift_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_scale_shift_r() : word0(0) {}
+    CONSTEXPR ofm_scale_shift_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_scale_shift_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_scale_shift_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// opa_scale_r - None
+struct opa_scale_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR opa_scale_r() : word0(0) {}
+    CONSTEXPR opa_scale_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    opa_scale_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR opa_scale_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// opa_scale_shift_r - None
+struct opa_scale_shift_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR opa_scale_shift_r() : word0(0) {}
+    CONSTEXPR opa_scale_shift_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    opa_scale_shift_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR opa_scale_shift_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// opb_scale_r - None
+struct opb_scale_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR opb_scale_r() : word0(0) {}
+    CONSTEXPR opb_scale_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    opb_scale_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR opb_scale_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// dma0_src_r - None
+struct dma0_src_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR dma0_src_r() : word0(0), word1(0) {}
+    CONSTEXPR dma0_src_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    dma0_src_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// dma0_dst_r - None
+struct dma0_dst_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR dma0_dst_r() : word0(0), word1(0) {}
+    CONSTEXPR dma0_dst_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    dma0_dst_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// dma0_len_r - None
+struct dma0_len_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR dma0_len_r() : word0(0), word1(0) {}
+    CONSTEXPR dma0_len_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    dma0_len_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ifm2_base0_r - None
+struct ifm2_base0_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ifm2_base0_r() : word0(0), word1(0) {}
+    CONSTEXPR ifm2_base0_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ifm2_base0_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ifm2_base1_r - None
+struct ifm2_base1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ifm2_base1_r() : word0(0), word1(0) {}
+    CONSTEXPR ifm2_base1_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ifm2_base1_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ifm2_base2_r - None
+struct ifm2_base2_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ifm2_base2_r() : word0(0), word1(0) {}
+    CONSTEXPR ifm2_base2_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ifm2_base2_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ifm2_base3_r - None
+struct ifm2_base3_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ifm2_base3_r() : word0(0), word1(0) {}
+    CONSTEXPR ifm2_base3_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ifm2_base3_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ifm2_stride_x_r - None
+struct ifm2_stride_x_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ifm2_stride_x_r() : word0(0), word1(0) {}
+    CONSTEXPR ifm2_stride_x_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ifm2_stride_x_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ifm2_stride_y_r - None
+struct ifm2_stride_y_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ifm2_stride_y_r() : word0(0), word1(0) {}
+    CONSTEXPR ifm2_stride_y_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ifm2_stride_y_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ifm2_stride_c_r - None
+struct ifm2_stride_c_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ifm2_stride_c_r() : word0(0), word1(0) {}
+    CONSTEXPR ifm2_stride_c_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ifm2_stride_c_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// revision_r - Internal FPGA build revision: first 32-bits of the Ultan Git hash used for the build
+struct revision_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR revision_r() : word0(0) {}
+    CONSTEXPR revision_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    revision_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR revision_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// pid4_r - Peripheral ID byte 4 (Arm=code 4)
+struct pid4_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t PID4 : 32; // Byte 4 of Peripheral ID (Lower 8 bits valid)
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pid4_r() : word0(4) {}
+    CONSTEXPR pid4_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pid4_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_PID4() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_PID4() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR pid4_r &set_PID4(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// pid5_r - Peripheral ID byte 5 (reserved)
+struct pid5_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t PID5 : 32; // Byte 5 of Peripheral ID (Lower 8 bits valid)
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pid5_r() : word0(0) {}
+    CONSTEXPR pid5_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pid5_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_PID5() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_PID5() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR pid5_r &set_PID5(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// pid6_r - Peripheral ID byte 6 (reserved)
+struct pid6_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t PID6 : 32; // Byte 6 of Peripheral ID (Lower 8 bits valid)
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pid6_r() : word0(0) {}
+    CONSTEXPR pid6_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pid6_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_PID6() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_PID6() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR pid6_r &set_PID6(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// pid7_r - Peripheral ID byte 7 (reserved)
+struct pid7_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t PID7 : 32; // Byte 7 of Peripheral ID (Lower 8 bits valid)
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pid7_r() : word0(0) {}
+    CONSTEXPR pid7_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pid7_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_PID7() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_PID7() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR pid7_r &set_PID7(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// pid0_r - Peripheral ID byte 0. This is bits[7:0] of the part number
+struct pid0_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t PID0 : 32; // Byte 0 of Peripheral ID (Lower 8 bits valid)
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pid0_r() : word0(128) {}
+    CONSTEXPR pid0_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pid0_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_PID0() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_PID0() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR pid0_r &set_PID0(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// pid1_r - Peripheral ID byte 1. This is bits[11:8] of the part number in bits[3:0], and bits[3:0] of the Arm ID in
+// bits[7:4]
+struct pid1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t PID1 : 32; // Byte 1 of Peripheral ID (Lower 8 bits valid)
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pid1_r() : word0(181) {}
+    CONSTEXPR pid1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pid1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_PID1() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_PID1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR pid1_r &set_PID1(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// pid2_r - Peripheral ID byte 2. This is bits[6:4] of the Arm ID in bits[2:0], and bit 3 indicates format B
+struct pid2_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t PID2 : 32; // Byte 2 of Peripheral ID (Lower 8 bits valid)
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pid2_r() : word0(11) {}
+    CONSTEXPR pid2_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pid2_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_PID2() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_PID2() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR pid2_r &set_PID2(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// pid3_r - Peripheral ID byte 3
+struct pid3_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t PID3 : 32; // Byte 1 of Peripheral ID (Lower 8 bits valid)
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pid3_r() : word0(0) {}
+    CONSTEXPR pid3_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pid3_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_PID3() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_PID3() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR pid3_r &set_PID3(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// cid0_r - Component ID byte 0
+struct cid0_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t CID0 : 32; // Byte 0 of Component ID (Lower 8 bits valid)
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR cid0_r() : word0(13) {}
+    CONSTEXPR cid0_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    cid0_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_CID0() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_CID0() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR cid0_r &set_CID0(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// cid1_r - Component ID byte 1
+struct cid1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t CID1 : 32; // Byte 1 of Component ID (Lower 8 bits valid)
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR cid1_r() : word0(240) {}
+    CONSTEXPR cid1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    cid1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_CID1() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_CID1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR cid1_r &set_CID1(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// cid2_r - Component ID byte 2
+struct cid2_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t CID2 : 32; // Byte 2 of Component ID (Lower 8 bits valid)
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR cid2_r() : word0(5) {}
+    CONSTEXPR cid2_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    cid2_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_CID2() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_CID2() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR cid2_r &set_CID2(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// cid3_r - Component ID byte 3
+struct cid3_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t CID3 : 32; // Byte 3 of Component ID (Lower 8 bits valid)
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR cid3_r() : word0(177) {}
+    CONSTEXPR cid3_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    cid3_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_CID3() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_CID3() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR cid3_r &set_CID3(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
 };
 
 struct NPU_REG
 {
-    STRUCT id_r ID;           // 0x0
-    STRUCT status_r STATUS;   // 0x4
-    STRUCT cmd_r CMD;         // 0x8
-    STRUCT reset_r RESET;     // 0xc
-    STRUCT qbase0_r QBASE0;   // 0x10
-    STRUCT qbase1_r QBASE1;   // 0x14
-    STRUCT qread_r QREAD;     // 0x18
-    STRUCT qconfig_r QCONFIG; // 0x1c
-    STRUCT qsize_r QSIZE;     // 0x20
-    STRUCT prot_r PROT;       // 0x24
-    STRUCT config_r CONFIG;   // 0x28
-    STRUCT lock_r LOCK;       // 0x2c
+    STRUCT id_r ID;           // 0x0000
+    STRUCT status_r STATUS;   // 0x0004
+    STRUCT cmd_r CMD;         // 0x0008
+    STRUCT reset_r RESET;     // 0x000C
+    STRUCT qbase_r QBASE;     // 0x0010
+    STRUCT qread_r QREAD;     // 0x0018
+    STRUCT qconfig_r QCONFIG; // 0x001C
+    STRUCT qsize_r QSIZE;     // 0x0020
+    STRUCT prot_r PROT;       // 0x0024
+    STRUCT config_r CONFIG;   // 0x0028
+    STRUCT lock_r LOCK;       // 0x002C
     uint32_t unused0[3];
-    STRUCT regioncfg_r REGIONCFG;   // 0x3c
-    STRUCT axi_limit0_r AXI_LIMIT0; // 0x40
-    STRUCT axi_limit1_r AXI_LIMIT1; // 0x44
-    STRUCT axi_limit2_r AXI_LIMIT2; // 0x48
-    STRUCT axi_limit3_r AXI_LIMIT3; // 0x4c
+    STRUCT regioncfg_r REGIONCFG;   // 0x003C
+    STRUCT axi_limit0_r AXI_LIMIT0; // 0x0040
+    STRUCT axi_limit1_r AXI_LIMIT1; // 0x0044
+    STRUCT axi_limit2_r AXI_LIMIT2; // 0x0048
+    STRUCT axi_limit3_r AXI_LIMIT3; // 0x004C
     uint32_t unused1[12];
-    STRUCT basep0_r BASEP0;   // 0x80
-    STRUCT basep1_r BASEP1;   // 0x84
-    STRUCT basep2_r BASEP2;   // 0x88
-    STRUCT basep3_r BASEP3;   // 0x8c
-    STRUCT basep4_r BASEP4;   // 0x90
-    STRUCT basep5_r BASEP5;   // 0x94
-    STRUCT basep6_r BASEP6;   // 0x98
-    STRUCT basep7_r BASEP7;   // 0x9c
-    STRUCT basep8_r BASEP8;   // 0xa0
-    STRUCT basep9_r BASEP9;   // 0xa4
-    STRUCT basep10_r BASEP10; // 0xa8
-    STRUCT basep11_r BASEP11; // 0xac
-    STRUCT basep12_r BASEP12; // 0xb0
-    STRUCT basep13_r BASEP13; // 0xb4
-    STRUCT basep14_r BASEP14; // 0xb8
-    STRUCT basep15_r BASEP15; // 0xbc
+    STRUCT basep_r BASEP[8]; // 0x0080
     uint32_t unused2[16];
-    STRUCT wd_status_r WD_STATUS;   // 0x100
-    STRUCT mac_status_r MAC_STATUS; // 0x104
-    STRUCT ao_status_r AO_STATUS;   // 0x108
+    STRUCT wd_status_r WD_STATUS;   // 0x0100
+    STRUCT mac_status_r MAC_STATUS; // 0x0104
+    STRUCT ao_status_r AO_STATUS;   // 0x0108
     uint32_t unused3[1];
-    STRUCT dma_status0_r DMA_STATUS0; // 0x110
-    STRUCT dma_status1_r DMA_STATUS1; // 0x114
+    STRUCT dma_status0_r DMA_STATUS0; // 0x0110
+    STRUCT dma_status1_r DMA_STATUS1; // 0x0114
     uint32_t unused4[10];
-    STRUCT clkforce_r CLKFORCE; // 0x140
-    uint32_t DEBUG_ADDRESS;     // 0x144
-    uint32_t DEBUG_MISC;        // 0x148
-    uint32_t DEBUGCORE;         // 0x14c
-    uint32_t DEBUG_BLOCK;       // 0x150
-    uint32_t unused5[11];
-    STRUCT pmcr_r PMCR;             // 0x180
-    STRUCT pmcntenset_r PMCNTENSET; // 0x184
-    STRUCT pmcntenclr_r PMCNTENCLR; // 0x188
-    STRUCT pmovsset_r PMOVSSET;     // 0x18c
-    STRUCT pmovsclr_r PMOVSCLR;     // 0x190
-    STRUCT pmintset_r PMINTSET;     // 0x194
-    STRUCT pmintclr_r PMINTCLR;     // 0x198
-    uint32_t unused6[1];
-    STRUCT pmccntr_lo_r PMCCNTR_LO;   // 0x1a0
-    STRUCT pmccntr_hi_r PMCCNTR_HI;   // 0x1a4
-    STRUCT pmccntr_cfg_r PMCCNTR_CFG; // 0x1a8
-    STRUCT pmcaxi_chan_r PMCAXI_CHAN; // 0x1ac
-    uint32_t unused7[20];
-    uint32_t KERNEL_X;           // 0x200
-    uint32_t KERNEL_Y;           // 0x204
-    uint32_t KERNEL_W_M1;        // 0x208
-    uint32_t KERNEL_H_M1;        // 0x20c
-    uint32_t OFM_CBLK_WIDTH_M1;  // 0x210
-    uint32_t OFM_CBLK_HEIGHT_M1; // 0x214
-    uint32_t OFM_CBLK_DEPTH_M1;  // 0x218
-    uint32_t IFM_CBLK_DEPTH_M1;  // 0x21c
-    uint32_t OFM_X;              // 0x220
-    uint32_t OFM_Y;              // 0x224
-    uint32_t OFM_Z;              // 0x228
-    uint32_t IFM_Z;              // 0x22c
-    uint32_t PAD_TOP;            // 0x230
-    uint32_t PAD_LEFT;           // 0x234
-    uint32_t IFM_CBLK_WIDTH;     // 0x238
-    uint32_t IFM_CBLK_HEIGHT;    // 0x23c
-    uint32_t DMA_IFM_SRC;        // 0x240
-    uint32_t DMA_IFM_SRC_HI;     // 0x244
-    uint32_t DMA_IFM_DST;        // 0x248
-    uint32_t DMA_OFM_SRC;        // 0x24c
-    uint32_t DMA_OFM_DST;        // 0x250
-    uint32_t DMA_OFM_DST_HI;     // 0x254
-    uint32_t DMA_WEIGHT_SRC;     // 0x258
-    uint32_t DMA_WEIGHT_SRC_HI;  // 0x25c
-    uint32_t DMA_CMD_SRC;        // 0x260
-    uint32_t DMA_CMD_SRC_HI;     // 0x264
-    uint32_t DMA_CMD_SIZE;       // 0x268
-    uint32_t DMA_M2M_SRC;        // 0x26c
-    uint32_t DMA_M2M_SRC_HI;     // 0x270
-    uint32_t DMA_M2M_DST;        // 0x274
-    uint32_t DMA_M2M_DST_HI;     // 0x278
-    uint32_t CURRENT_QREAD;      // 0x27c
-    uint32_t DMA_SCALE_SRC;      // 0x280
-    uint32_t DMA_SCALE_SRC_HI;   // 0x284
-    uint32_t unused8[11];
-    uint32_t CURRENT_BLOCK; // 0x2b4
-    uint32_t CURRENT_OP;    // 0x2b8
-    uint32_t CURRENT_CMD;   // 0x2bc
-    uint32_t unused9[16];
-    uint32_t PMEVCNTR[4]; // 0x300
-    uint32_t unused10[28];
-    STRUCT pmevtyper0_r PMEVTYPER[4]; // 0x380
+    STRUCT clkforce_r CLKFORCE;           // 0x0140
+    STRUCT debug_address_r DEBUG_ADDRESS; // 0x0144
+    STRUCT debug_misc_r DEBUG_MISC;       // 0x0148
+    uint32_t unused5[1];
+    STRUCT debug_block_r DEBUG_BLOCK; // 0x0150
+    uint32_t unused6[11];
+    STRUCT pmcr_r PMCR;             // 0x0180
+    STRUCT pmcntenset_r PMCNTENSET; // 0x0184
+    STRUCT pmcntenclr_r PMCNTENCLR; // 0x0188
+    STRUCT pmovsset_r PMOVSSET;     // 0x018C
+    STRUCT pmovsclr_r PMOVSCLR;     // 0x0190
+    STRUCT pmintset_r PMINTSET;     // 0x0194
+    STRUCT pmintclr_r PMINTCLR;     // 0x0198
+    uint32_t unused7[1];
+    STRUCT pmccntr_r PMCCNTR;         // 0x01A0
+    STRUCT pmccntr_cfg_r PMCCNTR_CFG; // 0x01A8
+    STRUCT pmcaxi_chan_r PMCAXI_CHAN; // 0x01AC
+    uint32_t unused8[20];
+    STRUCT kernel_x_r KERNEL_X;                     // 0x0200
+    STRUCT kernel_y_r KERNEL_Y;                     // 0x0204
+    STRUCT kernel_w_m1_r KERNEL_W_M1;               // 0x0208
+    STRUCT kernel_h_m1_r KERNEL_H_M1;               // 0x020C
+    STRUCT ofm_cblk_width_m1_r OFM_CBLK_WIDTH_M1;   // 0x0210
+    STRUCT ofm_cblk_height_m1_r OFM_CBLK_HEIGHT_M1; // 0x0214
+    STRUCT ofm_cblk_depth_m1_r OFM_CBLK_DEPTH_M1;   // 0x0218
+    STRUCT ifm_cblk_depth_m1_r IFM_CBLK_DEPTH_M1;   // 0x021C
+    STRUCT ofm_x_r OFM_X;                           // 0x0220
+    STRUCT ofm_y_r OFM_Y;                           // 0x0224
+    STRUCT ofm_z_r OFM_Z;                           // 0x0228
+    STRUCT ifm_z_r IFM_Z;                           // 0x022C
+    STRUCT pad_top_r PAD_TOP;                       // 0x0230
+    STRUCT pad_left_r PAD_LEFT;                     // 0x0234
+    STRUCT ifm_cblk_width_r IFM_CBLK_WIDTH;         // 0x0238
+    STRUCT ifm_cblk_height_r IFM_CBLK_HEIGHT;       // 0x023C
+    STRUCT dma_ifm_src_r DMA_IFM_SRC;               // 0x0240
+    STRUCT dma_ifm_dst_r DMA_IFM_DST;               // 0x0248
+    STRUCT dma_ofm_src_r DMA_OFM_SRC;               // 0x024C
+    STRUCT dma_ofm_dst_r DMA_OFM_DST;               // 0x0250
+    STRUCT dma_weight_src_r DMA_WEIGHT_SRC;         // 0x0258
+    STRUCT dma_cmd_src_r DMA_CMD_SRC;               // 0x0260
+    STRUCT dma_cmd_size_r DMA_CMD_SIZE;             // 0x0268
+    STRUCT dma_m2m_src_r DMA_M2M_SRC;               // 0x026C
+    STRUCT dma_m2m_dst_r DMA_M2M_DST;               // 0x0274
+    STRUCT current_qread_r CURRENT_QREAD;           // 0x027C
+    STRUCT dma_scale_src_r DMA_SCALE_SRC;           // 0x0280
+    uint32_t unused9[11];
+    STRUCT current_block_r CURRENT_BLOCK; // 0x02B4
+    STRUCT current_op_r CURRENT_OP;       // 0x02B8
+    STRUCT current_cmd_r CURRENT_CMD;     // 0x02BC
+    uint32_t unused10[16];
+    STRUCT pmevcntr_r PMEVCNTR[4]; // 0x0300
     uint32_t unused11[28];
-    uint32_t SHARED_BUFFER[256]; // 0x400
-    uint32_t IFM_PAD_TOP;        // 0x800
-    uint32_t IFM_PAD_LEFT;       // 0x804
-    uint32_t IFM_PAD_RIGHT;      // 0x808
-    uint32_t IFM_PAD_BOTTOM;     // 0x80c
-    uint32_t IFM_DEPTH_M1;       // 0x810
-    uint32_t IFM_PRECISION;      // 0x814
-    uint32_t unused12[1];
-    uint32_t IFM_UPSCALE; // 0x81c
+    STRUCT pmevtyper_r PMEVTYPER[4]; // 0x0380
+    uint32_t unused12[28];
+    STRUCT shared_buffer_r SHARED_BUFFER[256]; // 0x0400
+    STRUCT ifm_pad_top_r IFM_PAD_TOP;          // 0x0800
+    STRUCT ifm_pad_left_r IFM_PAD_LEFT;        // 0x0804
+    STRUCT ifm_pad_right_r IFM_PAD_RIGHT;      // 0x0808
+    STRUCT ifm_pad_bottom_r IFM_PAD_BOTTOM;    // 0x080C
+    STRUCT ifm_depth_m1_r IFM_DEPTH_M1;        // 0x0810
+    STRUCT ifm_precision_r IFM_PRECISION;      // 0x0814
     uint32_t unused13[1];
-    uint32_t IFM_ZERO_POINT; // 0x824
-    uint32_t IFM_WIDTH0_M1;  // 0x828
-    uint32_t IFM_HEIGHT0_M1; // 0x82c
-    uint32_t IFM_HEIGHT1_M1; // 0x830
-    uint32_t IFM_IB_END;     // 0x834
+    STRUCT ifm_upscale_r IFM_UPSCALE; // 0x081C
     uint32_t unused14[1];
-    uint32_t IFM_REGION; // 0x83c
+    STRUCT ifm_zero_point_r IFM_ZERO_POINT; // 0x0824
+    STRUCT ifm_width0_m1_r IFM_WIDTH0_M1;   // 0x0828
+    STRUCT ifm_height0_m1_r IFM_HEIGHT0_M1; // 0x082C
+    STRUCT ifm_height1_m1_r IFM_HEIGHT1_M1; // 0x0830
+    STRUCT ifm_ib_end_r IFM_IB_END;         // 0x0834
     uint32_t unused15[1];
-    uint32_t OFM_WIDTH_M1;      // 0x844
-    uint32_t OFM_HEIGHT_M1;     // 0x848
-    uint32_t OFM_DEPTH_M1;      // 0x84c
-    uint32_t OFM_PRECISION;     // 0x850
-    uint32_t OFM_BLK_WIDTH_M1;  // 0x854
-    uint32_t OFM_BLK_HEIGHT_M1; // 0x858
-    uint32_t OFM_BLK_DEPTH_M1;  // 0x85c
-    uint32_t OFM_ZERO_POINT;    // 0x860
+    STRUCT ifm_region_r IFM_REGION; // 0x083C
     uint32_t unused16[1];
-    uint32_t OFM_WIDTH0_M1;  // 0x868
-    uint32_t OFM_HEIGHT0_M1; // 0x86c
-    uint32_t OFM_HEIGHT1_M1; // 0x870
-    uint32_t unused17[2];
-    uint32_t OFM_REGION;       // 0x87c
-    uint32_t KERNEL_WIDTH_M1;  // 0x880
-    uint32_t KERNEL_HEIGHT_M1; // 0x884
-    uint32_t KERNEL_STRIDE;    // 0x888
-    uint32_t PARALLEL_MODE;    // 0x88c
-    uint32_t ACC_FORMAT;       // 0x890
-    uint32_t ACTIVATION;       // 0x894
-    uint32_t ACTIVATION_MIN;   // 0x898
-    uint32_t ACTIVATION_MAX;   // 0x89c
-    uint32_t WEIGHT_REGION;    // 0x8a0
-    uint32_t SCALE_REGION;     // 0x8a4
-    uint32_t unused18[3];
-    uint32_t AB_START; // 0x8b4
+    STRUCT ofm_width_m1_r OFM_WIDTH_M1;           // 0x0844
+    STRUCT ofm_height_m1_r OFM_HEIGHT_M1;         // 0x0848
+    STRUCT ofm_depth_m1_r OFM_DEPTH_M1;           // 0x084C
+    STRUCT ofm_precision_r OFM_PRECISION;         // 0x0850
+    STRUCT ofm_blk_width_m1_r OFM_BLK_WIDTH_M1;   // 0x0854
+    STRUCT ofm_blk_height_m1_r OFM_BLK_HEIGHT_M1; // 0x0858
+    STRUCT ofm_blk_depth_m1_r OFM_BLK_DEPTH_M1;   // 0x085C
+    STRUCT ofm_zero_point_r OFM_ZERO_POINT;       // 0x0860
+    uint32_t unused17[1];
+    STRUCT ofm_width0_m1_r OFM_WIDTH0_M1;   // 0x0868
+    STRUCT ofm_height0_m1_r OFM_HEIGHT0_M1; // 0x086C
+    STRUCT ofm_height1_m1_r OFM_HEIGHT1_M1; // 0x0870
+    uint32_t unused18[2];
+    STRUCT ofm_region_r OFM_REGION;             // 0x087C
+    STRUCT kernel_width_m1_r KERNEL_WIDTH_M1;   // 0x0880
+    STRUCT kernel_height_m1_r KERNEL_HEIGHT_M1; // 0x0884
+    STRUCT kernel_stride_r KERNEL_STRIDE;       // 0x0888
     uint32_t unused19[1];
-    uint32_t BLOCKDEP;        // 0x8bc
-    uint32_t DMA0_SRC_REGION; // 0x8c0
-    uint32_t DMA0_DST_REGION; // 0x8c4
-    uint32_t DMA0_SIZE0;      // 0x8c8
-    uint32_t DMA0_SIZE1;      // 0x8cc
-    uint32_t unused20[12];
-    uint32_t IFM2_BROADCAST; // 0x900
-    uint32_t IFM2_SCALAR;    // 0x904
-    uint32_t unused21[3];
-    uint32_t IFM2_PRECISION; // 0x914
-    uint32_t unused22[3];
-    uint32_t IFM2_ZERO_POINT; // 0x924
-    uint32_t IFM2_WIDTH0_M1;  // 0x928
-    uint32_t IFM2_HEIGHT0_M1; // 0x92c
-    uint32_t IFM2_HEIGHT1_M1; // 0x930
-    uint32_t IFM2_IB_START;   // 0x934
-    uint32_t unused23[1];
-    uint32_t IFM2_REGION; // 0x93c
-    uint32_t unused24[48];
-    uint32_t IFM_BASE0;       // 0xa00
-    uint32_t IFM_BASE0_HI;    // 0xa04
-    uint32_t IFM_BASE1;       // 0xa08
-    uint32_t IFM_BASE1_HI;    // 0xa0c
-    uint32_t IFM_BASE2;       // 0xa10
-    uint32_t IFM_BASE2_HI;    // 0xa14
-    uint32_t IFM_BASE3;       // 0xa18
-    uint32_t IFM_BASE3_HI;    // 0xa1c
-    uint32_t IFM_STRIDE_X;    // 0xa20
-    uint32_t IFM_STRIDE_X_HI; // 0xa24
-    uint32_t IFM_STRIDE_Y;    // 0xa28
-    uint32_t IFM_STRIDE_Y_HI; // 0xa2c
-    uint32_t IFM_STRIDE_C;    // 0xa30
-    uint32_t IFM_STRIDE_C_HI; // 0xa34
-    uint32_t unused25[2];
-    uint32_t OFM_BASE0;       // 0xa40
-    uint32_t OFM_BASE0_HI;    // 0xa44
-    uint32_t OFM_BASE1;       // 0xa48
-    uint32_t OFM_BASE1_HI;    // 0xa4c
-    uint32_t OFM_BASE2;       // 0xa50
-    uint32_t OFM_BASE2_HI;    // 0xa54
-    uint32_t OFM_BASE3;       // 0xa58
-    uint32_t OFM_BASE3_HI;    // 0xa5c
-    uint32_t OFM_STRIDE_X;    // 0xa60
-    uint32_t OFM_STRIDE_X_HI; // 0xa64
-    uint32_t OFM_STRIDE_Y;    // 0xa68
-    uint32_t OFM_STRIDE_Y_HI; // 0xa6c
-    uint32_t OFM_STRIDE_C;    // 0xa70
-    uint32_t OFM_STRIDE_C_HI; // 0xa74
-    uint32_t unused26[2];
-    uint32_t WEIGHT_BASE;    // 0xa80
-    uint32_t WEIGHT_BASE_HI; // 0xa84
-    uint32_t WEIGHT_LENGTH;  // 0xa88
-    uint32_t unused27[1];
-    uint32_t SCALE_BASE;    // 0xa90
-    uint32_t SCALE_BASE_HI; // 0xa94
-    uint32_t SCALE_LENGTH;  // 0xa98
-    uint32_t unused28[1];
-    uint32_t OFM_SCALE;       // 0xaa0
-    uint32_t OFM_SCALE_SHIFT; // 0xaa4
-    uint32_t OPA_SCALE;       // 0xaa8
-    uint32_t OPA_SCALE_SHIFT; // 0xaac
-    uint32_t OPB_SCALE;       // 0xab0
-    uint32_t unused29[3];
-    uint32_t DMA0_SRC;      // 0xac0
-    uint32_t DMA0_SRC_HI;   // 0xac4
-    uint32_t DMA0_DST;      // 0xac8
-    uint32_t DMA0_DST_HI;   // 0xacc
-    uint32_t DMA0_LEN;      // 0xad0
-    uint32_t DMA0_LEN_HI;   // 0xad4
-    uint32_t DMA0_SKIP0;    // 0xad8
-    uint32_t DMA0_SKIP0_HI; // 0xadc
-    uint32_t DMA0_SKIP1;    // 0xae0
-    uint32_t DMA0_SKIP1_HI; // 0xae4
-    uint32_t unused30[6];
-    uint32_t IFM2_BASE0;       // 0xb00
-    uint32_t IFM2_BASE0_HI;    // 0xb04
-    uint32_t IFM2_BASE1;       // 0xb08
-    uint32_t IFM2_BASE1_HI;    // 0xb0c
-    uint32_t IFM2_BASE2;       // 0xb10
-    uint32_t IFM2_BASE2_HI;    // 0xb14
-    uint32_t IFM2_BASE3;       // 0xb18
-    uint32_t IFM2_BASE3_HI;    // 0xb1c
-    uint32_t IFM2_STRIDE_X;    // 0xb20
-    uint32_t IFM2_STRIDE_X_HI; // 0xb24
-    uint32_t IFM2_STRIDE_Y;    // 0xb28
-    uint32_t IFM2_STRIDE_Y_HI; // 0xb2c
-    uint32_t IFM2_STRIDE_C;    // 0xb30
-    uint32_t IFM2_STRIDE_C_HI; // 0xb34
-    uint32_t unused31[2];
-    uint32_t WEIGHT1_BASE;    // 0xb40
-    uint32_t WEIGHT1_BASE_HI; // 0xb44
-    uint32_t WEIGHT1_LENGTH;  // 0xb48
-    uint32_t unused32[1];
-    uint32_t SCALE1_BASE;    // 0xb50
-    uint32_t SCALE1_BASE_HI; // 0xb54
-    uint32_t SCALE1_LENGTH;  // 0xb58
-    uint32_t unused33[281];
-    uint32_t REVISION; // 0xfc0
-    uint32_t unused34[3];
-    STRUCT pid4_r PID4; // 0xfd0
-    STRUCT pid5_r PID5; // 0xfd4
-    STRUCT pid6_r PID6; // 0xfd8
-    STRUCT pid7_r PID7; // 0xfdc
-    STRUCT pid0_r PID0; // 0xfe0
-    STRUCT pid1_r PID1; // 0xfe4
-    STRUCT pid2_r PID2; // 0xfe8
-    STRUCT pid3_r PID3; // 0xfec
-    STRUCT cid0_r CID0; // 0xff0
-    STRUCT cid1_r CID1; // 0xff4
-    STRUCT cid2_r CID2; // 0xff8
-    STRUCT cid3_r CID3; // 0xffc
+    STRUCT acc_format_r ACC_FORMAT;         // 0x0890
+    STRUCT activation_r ACTIVATION;         // 0x0894
+    STRUCT activation_min_r ACTIVATION_MIN; // 0x0898
+    STRUCT activation_max_r ACTIVATION_MAX; // 0x089C
+    STRUCT weight_region_r WEIGHT_REGION;   // 0x08A0
+    STRUCT scale_region_r SCALE_REGION;     // 0x08A4
+    uint32_t unused20[3];
+    STRUCT ab_start_r AB_START; // 0x08B4
+    uint32_t unused21[1];
+    STRUCT blockdep_r BLOCKDEP;               // 0x08BC
+    STRUCT dma0_src_region_r DMA0_SRC_REGION; // 0x08C0
+    STRUCT dma0_dst_region_r DMA0_DST_REGION; // 0x08C4
+    STRUCT dma0_size0_r DMA0_SIZE0;           // 0x08C8
+    STRUCT dma0_size1_r DMA0_SIZE1;           // 0x08CC
+    uint32_t unused22[12];
+    STRUCT ifm2_broadcast_r IFM2_BROADCAST; // 0x0900
+    STRUCT ifm2_scalar_r IFM2_SCALAR;       // 0x0904
+    uint32_t unused23[3];
+    STRUCT ifm2_precision_r IFM2_PRECISION; // 0x0914
+    uint32_t unused24[3];
+    STRUCT ifm2_zero_point_r IFM2_ZERO_POINT; // 0x0924
+    STRUCT ifm2_width0_m1_r IFM2_WIDTH0_M1;   // 0x0928
+    STRUCT ifm2_height0_m1_r IFM2_HEIGHT0_M1; // 0x092C
+    STRUCT ifm2_height1_m1_r IFM2_HEIGHT1_M1; // 0x0930
+    STRUCT ifm2_ib_start_r IFM2_IB_START;     // 0x0934
+    uint32_t unused25[1];
+    STRUCT ifm2_region_r IFM2_REGION; // 0x093C
+    uint32_t unused26[48];
+    STRUCT ifm_base0_r IFM_BASE0;       // 0x0A00
+    STRUCT ifm_base1_r IFM_BASE1;       // 0x0A08
+    STRUCT ifm_base2_r IFM_BASE2;       // 0x0A10
+    STRUCT ifm_base3_r IFM_BASE3;       // 0x0A18
+    STRUCT ifm_stride_x_r IFM_STRIDE_X; // 0x0A20
+    STRUCT ifm_stride_y_r IFM_STRIDE_Y; // 0x0A28
+    STRUCT ifm_stride_c_r IFM_STRIDE_C; // 0x0A30
+    uint32_t unused27[2];
+    STRUCT ofm_base0_r OFM_BASE0;       // 0x0A40
+    STRUCT ofm_base1_r OFM_BASE1;       // 0x0A48
+    STRUCT ofm_base2_r OFM_BASE2;       // 0x0A50
+    STRUCT ofm_base3_r OFM_BASE3;       // 0x0A58
+    STRUCT ofm_stride_x_r OFM_STRIDE_X; // 0x0A60
+    STRUCT ofm_stride_y_r OFM_STRIDE_Y; // 0x0A68
+    STRUCT ofm_stride_c_r OFM_STRIDE_C; // 0x0A70
+    uint32_t unused28[2];
+    STRUCT weight_base_r WEIGHT_BASE;     // 0x0A80
+    STRUCT weight_length_r WEIGHT_LENGTH; // 0x0A88
+    uint32_t unused29[1];
+    STRUCT scale_base_r SCALE_BASE;     // 0x0A90
+    STRUCT scale_length_r SCALE_LENGTH; // 0x0A98
+    uint32_t unused30[1];
+    STRUCT ofm_scale_r OFM_SCALE;             // 0x0AA0
+    STRUCT ofm_scale_shift_r OFM_SCALE_SHIFT; // 0x0AA4
+    STRUCT opa_scale_r OPA_SCALE;             // 0x0AA8
+    STRUCT opa_scale_shift_r OPA_SCALE_SHIFT; // 0x0AAC
+    STRUCT opb_scale_r OPB_SCALE;             // 0x0AB0
+    uint32_t unused31[3];
+    STRUCT dma0_src_r DMA0_SRC; // 0x0AC0
+    STRUCT dma0_dst_r DMA0_DST; // 0x0AC8
+    STRUCT dma0_len_r DMA0_LEN; // 0x0AD0
+    uint32_t unused32[10];
+    STRUCT ifm2_base0_r IFM2_BASE0;       // 0x0B00
+    STRUCT ifm2_base1_r IFM2_BASE1;       // 0x0B08
+    STRUCT ifm2_base2_r IFM2_BASE2;       // 0x0B10
+    STRUCT ifm2_base3_r IFM2_BASE3;       // 0x0B18
+    STRUCT ifm2_stride_x_r IFM2_STRIDE_X; // 0x0B20
+    STRUCT ifm2_stride_y_r IFM2_STRIDE_Y; // 0x0B28
+    STRUCT ifm2_stride_c_r IFM2_STRIDE_C; // 0x0B30
+    uint32_t unused33[18];
+    uint32_t USER_DEFINED[16]; // 0x0B80
+    uint32_t unused34[256];
+    STRUCT revision_r REVISION; // 0x0FC0
+    uint32_t unused35[3];
+    STRUCT pid4_r PID4; // 0x0FD0
+    STRUCT pid5_r PID5; // 0x0FD4
+    STRUCT pid6_r PID6; // 0x0FD8
+    STRUCT pid7_r PID7; // 0x0FDC
+    STRUCT pid0_r PID0; // 0x0FE0
+    STRUCT pid1_r PID1; // 0x0FE4
+    STRUCT pid2_r PID2; // 0x0FE8
+    STRUCT pid3_r PID3; // 0x0FEC
+    STRUCT cid0_r CID0; // 0x0FF0
+    STRUCT cid1_r CID1; // 0x0FF4
+    STRUCT cid2_r CID2; // 0x0FF8
+    STRUCT cid3_r CID3; // 0x0FFC
+
 #ifdef __cplusplus
+    enum class access_type_t : uint8_t
+    {
+        RW,
+        RO,
+        WO
+    };
     NPU_REG()
     {
         reset();
     }
     void reset()
     {
-        ID                 = 268845313;
-        STATUS             = 8;
-        CMD                = 12;
-        RESET              = 0;
-        QBASE0             = 0;
-        QBASE1             = 0;
-        QREAD              = 0;
-        QCONFIG            = 0;
-        QSIZE              = 0;
-        PROT               = 0;
-        CONFIG             = 0;
-        LOCK               = 0;
-        REGIONCFG          = 0;
-        AXI_LIMIT0         = 0;
-        AXI_LIMIT1         = 0;
-        AXI_LIMIT2         = 0;
-        AXI_LIMIT3         = 0;
-        BASEP0             = 0;
-        BASEP1             = 0;
-        BASEP2             = 0;
-        BASEP3             = 0;
-        BASEP4             = 0;
-        BASEP5             = 0;
-        BASEP6             = 0;
-        BASEP7             = 0;
-        BASEP8             = 0;
-        BASEP9             = 0;
-        BASEP10            = 0;
-        BASEP11            = 0;
-        BASEP12            = 0;
-        BASEP13            = 0;
-        BASEP14            = 0;
-        BASEP15            = 0;
-        REVISION           = 0;
-        PID4               = 4;
-        PID5               = 0;
-        PID6               = 0;
-        PID7               = 0;
-        PID0               = 128;
-        PID1               = 181;
-        PID2               = 11;
-        PID3               = 0;
-        CID0               = 13;
-        CID1               = 240;
-        CID2               = 5;
-        CID3               = 177;
+        ID         = 269500929;
+        STATUS     = 8;
+        CMD        = 12;
+        RESET      = 0;
+        QBASE      = 0;
+        QREAD      = 0;
+        QCONFIG    = 0;
+        QSIZE      = 0;
+        PROT       = 0;
+        CONFIG     = 0;
+        LOCK       = 0;
+        REGIONCFG  = 0;
+        AXI_LIMIT0 = 0;
+        AXI_LIMIT1 = 0;
+        AXI_LIMIT2 = 0;
+        AXI_LIMIT3 = 0;
+        for (size_t i = 0; i < (sizeof(BASEP) / sizeof(BASEP[0])); ++i)
+            BASEP[i] = 0;
         WD_STATUS          = 0;
         MAC_STATUS         = 0;
         AO_STATUS          = 0;
@@ -8141,8 +13775,17 @@
         CLKFORCE           = 0;
         DEBUG_ADDRESS      = 0;
         DEBUG_MISC         = 0;
-        DEBUGCORE          = 0;
         DEBUG_BLOCK        = 0;
+        PMCR               = 8192;
+        PMCNTENSET         = 0;
+        PMCNTENCLR         = 0;
+        PMOVSSET           = 0;
+        PMOVSCLR           = 0;
+        PMINTSET           = 0;
+        PMINTCLR           = 0;
+        PMCCNTR            = 0;
+        PMCCNTR_CFG        = 0;
+        PMCAXI_CHAN        = 0;
         KERNEL_X           = 0;
         KERNEL_Y           = 0;
         KERNEL_W_M1        = 0;
@@ -8160,172 +13803,127 @@
         IFM_CBLK_WIDTH     = 0;
         IFM_CBLK_HEIGHT    = 0;
         DMA_IFM_SRC        = 0;
-        DMA_IFM_SRC_HI     = 0;
         DMA_IFM_DST        = 0;
         DMA_OFM_SRC        = 0;
         DMA_OFM_DST        = 0;
-        DMA_OFM_DST_HI     = 0;
         DMA_WEIGHT_SRC     = 0;
-        DMA_WEIGHT_SRC_HI  = 0;
         DMA_CMD_SRC        = 0;
-        DMA_CMD_SRC_HI     = 0;
         DMA_CMD_SIZE       = 0;
         DMA_M2M_SRC        = 0;
-        DMA_M2M_SRC_HI     = 0;
         DMA_M2M_DST        = 0;
-        DMA_M2M_DST_HI     = 0;
         CURRENT_QREAD      = 0;
         DMA_SCALE_SRC      = 0;
-        DMA_SCALE_SRC_HI   = 0;
         CURRENT_BLOCK      = 0;
         CURRENT_OP         = 0;
         CURRENT_CMD        = 0;
-        IFM_PAD_TOP        = 0;
-        IFM_PAD_LEFT       = 0;
-        IFM_PAD_RIGHT      = 0;
-        IFM_PAD_BOTTOM     = 0;
-        IFM_DEPTH_M1       = 0;
-        IFM_PRECISION      = 0;
-        IFM_UPSCALE        = 0;
-        IFM_ZERO_POINT     = 0;
-        IFM_WIDTH0_M1      = 0;
-        IFM_HEIGHT0_M1     = 0;
-        IFM_HEIGHT1_M1     = 0;
-        IFM_IB_END         = 0;
-        IFM_REGION         = 0;
-        OFM_WIDTH_M1       = 0;
-        OFM_HEIGHT_M1      = 0;
-        OFM_DEPTH_M1       = 0;
-        OFM_PRECISION      = 0;
-        OFM_BLK_WIDTH_M1   = 0;
-        OFM_BLK_HEIGHT_M1  = 0;
-        OFM_BLK_DEPTH_M1   = 0;
-        OFM_ZERO_POINT     = 0;
-        OFM_WIDTH0_M1      = 0;
-        OFM_HEIGHT0_M1     = 0;
-        OFM_HEIGHT1_M1     = 0;
-        OFM_REGION         = 0;
-        KERNEL_WIDTH_M1    = 0;
-        KERNEL_HEIGHT_M1   = 0;
-        KERNEL_STRIDE      = 0;
-        PARALLEL_MODE      = 0;
-        ACC_FORMAT         = 0;
-        ACTIVATION         = 0;
-        ACTIVATION_MIN     = 0;
-        ACTIVATION_MAX     = 0;
-        WEIGHT_REGION      = 0;
-        SCALE_REGION       = 0;
-        AB_START           = 0;
-        BLOCKDEP           = 0;
-        DMA0_SRC_REGION    = 0;
-        DMA0_DST_REGION    = 0;
-        DMA0_SIZE0         = 0;
-        DMA0_SIZE1         = 0;
-        IFM2_BROADCAST     = 0;
-        IFM2_SCALAR        = 0;
-        IFM2_PRECISION     = 0;
-        IFM2_ZERO_POINT    = 0;
-        IFM2_WIDTH0_M1     = 0;
-        IFM2_HEIGHT0_M1    = 0;
-        IFM2_HEIGHT1_M1    = 0;
-        IFM2_IB_START      = 0;
-        IFM2_REGION        = 0;
-        IFM_BASE0          = 0;
-        IFM_BASE0_HI       = 0;
-        IFM_BASE1          = 0;
-        IFM_BASE1_HI       = 0;
-        IFM_BASE2          = 0;
-        IFM_BASE2_HI       = 0;
-        IFM_BASE3          = 0;
-        IFM_BASE3_HI       = 0;
-        IFM_STRIDE_X       = 0;
-        IFM_STRIDE_X_HI    = 0;
-        IFM_STRIDE_Y       = 0;
-        IFM_STRIDE_Y_HI    = 0;
-        IFM_STRIDE_C       = 0;
-        IFM_STRIDE_C_HI    = 0;
-        OFM_BASE0          = 0;
-        OFM_BASE0_HI       = 0;
-        OFM_BASE1          = 0;
-        OFM_BASE1_HI       = 0;
-        OFM_BASE2          = 0;
-        OFM_BASE2_HI       = 0;
-        OFM_BASE3          = 0;
-        OFM_BASE3_HI       = 0;
-        OFM_STRIDE_X       = 0;
-        OFM_STRIDE_X_HI    = 0;
-        OFM_STRIDE_Y       = 0;
-        OFM_STRIDE_Y_HI    = 0;
-        OFM_STRIDE_C       = 0;
-        OFM_STRIDE_C_HI    = 0;
-        WEIGHT_BASE        = 0;
-        WEIGHT_BASE_HI     = 0;
-        WEIGHT_LENGTH      = 0;
-        SCALE_BASE         = 0;
-        SCALE_BASE_HI      = 0;
-        SCALE_LENGTH       = 0;
-        OFM_SCALE          = 0;
-        OFM_SCALE_SHIFT    = 0;
-        OPA_SCALE          = 0;
-        OPA_SCALE_SHIFT    = 0;
-        OPB_SCALE          = 0;
-        DMA0_SRC           = 0;
-        DMA0_SRC_HI        = 0;
-        DMA0_DST           = 0;
-        DMA0_DST_HI        = 0;
-        DMA0_LEN           = 0;
-        DMA0_LEN_HI        = 0;
-        DMA0_SKIP0         = 0;
-        DMA0_SKIP0_HI      = 0;
-        DMA0_SKIP1         = 0;
-        DMA0_SKIP1_HI      = 0;
-        IFM2_BASE0         = 0;
-        IFM2_BASE0_HI      = 0;
-        IFM2_BASE1         = 0;
-        IFM2_BASE1_HI      = 0;
-        IFM2_BASE2         = 0;
-        IFM2_BASE2_HI      = 0;
-        IFM2_BASE3         = 0;
-        IFM2_BASE3_HI      = 0;
-        IFM2_STRIDE_X      = 0;
-        IFM2_STRIDE_X_HI   = 0;
-        IFM2_STRIDE_Y      = 0;
-        IFM2_STRIDE_Y_HI   = 0;
-        IFM2_STRIDE_C      = 0;
-        IFM2_STRIDE_C_HI   = 0;
-        WEIGHT1_BASE       = 0;
-        WEIGHT1_BASE_HI    = 0;
-        WEIGHT1_LENGTH     = 0;
-        SCALE1_BASE        = 0;
-        SCALE1_BASE_HI     = 0;
-        SCALE1_LENGTH      = 0;
-        PMCR               = 8192;
-        PMCNTENSET         = 0;
-        PMCNTENCLR         = 0;
-        PMOVSSET           = 0;
-        PMOVSCLR           = 0;
-        PMINTSET           = 0;
-        PMINTCLR           = 0;
-        PMCCNTR_LO         = 0;
-        PMCCNTR_HI         = 0;
-        PMCCNTR_CFG        = 0;
-        PMCAXI_CHAN        = 0;
         for (size_t i = 0; i < (sizeof(PMEVCNTR) / sizeof(PMEVCNTR[0])); ++i)
             PMEVCNTR[i] = 0;
         for (size_t i = 0; i < (sizeof(PMEVTYPER) / sizeof(PMEVTYPER[0])); ++i)
             PMEVTYPER[i] = 0;
         for (size_t i = 0; i < (sizeof(SHARED_BUFFER) / sizeof(SHARED_BUFFER[0])); ++i)
             SHARED_BUFFER[i] = 0;
+        IFM_PAD_TOP       = 0;
+        IFM_PAD_LEFT      = 0;
+        IFM_PAD_RIGHT     = 0;
+        IFM_PAD_BOTTOM    = 0;
+        IFM_DEPTH_M1      = 0;
+        IFM_PRECISION     = 0;
+        IFM_UPSCALE       = 0;
+        IFM_ZERO_POINT    = 0;
+        IFM_WIDTH0_M1     = 0;
+        IFM_HEIGHT0_M1    = 0;
+        IFM_HEIGHT1_M1    = 0;
+        IFM_IB_END        = 0;
+        IFM_REGION        = 0;
+        OFM_WIDTH_M1      = 0;
+        OFM_HEIGHT_M1     = 0;
+        OFM_DEPTH_M1      = 0;
+        OFM_PRECISION     = 0;
+        OFM_BLK_WIDTH_M1  = 0;
+        OFM_BLK_HEIGHT_M1 = 0;
+        OFM_BLK_DEPTH_M1  = 0;
+        OFM_ZERO_POINT    = 0;
+        OFM_WIDTH0_M1     = 0;
+        OFM_HEIGHT0_M1    = 0;
+        OFM_HEIGHT1_M1    = 0;
+        OFM_REGION        = 0;
+        KERNEL_WIDTH_M1   = 0;
+        KERNEL_HEIGHT_M1  = 0;
+        KERNEL_STRIDE     = 0;
+        ACC_FORMAT        = 0;
+        ACTIVATION        = 0;
+        ACTIVATION_MIN    = 0;
+        ACTIVATION_MAX    = 0;
+        WEIGHT_REGION     = 0;
+        SCALE_REGION      = 0;
+        AB_START          = 0;
+        BLOCKDEP          = 0;
+        DMA0_SRC_REGION   = 0;
+        DMA0_DST_REGION   = 0;
+        DMA0_SIZE0        = 0;
+        DMA0_SIZE1        = 0;
+        IFM2_BROADCAST    = 0;
+        IFM2_SCALAR       = 0;
+        IFM2_PRECISION    = 0;
+        IFM2_ZERO_POINT   = 0;
+        IFM2_WIDTH0_M1    = 0;
+        IFM2_HEIGHT0_M1   = 0;
+        IFM2_HEIGHT1_M1   = 0;
+        IFM2_IB_START     = 0;
+        IFM2_REGION       = 0;
+        IFM_BASE0         = 0;
+        IFM_BASE1         = 0;
+        IFM_BASE2         = 0;
+        IFM_BASE3         = 0;
+        IFM_STRIDE_X      = 0;
+        IFM_STRIDE_Y      = 0;
+        IFM_STRIDE_C      = 0;
+        OFM_BASE0         = 0;
+        OFM_BASE1         = 0;
+        OFM_BASE2         = 0;
+        OFM_BASE3         = 0;
+        OFM_STRIDE_X      = 0;
+        OFM_STRIDE_Y      = 0;
+        OFM_STRIDE_C      = 0;
+        WEIGHT_BASE       = 0;
+        WEIGHT_LENGTH     = 0;
+        SCALE_BASE        = 0;
+        SCALE_LENGTH      = 0;
+        OFM_SCALE         = 0;
+        OFM_SCALE_SHIFT   = 0;
+        OPA_SCALE         = 0;
+        OPA_SCALE_SHIFT   = 0;
+        OPB_SCALE         = 0;
+        DMA0_SRC          = 0;
+        DMA0_DST          = 0;
+        DMA0_LEN          = 0;
+        IFM2_BASE0        = 0;
+        IFM2_BASE1        = 0;
+        IFM2_BASE2        = 0;
+        IFM2_BASE3        = 0;
+        IFM2_STRIDE_X     = 0;
+        IFM2_STRIDE_Y     = 0;
+        IFM2_STRIDE_C     = 0;
+        for (size_t i = 0; i < (sizeof(USER_DEFINED) / sizeof(USER_DEFINED[0])); ++i)
+            USER_DEFINED[i] = 0;
+        REVISION = 0;
+        PID4     = 4;
+        PID5     = 0;
+        PID6     = 0;
+        PID7     = 0;
+        PID0     = 128;
+        PID1     = 181;
+        PID2     = 11;
+        PID3     = 0;
+        CID0     = 13;
+        CID1     = 240;
+        CID2     = 5;
+        CID3     = 177;
     }
     uint32_t &operator[](const int addr_offset)
     {
         return reinterpret_cast<uint32_t *>(this)[addr_offset / 4];
     }
-    enum class access_type_t : bool
-    {
-        RO,
-        RW
-    };
     access_type_t get_access_type(uint32_t offset)
     {
         switch (offset)
@@ -8340,8 +13938,6 @@
             return access_type_t::RW;
         case 16:
             return access_type_t::RW;
-        case 20:
-            return access_type_t::RW;
         case 24:
             return access_type_t::RO;
         case 28:
@@ -8366,62 +13962,20 @@
             return access_type_t::RW;
         case 128:
             return access_type_t::RW;
-        case 132:
-            return access_type_t::RW;
         case 136:
             return access_type_t::RW;
-        case 140:
-            return access_type_t::RW;
         case 144:
             return access_type_t::RW;
-        case 148:
-            return access_type_t::RW;
         case 152:
             return access_type_t::RW;
-        case 156:
-            return access_type_t::RW;
         case 160:
             return access_type_t::RW;
-        case 164:
-            return access_type_t::RW;
         case 168:
             return access_type_t::RW;
-        case 172:
-            return access_type_t::RW;
         case 176:
             return access_type_t::RW;
-        case 180:
-            return access_type_t::RW;
         case 184:
             return access_type_t::RW;
-        case 188:
-            return access_type_t::RW;
-        case 4032:
-            return access_type_t::RO;
-        case 4048:
-            return access_type_t::RO;
-        case 4052:
-            return access_type_t::RO;
-        case 4056:
-            return access_type_t::RO;
-        case 4060:
-            return access_type_t::RO;
-        case 4064:
-            return access_type_t::RO;
-        case 4068:
-            return access_type_t::RO;
-        case 4072:
-            return access_type_t::RO;
-        case 4076:
-            return access_type_t::RO;
-        case 4080:
-            return access_type_t::RO;
-        case 4084:
-            return access_type_t::RO;
-        case 4088:
-            return access_type_t::RO;
-        case 4092:
-            return access_type_t::RO;
         case 256:
             return access_type_t::RO;
         case 260:
@@ -8438,10 +13992,28 @@
             return access_type_t::RW;
         case 328:
             return access_type_t::RW;
-        case 332:
-            return access_type_t::RW;
         case 336:
             return access_type_t::RW;
+        case 384:
+            return access_type_t::RW;
+        case 388:
+            return access_type_t::RW;
+        case 392:
+            return access_type_t::RW;
+        case 396:
+            return access_type_t::RW;
+        case 400:
+            return access_type_t::RW;
+        case 404:
+            return access_type_t::RW;
+        case 408:
+            return access_type_t::RW;
+        case 416:
+            return access_type_t::RW;
+        case 424:
+            return access_type_t::RW;
+        case 428:
+            return access_type_t::RW;
         case 512:
             return access_type_t::RO;
         case 516:
@@ -8476,306 +14048,32 @@
             return access_type_t::RO;
         case 576:
             return access_type_t::RO;
-        case 580:
-            return access_type_t::RO;
         case 584:
             return access_type_t::RO;
         case 588:
             return access_type_t::RO;
         case 592:
             return access_type_t::RO;
-        case 596:
-            return access_type_t::RO;
         case 600:
             return access_type_t::RO;
-        case 604:
-            return access_type_t::RO;
         case 608:
             return access_type_t::RO;
-        case 612:
-            return access_type_t::RO;
         case 616:
             return access_type_t::RO;
         case 620:
             return access_type_t::RO;
-        case 624:
-            return access_type_t::RO;
         case 628:
             return access_type_t::RO;
-        case 632:
-            return access_type_t::RO;
         case 636:
             return access_type_t::RO;
         case 640:
             return access_type_t::RO;
-        case 644:
-            return access_type_t::RO;
         case 692:
             return access_type_t::RO;
         case 696:
             return access_type_t::RO;
         case 700:
             return access_type_t::RO;
-        case 2048:
-            return access_type_t::RW;
-        case 2052:
-            return access_type_t::RW;
-        case 2056:
-            return access_type_t::RW;
-        case 2060:
-            return access_type_t::RW;
-        case 2064:
-            return access_type_t::RW;
-        case 2068:
-            return access_type_t::RW;
-        case 2076:
-            return access_type_t::RW;
-        case 2084:
-            return access_type_t::RW;
-        case 2088:
-            return access_type_t::RW;
-        case 2092:
-            return access_type_t::RW;
-        case 2096:
-            return access_type_t::RW;
-        case 2100:
-            return access_type_t::RW;
-        case 2108:
-            return access_type_t::RW;
-        case 2116:
-            return access_type_t::RW;
-        case 2120:
-            return access_type_t::RW;
-        case 2124:
-            return access_type_t::RW;
-        case 2128:
-            return access_type_t::RW;
-        case 2132:
-            return access_type_t::RW;
-        case 2136:
-            return access_type_t::RW;
-        case 2140:
-            return access_type_t::RW;
-        case 2144:
-            return access_type_t::RW;
-        case 2152:
-            return access_type_t::RW;
-        case 2156:
-            return access_type_t::RW;
-        case 2160:
-            return access_type_t::RW;
-        case 2172:
-            return access_type_t::RW;
-        case 2176:
-            return access_type_t::RW;
-        case 2180:
-            return access_type_t::RW;
-        case 2184:
-            return access_type_t::RW;
-        case 2188:
-            return access_type_t::RW;
-        case 2192:
-            return access_type_t::RW;
-        case 2196:
-            return access_type_t::RW;
-        case 2200:
-            return access_type_t::RW;
-        case 2204:
-            return access_type_t::RW;
-        case 2208:
-            return access_type_t::RW;
-        case 2212:
-            return access_type_t::RW;
-        case 2228:
-            return access_type_t::RW;
-        case 2236:
-            return access_type_t::RW;
-        case 2240:
-            return access_type_t::RW;
-        case 2244:
-            return access_type_t::RW;
-        case 2248:
-            return access_type_t::RW;
-        case 2252:
-            return access_type_t::RW;
-        case 2304:
-            return access_type_t::RW;
-        case 2308:
-            return access_type_t::RW;
-        case 2324:
-            return access_type_t::RW;
-        case 2340:
-            return access_type_t::RW;
-        case 2344:
-            return access_type_t::RW;
-        case 2348:
-            return access_type_t::RW;
-        case 2352:
-            return access_type_t::RW;
-        case 2356:
-            return access_type_t::RW;
-        case 2364:
-            return access_type_t::RW;
-        case 2560:
-            return access_type_t::RW;
-        case 2564:
-            return access_type_t::RW;
-        case 2568:
-            return access_type_t::RW;
-        case 2572:
-            return access_type_t::RW;
-        case 2576:
-            return access_type_t::RW;
-        case 2580:
-            return access_type_t::RW;
-        case 2584:
-            return access_type_t::RW;
-        case 2588:
-            return access_type_t::RW;
-        case 2592:
-            return access_type_t::RW;
-        case 2596:
-            return access_type_t::RW;
-        case 2600:
-            return access_type_t::RW;
-        case 2604:
-            return access_type_t::RW;
-        case 2608:
-            return access_type_t::RW;
-        case 2612:
-            return access_type_t::RW;
-        case 2624:
-            return access_type_t::RW;
-        case 2628:
-            return access_type_t::RW;
-        case 2632:
-            return access_type_t::RW;
-        case 2636:
-            return access_type_t::RW;
-        case 2640:
-            return access_type_t::RW;
-        case 2644:
-            return access_type_t::RW;
-        case 2648:
-            return access_type_t::RW;
-        case 2652:
-            return access_type_t::RW;
-        case 2656:
-            return access_type_t::RW;
-        case 2660:
-            return access_type_t::RW;
-        case 2664:
-            return access_type_t::RW;
-        case 2668:
-            return access_type_t::RW;
-        case 2672:
-            return access_type_t::RW;
-        case 2676:
-            return access_type_t::RW;
-        case 2688:
-            return access_type_t::RW;
-        case 2692:
-            return access_type_t::RW;
-        case 2696:
-            return access_type_t::RW;
-        case 2704:
-            return access_type_t::RW;
-        case 2708:
-            return access_type_t::RW;
-        case 2712:
-            return access_type_t::RW;
-        case 2720:
-            return access_type_t::RW;
-        case 2724:
-            return access_type_t::RW;
-        case 2728:
-            return access_type_t::RW;
-        case 2732:
-            return access_type_t::RW;
-        case 2736:
-            return access_type_t::RW;
-        case 2752:
-            return access_type_t::RW;
-        case 2756:
-            return access_type_t::RW;
-        case 2760:
-            return access_type_t::RW;
-        case 2764:
-            return access_type_t::RW;
-        case 2768:
-            return access_type_t::RW;
-        case 2772:
-            return access_type_t::RW;
-        case 2776:
-            return access_type_t::RW;
-        case 2780:
-            return access_type_t::RW;
-        case 2784:
-            return access_type_t::RW;
-        case 2788:
-            return access_type_t::RW;
-        case 2816:
-            return access_type_t::RW;
-        case 2820:
-            return access_type_t::RW;
-        case 2824:
-            return access_type_t::RW;
-        case 2828:
-            return access_type_t::RW;
-        case 2832:
-            return access_type_t::RW;
-        case 2836:
-            return access_type_t::RW;
-        case 2840:
-            return access_type_t::RW;
-        case 2844:
-            return access_type_t::RW;
-        case 2848:
-            return access_type_t::RW;
-        case 2852:
-            return access_type_t::RW;
-        case 2856:
-            return access_type_t::RW;
-        case 2860:
-            return access_type_t::RW;
-        case 2864:
-            return access_type_t::RW;
-        case 2868:
-            return access_type_t::RW;
-        case 2880:
-            return access_type_t::RW;
-        case 2884:
-            return access_type_t::RW;
-        case 2888:
-            return access_type_t::RW;
-        case 2896:
-            return access_type_t::RW;
-        case 2900:
-            return access_type_t::RW;
-        case 2904:
-            return access_type_t::RW;
-        case 384:
-            return access_type_t::RW;
-        case 388:
-            return access_type_t::RW;
-        case 392:
-            return access_type_t::RW;
-        case 396:
-            return access_type_t::RW;
-        case 400:
-            return access_type_t::RW;
-        case 404:
-            return access_type_t::RW;
-        case 408:
-            return access_type_t::RW;
-        case 416:
-            return access_type_t::RW;
-        case 420:
-            return access_type_t::RW;
-        case 424:
-            return access_type_t::RW;
-        case 428:
-            return access_type_t::RW;
         case 768:
             return access_type_t::RW;
         case 772:
@@ -9304,4492 +14602,8946 @@
             return access_type_t::RW;
         case 2044:
             return access_type_t::RW;
+        case 2048:
+            return access_type_t::RW;
+        case 2052:
+            return access_type_t::RW;
+        case 2056:
+            return access_type_t::RW;
+        case 2060:
+            return access_type_t::RW;
+        case 2064:
+            return access_type_t::RW;
+        case 2068:
+            return access_type_t::RW;
+        case 2076:
+            return access_type_t::RW;
+        case 2084:
+            return access_type_t::RW;
+        case 2088:
+            return access_type_t::RW;
+        case 2092:
+            return access_type_t::RW;
+        case 2096:
+            return access_type_t::RW;
+        case 2100:
+            return access_type_t::RW;
+        case 2108:
+            return access_type_t::RW;
+        case 2116:
+            return access_type_t::RW;
+        case 2120:
+            return access_type_t::RW;
+        case 2124:
+            return access_type_t::RW;
+        case 2128:
+            return access_type_t::RW;
+        case 2132:
+            return access_type_t::RW;
+        case 2136:
+            return access_type_t::RW;
+        case 2140:
+            return access_type_t::RW;
+        case 2144:
+            return access_type_t::RW;
+        case 2152:
+            return access_type_t::RW;
+        case 2156:
+            return access_type_t::RW;
+        case 2160:
+            return access_type_t::RW;
+        case 2172:
+            return access_type_t::RW;
+        case 2176:
+            return access_type_t::RW;
+        case 2180:
+            return access_type_t::RW;
+        case 2184:
+            return access_type_t::RW;
+        case 2192:
+            return access_type_t::RW;
+        case 2196:
+            return access_type_t::RW;
+        case 2200:
+            return access_type_t::RW;
+        case 2204:
+            return access_type_t::RW;
+        case 2208:
+            return access_type_t::RW;
+        case 2212:
+            return access_type_t::RW;
+        case 2228:
+            return access_type_t::RW;
+        case 2236:
+            return access_type_t::RW;
+        case 2240:
+            return access_type_t::RW;
+        case 2244:
+            return access_type_t::RW;
+        case 2248:
+            return access_type_t::RW;
+        case 2252:
+            return access_type_t::RW;
+        case 2304:
+            return access_type_t::RW;
+        case 2308:
+            return access_type_t::RW;
+        case 2324:
+            return access_type_t::RW;
+        case 2340:
+            return access_type_t::RW;
+        case 2344:
+            return access_type_t::RW;
+        case 2348:
+            return access_type_t::RW;
+        case 2352:
+            return access_type_t::RW;
+        case 2356:
+            return access_type_t::RW;
+        case 2364:
+            return access_type_t::RW;
+        case 2560:
+            return access_type_t::RW;
+        case 2568:
+            return access_type_t::RW;
+        case 2576:
+            return access_type_t::RW;
+        case 2584:
+            return access_type_t::RW;
+        case 2592:
+            return access_type_t::RW;
+        case 2600:
+            return access_type_t::RW;
+        case 2608:
+            return access_type_t::RW;
+        case 2624:
+            return access_type_t::RW;
+        case 2632:
+            return access_type_t::RW;
+        case 2640:
+            return access_type_t::RW;
+        case 2648:
+            return access_type_t::RW;
+        case 2656:
+            return access_type_t::RW;
+        case 2664:
+            return access_type_t::RW;
+        case 2672:
+            return access_type_t::RW;
+        case 2688:
+            return access_type_t::RW;
+        case 2696:
+            return access_type_t::RW;
+        case 2704:
+            return access_type_t::RW;
+        case 2712:
+            return access_type_t::RW;
+        case 2720:
+            return access_type_t::RW;
+        case 2724:
+            return access_type_t::RW;
+        case 2728:
+            return access_type_t::RW;
+        case 2732:
+            return access_type_t::RW;
+        case 2736:
+            return access_type_t::RW;
+        case 2752:
+            return access_type_t::RW;
+        case 2760:
+            return access_type_t::RW;
+        case 2768:
+            return access_type_t::RW;
+        case 2816:
+            return access_type_t::RW;
+        case 2824:
+            return access_type_t::RW;
+        case 2832:
+            return access_type_t::RW;
+        case 2840:
+            return access_type_t::RW;
+        case 2848:
+            return access_type_t::RW;
+        case 2856:
+            return access_type_t::RW;
+        case 2864:
+            return access_type_t::RW;
+        case 2944:
+            return access_type_t::RW;
+        case 2952:
+            return access_type_t::RW;
+        case 2960:
+            return access_type_t::RW;
+        case 2968:
+            return access_type_t::RW;
+        case 2976:
+            return access_type_t::RW;
+        case 2984:
+            return access_type_t::RW;
+        case 2992:
+            return access_type_t::RW;
+        case 3000:
+            return access_type_t::RW;
+        case 4032:
+            return access_type_t::RO;
+        case 4048:
+            return access_type_t::RO;
+        case 4052:
+            return access_type_t::RO;
+        case 4056:
+            return access_type_t::RO;
+        case 4060:
+            return access_type_t::RO;
+        case 4064:
+            return access_type_t::RO;
+        case 4068:
+            return access_type_t::RO;
+        case 4072:
+            return access_type_t::RO;
+        case 4076:
+            return access_type_t::RO;
+        case 4080:
+            return access_type_t::RO;
+        case 4084:
+            return access_type_t::RO;
+        case 4088:
+            return access_type_t::RO;
+        case 4092:
+            return access_type_t::RO;
         default:
-            throw std::runtime_error("invalid register address");
+            return access_type_t::RO;
         }
     }
-#endif //__cplusplus
+#endif
 };
 
-// Data structure for commands without payload
-struct command_no_payload_t
+#ifdef __cplusplus
+struct isa
 {
-    uint32_t cmd_code : 10;
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
-#ifdef __cplusplus
-    CONSTEXPR bool valid() const
+#ifdef NPU_DISASSEMBLE
+    static int disassemble(const uint32_t *in,
+                           std::string &op,
+                           std::vector<std::pair<std::string, std::string>> &fields)
     {
-        return must_be_zero0 == 0;
+        switch (*in & 0xffff)
+        {
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_STOP):
+        {
+            const npu_op_stop_t &v = *reinterpret_cast<const npu_op_stop_t *>(in);
+            op                     = "NPU_OP_STOP";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_IRQ):
+        {
+            const npu_op_irq_t &v = *reinterpret_cast<const npu_op_irq_t *>(in);
+            op                    = "NPU_OP_IRQ";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_CONV):
+        {
+            const npu_op_conv_t &v = *reinterpret_cast<const npu_op_conv_t *>(in);
+            op                     = "NPU_OP_CONV";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DEPTHWISE):
+        {
+            const npu_op_depthwise_t &v = *reinterpret_cast<const npu_op_depthwise_t *>(in);
+            op                          = "NPU_OP_DEPTHWISE";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_POOL):
+        {
+            const npu_op_pool_t &v = *reinterpret_cast<const npu_op_pool_t *>(in);
+            op                     = "NPU_OP_POOL";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_ELEMENTWISE):
+        {
+            const npu_op_elementwise_t &v = *reinterpret_cast<const npu_op_elementwise_t *>(in);
+            op                            = "NPU_OP_ELEMENTWISE";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DMA_START):
+        {
+            const npu_op_dma_start_t &v = *reinterpret_cast<const npu_op_dma_start_t *>(in);
+            op                          = "NPU_OP_DMA_START";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DMA_WAIT):
+        {
+            const npu_op_dma_wait_t &v = *reinterpret_cast<const npu_op_dma_wait_t *>(in);
+            op                         = "NPU_OP_DMA_WAIT";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_KERNEL_WAIT):
+        {
+            const npu_op_kernel_wait_t &v = *reinterpret_cast<const npu_op_kernel_wait_t *>(in);
+            op                            = "NPU_OP_KERNEL_WAIT";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_PMU_MASK):
+        {
+            const npu_op_pmu_mask_t &v = *reinterpret_cast<const npu_op_pmu_mask_t *>(in);
+            op                         = "NPU_OP_PMU_MASK";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_TOP):
+        {
+            const npu_set_ifm_pad_top_t &v = *reinterpret_cast<const npu_set_ifm_pad_top_t *>(in);
+            op                             = "NPU_SET_IFM_PAD_TOP";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_LEFT):
+        {
+            const npu_set_ifm_pad_left_t &v = *reinterpret_cast<const npu_set_ifm_pad_left_t *>(in);
+            op                              = "NPU_SET_IFM_PAD_LEFT";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_RIGHT):
+        {
+            const npu_set_ifm_pad_right_t &v = *reinterpret_cast<const npu_set_ifm_pad_right_t *>(in);
+            op                               = "NPU_SET_IFM_PAD_RIGHT";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_BOTTOM):
+        {
+            const npu_set_ifm_pad_bottom_t &v = *reinterpret_cast<const npu_set_ifm_pad_bottom_t *>(in);
+            op                                = "NPU_SET_IFM_PAD_BOTTOM";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_DEPTH_M1):
+        {
+            const npu_set_ifm_depth_m1_t &v = *reinterpret_cast<const npu_set_ifm_depth_m1_t *>(in);
+            op                              = "NPU_SET_IFM_DEPTH_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PRECISION):
+        {
+            const npu_set_ifm_precision_t &v = *reinterpret_cast<const npu_set_ifm_precision_t *>(in);
+            op                               = "NPU_SET_IFM_PRECISION";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_UPSCALE):
+        {
+            const npu_set_ifm_upscale_t &v = *reinterpret_cast<const npu_set_ifm_upscale_t *>(in);
+            op                             = "NPU_SET_IFM_UPSCALE";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_ZERO_POINT):
+        {
+            const npu_set_ifm_zero_point_t &v = *reinterpret_cast<const npu_set_ifm_zero_point_t *>(in);
+            op                                = "NPU_SET_IFM_ZERO_POINT";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_WIDTH0_M1):
+        {
+            const npu_set_ifm_width0_m1_t &v = *reinterpret_cast<const npu_set_ifm_width0_m1_t *>(in);
+            op                               = "NPU_SET_IFM_WIDTH0_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT0_M1):
+        {
+            const npu_set_ifm_height0_m1_t &v = *reinterpret_cast<const npu_set_ifm_height0_m1_t *>(in);
+            op                                = "NPU_SET_IFM_HEIGHT0_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT1_M1):
+        {
+            const npu_set_ifm_height1_m1_t &v = *reinterpret_cast<const npu_set_ifm_height1_m1_t *>(in);
+            op                                = "NPU_SET_IFM_HEIGHT1_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_IB_END):
+        {
+            const npu_set_ifm_ib_end_t &v = *reinterpret_cast<const npu_set_ifm_ib_end_t *>(in);
+            op                            = "NPU_SET_IFM_IB_END";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_REGION):
+        {
+            const npu_set_ifm_region_t &v = *reinterpret_cast<const npu_set_ifm_region_t *>(in);
+            op                            = "NPU_SET_IFM_REGION";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH_M1):
+        {
+            const npu_set_ofm_width_m1_t &v = *reinterpret_cast<const npu_set_ofm_width_m1_t *>(in);
+            op                              = "NPU_SET_OFM_WIDTH_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT_M1):
+        {
+            const npu_set_ofm_height_m1_t &v = *reinterpret_cast<const npu_set_ofm_height_m1_t *>(in);
+            op                               = "NPU_SET_OFM_HEIGHT_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_DEPTH_M1):
+        {
+            const npu_set_ofm_depth_m1_t &v = *reinterpret_cast<const npu_set_ofm_depth_m1_t *>(in);
+            op                              = "NPU_SET_OFM_DEPTH_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_PRECISION):
+        {
+            const npu_set_ofm_precision_t &v = *reinterpret_cast<const npu_set_ofm_precision_t *>(in);
+            op                               = "NPU_SET_OFM_PRECISION";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_WIDTH_M1):
+        {
+            const npu_set_ofm_blk_width_m1_t &v = *reinterpret_cast<const npu_set_ofm_blk_width_m1_t *>(in);
+            op                                  = "NPU_SET_OFM_BLK_WIDTH_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_HEIGHT_M1):
+        {
+            const npu_set_ofm_blk_height_m1_t &v = *reinterpret_cast<const npu_set_ofm_blk_height_m1_t *>(in);
+            op                                   = "NPU_SET_OFM_BLK_HEIGHT_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_DEPTH_M1):
+        {
+            const npu_set_ofm_blk_depth_m1_t &v = *reinterpret_cast<const npu_set_ofm_blk_depth_m1_t *>(in);
+            op                                  = "NPU_SET_OFM_BLK_DEPTH_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_ZERO_POINT):
+        {
+            const npu_set_ofm_zero_point_t &v = *reinterpret_cast<const npu_set_ofm_zero_point_t *>(in);
+            op                                = "NPU_SET_OFM_ZERO_POINT";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH0_M1):
+        {
+            const npu_set_ofm_width0_m1_t &v = *reinterpret_cast<const npu_set_ofm_width0_m1_t *>(in);
+            op                               = "NPU_SET_OFM_WIDTH0_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT0_M1):
+        {
+            const npu_set_ofm_height0_m1_t &v = *reinterpret_cast<const npu_set_ofm_height0_m1_t *>(in);
+            op                                = "NPU_SET_OFM_HEIGHT0_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT1_M1):
+        {
+            const npu_set_ofm_height1_m1_t &v = *reinterpret_cast<const npu_set_ofm_height1_m1_t *>(in);
+            op                                = "NPU_SET_OFM_HEIGHT1_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_REGION):
+        {
+            const npu_set_ofm_region_t &v = *reinterpret_cast<const npu_set_ofm_region_t *>(in);
+            op                            = "NPU_SET_OFM_REGION";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_WIDTH_M1):
+        {
+            const npu_set_kernel_width_m1_t &v = *reinterpret_cast<const npu_set_kernel_width_m1_t *>(in);
+            op                                 = "NPU_SET_KERNEL_WIDTH_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_HEIGHT_M1):
+        {
+            const npu_set_kernel_height_m1_t &v = *reinterpret_cast<const npu_set_kernel_height_m1_t *>(in);
+            op                                  = "NPU_SET_KERNEL_HEIGHT_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_STRIDE):
+        {
+            const npu_set_kernel_stride_t &v = *reinterpret_cast<const npu_set_kernel_stride_t *>(in);
+            op                               = "NPU_SET_KERNEL_STRIDE";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACC_FORMAT):
+        {
+            const npu_set_acc_format_t &v = *reinterpret_cast<const npu_set_acc_format_t *>(in);
+            op                            = "NPU_SET_ACC_FORMAT";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION):
+        {
+            const npu_set_activation_t &v = *reinterpret_cast<const npu_set_activation_t *>(in);
+            op                            = "NPU_SET_ACTIVATION";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MIN):
+        {
+            const npu_set_activation_min_t &v = *reinterpret_cast<const npu_set_activation_min_t *>(in);
+            op                                = "NPU_SET_ACTIVATION_MIN";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MAX):
+        {
+            const npu_set_activation_max_t &v = *reinterpret_cast<const npu_set_activation_max_t *>(in);
+            op                                = "NPU_SET_ACTIVATION_MAX";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_WEIGHT_REGION):
+        {
+            const npu_set_weight_region_t &v = *reinterpret_cast<const npu_set_weight_region_t *>(in);
+            op                               = "NPU_SET_WEIGHT_REGION";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_SCALE_REGION):
+        {
+            const npu_set_scale_region_t &v = *reinterpret_cast<const npu_set_scale_region_t *>(in);
+            op                              = "NPU_SET_SCALE_REGION";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_AB_START):
+        {
+            const npu_set_ab_start_t &v = *reinterpret_cast<const npu_set_ab_start_t *>(in);
+            op                          = "NPU_SET_AB_START";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_BLOCKDEP):
+        {
+            const npu_set_blockdep_t &v = *reinterpret_cast<const npu_set_blockdep_t *>(in);
+            op                          = "NPU_SET_BLOCKDEP";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SRC_REGION):
+        {
+            const npu_set_dma0_src_region_t &v = *reinterpret_cast<const npu_set_dma0_src_region_t *>(in);
+            op                                 = "NPU_SET_DMA0_SRC_REGION";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_DST_REGION):
+        {
+            const npu_set_dma0_dst_region_t &v = *reinterpret_cast<const npu_set_dma0_dst_region_t *>(in);
+            op                                 = "NPU_SET_DMA0_DST_REGION";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE0):
+        {
+            const npu_set_dma0_size0_t &v = *reinterpret_cast<const npu_set_dma0_size0_t *>(in);
+            op                            = "NPU_SET_DMA0_SIZE0";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE1):
+        {
+            const npu_set_dma0_size1_t &v = *reinterpret_cast<const npu_set_dma0_size1_t *>(in);
+            op                            = "NPU_SET_DMA0_SIZE1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_BROADCAST):
+        {
+            const npu_set_ifm2_broadcast_t &v = *reinterpret_cast<const npu_set_ifm2_broadcast_t *>(in);
+            op                                = "NPU_SET_IFM2_BROADCAST";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_SCALAR):
+        {
+            const npu_set_ifm2_scalar_t &v = *reinterpret_cast<const npu_set_ifm2_scalar_t *>(in);
+            op                             = "NPU_SET_IFM2_SCALAR";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_PRECISION):
+        {
+            const npu_set_ifm2_precision_t &v = *reinterpret_cast<const npu_set_ifm2_precision_t *>(in);
+            op                                = "NPU_SET_IFM2_PRECISION";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_ZERO_POINT):
+        {
+            const npu_set_ifm2_zero_point_t &v = *reinterpret_cast<const npu_set_ifm2_zero_point_t *>(in);
+            op                                 = "NPU_SET_IFM2_ZERO_POINT";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_WIDTH0_M1):
+        {
+            const npu_set_ifm2_width0_m1_t &v = *reinterpret_cast<const npu_set_ifm2_width0_m1_t *>(in);
+            op                                = "NPU_SET_IFM2_WIDTH0_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT0_M1):
+        {
+            const npu_set_ifm2_height0_m1_t &v = *reinterpret_cast<const npu_set_ifm2_height0_m1_t *>(in);
+            op                                 = "NPU_SET_IFM2_HEIGHT0_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT1_M1):
+        {
+            const npu_set_ifm2_height1_m1_t &v = *reinterpret_cast<const npu_set_ifm2_height1_m1_t *>(in);
+            op                                 = "NPU_SET_IFM2_HEIGHT1_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_IB_START):
+        {
+            const npu_set_ifm2_ib_start_t &v = *reinterpret_cast<const npu_set_ifm2_ib_start_t *>(in);
+            op                               = "NPU_SET_IFM2_IB_START";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_REGION):
+        {
+            const npu_set_ifm2_region_t &v = *reinterpret_cast<const npu_set_ifm2_region_t *>(in);
+            op                             = "NPU_SET_IFM2_REGION";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE0):
+        {
+            const npu_set_ifm_base0_t &v = *reinterpret_cast<const npu_set_ifm_base0_t *>(in);
+            op                           = "NPU_SET_IFM_BASE0";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE1):
+        {
+            const npu_set_ifm_base1_t &v = *reinterpret_cast<const npu_set_ifm_base1_t *>(in);
+            op                           = "NPU_SET_IFM_BASE1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE2):
+        {
+            const npu_set_ifm_base2_t &v = *reinterpret_cast<const npu_set_ifm_base2_t *>(in);
+            op                           = "NPU_SET_IFM_BASE2";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE3):
+        {
+            const npu_set_ifm_base3_t &v = *reinterpret_cast<const npu_set_ifm_base3_t *>(in);
+            op                           = "NPU_SET_IFM_BASE3";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_X):
+        {
+            const npu_set_ifm_stride_x_t &v = *reinterpret_cast<const npu_set_ifm_stride_x_t *>(in);
+            op                              = "NPU_SET_IFM_STRIDE_X";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_Y):
+        {
+            const npu_set_ifm_stride_y_t &v = *reinterpret_cast<const npu_set_ifm_stride_y_t *>(in);
+            op                              = "NPU_SET_IFM_STRIDE_Y";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_C):
+        {
+            const npu_set_ifm_stride_c_t &v = *reinterpret_cast<const npu_set_ifm_stride_c_t *>(in);
+            op                              = "NPU_SET_IFM_STRIDE_C";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE0):
+        {
+            const npu_set_ofm_base0_t &v = *reinterpret_cast<const npu_set_ofm_base0_t *>(in);
+            op                           = "NPU_SET_OFM_BASE0";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE1):
+        {
+            const npu_set_ofm_base1_t &v = *reinterpret_cast<const npu_set_ofm_base1_t *>(in);
+            op                           = "NPU_SET_OFM_BASE1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE2):
+        {
+            const npu_set_ofm_base2_t &v = *reinterpret_cast<const npu_set_ofm_base2_t *>(in);
+            op                           = "NPU_SET_OFM_BASE2";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE3):
+        {
+            const npu_set_ofm_base3_t &v = *reinterpret_cast<const npu_set_ofm_base3_t *>(in);
+            op                           = "NPU_SET_OFM_BASE3";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_X):
+        {
+            const npu_set_ofm_stride_x_t &v = *reinterpret_cast<const npu_set_ofm_stride_x_t *>(in);
+            op                              = "NPU_SET_OFM_STRIDE_X";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_Y):
+        {
+            const npu_set_ofm_stride_y_t &v = *reinterpret_cast<const npu_set_ofm_stride_y_t *>(in);
+            op                              = "NPU_SET_OFM_STRIDE_Y";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_C):
+        {
+            const npu_set_ofm_stride_c_t &v = *reinterpret_cast<const npu_set_ofm_stride_c_t *>(in);
+            op                              = "NPU_SET_OFM_STRIDE_C";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_BASE):
+        {
+            const npu_set_weight_base_t &v = *reinterpret_cast<const npu_set_weight_base_t *>(in);
+            op                             = "NPU_SET_WEIGHT_BASE";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_LENGTH):
+        {
+            const npu_set_weight_length_t &v = *reinterpret_cast<const npu_set_weight_length_t *>(in);
+            op                               = "NPU_SET_WEIGHT_LENGTH";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_BASE):
+        {
+            const npu_set_scale_base_t &v = *reinterpret_cast<const npu_set_scale_base_t *>(in);
+            op                            = "NPU_SET_SCALE_BASE";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_LENGTH):
+        {
+            const npu_set_scale_length_t &v = *reinterpret_cast<const npu_set_scale_length_t *>(in);
+            op                              = "NPU_SET_SCALE_LENGTH";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_SCALE):
+        {
+            const npu_set_ofm_scale_t &v = *reinterpret_cast<const npu_set_ofm_scale_t *>(in);
+            op                           = "NPU_SET_OFM_SCALE";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPA_SCALE):
+        {
+            const npu_set_opa_scale_t &v = *reinterpret_cast<const npu_set_opa_scale_t *>(in);
+            op                           = "NPU_SET_OPA_SCALE";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPB_SCALE):
+        {
+            const npu_set_opb_scale_t &v = *reinterpret_cast<const npu_set_opb_scale_t *>(in);
+            op                           = "NPU_SET_OPB_SCALE";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SRC):
+        {
+            const npu_set_dma0_src_t &v = *reinterpret_cast<const npu_set_dma0_src_t *>(in);
+            op                          = "NPU_SET_DMA0_SRC";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_DST):
+        {
+            const npu_set_dma0_dst_t &v = *reinterpret_cast<const npu_set_dma0_dst_t *>(in);
+            op                          = "NPU_SET_DMA0_DST";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_LEN):
+        {
+            const npu_set_dma0_len_t &v = *reinterpret_cast<const npu_set_dma0_len_t *>(in);
+            op                          = "NPU_SET_DMA0_LEN";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE0):
+        {
+            const npu_set_ifm2_base0_t &v = *reinterpret_cast<const npu_set_ifm2_base0_t *>(in);
+            op                            = "NPU_SET_IFM2_BASE0";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE1):
+        {
+            const npu_set_ifm2_base1_t &v = *reinterpret_cast<const npu_set_ifm2_base1_t *>(in);
+            op                            = "NPU_SET_IFM2_BASE1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE2):
+        {
+            const npu_set_ifm2_base2_t &v = *reinterpret_cast<const npu_set_ifm2_base2_t *>(in);
+            op                            = "NPU_SET_IFM2_BASE2";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE3):
+        {
+            const npu_set_ifm2_base3_t &v = *reinterpret_cast<const npu_set_ifm2_base3_t *>(in);
+            op                            = "NPU_SET_IFM2_BASE3";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_X):
+        {
+            const npu_set_ifm2_stride_x_t &v = *reinterpret_cast<const npu_set_ifm2_stride_x_t *>(in);
+            op                               = "NPU_SET_IFM2_STRIDE_X";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_Y):
+        {
+            const npu_set_ifm2_stride_y_t &v = *reinterpret_cast<const npu_set_ifm2_stride_y_t *>(in);
+            op                               = "NPU_SET_IFM2_STRIDE_Y";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_C):
+        {
+            const npu_set_ifm2_stride_c_t &v = *reinterpret_cast<const npu_set_ifm2_stride_c_t *>(in);
+            op                               = "NPU_SET_IFM2_STRIDE_C";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED0):
+        {
+            const npu_set_user_defined0_t &v = *reinterpret_cast<const npu_set_user_defined0_t *>(in);
+            op                               = "NPU_SET_USER_DEFINED0";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED1):
+        {
+            const npu_set_user_defined1_t &v = *reinterpret_cast<const npu_set_user_defined1_t *>(in);
+            op                               = "NPU_SET_USER_DEFINED1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED2):
+        {
+            const npu_set_user_defined2_t &v = *reinterpret_cast<const npu_set_user_defined2_t *>(in);
+            op                               = "NPU_SET_USER_DEFINED2";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED3):
+        {
+            const npu_set_user_defined3_t &v = *reinterpret_cast<const npu_set_user_defined3_t *>(in);
+            op                               = "NPU_SET_USER_DEFINED3";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED4):
+        {
+            const npu_set_user_defined4_t &v = *reinterpret_cast<const npu_set_user_defined4_t *>(in);
+            op                               = "NPU_SET_USER_DEFINED4";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED5):
+        {
+            const npu_set_user_defined5_t &v = *reinterpret_cast<const npu_set_user_defined5_t *>(in);
+            op                               = "NPU_SET_USER_DEFINED5";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED6):
+        {
+            const npu_set_user_defined6_t &v = *reinterpret_cast<const npu_set_user_defined6_t *>(in);
+            op                               = "NPU_SET_USER_DEFINED6";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED7):
+        {
+            const npu_set_user_defined7_t &v = *reinterpret_cast<const npu_set_user_defined7_t *>(in);
+            op                               = "NPU_SET_USER_DEFINED7";
+            v.disassemble(fields);
+            break;
+        }
+        }
+        return (*in & (3 << 14)) != 0 ? 2 : 1;
     }
-    CONSTEXPR void init()
+#endif
+#endif
+    // Signal the end of command stream
+    struct npu_op_stop_t
     {
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t mask : 16;   //  Encoding for 16-bit mask value
+#ifdef __cplusplus
+      public:
+        npu_op_stop_t(uint32_t _mask) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_STOP)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            mask(static_cast<uint16_t>(_mask) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_op_stop_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_STOP)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), mask(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_STOP) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_STOP);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_op_stop_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_op_stop_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_mask() const
+        {
+            return static_cast<uint32_t>(mask);
+        }
+        CONSTEXPR npu_op_stop_t &set_mask(uint32_t value)
+        {
+            mask = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("mask", std::to_string(mask)));
+        }
+#endif
+#endif
+    };
+    // Raises an IRQ to the host
+    struct npu_op_irq_t
     {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR command_no_payload_t &set_cmd_code(::cmd0 value)
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t mask : 16;   //  Encoding for 16-bit mask value
+#ifdef __cplusplus
+      public:
+        npu_op_irq_t(uint32_t _mask) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_IRQ)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            mask(static_cast<uint16_t>(_mask) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_op_irq_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_IRQ)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), mask(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_IRQ) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_IRQ);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_op_irq_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_op_irq_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_mask() const
+        {
+            return static_cast<uint32_t>(mask);
+        }
+        CONSTEXPR npu_op_irq_t &set_mask(uint32_t value)
+        {
+            mask = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("mask", std::to_string(mask)));
+        }
+#endif
+#endif
+    };
+    // 2D convolution
+    struct npu_op_conv_t
     {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+#ifdef __cplusplus
+      public:
+        CONSTEXPR npu_op_conv_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_CONV)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_CONV) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_CONV);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_op_conv_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_op_conv_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const {}
+#endif
+#endif
+    };
+    // Depth-wise 2D convolution
+    struct npu_op_depthwise_t
     {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR command_no_payload_t &set_param(uint32_t value)
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+#ifdef __cplusplus
+      public:
+        CONSTEXPR npu_op_depthwise_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DEPTHWISE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DEPTHWISE) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DEPTHWISE);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_op_depthwise_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_op_depthwise_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const {}
+#endif
+#endif
+    };
+    // Pooling
+    struct npu_op_pool_t
     {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Data structure for commands with payload
-struct command_with_payload_t
-{
-    uint32_t cmd_code : 10;
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t param : 16;
-    uint32_t data : 32;
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;      //  control
+        uint32_t pooling_mode : 3; //  Pooling mode
+        uint32_t reserved1 : 13;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
+      public:
+        npu_op_pool_t(NPU_NAMESPACE::pooling_mode _pooling_mode) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_POOL)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            pooling_mode(static_cast<uint8_t>(_pooling_mode) & ((1U << 3) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_op_pool_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_POOL)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), pooling_mode(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_POOL) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_POOL);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_op_pool_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_op_pool_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::pooling_mode get_pooling_mode() const
+        {
+            return static_cast<NPU_NAMESPACE::pooling_mode>(pooling_mode);
+        }
+        CONSTEXPR npu_op_pool_t &set_pooling_mode(NPU_NAMESPACE::pooling_mode value)
+        {
+            pooling_mode = static_cast<uint8_t>(value) & ((1U << 3) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "pooling_mode",
+                (pooling_mode < (sizeof(pooling_mode_str) / sizeof(pooling_mode_str[0])) ?
+                     pooling_mode_str[pooling_mode] :
+                     "****")));
+        }
+#endif
+#endif
+    };
+    // Elementwise operation
+    struct npu_op_elementwise_t
     {
-        return must_be_zero == 0 && payload_size >= 1 && payload_size <= 2;
-    }
-    CONSTEXPR void init()
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;          //  control
+        uint32_t elementwise_mode : 6; //  Elementwise mode
+        uint32_t reserved1 : 10;
+#ifdef __cplusplus
+      public:
+        npu_op_elementwise_t(NPU_NAMESPACE::elementwise_mode _elementwise_mode) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_ELEMENTWISE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            elementwise_mode(static_cast<uint8_t>(_elementwise_mode) & ((1U << 6) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_op_elementwise_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_ELEMENTWISE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), elementwise_mode(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_ELEMENTWISE) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_ELEMENTWISE);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_op_elementwise_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_op_elementwise_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::elementwise_mode get_elementwise_mode() const
+        {
+            return static_cast<NPU_NAMESPACE::elementwise_mode>(elementwise_mode);
+        }
+        CONSTEXPR npu_op_elementwise_t &set_elementwise_mode(NPU_NAMESPACE::elementwise_mode value)
+        {
+            elementwise_mode = static_cast<uint8_t>(value) & ((1U << 6) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "elementwise_mode",
+                (elementwise_mode < (sizeof(elementwise_mode_str) / sizeof(elementwise_mode_str[0])) ?
+                     elementwise_mode_str[elementwise_mode] :
+                     "****")));
+        }
+#endif
+#endif
+    };
+    // Queue new DMA for the given channel
+    struct npu_op_dma_start_t
     {
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+#ifdef __cplusplus
+      public:
+        CONSTEXPR npu_op_dma_start_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DMA_START)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DMA_START) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DMA_START);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_op_dma_start_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_op_dma_start_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const {}
+#endif
+#endif
+    };
+    // Wait for the DMA channel to have k or fewer active descriptors outstanding
+    struct npu_op_dma_wait_t
     {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR command_with_payload_t &set_cmd_code(::cmd1 value)
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t k : 4;       //  Number of outstanding descriptors
+        uint32_t reserved1 : 12;
+#ifdef __cplusplus
+      public:
+        npu_op_dma_wait_t(uint32_t _k) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DMA_WAIT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            k(static_cast<uint8_t>(_k) & ((1U << 4) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_op_dma_wait_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DMA_WAIT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), k(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DMA_WAIT) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DMA_WAIT);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_op_dma_wait_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_op_dma_wait_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_k() const
+        {
+            return static_cast<uint32_t>(k);
+        }
+        CONSTEXPR npu_op_dma_wait_t &set_k(uint32_t value)
+        {
+            k = static_cast<uint8_t>(value) & ((1U << 4) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("k", std::to_string(k)));
+        }
+#endif
+#endif
+    };
+    // Wait for n or fewer kernel operations to be remaining
+    struct npu_op_kernel_wait_t
     {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t n : 2;       //  Number of kernel operations in range 0-3
+        uint32_t reserved1 : 14;
+#ifdef __cplusplus
+      public:
+        npu_op_kernel_wait_t(uint32_t _n) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_KERNEL_WAIT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            n(static_cast<uint8_t>(_n) & ((1U << 2) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_op_kernel_wait_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_KERNEL_WAIT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), n(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_KERNEL_WAIT) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_KERNEL_WAIT);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_op_kernel_wait_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_op_kernel_wait_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_n() const
+        {
+            return static_cast<uint32_t>(n);
+        }
+        CONSTEXPR npu_op_kernel_wait_t &set_n(uint32_t value)
+        {
+            n = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("n", std::to_string(n)));
+        }
+#endif
+#endif
+    };
+    // Enable or disable PMU counting (debug feature only)
+    struct npu_op_pmu_mask_t
     {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR command_with_payload_t &set_data(uint32_t value)
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t enable : 1;  //  Enable or disable PMU mask
+        uint32_t reserved1 : 15;
+#ifdef __cplusplus
+      public:
+        npu_op_pmu_mask_t(uint32_t _enable) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_PMU_MASK)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            enable(static_cast<uint8_t>(_enable) & ((1U << 1) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_op_pmu_mask_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_PMU_MASK)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), enable(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_PMU_MASK) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_PMU_MASK);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_op_pmu_mask_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_op_pmu_mask_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_enable() const
+        {
+            return static_cast<uint32_t>(enable);
+        }
+        CONSTEXPR npu_op_pmu_mask_t &set_enable(uint32_t value)
+        {
+            enable = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("enable", std::to_string(enable)));
+        }
+#endif
+#endif
+    };
+    // IFM top pad
+    struct npu_set_ifm_pad_top_t
     {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t pad : 7;     //  IFM top pad
+        uint32_t reserved1 : 9;
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_pad_top_t(uint32_t _pad) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_TOP)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            pad(static_cast<uint8_t>(_pad) & ((1U << 7) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_ifm_pad_top_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_TOP)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), pad(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_TOP) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_TOP);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_pad_top_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_pad_top_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_pad() const
+        {
+            return static_cast<uint32_t>(pad);
+        }
+        CONSTEXPR npu_set_ifm_pad_top_t &set_pad(uint32_t value)
+        {
+            pad = static_cast<uint8_t>(value) & ((1U << 7) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("pad", std::to_string(pad)));
+        }
+#endif
+#endif
+    };
+    // IFM left pad
+    struct npu_set_ifm_pad_left_t
     {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR command_with_payload_t &set_param(uint32_t value)
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t pad : 7;     //  IFM left pad
+        uint32_t reserved1 : 9;
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_pad_left_t(uint32_t _pad) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_LEFT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            pad(static_cast<uint8_t>(_pad) & ((1U << 7) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_ifm_pad_left_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_LEFT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), pad(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_LEFT) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_LEFT);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_pad_left_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_pad_left_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_pad() const
+        {
+            return static_cast<uint32_t>(pad);
+        }
+        CONSTEXPR npu_set_ifm_pad_left_t &set_pad(uint32_t value)
+        {
+            pad = static_cast<uint8_t>(value) & ((1U << 7) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("pad", std::to_string(pad)));
+        }
+#endif
+#endif
+    };
+    // IFM right pad
+    struct npu_set_ifm_pad_right_t
     {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t pad : 8;     //  IFM right pad. Max value is 128
+        uint32_t reserved1 : 8;
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_pad_right_t(uint32_t _pad) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_RIGHT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            pad(static_cast<uint8_t>(_pad) & ((1U << 8) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_ifm_pad_right_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_RIGHT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), pad(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_RIGHT) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_RIGHT);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_pad_right_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_pad_right_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_pad() const
+        {
+            return static_cast<uint32_t>(pad);
+        }
+        CONSTEXPR npu_set_ifm_pad_right_t &set_pad(uint32_t value)
+        {
+            pad = static_cast<uint8_t>(value) & ((1U << 8) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("pad", std::to_string(pad)));
+        }
+#endif
+#endif
+    };
+    // IFM bottom pad
+    struct npu_set_ifm_pad_bottom_t
     {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR command_with_payload_t &set_payload_size(uint32_t value)
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t pad : 8;     //  IFM bottom pad. Max value is 128
+        uint32_t reserved1 : 8;
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_pad_bottom_t(uint32_t _pad) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_BOTTOM)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            pad(static_cast<uint8_t>(_pad) & ((1U << 8) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_ifm_pad_bottom_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_BOTTOM)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), pad(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_BOTTOM) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_BOTTOM);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_pad_bottom_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_pad_bottom_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_pad() const
+        {
+            return static_cast<uint32_t>(pad);
+        }
+        CONSTEXPR npu_set_ifm_pad_bottom_t &set_pad(uint32_t value)
+        {
+            pad = static_cast<uint8_t>(value) & ((1U << 8) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("pad", std::to_string(pad)));
+        }
+#endif
+#endif
+    };
+    // Number of input channels for convolution
+    struct npu_set_ifm_depth_m1_t
     {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Move to stopped state once all commands to this point are done. Raise IRQ to the host and logically OR the mask into
-// the status register upper 16 bits (see the status register)
-struct npu_op_stop_t
-{
-    uint32_t cmd_code : 10;     // NPU_OP_STOP
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t mask : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;   //  control
+        uint32_t depth_m1 : 16; //  Number of input channels for convolution
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_depth_m1_t(uint32_t _depth_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_DEPTH_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            depth_m1(static_cast<uint16_t>(_depth_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ifm_depth_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_DEPTH_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), depth_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_DEPTH_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_DEPTH_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_depth_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_depth_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_depth_m1() const
+        {
+            return static_cast<uint32_t>(depth_m1);
+        }
+        CONSTEXPR npu_set_ifm_depth_m1_t &set_depth_m1(uint32_t value)
+        {
+            depth_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("depth_m1", std::to_string(depth_m1)));
+        }
+#endif
+#endif
+    };
+    // IFM Precision
+    struct npu_set_ifm_precision_t
     {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_OP_STOP) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;         //  control
+        uint32_t activation_type : 1; //  IFM type
+        uint32_t reserved1 : 1;
+        uint32_t activation_precision : 2; //  IFM precision
+        uint32_t reserved2 : 2;
+        uint32_t activation_format : 2; //  IFM format
+        uint32_t scale_mode : 2;        //  IFM scale mode
+        uint32_t reserved3 : 4;
+        uint32_t round_mode : 2; //  IFM round mode
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_precision_t(NPU_NAMESPACE::activation_type _activation_type,
+                                NPU_NAMESPACE::activation_precision _activation_precision,
+                                NPU_NAMESPACE::activation_format _activation_format,
+                                NPU_NAMESPACE::ifm_scale_mode _scale_mode,
+                                NPU_NAMESPACE::round_mode _round_mode) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PRECISION)),
+            reserved0(0), control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            activation_type(static_cast<uint8_t>(_activation_type) & ((1U << 1) - 1)), reserved1(0),
+            activation_precision(static_cast<uint8_t>(_activation_precision) & ((1U << 2) - 1)), reserved2(0),
+            activation_format(static_cast<uint8_t>(_activation_format) & ((1U << 2) - 1)),
+            scale_mode(static_cast<uint8_t>(_scale_mode) & ((1U << 2) - 1)), reserved3(0),
+            round_mode(static_cast<uint8_t>(_round_mode) & ((1U << 2) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ifm_precision_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PRECISION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), activation_type(0), reserved1(0),
+            activation_precision(0), reserved2(0), activation_format(0), scale_mode(0), reserved3(0), round_mode(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PRECISION) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PRECISION);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_precision_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_precision_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::activation_type get_activation_type() const
+        {
+            return static_cast<NPU_NAMESPACE::activation_type>(activation_type);
+        }
+        CONSTEXPR npu_set_ifm_precision_t &set_activation_type(NPU_NAMESPACE::activation_type value)
+        {
+            activation_type = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::activation_precision get_activation_precision() const
+        {
+            return static_cast<NPU_NAMESPACE::activation_precision>(activation_precision);
+        }
+        CONSTEXPR npu_set_ifm_precision_t &set_activation_precision(NPU_NAMESPACE::activation_precision value)
+        {
+            activation_precision = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::activation_format get_activation_format() const
+        {
+            return static_cast<NPU_NAMESPACE::activation_format>(activation_format);
+        }
+        CONSTEXPR npu_set_ifm_precision_t &set_activation_format(NPU_NAMESPACE::activation_format value)
+        {
+            activation_format = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::ifm_scale_mode get_scale_mode() const
+        {
+            return static_cast<NPU_NAMESPACE::ifm_scale_mode>(scale_mode);
+        }
+        CONSTEXPR npu_set_ifm_precision_t &set_scale_mode(NPU_NAMESPACE::ifm_scale_mode value)
+        {
+            scale_mode = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::round_mode get_round_mode() const
+        {
+            return static_cast<NPU_NAMESPACE::round_mode>(round_mode);
+        }
+        CONSTEXPR npu_set_ifm_precision_t &set_round_mode(NPU_NAMESPACE::round_mode value)
+        {
+            round_mode = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "activation_type",
+                (activation_type < (sizeof(activation_type_str) / sizeof(activation_type_str[0])) ?
+                     activation_type_str[activation_type] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "activation_precision",
+                (activation_precision < (sizeof(activation_precision_str) / sizeof(activation_precision_str[0])) ?
+                     activation_precision_str[activation_precision] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "activation_format",
+                (activation_format < (sizeof(activation_format_str) / sizeof(activation_format_str[0])) ?
+                     activation_format_str[activation_format] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "scale_mode",
+                (scale_mode < (sizeof(ifm_scale_mode_str) / sizeof(ifm_scale_mode_str[0])) ?
+                     ifm_scale_mode_str[scale_mode] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "round_mode",
+                (round_mode < (sizeof(round_mode_str) / sizeof(round_mode_str[0])) ? round_mode_str[round_mode] :
+                                                                                     "****")));
+        }
+#endif
+#endif
+    };
+    // IFM upscale mode
+    struct npu_set_ifm_upscale_t
     {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_OP_STOP);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t mode : 2;    //  IFM upscale mode
+        uint32_t reserved1 : 14;
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_upscale_t(NPU_NAMESPACE::ifm_upscale_mode _mode) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_UPSCALE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            mode(static_cast<uint8_t>(_mode) & ((1U << 2) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_ifm_upscale_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_UPSCALE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), mode(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_UPSCALE) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_UPSCALE);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_upscale_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_upscale_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::ifm_upscale_mode get_mode() const
+        {
+            return static_cast<NPU_NAMESPACE::ifm_upscale_mode>(mode);
+        }
+        CONSTEXPR npu_set_ifm_upscale_t &set_mode(NPU_NAMESPACE::ifm_upscale_mode value)
+        {
+            mode = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "mode",
+                (mode < (sizeof(ifm_upscale_mode_str) / sizeof(ifm_upscale_mode_str[0])) ? ifm_upscale_mode_str[mode] :
+                                                                                           "****")));
+        }
+#endif
+#endif
+    };
+    // IFM zero point
+    struct npu_set_ifm_zero_point_t
     {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_op_stop_t &set_cmd_code(::cmd0 value)
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;     //  control
+        uint32_t zero_point : 16; //  Zero point offset
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_zero_point_t(uint32_t _zero_point) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_ZERO_POINT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            zero_point(static_cast<uint16_t>(_zero_point) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ifm_zero_point_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_ZERO_POINT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), zero_point(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_ZERO_POINT) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_ZERO_POINT);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_zero_point_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_zero_point_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_zero_point() const
+        {
+            return static_cast<uint32_t>(zero_point);
+        }
+        CONSTEXPR npu_set_ifm_zero_point_t &set_zero_point(uint32_t value)
+        {
+            zero_point = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("zero_point", std::to_string(zero_point)));
+        }
+#endif
+#endif
+    };
+    // IFM Tile 0 and tile 2 width
+    struct npu_set_ifm_width0_m1_t
     {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_mask() const
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;   //  control
+        uint32_t width_m1 : 16; //  IFM Tile 0 and tile 2 width
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_width0_m1_t(uint32_t _width_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_WIDTH0_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            width_m1(static_cast<uint16_t>(_width_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ifm_width0_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_WIDTH0_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), width_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_WIDTH0_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_WIDTH0_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_width0_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_width0_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_width_m1() const
+        {
+            return static_cast<uint32_t>(width_m1);
+        }
+        CONSTEXPR npu_set_ifm_width0_m1_t &set_width_m1(uint32_t value)
+        {
+            width_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("width_m1", std::to_string(width_m1)));
+        }
+#endif
+#endif
+    };
+    // IFM Tile 0 height
+    struct npu_set_ifm_height0_m1_t
     {
-        return static_cast<uint32_t>(mask);
-    }
-    CONSTEXPR npu_op_stop_t &set_mask(uint32_t value)
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;    //  control
+        uint32_t height_m1 : 16; //  IFM Tile 0 height
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_height0_m1_t(uint32_t _height_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT0_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            height_m1(static_cast<uint16_t>(_height_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ifm_height0_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT0_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), height_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT0_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT0_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_height0_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_height0_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_height_m1() const
+        {
+            return static_cast<uint32_t>(height_m1);
+        }
+        CONSTEXPR npu_set_ifm_height0_m1_t &set_height_m1(uint32_t value)
+        {
+            height_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("height_m1", std::to_string(height_m1)));
+        }
+#endif
+#endif
+    };
+    // IFM Tile 1 height
+    struct npu_set_ifm_height1_m1_t
     {
-        mask = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Raise IRQ to the host and logically OR the mask into the status register upper 16 bits (see the status register)
-struct npu_op_irq_t
-{
-    uint32_t cmd_code : 10;     // NPU_OP_IRQ
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t mask : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;    //  control
+        uint32_t height_m1 : 16; //  IFM Tile 1 height
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_height1_m1_t(uint32_t _height_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT1_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            height_m1(static_cast<uint16_t>(_height_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ifm_height1_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT1_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), height_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT1_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT1_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_height1_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_height1_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_height_m1() const
+        {
+            return static_cast<uint32_t>(height_m1);
+        }
+        CONSTEXPR npu_set_ifm_height1_m1_t &set_height_m1(uint32_t value)
+        {
+            height_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("height_m1", std::to_string(height_m1)));
+        }
+#endif
+#endif
+    };
+    // End of IB0,IB1 buffers
+    struct npu_set_ifm_ib_end_t
     {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_OP_IRQ) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t ib_end : 6;  //  End of IB0,IB1 buffers in the SHRAM in KB units. Multiple of 2
+        uint32_t reserved1 : 10;
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_ib_end_t(uint32_t _ib_end) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_IB_END)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            ib_end(static_cast<uint8_t>(_ib_end) & ((1U << 6) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_ifm_ib_end_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_IB_END)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), ib_end(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_IB_END) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_IB_END);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_ib_end_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_ib_end_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_ib_end() const
+        {
+            return static_cast<uint32_t>(ib_end);
+        }
+        CONSTEXPR npu_set_ifm_ib_end_t &set_ib_end(uint32_t value)
+        {
+            ib_end = static_cast<uint8_t>(value) & ((1U << 6) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("ib_end", std::to_string(ib_end)));
+        }
+#endif
+#endif
+    };
+    // Index n for IFM access
+    struct npu_set_ifm_region_t
     {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_OP_IRQ);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t region : 3;  //  Region number n
+        uint32_t reserved1 : 12;
+        uint32_t custom_dma_cs : 1; //  Custom DMA select
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_region_t(uint32_t _region, NPU_NAMESPACE::custom_dma_cs _custom_dma_cs) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_REGION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            region(static_cast<uint8_t>(_region) & ((1U << 3) - 1)), reserved1(0),
+            custom_dma_cs(static_cast<uint8_t>(_custom_dma_cs) & ((1U << 1) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ifm_region_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_REGION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), region(0), reserved1(0), custom_dma_cs(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_REGION) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_REGION);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_region_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_region_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_region() const
+        {
+            return static_cast<uint32_t>(region);
+        }
+        CONSTEXPR npu_set_ifm_region_t &set_region(uint32_t value)
+        {
+            region = static_cast<uint8_t>(value) & ((1U << 3) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::custom_dma_cs get_custom_dma_cs() const
+        {
+            return static_cast<NPU_NAMESPACE::custom_dma_cs>(custom_dma_cs);
+        }
+        CONSTEXPR npu_set_ifm_region_t &set_custom_dma_cs(NPU_NAMESPACE::custom_dma_cs value)
+        {
+            custom_dma_cs = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("region", std::to_string(region)));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "custom_dma_cs",
+                (custom_dma_cs < (sizeof(custom_dma_cs_str) / sizeof(custom_dma_cs_str[0])) ?
+                     custom_dma_cs_str[custom_dma_cs] :
+                     "****")));
+        }
+#endif
+#endif
+    };
+    // Output feature map width
+    struct npu_set_ofm_width_m1_t
     {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_op_irq_t &set_cmd_code(::cmd0 value)
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;   //  control
+        uint32_t width_m1 : 16; //  Output feature map width
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_width_m1_t(uint32_t _width_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            width_m1(static_cast<uint16_t>(_width_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ofm_width_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), width_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_width_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_width_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_width_m1() const
+        {
+            return static_cast<uint32_t>(width_m1);
+        }
+        CONSTEXPR npu_set_ofm_width_m1_t &set_width_m1(uint32_t value)
+        {
+            width_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("width_m1", std::to_string(width_m1)));
+        }
+#endif
+#endif
+    };
+    // Output feature map height
+    struct npu_set_ofm_height_m1_t
     {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_mask() const
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;    //  control
+        uint32_t height_m1 : 16; //  Output feature map height
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_height_m1_t(uint32_t _height_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            height_m1(static_cast<uint16_t>(_height_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ofm_height_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), height_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_height_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_height_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_height_m1() const
+        {
+            return static_cast<uint32_t>(height_m1);
+        }
+        CONSTEXPR npu_set_ofm_height_m1_t &set_height_m1(uint32_t value)
+        {
+            height_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("height_m1", std::to_string(height_m1)));
+        }
+#endif
+#endif
+    };
+    // Output feature map depth
+    struct npu_set_ofm_depth_m1_t
     {
-        return static_cast<uint32_t>(mask);
-    }
-    CONSTEXPR npu_op_irq_t &set_mask(uint32_t value)
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;   //  control
+        uint32_t depth_m1 : 16; //  Output feature map depth
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_depth_m1_t(uint32_t _depth_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_DEPTH_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            depth_m1(static_cast<uint16_t>(_depth_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ofm_depth_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_DEPTH_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), depth_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_DEPTH_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_DEPTH_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_depth_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_depth_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_depth_m1() const
+        {
+            return static_cast<uint32_t>(depth_m1);
+        }
+        CONSTEXPR npu_set_ofm_depth_m1_t &set_depth_m1(uint32_t value)
+        {
+            depth_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("depth_m1", std::to_string(depth_m1)));
+        }
+#endif
+#endif
+    };
+    // OFM Precision
+    struct npu_set_ofm_precision_t
     {
-        mask = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Start stripe with full convolution or deconvolution
-struct npu_op_conv_t
-{
-    uint32_t cmd_code : 10;     // NPU_OP_CONV
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t reserved0 : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;              //  control
+        uint32_t activation_type : 1;      //  OFM type
+        uint32_t activation_precision : 2; //  OFM precision
+        uint32_t reserved1 : 3;
+        uint32_t activation_format : 2; //  OFM format
+        uint32_t scale_mode : 1;        //  OFM scale mode
+        uint32_t reserved2 : 5;
+        uint32_t round_mode : 2; //  OFM round mode
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_precision_t(NPU_NAMESPACE::activation_type _activation_type,
+                                NPU_NAMESPACE::activation_precision _activation_precision,
+                                NPU_NAMESPACE::activation_format _activation_format,
+                                NPU_NAMESPACE::ofm_scale_mode _scale_mode,
+                                NPU_NAMESPACE::round_mode _round_mode) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_PRECISION)),
+            reserved0(0), control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            activation_type(static_cast<uint8_t>(_activation_type) & ((1U << 1) - 1)),
+            activation_precision(static_cast<uint8_t>(_activation_precision) & ((1U << 2) - 1)), reserved1(0),
+            activation_format(static_cast<uint8_t>(_activation_format) & ((1U << 2) - 1)),
+            scale_mode(static_cast<uint8_t>(_scale_mode) & ((1U << 1) - 1)), reserved2(0),
+            round_mode(static_cast<uint8_t>(_round_mode) & ((1U << 2) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ofm_precision_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_PRECISION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), activation_type(0),
+            activation_precision(0), reserved1(0), activation_format(0), scale_mode(0), reserved2(0), round_mode(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_PRECISION) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_PRECISION);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_precision_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_precision_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::activation_type get_activation_type() const
+        {
+            return static_cast<NPU_NAMESPACE::activation_type>(activation_type);
+        }
+        CONSTEXPR npu_set_ofm_precision_t &set_activation_type(NPU_NAMESPACE::activation_type value)
+        {
+            activation_type = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::activation_precision get_activation_precision() const
+        {
+            return static_cast<NPU_NAMESPACE::activation_precision>(activation_precision);
+        }
+        CONSTEXPR npu_set_ofm_precision_t &set_activation_precision(NPU_NAMESPACE::activation_precision value)
+        {
+            activation_precision = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::activation_format get_activation_format() const
+        {
+            return static_cast<NPU_NAMESPACE::activation_format>(activation_format);
+        }
+        CONSTEXPR npu_set_ofm_precision_t &set_activation_format(NPU_NAMESPACE::activation_format value)
+        {
+            activation_format = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::ofm_scale_mode get_scale_mode() const
+        {
+            return static_cast<NPU_NAMESPACE::ofm_scale_mode>(scale_mode);
+        }
+        CONSTEXPR npu_set_ofm_precision_t &set_scale_mode(NPU_NAMESPACE::ofm_scale_mode value)
+        {
+            scale_mode = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::round_mode get_round_mode() const
+        {
+            return static_cast<NPU_NAMESPACE::round_mode>(round_mode);
+        }
+        CONSTEXPR npu_set_ofm_precision_t &set_round_mode(NPU_NAMESPACE::round_mode value)
+        {
+            round_mode = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "activation_type",
+                (activation_type < (sizeof(activation_type_str) / sizeof(activation_type_str[0])) ?
+                     activation_type_str[activation_type] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "activation_precision",
+                (activation_precision < (sizeof(activation_precision_str) / sizeof(activation_precision_str[0])) ?
+                     activation_precision_str[activation_precision] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "activation_format",
+                (activation_format < (sizeof(activation_format_str) / sizeof(activation_format_str[0])) ?
+                     activation_format_str[activation_format] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "scale_mode",
+                (scale_mode < (sizeof(ofm_scale_mode_str) / sizeof(ofm_scale_mode_str[0])) ?
+                     ofm_scale_mode_str[scale_mode] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "round_mode",
+                (round_mode < (sizeof(round_mode_str) / sizeof(round_mode_str[0])) ? round_mode_str[round_mode] :
+                                                                                     "****")));
+        }
+#endif
+#endif
+    };
+    // OFM block width
+    struct npu_set_ofm_blk_width_m1_t
     {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_OP_CONV) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;  //  control
+        uint32_t width_m1 : 6; //  OFM block width
+        uint32_t reserved1 : 10;
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_blk_width_m1_t(uint32_t _width_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_WIDTH_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            width_m1(static_cast<uint8_t>(_width_m1) & ((1U << 6) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_ofm_blk_width_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_WIDTH_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), width_m1(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_WIDTH_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_WIDTH_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_blk_width_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_blk_width_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_width_m1() const
+        {
+            return static_cast<uint32_t>(width_m1);
+        }
+        CONSTEXPR npu_set_ofm_blk_width_m1_t &set_width_m1(uint32_t value)
+        {
+            width_m1 = static_cast<uint8_t>(value) & ((1U << 6) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("width_m1", std::to_string(width_m1)));
+        }
+#endif
+#endif
+    };
+    // OFM block height
+    struct npu_set_ofm_blk_height_m1_t
     {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_OP_CONV);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_op_conv_t &set_cmd_code(::cmd0 value)
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;   //  control
+        uint32_t height_m1 : 5; //  OFM block height
+        uint32_t reserved1 : 11;
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_blk_height_m1_t(uint32_t _height_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_HEIGHT_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            height_m1(static_cast<uint8_t>(_height_m1) & ((1U << 5) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_ofm_blk_height_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_HEIGHT_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), height_m1(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_HEIGHT_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_HEIGHT_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_blk_height_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_blk_height_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_height_m1() const
+        {
+            return static_cast<uint32_t>(height_m1);
+        }
+        CONSTEXPR npu_set_ofm_blk_height_m1_t &set_height_m1(uint32_t value)
+        {
+            height_m1 = static_cast<uint8_t>(value) & ((1U << 5) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("height_m1", std::to_string(height_m1)));
+        }
+#endif
+#endif
+    };
+    // OFM block depth
+    struct npu_set_ofm_blk_depth_m1_t
     {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Start stripe width depth-wise convolution or deconvolution operation
-struct npu_op_depthwise_t
-{
-    uint32_t cmd_code : 10;     // NPU_OP_DEPTHWISE
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t reserved0 : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;  //  control
+        uint32_t depth_m1 : 7; //  OFM block depth
+        uint32_t reserved1 : 9;
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_blk_depth_m1_t(uint32_t _depth_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_DEPTH_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            depth_m1(static_cast<uint8_t>(_depth_m1) & ((1U << 7) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_ofm_blk_depth_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_DEPTH_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), depth_m1(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_DEPTH_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_DEPTH_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_blk_depth_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_blk_depth_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_depth_m1() const
+        {
+            return static_cast<uint32_t>(depth_m1);
+        }
+        CONSTEXPR npu_set_ofm_blk_depth_m1_t &set_depth_m1(uint32_t value)
+        {
+            depth_m1 = static_cast<uint8_t>(value) & ((1U << 7) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("depth_m1", std::to_string(depth_m1)));
+        }
+#endif
+#endif
+    };
+    // OFM zero point
+    struct npu_set_ofm_zero_point_t
     {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_OP_DEPTHWISE) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;     //  control
+        uint32_t zero_point : 16; //  Zero point offset
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_zero_point_t(uint32_t _zero_point) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_ZERO_POINT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            zero_point(static_cast<uint16_t>(_zero_point) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ofm_zero_point_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_ZERO_POINT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), zero_point(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_ZERO_POINT) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_ZERO_POINT);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_zero_point_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_zero_point_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_zero_point() const
+        {
+            return static_cast<uint32_t>(zero_point);
+        }
+        CONSTEXPR npu_set_ofm_zero_point_t &set_zero_point(uint32_t value)
+        {
+            zero_point = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("zero_point", std::to_string(zero_point)));
+        }
+#endif
+#endif
+    };
+    // OFM Tile 0 and tile 2 width
+    struct npu_set_ofm_width0_m1_t
     {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_OP_DEPTHWISE);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;   //  control
+        uint32_t width_m1 : 16; //  OFM Tile 0 and tile 2 width
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_width0_m1_t(uint32_t _width_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH0_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            width_m1(static_cast<uint16_t>(_width_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ofm_width0_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH0_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), width_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH0_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH0_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_width0_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_width0_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_width_m1() const
+        {
+            return static_cast<uint32_t>(width_m1);
+        }
+        CONSTEXPR npu_set_ofm_width0_m1_t &set_width_m1(uint32_t value)
+        {
+            width_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("width_m1", std::to_string(width_m1)));
+        }
+#endif
+#endif
+    };
+    // OFM Tile 0 height
+    struct npu_set_ofm_height0_m1_t
     {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_op_depthwise_t &set_cmd_code(::cmd0 value)
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;    //  control
+        uint32_t height_m1 : 16; //  OFM Tile 0 height
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_height0_m1_t(uint32_t _height_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT0_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            height_m1(static_cast<uint16_t>(_height_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ofm_height0_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT0_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), height_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT0_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT0_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_height0_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_height0_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_height_m1() const
+        {
+            return static_cast<uint32_t>(height_m1);
+        }
+        CONSTEXPR npu_set_ofm_height0_m1_t &set_height_m1(uint32_t value)
+        {
+            height_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("height_m1", std::to_string(height_m1)));
+        }
+#endif
+#endif
+    };
+    // OFM Tile 1 height
+    struct npu_set_ofm_height1_m1_t
     {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Start stripe with pooling operation
-struct npu_op_pool_t
-{
-    uint32_t cmd_code : 10;     // NPU_OP_POOL
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t mode : 16;
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;    //  control
+        uint32_t height_m1 : 16; //  OFM Tile 1 height
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
+      public:
+        npu_set_ofm_height1_m1_t(uint32_t _height_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT1_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            height_m1(static_cast<uint16_t>(_height_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ofm_height1_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT1_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), height_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT1_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT1_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_height1_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_height1_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_height_m1() const
+        {
+            return static_cast<uint32_t>(height_m1);
+        }
+        CONSTEXPR npu_set_ofm_height1_m1_t &set_height_m1(uint32_t value)
+        {
+            height_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("height_m1", std::to_string(height_m1)));
+        }
+#endif
+#endif
+    };
+    // Index n for OFM access
+    struct npu_set_ofm_region_t
     {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_OP_POOL) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t region : 3;  //  Index n for OFM access
+        uint32_t reserved1 : 12;
+        uint32_t custom_dma_cs : 1; //  Custom DMA select
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_region_t(uint32_t _region, NPU_NAMESPACE::custom_dma_cs _custom_dma_cs) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_REGION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            region(static_cast<uint8_t>(_region) & ((1U << 3) - 1)), reserved1(0),
+            custom_dma_cs(static_cast<uint8_t>(_custom_dma_cs) & ((1U << 1) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ofm_region_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_REGION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), region(0), reserved1(0), custom_dma_cs(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_REGION) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_REGION);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_region_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_region_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_region() const
+        {
+            return static_cast<uint32_t>(region);
+        }
+        CONSTEXPR npu_set_ofm_region_t &set_region(uint32_t value)
+        {
+            region = static_cast<uint8_t>(value) & ((1U << 3) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::custom_dma_cs get_custom_dma_cs() const
+        {
+            return static_cast<NPU_NAMESPACE::custom_dma_cs>(custom_dma_cs);
+        }
+        CONSTEXPR npu_set_ofm_region_t &set_custom_dma_cs(NPU_NAMESPACE::custom_dma_cs value)
+        {
+            custom_dma_cs = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("region", std::to_string(region)));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "custom_dma_cs",
+                (custom_dma_cs < (sizeof(custom_dma_cs_str) / sizeof(custom_dma_cs_str[0])) ?
+                     custom_dma_cs_str[custom_dma_cs] :
+                     "****")));
+        }
+#endif
+#endif
+    };
+    // Kernel width
+    struct npu_set_kernel_width_m1_t
     {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_OP_POOL);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;   //  control
+        uint32_t width_m1 : 16; //  Kernel width
+#ifdef __cplusplus
+      public:
+        npu_set_kernel_width_m1_t(uint32_t _width_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_WIDTH_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            width_m1(static_cast<uint16_t>(_width_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_kernel_width_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_WIDTH_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), width_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_WIDTH_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_WIDTH_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_kernel_width_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_kernel_width_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_width_m1() const
+        {
+            return static_cast<uint32_t>(width_m1);
+        }
+        CONSTEXPR npu_set_kernel_width_m1_t &set_width_m1(uint32_t value)
+        {
+            width_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("width_m1", std::to_string(width_m1)));
+        }
+#endif
+#endif
+    };
+    // Kernel height
+    struct npu_set_kernel_height_m1_t
     {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_op_pool_t &set_cmd_code(::cmd0 value)
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;    //  control
+        uint32_t height_m1 : 16; //  Kernel height
+#ifdef __cplusplus
+      public:
+        npu_set_kernel_height_m1_t(uint32_t _height_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_HEIGHT_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            height_m1(static_cast<uint16_t>(_height_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_kernel_height_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_HEIGHT_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), height_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_HEIGHT_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_HEIGHT_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_kernel_height_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_kernel_height_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_height_m1() const
+        {
+            return static_cast<uint32_t>(height_m1);
+        }
+        CONSTEXPR npu_set_kernel_height_m1_t &set_height_m1(uint32_t value)
+        {
+            height_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("height_m1", std::to_string(height_m1)));
+        }
+#endif
+#endif
+    };
+    // Kernel stride
+    struct npu_set_kernel_stride_t
     {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR ::pooling_mode get_mode() const
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;       //  control
+        uint32_t stride_x_lsb : 1;  //  Stride x LSB. (kernel_x_stride - 1)[0]
+        uint32_t stride_y_lsb : 1;  //  Stride y LSB. (kernel_y_stride - 1)[0]
+        uint32_t weight_order : 1;  //  Weight ordering mode
+        uint32_t dilation_x : 1;    //  Kernel x dilation
+        uint32_t dilation_y : 1;    //  Kernel y dilation
+        uint32_t decomposition : 1; //  Kernel decomposition
+        uint32_t stride_x_msb : 1;  //  Stride x MSB. (kernel_x_stride - 1) >> 1
+        uint32_t reserved1 : 2;
+        uint32_t stride_y_msb : 1; //  Stride y MSB. (kernel_y_stride - 1) >> 1
+        uint32_t reserved2 : 6;
+#ifdef __cplusplus
+      public:
+        npu_set_kernel_stride_t(uint32_t _stride_x_lsb,
+                                uint32_t _stride_y_lsb,
+                                NPU_NAMESPACE::weight_order _weight_order,
+                                NPU_NAMESPACE::kernel_dilation _dilation_x,
+                                NPU_NAMESPACE::kernel_dilation _dilation_y,
+                                NPU_NAMESPACE::kernel_decomposition _decomposition,
+                                uint32_t _stride_x_msb,
+                                uint32_t _stride_y_msb) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_STRIDE)),
+            reserved0(0), control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            stride_x_lsb(static_cast<uint8_t>(_stride_x_lsb) & ((1U << 1) - 1)),
+            stride_y_lsb(static_cast<uint8_t>(_stride_y_lsb) & ((1U << 1) - 1)),
+            weight_order(static_cast<uint8_t>(_weight_order) & ((1U << 1) - 1)),
+            dilation_x(static_cast<uint8_t>(_dilation_x) & ((1U << 1) - 1)),
+            dilation_y(static_cast<uint8_t>(_dilation_y) & ((1U << 1) - 1)),
+            decomposition(static_cast<uint8_t>(_decomposition) & ((1U << 1) - 1)),
+            stride_x_msb(static_cast<uint8_t>(_stride_x_msb) & ((1U << 1) - 1)), reserved1(0),
+            stride_y_msb(static_cast<uint8_t>(_stride_y_msb) & ((1U << 1) - 1)), reserved2(0)
+        {
+        }
+        CONSTEXPR npu_set_kernel_stride_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_STRIDE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), stride_x_lsb(0), stride_y_lsb(0),
+            weight_order(0), dilation_x(0), dilation_y(0), decomposition(0), stride_x_msb(0), reserved1(0),
+            stride_y_msb(0), reserved2(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_STRIDE) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_STRIDE);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_kernel_stride_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_kernel_stride_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_stride_x_lsb() const
+        {
+            return static_cast<uint32_t>(stride_x_lsb);
+        }
+        CONSTEXPR npu_set_kernel_stride_t &set_stride_x_lsb(uint32_t value)
+        {
+            stride_x_lsb = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_stride_y_lsb() const
+        {
+            return static_cast<uint32_t>(stride_y_lsb);
+        }
+        CONSTEXPR npu_set_kernel_stride_t &set_stride_y_lsb(uint32_t value)
+        {
+            stride_y_lsb = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::weight_order get_weight_order() const
+        {
+            return static_cast<NPU_NAMESPACE::weight_order>(weight_order);
+        }
+        CONSTEXPR npu_set_kernel_stride_t &set_weight_order(NPU_NAMESPACE::weight_order value)
+        {
+            weight_order = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::kernel_dilation get_dilation_x() const
+        {
+            return static_cast<NPU_NAMESPACE::kernel_dilation>(dilation_x);
+        }
+        CONSTEXPR npu_set_kernel_stride_t &set_dilation_x(NPU_NAMESPACE::kernel_dilation value)
+        {
+            dilation_x = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::kernel_dilation get_dilation_y() const
+        {
+            return static_cast<NPU_NAMESPACE::kernel_dilation>(dilation_y);
+        }
+        CONSTEXPR npu_set_kernel_stride_t &set_dilation_y(NPU_NAMESPACE::kernel_dilation value)
+        {
+            dilation_y = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::kernel_decomposition get_decomposition() const
+        {
+            return static_cast<NPU_NAMESPACE::kernel_decomposition>(decomposition);
+        }
+        CONSTEXPR npu_set_kernel_stride_t &set_decomposition(NPU_NAMESPACE::kernel_decomposition value)
+        {
+            decomposition = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_stride_x_msb() const
+        {
+            return static_cast<uint32_t>(stride_x_msb);
+        }
+        CONSTEXPR npu_set_kernel_stride_t &set_stride_x_msb(uint32_t value)
+        {
+            stride_x_msb = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_stride_y_msb() const
+        {
+            return static_cast<uint32_t>(stride_y_msb);
+        }
+        CONSTEXPR npu_set_kernel_stride_t &set_stride_y_msb(uint32_t value)
+        {
+            stride_y_msb = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("stride_x_lsb", std::to_string(stride_x_lsb)));
+            fields.push_back(std::make_pair<std::string, std::string>("stride_y_lsb", std::to_string(stride_y_lsb)));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "weight_order",
+                (weight_order < (sizeof(weight_order_str) / sizeof(weight_order_str[0])) ?
+                     weight_order_str[weight_order] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "dilation_x",
+                (dilation_x < (sizeof(kernel_dilation_str) / sizeof(kernel_dilation_str[0])) ?
+                     kernel_dilation_str[dilation_x] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "dilation_y",
+                (dilation_y < (sizeof(kernel_dilation_str) / sizeof(kernel_dilation_str[0])) ?
+                     kernel_dilation_str[dilation_y] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "decomposition",
+                (decomposition < (sizeof(kernel_decomposition_str) / sizeof(kernel_decomposition_str[0])) ?
+                     kernel_decomposition_str[decomposition] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>("stride_x_msb", std::to_string(stride_x_msb)));
+            fields.push_back(std::make_pair<std::string, std::string>("stride_y_msb", std::to_string(stride_y_msb)));
+        }
+#endif
+#endif
+    };
+    // Accumulator format
+    struct npu_set_acc_format_t
     {
-        return static_cast<::pooling_mode>(mode);
-    }
-    CONSTEXPR npu_op_pool_t &set_mode(::pooling_mode value)
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;    //  control
+        uint32_t acc_format : 2; //  Accumulator format
+        uint32_t reserved1 : 14;
+#ifdef __cplusplus
+      public:
+        npu_set_acc_format_t(NPU_NAMESPACE::acc_format _acc_format) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACC_FORMAT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            acc_format(static_cast<uint8_t>(_acc_format) & ((1U << 2) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_acc_format_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACC_FORMAT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), acc_format(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACC_FORMAT) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACC_FORMAT);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_acc_format_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_acc_format_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::acc_format get_acc_format() const
+        {
+            return static_cast<NPU_NAMESPACE::acc_format>(acc_format);
+        }
+        CONSTEXPR npu_set_acc_format_t &set_acc_format(NPU_NAMESPACE::acc_format value)
+        {
+            acc_format = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "acc_format",
+                (acc_format < (sizeof(acc_format_str) / sizeof(acc_format_str[0])) ? acc_format_str[acc_format] :
+                                                                                     "****")));
+        }
+#endif
+#endif
+    };
+    // Activation function and clip range
+    struct npu_set_activation_t
     {
-        mode = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Start stripe with pointwise operation
-struct npu_op_elementwise_t
-{
-    uint32_t cmd_code : 10;     // NPU_OP_ELEMENTWISE
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t mode : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;             //  control
+        uint32_t activation_function : 5; //  Activation function (before table lookup)
+        uint32_t reserved1 : 7;
+        uint32_t activation_clip_range : 3; //  Activation clip range. This must be set to 0 if table lookup is not used
+        uint32_t reserved2 : 1;
+#ifdef __cplusplus
+      public:
+        npu_set_activation_t(NPU_NAMESPACE::activation_function _activation_function,
+                             NPU_NAMESPACE::activation_clip_range _activation_clip_range) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION)),
+            reserved0(0), control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            activation_function(static_cast<uint8_t>(_activation_function) & ((1U << 5) - 1)), reserved1(0),
+            activation_clip_range(static_cast<uint8_t>(_activation_clip_range) & ((1U << 3) - 1)), reserved2(0)
+        {
+        }
+        CONSTEXPR npu_set_activation_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), activation_function(0), reserved1(0),
+            activation_clip_range(0), reserved2(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_activation_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_activation_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::activation_function get_activation_function() const
+        {
+            return static_cast<NPU_NAMESPACE::activation_function>(activation_function);
+        }
+        CONSTEXPR npu_set_activation_t &set_activation_function(NPU_NAMESPACE::activation_function value)
+        {
+            activation_function = static_cast<uint8_t>(value) & ((1U << 5) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::activation_clip_range get_activation_clip_range() const
+        {
+            return static_cast<NPU_NAMESPACE::activation_clip_range>(activation_clip_range);
+        }
+        CONSTEXPR npu_set_activation_t &set_activation_clip_range(NPU_NAMESPACE::activation_clip_range value)
+        {
+            activation_clip_range = static_cast<uint8_t>(value) & ((1U << 3) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "activation_function",
+                (activation_function < (sizeof(activation_function_str) / sizeof(activation_function_str[0])) ?
+                     activation_function_str[activation_function] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "activation_clip_range",
+                (activation_clip_range < (sizeof(activation_clip_range_str) / sizeof(activation_clip_range_str[0])) ?
+                     activation_clip_range_str[activation_clip_range] :
+                     "****")));
+        }
+#endif
+#endif
+    };
+    // Lower bound clip
+    struct npu_set_activation_min_t
     {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_OP_ELEMENTWISE) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;        //  control
+        uint32_t clip_boundary : 16; //  Clip boundary for OFM activations
+#ifdef __cplusplus
+      public:
+        npu_set_activation_min_t(uint32_t _clip_boundary) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MIN)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            clip_boundary(static_cast<uint16_t>(_clip_boundary) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_activation_min_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MIN)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), clip_boundary(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MIN) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MIN);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_activation_min_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_activation_min_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_clip_boundary() const
+        {
+            return static_cast<uint32_t>(clip_boundary);
+        }
+        CONSTEXPR npu_set_activation_min_t &set_clip_boundary(uint32_t value)
+        {
+            clip_boundary = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("clip_boundary", std::to_string(clip_boundary)));
+        }
+#endif
+#endif
+    };
+    // Upper bound clip
+    struct npu_set_activation_max_t
     {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_OP_ELEMENTWISE);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;        //  control
+        uint32_t clip_boundary : 16; //  Clip boundary for OFM activations
+#ifdef __cplusplus
+      public:
+        npu_set_activation_max_t(uint32_t _clip_boundary) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MAX)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            clip_boundary(static_cast<uint16_t>(_clip_boundary) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_activation_max_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MAX)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), clip_boundary(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MAX) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MAX);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_activation_max_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_activation_max_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_clip_boundary() const
+        {
+            return static_cast<uint32_t>(clip_boundary);
+        }
+        CONSTEXPR npu_set_activation_max_t &set_clip_boundary(uint32_t value)
+        {
+            clip_boundary = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("clip_boundary", std::to_string(clip_boundary)));
+        }
+#endif
+#endif
+    };
+    // Index n for weight stream access
+    struct npu_set_weight_region_t
     {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_op_elementwise_t &set_cmd_code(::cmd0 value)
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t region : 3;  //  Index n for weight stream access
+        uint32_t reserved1 : 12;
+        uint32_t custom_dma_cs : 1; //  Custom DMA select
+#ifdef __cplusplus
+      public:
+        npu_set_weight_region_t(uint32_t _region, NPU_NAMESPACE::custom_dma_cs _custom_dma_cs) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_WEIGHT_REGION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            region(static_cast<uint8_t>(_region) & ((1U << 3) - 1)), reserved1(0),
+            custom_dma_cs(static_cast<uint8_t>(_custom_dma_cs) & ((1U << 1) - 1))
+        {
+        }
+        CONSTEXPR npu_set_weight_region_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_WEIGHT_REGION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), region(0), reserved1(0), custom_dma_cs(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_WEIGHT_REGION) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_WEIGHT_REGION);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_weight_region_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_weight_region_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_region() const
+        {
+            return static_cast<uint32_t>(region);
+        }
+        CONSTEXPR npu_set_weight_region_t &set_region(uint32_t value)
+        {
+            region = static_cast<uint8_t>(value) & ((1U << 3) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::custom_dma_cs get_custom_dma_cs() const
+        {
+            return static_cast<NPU_NAMESPACE::custom_dma_cs>(custom_dma_cs);
+        }
+        CONSTEXPR npu_set_weight_region_t &set_custom_dma_cs(NPU_NAMESPACE::custom_dma_cs value)
+        {
+            custom_dma_cs = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("region", std::to_string(region)));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "custom_dma_cs",
+                (custom_dma_cs < (sizeof(custom_dma_cs_str) / sizeof(custom_dma_cs_str[0])) ?
+                     custom_dma_cs_str[custom_dma_cs] :
+                     "****")));
+        }
+#endif
+#endif
+    };
+    // Index n for scale stream access
+    struct npu_set_scale_region_t
     {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR ::elementwise_mode get_mode() const
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t region : 3;  //  Index n for scale stream access
+        uint32_t reserved1 : 12;
+        uint32_t custom_dma_cs : 1; //  Custom DMA select
+#ifdef __cplusplus
+      public:
+        npu_set_scale_region_t(uint32_t _region, NPU_NAMESPACE::custom_dma_cs _custom_dma_cs) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_SCALE_REGION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            region(static_cast<uint8_t>(_region) & ((1U << 3) - 1)), reserved1(0),
+            custom_dma_cs(static_cast<uint8_t>(_custom_dma_cs) & ((1U << 1) - 1))
+        {
+        }
+        CONSTEXPR npu_set_scale_region_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_SCALE_REGION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), region(0), reserved1(0), custom_dma_cs(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_SCALE_REGION) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_SCALE_REGION);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_scale_region_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_scale_region_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_region() const
+        {
+            return static_cast<uint32_t>(region);
+        }
+        CONSTEXPR npu_set_scale_region_t &set_region(uint32_t value)
+        {
+            region = static_cast<uint8_t>(value) & ((1U << 3) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::custom_dma_cs get_custom_dma_cs() const
+        {
+            return static_cast<NPU_NAMESPACE::custom_dma_cs>(custom_dma_cs);
+        }
+        CONSTEXPR npu_set_scale_region_t &set_custom_dma_cs(NPU_NAMESPACE::custom_dma_cs value)
+        {
+            custom_dma_cs = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("region", std::to_string(region)));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "custom_dma_cs",
+                (custom_dma_cs < (sizeof(custom_dma_cs_str) / sizeof(custom_dma_cs_str[0])) ?
+                     custom_dma_cs_str[custom_dma_cs] :
+                     "****")));
+        }
+#endif
+#endif
+    };
+    // Start of ACC0,ACC1 buffers
+    struct npu_set_ab_start_t
     {
-        return static_cast<::elementwise_mode>(mode);
-    }
-    CONSTEXPR npu_op_elementwise_t &set_mode(::elementwise_mode value)
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;  //  control
+        uint32_t ab_start : 6; //  Start of ACC0,ACC1 buffers in the SHRAM in KB units. Multiple of 2
+        uint32_t reserved1 : 10;
+#ifdef __cplusplus
+      public:
+        npu_set_ab_start_t(uint32_t _ab_start) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_AB_START)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            ab_start(static_cast<uint8_t>(_ab_start) & ((1U << 6) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_ab_start_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_AB_START)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), ab_start(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_AB_START) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_AB_START);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ab_start_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ab_start_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_ab_start() const
+        {
+            return static_cast<uint32_t>(ab_start);
+        }
+        CONSTEXPR npu_set_ab_start_t &set_ab_start(uint32_t value)
+        {
+            ab_start = static_cast<uint8_t>(value) & ((1U << 6) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("ab_start", std::to_string(ab_start)));
+        }
+#endif
+#endif
+    };
+    // Block number of blocks dependency
+    struct npu_set_blockdep_t
     {
-        mode = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Queue new DMA for the given channel with the given mode. Mode bit 0 specifies the source address type 0=external,
-// 1=internal Mode bit 1 specifies the destination address type 0=external, 1=internal In Ethos-U55 there is only one
-// user channel so channel=0. If the channel is fully in use then the command blocks until a new DMA can start
-struct npu_op_dma_start_t
-{
-    uint32_t cmd_code : 10;     // NPU_OP_DMA_START
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t channel_mode : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;  //  control
+        uint32_t blockdep : 2; //  Block number of blocks dependency between kernel operations
+        uint32_t reserved1 : 14;
+#ifdef __cplusplus
+      public:
+        npu_set_blockdep_t(uint32_t _blockdep) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_BLOCKDEP)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            blockdep(static_cast<uint8_t>(_blockdep) & ((1U << 2) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_blockdep_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_BLOCKDEP)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), blockdep(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_BLOCKDEP) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_BLOCKDEP);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_blockdep_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_blockdep_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_blockdep() const
+        {
+            return static_cast<uint32_t>(blockdep);
+        }
+        CONSTEXPR npu_set_blockdep_t &set_blockdep(uint32_t value)
+        {
+            blockdep = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("blockdep", std::to_string(blockdep)));
+        }
+#endif
+#endif
+    };
+    // DMA0 source region
+    struct npu_set_dma0_src_region_t
     {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_OP_DMA_START) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_OP_DMA_START);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR uint32_t get_channel_mode() const
-    {
-        return static_cast<uint32_t>(channel_mode);
-    }
-    CONSTEXPR npu_op_dma_start_t &set_channel_mode(uint32_t value)
-    {
-        channel_mode = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_op_dma_start_t &set_cmd_code(::cmd0 value)
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t region : 3;  //  Region number
+        uint32_t reserved1 : 5;
+        uint32_t region_mode : 1; //  Region mode
+        uint32_t stride_mode : 2; //  Stride mode
+        uint32_t reserved2 : 4;
+        uint32_t custom_dma_cs : 1; //  Custom DMA select
+#ifdef __cplusplus
+      public:
+        npu_set_dma0_src_region_t(uint32_t _region,
+                                  NPU_NAMESPACE::dma_region_mode _region_mode,
+                                  NPU_NAMESPACE::dma_stride_mode _stride_mode,
+                                  NPU_NAMESPACE::custom_dma_cs _custom_dma_cs) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SRC_REGION)),
+            reserved0(0), control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            region(static_cast<uint8_t>(_region) & ((1U << 3) - 1)), reserved1(0),
+            region_mode(static_cast<uint8_t>(_region_mode) & ((1U << 1) - 1)),
+            stride_mode(static_cast<uint8_t>(_stride_mode) & ((1U << 2) - 1)), reserved2(0),
+            custom_dma_cs(static_cast<uint8_t>(_custom_dma_cs) & ((1U << 1) - 1))
+        {
+        }
+        CONSTEXPR npu_set_dma0_src_region_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SRC_REGION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), region(0), reserved1(0), region_mode(0),
+            stride_mode(0), reserved2(0), custom_dma_cs(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SRC_REGION) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SRC_REGION);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_dma0_src_region_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_dma0_src_region_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_region() const
+        {
+            return static_cast<uint32_t>(region);
+        }
+        CONSTEXPR npu_set_dma0_src_region_t &set_region(uint32_t value)
+        {
+            region = static_cast<uint8_t>(value) & ((1U << 3) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::dma_region_mode get_region_mode() const
+        {
+            return static_cast<NPU_NAMESPACE::dma_region_mode>(region_mode);
+        }
+        CONSTEXPR npu_set_dma0_src_region_t &set_region_mode(NPU_NAMESPACE::dma_region_mode value)
+        {
+            region_mode = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::dma_stride_mode get_stride_mode() const
+        {
+            return static_cast<NPU_NAMESPACE::dma_stride_mode>(stride_mode);
+        }
+        CONSTEXPR npu_set_dma0_src_region_t &set_stride_mode(NPU_NAMESPACE::dma_stride_mode value)
+        {
+            stride_mode = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::custom_dma_cs get_custom_dma_cs() const
+        {
+            return static_cast<NPU_NAMESPACE::custom_dma_cs>(custom_dma_cs);
+        }
+        CONSTEXPR npu_set_dma0_src_region_t &set_custom_dma_cs(NPU_NAMESPACE::custom_dma_cs value)
+        {
+            custom_dma_cs = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("region", std::to_string(region)));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "region_mode",
+                (region_mode < (sizeof(dma_region_mode_str) / sizeof(dma_region_mode_str[0])) ?
+                     dma_region_mode_str[region_mode] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "stride_mode",
+                (stride_mode < (sizeof(dma_stride_mode_str) / sizeof(dma_stride_mode_str[0])) ?
+                     dma_stride_mode_str[stride_mode] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "custom_dma_cs",
+                (custom_dma_cs < (sizeof(custom_dma_cs_str) / sizeof(custom_dma_cs_str[0])) ?
+                     custom_dma_cs_str[custom_dma_cs] :
+                     "****")));
+        }
+#endif
+#endif
+    };
+    // DMA0 destination region
+    struct npu_set_dma0_dst_region_t
     {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Wait for the DMA channel to have k or fewer active descriptors outstanding. In Ethos-U55 there is only one user
-// channel so channel=0. In Ethos-U55 there is only one descriptor per channel so k=0 and the command waits for the
-// single DMA to be complete.
-struct npu_op_dma_wait_t
-{
-    uint32_t cmd_code : 10;     // NPU_OP_DMA_WAIT
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t reserved0 : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t region : 3; //  Region number if region_mode is region_mode_external. Else core mask to write to (bit k
+                             //  set for core k=0,1)
+        uint32_t reserved1 : 5;
+        uint32_t region_mode : 1; //  Region mode
+        uint32_t stride_mode : 2; //  Stride mode
+        uint32_t reserved2 : 4;
+        uint32_t custom_dma_cs : 1; //  Custom DMA select
+#ifdef __cplusplus
+      public:
+        npu_set_dma0_dst_region_t(uint32_t _region,
+                                  NPU_NAMESPACE::dma_region_mode _region_mode,
+                                  NPU_NAMESPACE::dma_stride_mode _stride_mode,
+                                  NPU_NAMESPACE::custom_dma_cs _custom_dma_cs) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_DST_REGION)),
+            reserved0(0), control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            region(static_cast<uint8_t>(_region) & ((1U << 3) - 1)), reserved1(0),
+            region_mode(static_cast<uint8_t>(_region_mode) & ((1U << 1) - 1)),
+            stride_mode(static_cast<uint8_t>(_stride_mode) & ((1U << 2) - 1)), reserved2(0),
+            custom_dma_cs(static_cast<uint8_t>(_custom_dma_cs) & ((1U << 1) - 1))
+        {
+        }
+        CONSTEXPR npu_set_dma0_dst_region_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_DST_REGION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), region(0), reserved1(0), region_mode(0),
+            stride_mode(0), reserved2(0), custom_dma_cs(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_DST_REGION) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_DST_REGION);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_dma0_dst_region_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_dma0_dst_region_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_region() const
+        {
+            return static_cast<uint32_t>(region);
+        }
+        CONSTEXPR npu_set_dma0_dst_region_t &set_region(uint32_t value)
+        {
+            region = static_cast<uint8_t>(value) & ((1U << 3) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::dma_region_mode get_region_mode() const
+        {
+            return static_cast<NPU_NAMESPACE::dma_region_mode>(region_mode);
+        }
+        CONSTEXPR npu_set_dma0_dst_region_t &set_region_mode(NPU_NAMESPACE::dma_region_mode value)
+        {
+            region_mode = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::dma_stride_mode get_stride_mode() const
+        {
+            return static_cast<NPU_NAMESPACE::dma_stride_mode>(stride_mode);
+        }
+        CONSTEXPR npu_set_dma0_dst_region_t &set_stride_mode(NPU_NAMESPACE::dma_stride_mode value)
+        {
+            stride_mode = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::custom_dma_cs get_custom_dma_cs() const
+        {
+            return static_cast<NPU_NAMESPACE::custom_dma_cs>(custom_dma_cs);
+        }
+        CONSTEXPR npu_set_dma0_dst_region_t &set_custom_dma_cs(NPU_NAMESPACE::custom_dma_cs value)
+        {
+            custom_dma_cs = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("region", std::to_string(region)));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "region_mode",
+                (region_mode < (sizeof(dma_region_mode_str) / sizeof(dma_region_mode_str[0])) ?
+                     dma_region_mode_str[region_mode] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "stride_mode",
+                (stride_mode < (sizeof(dma_stride_mode_str) / sizeof(dma_stride_mode_str[0])) ?
+                     dma_stride_mode_str[stride_mode] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "custom_dma_cs",
+                (custom_dma_cs < (sizeof(custom_dma_cs_str) / sizeof(custom_dma_cs_str[0])) ?
+                     custom_dma_cs_str[custom_dma_cs] :
+                     "****")));
+        }
+#endif
+#endif
+    };
+    // Size of second dimension for 2D/3D transfers
+    struct npu_set_dma0_size0_t
     {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_OP_DMA_WAIT) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t size : 16;   //  Size of second dimension for 2D/3D transfers
+#ifdef __cplusplus
+      public:
+        npu_set_dma0_size0_t(uint32_t _size) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE0)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            size(static_cast<uint16_t>(_size) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_dma0_size0_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE0)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), size(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE0) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE0);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_dma0_size0_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_dma0_size0_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_size() const
+        {
+            return static_cast<uint32_t>(size);
+        }
+        CONSTEXPR npu_set_dma0_size0_t &set_size(uint32_t value)
+        {
+            size = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("size", std::to_string(size)));
+        }
+#endif
+#endif
+    };
+    // Size of third dimension for 3D transfers
+    struct npu_set_dma0_size1_t
     {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_OP_DMA_WAIT);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t size : 16;   //  Size of third dimension for 3D transfers
+#ifdef __cplusplus
+      public:
+        npu_set_dma0_size1_t(uint32_t _size) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            size(static_cast<uint16_t>(_size) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_dma0_size1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), size(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_dma0_size1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_dma0_size1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_size() const
+        {
+            return static_cast<uint32_t>(size);
+        }
+        CONSTEXPR npu_set_dma0_size1_t &set_size(uint32_t value)
+        {
+            size = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("size", std::to_string(size)));
+        }
+#endif
+#endif
+    };
+    // IFM2 broadcast configuration
+    struct npu_set_ifm2_broadcast_t
     {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_op_dma_wait_t &set_cmd_code(::cmd0 value)
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t
+            broadcast_h : 1; //  Broadcast H dimension (if set then any accesses to IFM2 sets y=0 and IFM2 height=1)
+        uint32_t broadcast_w : 1; //  Broadcast W dimension (if set then any accesses to IFM2 sets x=0 and IFM2 width=1)
+        uint32_t broadcast_c : 1; //  Broadcast C dimension (if set then any accesses to IFM2 sets c=0 and IFM2 depth=1)
+        uint32_t reserved1 : 3;
+        uint32_t operand_order : 1;      //  Operand order
+        uint32_t broadcast_constant : 1; //  Broadcast constant given by NPU_SET_IFM2_SCALAR and so ignore BH, BW and BC
+        uint32_t reserved2 : 8;
+#ifdef __cplusplus
+      public:
+        npu_set_ifm2_broadcast_t(NPU_NAMESPACE::broadcast_mode _broadcast_h,
+                                 NPU_NAMESPACE::broadcast_mode _broadcast_w,
+                                 NPU_NAMESPACE::broadcast_mode _broadcast_c,
+                                 NPU_NAMESPACE::ifm2_operand_order _operand_order,
+                                 NPU_NAMESPACE::broadcast_mode _broadcast_constant) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_BROADCAST)),
+            reserved0(0), control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            broadcast_h(static_cast<uint8_t>(_broadcast_h) & ((1U << 1) - 1)),
+            broadcast_w(static_cast<uint8_t>(_broadcast_w) & ((1U << 1) - 1)),
+            broadcast_c(static_cast<uint8_t>(_broadcast_c) & ((1U << 1) - 1)), reserved1(0),
+            operand_order(static_cast<uint8_t>(_operand_order) & ((1U << 1) - 1)),
+            broadcast_constant(static_cast<uint8_t>(_broadcast_constant) & ((1U << 1) - 1)), reserved2(0)
+        {
+        }
+        CONSTEXPR npu_set_ifm2_broadcast_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_BROADCAST)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), broadcast_h(0), broadcast_w(0),
+            broadcast_c(0), reserved1(0), operand_order(0), broadcast_constant(0), reserved2(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_BROADCAST) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_BROADCAST);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm2_broadcast_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm2_broadcast_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::broadcast_mode get_broadcast_h() const
+        {
+            return static_cast<NPU_NAMESPACE::broadcast_mode>(broadcast_h);
+        }
+        CONSTEXPR npu_set_ifm2_broadcast_t &set_broadcast_h(NPU_NAMESPACE::broadcast_mode value)
+        {
+            broadcast_h = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::broadcast_mode get_broadcast_w() const
+        {
+            return static_cast<NPU_NAMESPACE::broadcast_mode>(broadcast_w);
+        }
+        CONSTEXPR npu_set_ifm2_broadcast_t &set_broadcast_w(NPU_NAMESPACE::broadcast_mode value)
+        {
+            broadcast_w = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::broadcast_mode get_broadcast_c() const
+        {
+            return static_cast<NPU_NAMESPACE::broadcast_mode>(broadcast_c);
+        }
+        CONSTEXPR npu_set_ifm2_broadcast_t &set_broadcast_c(NPU_NAMESPACE::broadcast_mode value)
+        {
+            broadcast_c = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::ifm2_operand_order get_operand_order() const
+        {
+            return static_cast<NPU_NAMESPACE::ifm2_operand_order>(operand_order);
+        }
+        CONSTEXPR npu_set_ifm2_broadcast_t &set_operand_order(NPU_NAMESPACE::ifm2_operand_order value)
+        {
+            operand_order = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::broadcast_mode get_broadcast_constant() const
+        {
+            return static_cast<NPU_NAMESPACE::broadcast_mode>(broadcast_constant);
+        }
+        CONSTEXPR npu_set_ifm2_broadcast_t &set_broadcast_constant(NPU_NAMESPACE::broadcast_mode value)
+        {
+            broadcast_constant = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "broadcast_h",
+                (broadcast_h < (sizeof(broadcast_mode_str) / sizeof(broadcast_mode_str[0])) ?
+                     broadcast_mode_str[broadcast_h] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "broadcast_w",
+                (broadcast_w < (sizeof(broadcast_mode_str) / sizeof(broadcast_mode_str[0])) ?
+                     broadcast_mode_str[broadcast_w] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "broadcast_c",
+                (broadcast_c < (sizeof(broadcast_mode_str) / sizeof(broadcast_mode_str[0])) ?
+                     broadcast_mode_str[broadcast_c] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "operand_order",
+                (operand_order < (sizeof(ifm2_operand_order_str) / sizeof(ifm2_operand_order_str[0])) ?
+                     ifm2_operand_order_str[operand_order] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "broadcast_constant",
+                (broadcast_constant < (sizeof(broadcast_mode_str) / sizeof(broadcast_mode_str[0])) ?
+                     broadcast_mode_str[broadcast_constant] :
+                     "****")));
+        }
+#endif
+#endif
+    };
+    // IFM2 scalar value
+    struct npu_set_ifm2_scalar_t
     {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Wait for n or fewer kernel operations to be remaining (not complete) before starting the next command. A kernel
-// operation is Conv, Depthwise, Pool, VectorProd Elementwise. This command is typically placed before an
-// NPU_OP_DMA_START command to prevent the DMA from starting until a previous kernel operation reading the memory has
-// completed.
-struct npu_op_kernel_wait_t
-{
-    uint32_t cmd_code : 10;     // NPU_OP_KERNEL_WAIT
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t scalar : 16; //  int16 or uint16 depending on ifm2_precision.type
+#ifdef __cplusplus
+      public:
+        npu_set_ifm2_scalar_t(uint32_t _scalar) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_SCALAR)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            scalar(static_cast<uint16_t>(_scalar) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ifm2_scalar_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_SCALAR)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), scalar(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_SCALAR) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_SCALAR);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm2_scalar_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm2_scalar_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_scalar() const
+        {
+            return static_cast<uint32_t>(scalar);
+        }
+        CONSTEXPR npu_set_ifm2_scalar_t &set_scalar(uint32_t value)
+        {
+            scalar = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("scalar", std::to_string(scalar)));
+        }
+#endif
+#endif
+    };
+    // IFM2 Precision
+    struct npu_set_ifm2_precision_t
     {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_OP_KERNEL_WAIT) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;         //  control
+        uint32_t activation_type : 1; //  IFM type - MUST MATCH IFM
+        uint32_t reserved1 : 1;
+        uint32_t activation_precision : 2; //  IFM precision - MUST MATCH IFM
+        uint32_t reserved2 : 2;
+        uint32_t activation_format : 2; //  IFM format
+        uint32_t reserved3 : 8;
+#ifdef __cplusplus
+      public:
+        npu_set_ifm2_precision_t(NPU_NAMESPACE::activation_type _activation_type,
+                                 NPU_NAMESPACE::activation_precision _activation_precision,
+                                 NPU_NAMESPACE::activation_format _activation_format) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_PRECISION)),
+            reserved0(0), control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            activation_type(static_cast<uint8_t>(_activation_type) & ((1U << 1) - 1)), reserved1(0),
+            activation_precision(static_cast<uint8_t>(_activation_precision) & ((1U << 2) - 1)), reserved2(0),
+            activation_format(static_cast<uint8_t>(_activation_format) & ((1U << 2) - 1)), reserved3(0)
+        {
+        }
+        CONSTEXPR npu_set_ifm2_precision_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_PRECISION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), activation_type(0), reserved1(0),
+            activation_precision(0), reserved2(0), activation_format(0), reserved3(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_PRECISION) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_PRECISION);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm2_precision_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm2_precision_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::activation_type get_activation_type() const
+        {
+            return static_cast<NPU_NAMESPACE::activation_type>(activation_type);
+        }
+        CONSTEXPR npu_set_ifm2_precision_t &set_activation_type(NPU_NAMESPACE::activation_type value)
+        {
+            activation_type = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::activation_precision get_activation_precision() const
+        {
+            return static_cast<NPU_NAMESPACE::activation_precision>(activation_precision);
+        }
+        CONSTEXPR npu_set_ifm2_precision_t &set_activation_precision(NPU_NAMESPACE::activation_precision value)
+        {
+            activation_precision = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::activation_format get_activation_format() const
+        {
+            return static_cast<NPU_NAMESPACE::activation_format>(activation_format);
+        }
+        CONSTEXPR npu_set_ifm2_precision_t &set_activation_format(NPU_NAMESPACE::activation_format value)
+        {
+            activation_format = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "activation_type",
+                (activation_type < (sizeof(activation_type_str) / sizeof(activation_type_str[0])) ?
+                     activation_type_str[activation_type] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "activation_precision",
+                (activation_precision < (sizeof(activation_precision_str) / sizeof(activation_precision_str[0])) ?
+                     activation_precision_str[activation_precision] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "activation_format",
+                (activation_format < (sizeof(activation_format_str) / sizeof(activation_format_str[0])) ?
+                     activation_format_str[activation_format] :
+                     "****")));
+        }
+#endif
+#endif
+    };
+    // IFM2 zero point
+    struct npu_set_ifm2_zero_point_t
     {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_OP_KERNEL_WAIT);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;     //  control
+        uint32_t zero_point : 16; //  Zero point offset
+#ifdef __cplusplus
+      public:
+        npu_set_ifm2_zero_point_t(uint32_t _zero_point) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_ZERO_POINT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            zero_point(static_cast<uint16_t>(_zero_point) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ifm2_zero_point_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_ZERO_POINT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), zero_point(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_ZERO_POINT) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_ZERO_POINT);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm2_zero_point_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm2_zero_point_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_zero_point() const
+        {
+            return static_cast<uint32_t>(zero_point);
+        }
+        CONSTEXPR npu_set_ifm2_zero_point_t &set_zero_point(uint32_t value)
+        {
+            zero_point = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("zero_point", std::to_string(zero_point)));
+        }
+#endif
+#endif
+    };
+    // IFM2 Tile 0 and tile 2 width
+    struct npu_set_ifm2_width0_m1_t
     {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_op_kernel_wait_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_op_kernel_wait_t &set_param(uint32_t value)
-    {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Enable or disable PMU counting (debug feature only).
-struct npu_op_pmu_mask_t
-{
-    uint32_t cmd_code : 10;     // NPU_OP_PMU_MASK
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_OP_PMU_MASK) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_OP_PMU_MASK);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_op_pmu_mask_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_op_pmu_mask_t &set_param(uint32_t value)
-    {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// IFM top pad
-struct npu_set_ifm_pad_top_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_IFM_PAD_TOP
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;   //  control
+        uint32_t width_m1 : 16; //  IFM2 Tile 0 and tile 2 width
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_IFM_PAD_TOP) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_IFM_PAD_TOP);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm_pad_top_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ifm_pad_top_t &set_param(uint32_t value)
+      public:
+        npu_set_ifm2_width0_m1_t(uint32_t _width_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_WIDTH0_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            width_m1(static_cast<uint16_t>(_width_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ifm2_width0_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_WIDTH0_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), width_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_WIDTH0_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_WIDTH0_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm2_width0_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm2_width0_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_width_m1() const
+        {
+            return static_cast<uint32_t>(width_m1);
+        }
+        CONSTEXPR npu_set_ifm2_width0_m1_t &set_width_m1(uint32_t value)
+        {
+            width_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("width_m1", std::to_string(width_m1)));
+        }
+#endif
+#endif
+    };
+    // IFM2 Tile 0 height
+    struct npu_set_ifm2_height0_m1_t
     {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// IFM left pad
-struct npu_set_ifm_pad_left_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_IFM_PAD_LEFT
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_IFM_PAD_LEFT) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_IFM_PAD_LEFT);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm_pad_left_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ifm_pad_left_t &set_param(uint32_t value)
-    {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// IFM right pad
-struct npu_set_ifm_pad_right_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_IFM_PAD_RIGHT
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;    //  control
+        uint32_t height_m1 : 16; //  IFM2 Tile 0 height
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_IFM_PAD_RIGHT) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_IFM_PAD_RIGHT);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm_pad_right_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ifm_pad_right_t &set_param(uint32_t value)
+      public:
+        npu_set_ifm2_height0_m1_t(uint32_t _height_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT0_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            height_m1(static_cast<uint16_t>(_height_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ifm2_height0_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT0_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), height_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT0_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT0_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm2_height0_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm2_height0_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_height_m1() const
+        {
+            return static_cast<uint32_t>(height_m1);
+        }
+        CONSTEXPR npu_set_ifm2_height0_m1_t &set_height_m1(uint32_t value)
+        {
+            height_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("height_m1", std::to_string(height_m1)));
+        }
+#endif
+#endif
+    };
+    // IFM2 Tile 1 height
+    struct npu_set_ifm2_height1_m1_t
     {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// IFM bottom pad
-struct npu_set_ifm_pad_bottom_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_IFM_PAD_BOTTOM
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_IFM_PAD_BOTTOM) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_IFM_PAD_BOTTOM);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm_pad_bottom_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ifm_pad_bottom_t &set_param(uint32_t value)
-    {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Number of input channels - 1
-struct npu_set_ifm_depth_m1_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_IFM_DEPTH_M1
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;    //  control
+        uint32_t height_m1 : 16; //  IFM2 Tile 1 height
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_IFM_DEPTH_M1) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_IFM_DEPTH_M1);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm_depth_m1_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ifm_depth_m1_t &set_param(uint32_t value)
+      public:
+        npu_set_ifm2_height1_m1_t(uint32_t _height_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT1_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            height_m1(static_cast<uint16_t>(_height_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ifm2_height1_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT1_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), height_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT1_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT1_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm2_height1_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm2_height1_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_height_m1() const
+        {
+            return static_cast<uint32_t>(height_m1);
+        }
+        CONSTEXPR npu_set_ifm2_height1_m1_t &set_height_m1(uint32_t value)
+        {
+            height_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("height_m1", std::to_string(height_m1)));
+        }
+#endif
+#endif
+    };
+    // Start of IB0,IB1 buffers for IFM2
+    struct npu_set_ifm2_ib_start_t
     {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set IFM precision
-struct npu_set_ifm_precision_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_IFM_PRECISION
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t precision : 4;
-    uint32_t reserved0 : 2;
-    uint32_t format : 2;
-    uint32_t scale_mode : 2;
-    uint32_t reserved1 : 4;
-    uint32_t round_mode : 2;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_IFM_PRECISION) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_IFM_PRECISION);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm_precision_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR ::data_format get_format() const
-    {
-        return static_cast<::data_format>(format);
-    }
-    CONSTEXPR npu_set_ifm_precision_t &set_format(::data_format value)
-    {
-        format = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR ::ifm_precision get_precision() const
-    {
-        return static_cast<::ifm_precision>(precision);
-    }
-    CONSTEXPR npu_set_ifm_precision_t &set_precision(::ifm_precision value)
-    {
-        precision = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR ::rounding get_round_mode() const
-    {
-        return static_cast<::rounding>(round_mode);
-    }
-    CONSTEXPR npu_set_ifm_precision_t &set_round_mode(::rounding value)
-    {
-        round_mode = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR ::ifm_scale_mode get_scale_mode() const
-    {
-        return static_cast<::ifm_scale_mode>(scale_mode);
-    }
-    CONSTEXPR npu_set_ifm_precision_t &set_scale_mode(::ifm_scale_mode value)
-    {
-        scale_mode = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// b[1:0] = upscale mode (0=none, 1=2x2 nearest, 2=2x2 transpose)
-struct npu_set_ifm_upscale_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_IFM_UPSCALE
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t mode : 2;
-    uint32_t reserved0 : 14;
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;  //  control
+        uint32_t ib_start : 6; //  Start of IB0,IB1 buffers for IFM2 in the SHRAM in KB units. Multiple of 2
+        uint32_t reserved1 : 10;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_IFM_UPSCALE) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_IFM_UPSCALE);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm_upscale_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR ::resampling_mode get_mode() const
-    {
-        return static_cast<::resampling_mode>(mode);
-    }
-    CONSTEXPR npu_set_ifm_upscale_t &set_mode(::resampling_mode value)
+      public:
+        npu_set_ifm2_ib_start_t(uint32_t _ib_start) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_IB_START)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            ib_start(static_cast<uint8_t>(_ib_start) & ((1U << 6) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_ifm2_ib_start_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_IB_START)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), ib_start(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_IB_START) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_IB_START);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm2_ib_start_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm2_ib_start_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_ib_start() const
+        {
+            return static_cast<uint32_t>(ib_start);
+        }
+        CONSTEXPR npu_set_ifm2_ib_start_t &set_ib_start(uint32_t value)
+        {
+            ib_start = static_cast<uint8_t>(value) & ((1U << 6) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("ib_start", std::to_string(ib_start)));
+        }
+#endif
+#endif
+    };
+    // Index n for IFM2 access
+    struct npu_set_ifm2_region_t
     {
-        mode = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Zero point offset (so value that 0 is encoded as)
-struct npu_set_ifm_zero_point_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_IFM_ZERO_POINT
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_IFM_ZERO_POINT) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_IFM_ZERO_POINT);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm_zero_point_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ifm_zero_point_t &set_param(uint32_t value)
-    {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// IFM Tile 0 and tile 2 (width-1)
-struct npu_set_ifm_width0_m1_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_IFM_WIDTH0_M1
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t region : 3;  //  Index n for IFM2 access
+        uint32_t reserved1 : 13;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_IFM_WIDTH0_M1) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_IFM_WIDTH0_M1);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm_width0_m1_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ifm_width0_m1_t &set_param(uint32_t value)
+      public:
+        npu_set_ifm2_region_t(uint32_t _region) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_REGION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            region(static_cast<uint8_t>(_region) & ((1U << 3) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_ifm2_region_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_REGION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), region(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_REGION) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_REGION);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm2_region_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm2_region_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_region() const
+        {
+            return static_cast<uint32_t>(region);
+        }
+        CONSTEXPR npu_set_ifm2_region_t &set_region(uint32_t value)
+        {
+            region = static_cast<uint8_t>(value) & ((1U << 3) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("region", std::to_string(region)));
+        }
+#endif
+#endif
+    };
+    // IFM Tile 0 address
+    struct npu_set_ifm_base0_t
     {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// IFM Tile 0 (height-1)
-struct npu_set_ifm_height0_m1_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_IFM_HEIGHT0_M1
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_IFM_HEIGHT0_M1) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_IFM_HEIGHT0_M1);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm_height0_m1_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ifm_height0_m1_t &set_param(uint32_t value)
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t addr : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_base0_t(uint32_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE0)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            addr(static_cast<uint32_t>(_addr))
+        {
+        }
+        CONSTEXPR npu_set_ifm_base0_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE0)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), addr(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE0) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE0);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_base0_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_base0_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_addr() const
+        {
+            return static_cast<uint32_t>(addr);
+        }
+        CONSTEXPR npu_set_ifm_base0_t &set_addr(uint32_t value)
+        {
+            addr = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // IFM Tile 1 address
+    struct npu_set_ifm_base1_t
     {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// IFM Tile 1 (height-1)
-struct npu_set_ifm_height1_m1_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_IFM_HEIGHT1_M1
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_IFM_HEIGHT1_M1) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_IFM_HEIGHT1_M1);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm_height1_m1_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ifm_height1_m1_t &set_param(uint32_t value)
-    {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// End of IB0,IB1 buffers in the SHRAM in KB units. Multiple of 2.
-struct npu_set_ifm_ib_end_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_IFM_IB_END
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t addr : 32; //  address offset
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_IFM_IB_END) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_IFM_IB_END);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm_ib_end_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ifm_ib_end_t &set_param(uint32_t value)
+      public:
+        npu_set_ifm_base1_t(uint32_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            addr(static_cast<uint32_t>(_addr))
+        {
+        }
+        CONSTEXPR npu_set_ifm_base1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), addr(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE1) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_base1_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_base1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_addr() const
+        {
+            return static_cast<uint32_t>(addr);
+        }
+        CONSTEXPR npu_set_ifm_base1_t &set_addr(uint32_t value)
+        {
+            addr = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // IFM Tile 2 address
+    struct npu_set_ifm_base2_t
     {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Index n for IFM access: BasePointer[n] is added to all IFM offsets
-struct npu_set_ifm_region_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_IFM_REGION
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_IFM_REGION) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_IFM_REGION);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm_region_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ifm_region_t &set_param(uint32_t value)
-    {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Output feature map width -1 (for the stripe to process)
-struct npu_set_ofm_width_m1_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_OFM_WIDTH_M1
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t addr : 32; //  address offset
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_OFM_WIDTH_M1) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_OFM_WIDTH_M1);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ofm_width_m1_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ofm_width_m1_t &set_param(uint32_t value)
+      public:
+        npu_set_ifm_base2_t(uint32_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE2)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            addr(static_cast<uint32_t>(_addr))
+        {
+        }
+        CONSTEXPR npu_set_ifm_base2_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE2)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), addr(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE2) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE2);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_base2_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_base2_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_addr() const
+        {
+            return static_cast<uint32_t>(addr);
+        }
+        CONSTEXPR npu_set_ifm_base2_t &set_addr(uint32_t value)
+        {
+            addr = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // IFM Tile 3 address
+    struct npu_set_ifm_base3_t
     {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Output feature map height -1 (for the stripe to process)
-struct npu_set_ofm_height_m1_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_OFM_HEIGHT_M1
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_OFM_HEIGHT_M1) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_OFM_HEIGHT_M1);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ofm_height_m1_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ofm_height_m1_t &set_param(uint32_t value)
-    {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Output feature map depth -1 (for the stripe to process)
-struct npu_set_ofm_depth_m1_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_OFM_DEPTH_M1
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t addr : 32; //  address offset
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_OFM_DEPTH_M1) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_OFM_DEPTH_M1);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ofm_depth_m1_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ofm_depth_m1_t &set_param(uint32_t value)
+      public:
+        npu_set_ifm_base3_t(uint32_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE3)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            addr(static_cast<uint32_t>(_addr))
+        {
+        }
+        CONSTEXPR npu_set_ifm_base3_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE3)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), addr(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE3) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE3);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_base3_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_base3_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_addr() const
+        {
+            return static_cast<uint32_t>(addr);
+        }
+        CONSTEXPR npu_set_ifm_base3_t &set_addr(uint32_t value)
+        {
+            addr = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // IFM byte stride between horizontal values
+    struct npu_set_ifm_stride_x_t
     {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set OFM precision
-struct npu_set_ofm_precision_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_OFM_PRECISION
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t precision : 3;
-    uint32_t reserved0 : 3;
-    uint32_t format : 2;
-    uint32_t scaling : 1; // 0=Per channel scale/bias 1=Global scale (SET_OFM_SCALE), no bias
-    uint32_t reserved1 : 5;
-    uint32_t rounding : 2; // 0=TFL rounding 1=truncate towards zero 2=natural rounding
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_OFM_PRECISION) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_OFM_PRECISION);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ofm_precision_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR ::data_format get_format() const
-    {
-        return static_cast<::data_format>(format);
-    }
-    CONSTEXPR npu_set_ofm_precision_t &set_format(::data_format value)
-    {
-        format = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR ::ofm_precision get_precision() const
-    {
-        return static_cast<::ofm_precision>(precision);
-    }
-    CONSTEXPR npu_set_ofm_precision_t &set_precision(::ofm_precision value)
-    {
-        precision = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR ::rounding get_rounding() const
-    {
-        return static_cast<::rounding>(rounding);
-    }
-    CONSTEXPR npu_set_ofm_precision_t &set_rounding(::rounding value)
-    {
-        rounding = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_scaling() const
-    {
-        return static_cast<uint32_t>(scaling);
-    }
-    CONSTEXPR npu_set_ofm_precision_t &set_scaling(uint32_t value)
-    {
-        scaling = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// TSU block width - 1 (provided sufficient data remaining)
-struct npu_set_ofm_blk_width_m1_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_OFM_BLK_WIDTH_M1
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t addr : 32; //  address offset
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_OFM_BLK_WIDTH_M1) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_OFM_BLK_WIDTH_M1);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ofm_blk_width_m1_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ofm_blk_width_m1_t &set_param(uint32_t value)
+      public:
+        npu_set_ifm_stride_x_t(uint32_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_X)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            addr(static_cast<uint32_t>(_addr))
+        {
+        }
+        CONSTEXPR npu_set_ifm_stride_x_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_X)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), addr(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_X) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_X);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_stride_x_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_stride_x_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_addr() const
+        {
+            return static_cast<uint32_t>(addr);
+        }
+        CONSTEXPR npu_set_ifm_stride_x_t &set_addr(uint32_t value)
+        {
+            addr = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // IFM byte stride between vertical values
+    struct npu_set_ifm_stride_y_t
     {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// TSU block height -1 (provided sufficient data remaining)
-struct npu_set_ofm_blk_height_m1_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_OFM_BLK_HEIGHT_M1
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_OFM_BLK_HEIGHT_M1) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_OFM_BLK_HEIGHT_M1);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ofm_blk_height_m1_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ofm_blk_height_m1_t &set_param(uint32_t value)
-    {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// TSU block depth -1 (provided sufficient data remaining)
-struct npu_set_ofm_blk_depth_m1_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_OFM_BLK_DEPTH_M1
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t addr : 32; //  address offset
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_OFM_BLK_DEPTH_M1) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_OFM_BLK_DEPTH_M1);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ofm_blk_depth_m1_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ofm_blk_depth_m1_t &set_param(uint32_t value)
+      public:
+        npu_set_ifm_stride_y_t(uint32_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_Y)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            addr(static_cast<uint32_t>(_addr))
+        {
+        }
+        CONSTEXPR npu_set_ifm_stride_y_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_Y)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), addr(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_Y) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_Y);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_stride_y_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_stride_y_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_addr() const
+        {
+            return static_cast<uint32_t>(addr);
+        }
+        CONSTEXPR npu_set_ifm_stride_y_t &set_addr(uint32_t value)
+        {
+            addr = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // IFM byte stride between channel blocks (of 16 bytes each block)
+    struct npu_set_ifm_stride_c_t
     {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Zero point offset (so value that 0 is encoded as)
-struct npu_set_ofm_zero_point_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_OFM_ZERO_POINT
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_OFM_ZERO_POINT) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_OFM_ZERO_POINT);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ofm_zero_point_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ofm_zero_point_t &set_param(uint32_t value)
-    {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// OFM Tile 0 and tile 2 (width-1)
-struct npu_set_ofm_width0_m1_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_OFM_WIDTH0_M1
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t addr : 32; //  address offset
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_OFM_WIDTH0_M1) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_OFM_WIDTH0_M1);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ofm_width0_m1_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ofm_width0_m1_t &set_param(uint32_t value)
+      public:
+        npu_set_ifm_stride_c_t(uint32_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_C)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            addr(static_cast<uint32_t>(_addr))
+        {
+        }
+        CONSTEXPR npu_set_ifm_stride_c_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_C)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), addr(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_C) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_C);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_stride_c_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_stride_c_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_addr() const
+        {
+            return static_cast<uint32_t>(addr);
+        }
+        CONSTEXPR npu_set_ifm_stride_c_t &set_addr(uint32_t value)
+        {
+            addr = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // OFM Tile 0 address
+    struct npu_set_ofm_base0_t
     {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// OFM Tile 0 (height-1)
-struct npu_set_ofm_height0_m1_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_OFM_HEIGHT0_M1
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_OFM_HEIGHT0_M1) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_OFM_HEIGHT0_M1);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ofm_height0_m1_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ofm_height0_m1_t &set_param(uint32_t value)
-    {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// OFM Tile 1 (height-1)
-struct npu_set_ofm_height1_m1_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_OFM_HEIGHT1_M1
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t addr : 32; //  address offset
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_OFM_HEIGHT1_M1) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_OFM_HEIGHT1_M1);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ofm_height1_m1_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ofm_height1_m1_t &set_param(uint32_t value)
+      public:
+        npu_set_ofm_base0_t(uint32_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE0)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            addr(static_cast<uint32_t>(_addr))
+        {
+        }
+        CONSTEXPR npu_set_ofm_base0_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE0)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), addr(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE0) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE0);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_base0_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_base0_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_addr() const
+        {
+            return static_cast<uint32_t>(addr);
+        }
+        CONSTEXPR npu_set_ofm_base0_t &set_addr(uint32_t value)
+        {
+            addr = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // OFM Tile 1 address
+    struct npu_set_ofm_base1_t
     {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Index n for OFM access: BasePointer[n] is added to all OFM offsets
-struct npu_set_ofm_region_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_OFM_REGION
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_OFM_REGION) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_OFM_REGION);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ofm_region_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ofm_region_t &set_param(uint32_t value)
-    {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set kernel width - 1
-struct npu_set_kernel_width_m1_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_KERNEL_WIDTH_M1
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t addr : 32; //  address offset
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_KERNEL_WIDTH_M1) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_KERNEL_WIDTH_M1);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_kernel_width_m1_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_kernel_width_m1_t &set_param(uint32_t value)
+      public:
+        npu_set_ofm_base1_t(uint32_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            addr(static_cast<uint32_t>(_addr))
+        {
+        }
+        CONSTEXPR npu_set_ofm_base1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), addr(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE1) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_base1_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_base1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_addr() const
+        {
+            return static_cast<uint32_t>(addr);
+        }
+        CONSTEXPR npu_set_ofm_base1_t &set_addr(uint32_t value)
+        {
+            addr = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // OFM Tile 2 address
+    struct npu_set_ofm_base2_t
     {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set kernel height - 1
-struct npu_set_kernel_height_m1_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_KERNEL_HEIGHT_M1
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_KERNEL_HEIGHT_M1) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_KERNEL_HEIGHT_M1);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_kernel_height_m1_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_kernel_height_m1_t &set_param(uint32_t value)
-    {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Kernel stride b0=(X stride-1)&1, b1=(Y stride-1)&1, b2=weight order (0=depth, 1=kernel) b3 = kernel_x_dilation - 1
-// (0=no x dilation, 1=x dilation of x2) b4 = kernel_y_dilation -1 (0=no y dilation, 1=y dilation of x2) b5 = kernel
-// decomposition size (0 for kernel_split_size=8, 1 for kernel_split_size=4) b[8:6] = (X stride-1)>>1 b[11:9] = (Y
-// stride-1)>>1
-struct npu_set_kernel_stride_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_KERNEL_STRIDE
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t addr : 32; //  address offset
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_KERNEL_STRIDE) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_KERNEL_STRIDE);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_kernel_stride_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_kernel_stride_t &set_param(uint32_t value)
+      public:
+        npu_set_ofm_base2_t(uint32_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE2)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            addr(static_cast<uint32_t>(_addr))
+        {
+        }
+        CONSTEXPR npu_set_ofm_base2_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE2)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), addr(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE2) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE2);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_base2_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_base2_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_addr() const
+        {
+            return static_cast<uint32_t>(addr);
+        }
+        CONSTEXPR npu_set_ofm_base2_t &set_addr(uint32_t value)
+        {
+            addr = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // OFM Tile 3 address
+    struct npu_set_ofm_base3_t
     {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// 0=1-core, 1=2-core depth (this command is Ethos-U65 only and UNPREDICTABLE for Ethos-U55)
-struct npu_set_parallel_mode_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_PARALLEL_MODE
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_PARALLEL_MODE) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_PARALLEL_MODE);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_parallel_mode_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_parallel_mode_t &set_param(uint32_t value)
-    {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set accumulator format
-struct npu_set_acc_format_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_ACC_FORMAT
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t addr : 32; //  address offset
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_ACC_FORMAT) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_ACC_FORMAT);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_acc_format_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR ::acc_format get_param() const
-    {
-        return static_cast<::acc_format>(param);
-    }
-    CONSTEXPR npu_set_acc_format_t &set_param(::acc_format value)
+      public:
+        npu_set_ofm_base3_t(uint32_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE3)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            addr(static_cast<uint32_t>(_addr))
+        {
+        }
+        CONSTEXPR npu_set_ofm_base3_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE3)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), addr(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE3) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE3);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_base3_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_base3_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_addr() const
+        {
+            return static_cast<uint32_t>(addr);
+        }
+        CONSTEXPR npu_set_ofm_base3_t &set_addr(uint32_t value)
+        {
+            addr = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // OFM byte stride between horizontal values
+    struct npu_set_ofm_stride_x_t
     {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set activation
-struct npu_set_activation_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_ACTIVATION
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t type : 12;
-    uint32_t act_clip_range : 4;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_ACTIVATION) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_ACTIVATION);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::clip_range get_act_clip_range() const
-    {
-        return static_cast<::clip_range>(act_clip_range);
-    }
-    CONSTEXPR npu_set_activation_t &set_act_clip_range(::clip_range value)
-    {
-        act_clip_range = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_activation_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR ::activation get_type() const
-    {
-        return static_cast<::activation>(type);
-    }
-    CONSTEXPR npu_set_activation_t &set_type(::activation value)
-    {
-        type = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Lower bound clip for OFM activations – range is the OFM type range
-struct npu_set_activation_min_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_ACTIVATION_MIN
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t addr : 32; //  address offset
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_ACTIVATION_MIN) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_ACTIVATION_MIN);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_activation_min_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_activation_min_t &set_param(uint32_t value)
+      public:
+        npu_set_ofm_stride_x_t(uint32_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_X)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            addr(static_cast<uint32_t>(_addr))
+        {
+        }
+        CONSTEXPR npu_set_ofm_stride_x_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_X)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), addr(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_X) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_X);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_stride_x_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_stride_x_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_addr() const
+        {
+            return static_cast<uint32_t>(addr);
+        }
+        CONSTEXPR npu_set_ofm_stride_x_t &set_addr(uint32_t value)
+        {
+            addr = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // OFM byte stride between vertical values
+    struct npu_set_ofm_stride_y_t
     {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Upper bound clip for OFM activations – range is the OFM type range
-struct npu_set_activation_max_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_ACTIVATION_MAX
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_ACTIVATION_MAX) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_ACTIVATION_MAX);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_activation_max_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_activation_max_t &set_param(uint32_t value)
-    {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Index n for weight access: BasePointer[n] is added to all Weight stream offsets
-struct npu_set_weight_region_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_WEIGHT_REGION
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t addr : 32; //  address offset
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
+      public:
+        npu_set_ofm_stride_y_t(uint32_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_Y)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            addr(static_cast<uint32_t>(_addr))
+        {
+        }
+        CONSTEXPR npu_set_ofm_stride_y_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_Y)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), addr(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_Y) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_Y);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_stride_y_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_stride_y_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_addr() const
+        {
+            return static_cast<uint32_t>(addr);
+        }
+        CONSTEXPR npu_set_ofm_stride_y_t &set_addr(uint32_t value)
+        {
+            addr = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // OFM byte stride between channel blocks (of 16 bytes each block)
+    struct npu_set_ofm_stride_c_t
     {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_WEIGHT_REGION) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_WEIGHT_REGION);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_weight_region_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_weight_region_t &set_param(uint32_t value)
-    {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Index n for weight access: BasePointer[n] is added to all scale stream offsets
-struct npu_set_scale_region_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_SCALE_REGION
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_SCALE_REGION) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_SCALE_REGION);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_scale_region_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_scale_region_t &set_param(uint32_t value)
-    {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Start of ACC0,ACC1 buffers in the SHRAM in KB units. Multiple of 4.)
-struct npu_set_ab_start_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_AB_START
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t addr : 32; //  address offset
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_AB_START) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_AB_START);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ab_start_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ab_start_t &set_param(uint32_t value)
+      public:
+        npu_set_ofm_stride_c_t(uint32_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_C)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            addr(static_cast<uint32_t>(_addr))
+        {
+        }
+        CONSTEXPR npu_set_ofm_stride_c_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_C)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), addr(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_C) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_C);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_stride_c_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_stride_c_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_addr() const
+        {
+            return static_cast<uint32_t>(addr);
+        }
+        CONSTEXPR npu_set_ofm_stride_c_t &set_addr(uint32_t value)
+        {
+            addr = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // Weight stream byte offset in WEIGHT_REGION
+    struct npu_set_weight_base_t
     {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set block number of blocks dependency between kernel operations
-struct npu_set_blockdep_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_BLOCKDEP
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_BLOCKDEP) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_BLOCKDEP);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_blockdep_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_blockdep_t &set_param(uint32_t value)
-    {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// DMA0 SRC region bitmap
-struct npu_set_dma0_src_region_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_DMA0_SRC_REGION
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t region : 8;        // If Bit[8]=0, Bit[7:0]=Region number in the range [0, 8) of SRC offset. If Bit[8]=1,
-                                // Bit[7:0]=Core number (0 or 1) to read.
-    uint32_t internal : 1;      // Must be 0 (external)
-    uint32_t stride_mode : 2;   // stride mode 0/1/2=1D/2D/3D
-    uint32_t reserved0 : 5;
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t addr : 32; //  address offset
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_DMA0_SRC_REGION) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_DMA0_SRC_REGION);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_dma0_src_region_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_internal() const
-    {
-        return static_cast<uint32_t>(internal);
-    }
-    CONSTEXPR npu_set_dma0_src_region_t &set_internal(uint32_t value)
-    {
-        internal = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_region() const
-    {
-        return static_cast<uint32_t>(region);
-    }
-    CONSTEXPR npu_set_dma0_src_region_t &set_region(uint32_t value)
-    {
-        region = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR ::stride_mode get_stride_mode() const
-    {
-        return static_cast<::stride_mode>(stride_mode);
-    }
-    CONSTEXPR npu_set_dma0_src_region_t &set_stride_mode(::stride_mode value)
+      public:
+        npu_set_weight_base_t(uint32_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_BASE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            addr(static_cast<uint32_t>(_addr))
+        {
+        }
+        CONSTEXPR npu_set_weight_base_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_BASE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), addr(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_BASE) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_BASE);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_weight_base_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_weight_base_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_addr() const
+        {
+            return static_cast<uint32_t>(addr);
+        }
+        CONSTEXPR npu_set_weight_base_t &set_addr(uint32_t value)
+        {
+            addr = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // Weight stream byte length
+    struct npu_set_weight_length_t
     {
-        stride_mode = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// DMA0 DST region bitmap
-struct npu_set_dma0_dst_region_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_DMA0_DST_REGION
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t region : 8;        // If Bit[8]=0, Bit[7:0]=Region number in the range [0, 8) of DST offset. If Bit[8]=1,
-                                // Bit[7:0]=Core mask to write to (bit k set for core k=0,1).
-    uint32_t internal : 1;      // Select external/internal=0/1
-    uint32_t stride_mode : 2;   // stride mode 0/1/2=1D/2D/3D
-    uint32_t reserved0 : 5;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_DMA0_DST_REGION) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_DMA0_DST_REGION);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_dma0_dst_region_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_internal() const
-    {
-        return static_cast<uint32_t>(internal);
-    }
-    CONSTEXPR npu_set_dma0_dst_region_t &set_internal(uint32_t value)
-    {
-        internal = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_region() const
-    {
-        return static_cast<uint32_t>(region);
-    }
-    CONSTEXPR npu_set_dma0_dst_region_t &set_region(uint32_t value)
-    {
-        region = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR ::stride_mode get_stride_mode() const
-    {
-        return static_cast<::stride_mode>(stride_mode);
-    }
-    CONSTEXPR npu_set_dma0_dst_region_t &set_stride_mode(::stride_mode value)
-    {
-        stride_mode = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Inner size for 2D/3D mode.
-struct npu_set_dma0_size0_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_DMA0_SIZE0
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t length : 32; //  Weight stream byte length
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_DMA0_SIZE0) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_DMA0_SIZE0);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_dma0_size0_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_dma0_size0_t &set_param(uint32_t value)
+      public:
+        npu_set_weight_length_t(uint32_t _length) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_LENGTH)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            length(static_cast<uint32_t>(_length))
+        {
+        }
+        CONSTEXPR npu_set_weight_length_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_LENGTH)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), length(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_LENGTH) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_LENGTH);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_weight_length_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_weight_length_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_length() const
+        {
+            return static_cast<uint32_t>(length);
+        }
+        CONSTEXPR npu_set_weight_length_t &set_length(uint32_t value)
+        {
+            length = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("length", std::to_string(length)));
+        }
+#endif
+#endif
+    };
+    // Scale and bias stream input byte offset from SCALE_REGION
+    struct npu_set_scale_base_t
     {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Outer size for 3D mode.
-struct npu_set_dma0_size1_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_DMA0_SIZE1
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_DMA0_SIZE1) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_DMA0_SIZE1);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_dma0_size1_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_dma0_size1_t &set_param(uint32_t value)
-    {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set IFM2 Broadcast mode
-struct npu_set_ifm2_broadcast_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_IFM2_BROADCAST
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t broadcast_height : 1;
-    uint32_t broadcast_width : 1;
-    uint32_t broadcast_depth : 1;
-    uint32_t reserved0 : 3;
-    uint32_t operand_order : 1;
-    uint32_t broadcast_scalar : 1;
-    uint32_t reserved1 : 8;
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t addr : 32; //  address offset
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_IFM2_BROADCAST) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_IFM2_BROADCAST);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR uint32_t get_broadcast_depth() const
-    {
-        return static_cast<uint32_t>(broadcast_depth);
-    }
-    CONSTEXPR npu_set_ifm2_broadcast_t &set_broadcast_depth(uint32_t value)
-    {
-        broadcast_depth = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_broadcast_height() const
-    {
-        return static_cast<uint32_t>(broadcast_height);
-    }
-    CONSTEXPR npu_set_ifm2_broadcast_t &set_broadcast_height(uint32_t value)
-    {
-        broadcast_height = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_broadcast_scalar() const
-    {
-        return static_cast<uint32_t>(broadcast_scalar);
-    }
-    CONSTEXPR npu_set_ifm2_broadcast_t &set_broadcast_scalar(uint32_t value)
-    {
-        broadcast_scalar = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_broadcast_width() const
-    {
-        return static_cast<uint32_t>(broadcast_width);
-    }
-    CONSTEXPR npu_set_ifm2_broadcast_t &set_broadcast_width(uint32_t value)
-    {
-        broadcast_width = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm2_broadcast_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_operand_order() const
-    {
-        return static_cast<uint32_t>(operand_order);
-    }
-    CONSTEXPR npu_set_ifm2_broadcast_t &set_operand_order(uint32_t value)
+      public:
+        npu_set_scale_base_t(uint32_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_BASE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            addr(static_cast<uint32_t>(_addr))
+        {
+        }
+        CONSTEXPR npu_set_scale_base_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_BASE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), addr(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_BASE) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_BASE);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_scale_base_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_scale_base_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_addr() const
+        {
+            return static_cast<uint32_t>(addr);
+        }
+        CONSTEXPR npu_set_scale_base_t &set_addr(uint32_t value)
+        {
+            addr = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // Scale and bias stream input byte length
+    struct npu_set_scale_length_t
     {
-        operand_order = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// IFM2 scalar value at range IFM_PRECISION
-struct npu_set_ifm2_scalar_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_IFM2_SCALAR
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_IFM2_SCALAR) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_IFM2_SCALAR);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm2_scalar_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ifm2_scalar_t &set_param(uint32_t value)
-    {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set activation
-struct npu_set_ifm2_precision_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_IFM2_PRECISION
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t precision : 4;
-    uint32_t reserved0 : 2;
-    uint32_t format : 2;
-    uint32_t reserved1 : 8;
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t length : 20; //  Scale and bias stream byte length
+        uint32_t reserved2 : 12;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
+      public:
+        npu_set_scale_length_t(uint32_t _length) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_LENGTH)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            length(static_cast<uint32_t>(_length) & ((1U << 20) - 1)), reserved2(0)
+        {
+        }
+        CONSTEXPR npu_set_scale_length_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_LENGTH)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), length(0), reserved2(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_LENGTH) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_LENGTH);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_scale_length_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_scale_length_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_length() const
+        {
+            return static_cast<uint32_t>(length);
+        }
+        CONSTEXPR npu_set_scale_length_t &set_length(uint32_t value)
+        {
+            length = static_cast<uint32_t>(value) & ((1U << 20) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("length", std::to_string(length)));
+        }
+#endif
+#endif
+    };
+    // OFM scale
+    struct npu_set_ofm_scale_t
     {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_IFM2_PRECISION) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_IFM2_PRECISION);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm2_precision_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR ::data_format get_format() const
-    {
-        return static_cast<::data_format>(format);
-    }
-    CONSTEXPR npu_set_ifm2_precision_t &set_format(::data_format value)
-    {
-        format = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR ::ifm_precision get_precision() const
-    {
-        return static_cast<::ifm_precision>(precision);
-    }
-    CONSTEXPR npu_set_ifm2_precision_t &set_precision(::ifm_precision value)
-    {
-        precision = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Zero point offset (so value that 0 is encoded as) at range IFM_PRECISION
-struct npu_set_ifm2_zero_point_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_IFM2_ZERO_POINT
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_IFM2_ZERO_POINT) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_IFM2_ZERO_POINT);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm2_zero_point_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ifm2_zero_point_t &set_param(uint32_t value)
-    {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// IFM2 Tile 0 and tile 2 (width-1)
-struct npu_set_ifm2_width0_m1_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_IFM2_WIDTH0_M1
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t shift : 6;   //  Shift
+        uint32_t reserved1 : 10;
+        uint32_t scale : 32; //  Scale. Not applied for 32-bit operations
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_IFM2_WIDTH0_M1) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_IFM2_WIDTH0_M1);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm2_width0_m1_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ifm2_width0_m1_t &set_param(uint32_t value)
+      public:
+        npu_set_ofm_scale_t(uint32_t _shift, uint32_t _scale) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_SCALE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            shift(static_cast<uint8_t>(_shift) & ((1U << 6) - 1)), reserved1(0), scale(static_cast<uint32_t>(_scale))
+        {
+        }
+        CONSTEXPR npu_set_ofm_scale_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_SCALE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), shift(0), reserved1(0), scale(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_SCALE) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_SCALE);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_scale_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_scale_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_shift() const
+        {
+            return static_cast<uint32_t>(shift);
+        }
+        CONSTEXPR npu_set_ofm_scale_t &set_shift(uint32_t value)
+        {
+            shift = static_cast<uint8_t>(value) & ((1U << 6) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_scale() const
+        {
+            return static_cast<uint32_t>(scale);
+        }
+        CONSTEXPR npu_set_ofm_scale_t &set_scale(uint32_t value)
+        {
+            scale = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("shift", std::to_string(shift)));
+            fields.push_back(std::make_pair<std::string, std::string>("scale", std::to_string(scale)));
+        }
+#endif
+#endif
+    };
+    // Input operand A scale
+    struct npu_set_opa_scale_t
     {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// IFM2 Tile 0 (height-1)
-struct npu_set_ifm2_height0_m1_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_IFM2_HEIGHT0_M1
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_IFM2_HEIGHT0_M1) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_IFM2_HEIGHT0_M1);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm2_height0_m1_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ifm2_height0_m1_t &set_param(uint32_t value)
-    {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// IFM2 Tile 1 (height-1)
-struct npu_set_ifm2_height1_m1_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_IFM2_HEIGHT1_M1
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t shift : 6;   //  Shift. Ignored if IFM scale mode is 0
+        uint32_t reserved1 : 10;
+        uint32_t scale : 32; //  Scale. 16-bit if IFM scale mode is 0
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_IFM2_HEIGHT1_M1) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_IFM2_HEIGHT1_M1);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm2_height1_m1_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ifm2_height1_m1_t &set_param(uint32_t value)
+      public:
+        npu_set_opa_scale_t(uint32_t _shift, uint32_t _scale) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPA_SCALE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            shift(static_cast<uint8_t>(_shift) & ((1U << 6) - 1)), reserved1(0), scale(static_cast<uint32_t>(_scale))
+        {
+        }
+        CONSTEXPR npu_set_opa_scale_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPA_SCALE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), shift(0), reserved1(0), scale(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPA_SCALE) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPA_SCALE);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_opa_scale_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_opa_scale_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_shift() const
+        {
+            return static_cast<uint32_t>(shift);
+        }
+        CONSTEXPR npu_set_opa_scale_t &set_shift(uint32_t value)
+        {
+            shift = static_cast<uint8_t>(value) & ((1U << 6) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_scale() const
+        {
+            return static_cast<uint32_t>(scale);
+        }
+        CONSTEXPR npu_set_opa_scale_t &set_scale(uint32_t value)
+        {
+            scale = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("shift", std::to_string(shift)));
+            fields.push_back(std::make_pair<std::string, std::string>("scale", std::to_string(scale)));
+        }
+#endif
+#endif
+    };
+    // Input operand B scale
+    struct npu_set_opb_scale_t
     {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Start of IB0, IB1 buffers for IFM2 in SHRAM. In KB units, multiple of 2.
-struct npu_set_ifm2_ib_start_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_IFM2_IB_START
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_IFM2_IB_START) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_IFM2_IB_START);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm2_ib_start_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ifm2_ib_start_t &set_param(uint32_t value)
-    {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Index n for IFM2 access: Region[n] is added to all IFM2 addresses
-struct npu_set_ifm2_region_t
-{
-    uint32_t cmd_code : 10;     // NPU_SET_IFM2_REGION
-    uint32_t must_be_zero0 : 6; // 0
-    uint32_t param : 16;
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t scale : 16; //  Scale. Not used if IFM scale mode is 1 or 2
+        uint32_t reserved2 : 16;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd0::NPU_SET_IFM2_REGION) && must_be_zero0 == 0;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code      = static_cast<uint32_t>(cmd0::NPU_SET_IFM2_REGION);
-        must_be_zero0 = 0;
-    }
-    CONSTEXPR ::cmd0 get_cmd_code() const
-    {
-        return static_cast<::cmd0>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm2_region_t &set_cmd_code(::cmd0 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_ifm2_region_t &set_param(uint32_t value)
+      public:
+        npu_set_opb_scale_t(uint32_t _scale) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPB_SCALE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            scale(static_cast<uint16_t>(_scale) & ((1U << 16) - 1)), reserved2(0)
+        {
+        }
+        CONSTEXPR npu_set_opb_scale_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPB_SCALE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), scale(0), reserved2(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPB_SCALE) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPB_SCALE);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_opb_scale_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_opb_scale_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_scale() const
+        {
+            return static_cast<uint32_t>(scale);
+        }
+        CONSTEXPR npu_set_opb_scale_t &set_scale(uint32_t value)
+        {
+            scale = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("scale", std::to_string(scale)));
+        }
+#endif
+#endif
+    };
+    // DMA user channel 0 source byte offset from DMA0_SRC_REGION
+    struct npu_set_dma0_src_t
     {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set IFM base address (top left tile)
-struct npu_set_ifm_base0_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_IFM_BASE0
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32; // IFM base address (top left tile)
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_IFM_BASE0) && must_be_zero == 0 && payload_size >= 1 &&
-               payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_IFM_BASE0);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm_base0_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_ifm_base0_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_ifm_base0_t &set_payload_size(uint32_t value)
-    {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set IFM base address (top right tile)
-struct npu_set_ifm_base1_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_IFM_BASE1
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32; // IFM base address (top right tile)
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t addr : 32; //  address offset
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_IFM_BASE1) && must_be_zero == 0 && payload_size >= 1 &&
-               payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_IFM_BASE1);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm_base1_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_ifm_base1_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_ifm_base1_t &set_payload_size(uint32_t value)
+      public:
+        npu_set_dma0_src_t(uint32_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SRC)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            addr(static_cast<uint32_t>(_addr))
+        {
+        }
+        CONSTEXPR npu_set_dma0_src_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SRC)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), addr(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SRC) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SRC);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_dma0_src_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_dma0_src_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_addr() const
+        {
+            return static_cast<uint32_t>(addr);
+        }
+        CONSTEXPR npu_set_dma0_src_t &set_addr(uint32_t value)
+        {
+            addr = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // DMA user channel 0 destination byte offset from DMA0_DST_REGION
+    struct npu_set_dma0_dst_t
     {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set IFM base address (bottom left tile)
-struct npu_set_ifm_base2_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_IFM_BASE2
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32; // IFM base address (bottom left tile)
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_IFM_BASE2) && must_be_zero == 0 && payload_size >= 1 &&
-               payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_IFM_BASE2);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm_base2_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_ifm_base2_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_ifm_base2_t &set_payload_size(uint32_t value)
-    {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set IFM base address (bottom right tile)
-struct npu_set_ifm_base3_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_IFM_BASE3
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32; // IFM base address (bottom right tile)
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t addr : 32; //  address offset
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
+      public:
+        npu_set_dma0_dst_t(uint32_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_DST)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            addr(static_cast<uint32_t>(_addr))
+        {
+        }
+        CONSTEXPR npu_set_dma0_dst_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_DST)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), addr(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_DST) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_DST);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_dma0_dst_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_dma0_dst_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_addr() const
+        {
+            return static_cast<uint32_t>(addr);
+        }
+        CONSTEXPR npu_set_dma0_dst_t &set_addr(uint32_t value)
+        {
+            addr = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // DMA user channel 0 transfer length in bytes for 1D mode
+    struct npu_set_dma0_len_t
     {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_IFM_BASE3) && must_be_zero == 0 && payload_size >= 1 &&
-               payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_IFM_BASE3);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm_base3_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_ifm_base3_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_ifm_base3_t &set_payload_size(uint32_t value)
-    {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set IFM byte stride between horizontal values
-struct npu_set_ifm_stride_x_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_IFM_STRIDE_X
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32; // IFM byte stride between horizontal values
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_IFM_STRIDE_X) && must_be_zero == 0 &&
-               payload_size >= 1 && payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_IFM_STRIDE_X);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm_stride_x_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_ifm_stride_x_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_ifm_stride_x_t &set_payload_size(uint32_t value)
-    {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set IFM byte stride between vertical values
-struct npu_set_ifm_stride_y_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_IFM_STRIDE_Y
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32; // IFM byte stride between vertical values
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t addr : 32; //  address offset
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_IFM_STRIDE_Y) && must_be_zero == 0 &&
-               payload_size >= 1 && payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_IFM_STRIDE_Y);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm_stride_y_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_ifm_stride_y_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_ifm_stride_y_t &set_payload_size(uint32_t value)
+      public:
+        npu_set_dma0_len_t(uint32_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_LEN)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            addr(static_cast<uint32_t>(_addr))
+        {
+        }
+        CONSTEXPR npu_set_dma0_len_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_LEN)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), addr(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_LEN) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_LEN);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_dma0_len_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_dma0_len_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_addr() const
+        {
+            return static_cast<uint32_t>(addr);
+        }
+        CONSTEXPR npu_set_dma0_len_t &set_addr(uint32_t value)
+        {
+            addr = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // IFM2 Tile 0 address
+    struct npu_set_ifm2_base0_t
     {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set IFM byte stride between channel blocks (of 16 bytes each block)
-struct npu_set_ifm_stride_c_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_IFM_STRIDE_C
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32; // IFM byte stride between channel blocks (of 16 bytes each block)
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_IFM_STRIDE_C) && must_be_zero == 0 &&
-               payload_size >= 1 && payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_IFM_STRIDE_C);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm_stride_c_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_ifm_stride_c_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_ifm_stride_c_t &set_payload_size(uint32_t value)
-    {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set OFM base address (top left tile)
-struct npu_set_ofm_base0_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_OFM_BASE0
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32; // OFM base address (top left tile)
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t addr : 32; //  address offset
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_OFM_BASE0) && must_be_zero == 0 && payload_size >= 1 &&
-               payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_OFM_BASE0);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_ofm_base0_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_ofm_base0_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_ofm_base0_t &set_payload_size(uint32_t value)
+      public:
+        npu_set_ifm2_base0_t(uint32_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE0)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            addr(static_cast<uint32_t>(_addr))
+        {
+        }
+        CONSTEXPR npu_set_ifm2_base0_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE0)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), addr(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE0) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE0);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm2_base0_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm2_base0_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_addr() const
+        {
+            return static_cast<uint32_t>(addr);
+        }
+        CONSTEXPR npu_set_ifm2_base0_t &set_addr(uint32_t value)
+        {
+            addr = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // IFM2 Tile 1 address
+    struct npu_set_ifm2_base1_t
     {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set OFM base address (top right tile)
-struct npu_set_ofm_base1_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_OFM_BASE1
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32; // OFM base address (top right tile)
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_OFM_BASE1) && must_be_zero == 0 && payload_size >= 1 &&
-               payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_OFM_BASE1);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_ofm_base1_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_ofm_base1_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_ofm_base1_t &set_payload_size(uint32_t value)
-    {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set OFM base address (bottom left tile)
-struct npu_set_ofm_base2_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_OFM_BASE2
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32; // OFM base address (bottom left tile)
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t addr : 32; //  address offset
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_OFM_BASE2) && must_be_zero == 0 && payload_size >= 1 &&
-               payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_OFM_BASE2);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_ofm_base2_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_ofm_base2_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_ofm_base2_t &set_payload_size(uint32_t value)
+      public:
+        npu_set_ifm2_base1_t(uint32_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            addr(static_cast<uint32_t>(_addr))
+        {
+        }
+        CONSTEXPR npu_set_ifm2_base1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), addr(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE1) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm2_base1_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm2_base1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_addr() const
+        {
+            return static_cast<uint32_t>(addr);
+        }
+        CONSTEXPR npu_set_ifm2_base1_t &set_addr(uint32_t value)
+        {
+            addr = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // IFM2 Tile 2 address
+    struct npu_set_ifm2_base2_t
     {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set OFM base address (bottom right tile)
-struct npu_set_ofm_base3_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_OFM_BASE3
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32; // OFM base address (bottom right tile)
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_OFM_BASE3) && must_be_zero == 0 && payload_size >= 1 &&
-               payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_OFM_BASE3);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_ofm_base3_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_ofm_base3_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_ofm_base3_t &set_payload_size(uint32_t value)
-    {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set OFM byte stride between horizontal values
-struct npu_set_ofm_stride_x_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_OFM_STRIDE_X
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32; // OFM byte stride between horizontal values
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t addr : 32; //  address offset
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_OFM_STRIDE_X) && must_be_zero == 0 &&
-               payload_size >= 1 && payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_OFM_STRIDE_X);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_ofm_stride_x_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_ofm_stride_x_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_ofm_stride_x_t &set_payload_size(uint32_t value)
+      public:
+        npu_set_ifm2_base2_t(uint32_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE2)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            addr(static_cast<uint32_t>(_addr))
+        {
+        }
+        CONSTEXPR npu_set_ifm2_base2_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE2)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), addr(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE2) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE2);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm2_base2_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm2_base2_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_addr() const
+        {
+            return static_cast<uint32_t>(addr);
+        }
+        CONSTEXPR npu_set_ifm2_base2_t &set_addr(uint32_t value)
+        {
+            addr = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // IFM2 Tile 3 address
+    struct npu_set_ifm2_base3_t
     {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set OFM byte stride between vertical values
-struct npu_set_ofm_stride_y_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_OFM_STRIDE_Y
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32; // OFM byte stride between vertical values
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_OFM_STRIDE_Y) && must_be_zero == 0 &&
-               payload_size >= 1 && payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_OFM_STRIDE_Y);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_ofm_stride_y_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_ofm_stride_y_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_ofm_stride_y_t &set_payload_size(uint32_t value)
-    {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set OFM byte stride between channel blocks (of 16 bytes each block)
-struct npu_set_ofm_stride_c_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_OFM_STRIDE_C
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32; // OFM byte stride between channel blocks (of 16 bytes each block)
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t addr : 32; //  address offset
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_OFM_STRIDE_C) && must_be_zero == 0 &&
-               payload_size >= 1 && payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_OFM_STRIDE_C);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_ofm_stride_c_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_ofm_stride_c_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_ofm_stride_c_t &set_payload_size(uint32_t value)
+      public:
+        npu_set_ifm2_base3_t(uint32_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE3)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            addr(static_cast<uint32_t>(_addr))
+        {
+        }
+        CONSTEXPR npu_set_ifm2_base3_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE3)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), addr(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE3) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE3);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm2_base3_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm2_base3_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_addr() const
+        {
+            return static_cast<uint32_t>(addr);
+        }
+        CONSTEXPR npu_set_ifm2_base3_t &set_addr(uint32_t value)
+        {
+            addr = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // IFM2 byte stride between horizontal values
+    struct npu_set_ifm2_stride_x_t
     {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set Weight stream input base address
-struct npu_set_weight_base_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_WEIGHT_BASE
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32; // Weight stream input base address
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_WEIGHT_BASE) && must_be_zero == 0 && payload_size >= 1 &&
-               payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_WEIGHT_BASE);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_weight_base_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_weight_base_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_weight_base_t &set_payload_size(uint32_t value)
-    {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set Weight stream length
-struct npu_set_weight_length_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_WEIGHT_LENGTH
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32; // Weight stream length
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t addr : 32; //  address offset
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
+      public:
+        npu_set_ifm2_stride_x_t(uint32_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_X)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            addr(static_cast<uint32_t>(_addr))
+        {
+        }
+        CONSTEXPR npu_set_ifm2_stride_x_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_X)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), addr(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_X) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_X);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm2_stride_x_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm2_stride_x_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_addr() const
+        {
+            return static_cast<uint32_t>(addr);
+        }
+        CONSTEXPR npu_set_ifm2_stride_x_t &set_addr(uint32_t value)
+        {
+            addr = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // IFM2 byte stride between vertical values
+    struct npu_set_ifm2_stride_y_t
     {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_WEIGHT_LENGTH) && must_be_zero == 0 &&
-               payload_size >= 1 && payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_WEIGHT_LENGTH);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_weight_length_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_weight_length_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_weight_length_t &set_payload_size(uint32_t value)
-    {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set Scale and bias stream input base address
-struct npu_set_scale_base_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_SCALE_BASE
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32; // Scale and bias stream input base address
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_SCALE_BASE) && must_be_zero == 0 && payload_size >= 1 &&
-               payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_SCALE_BASE);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_scale_base_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_scale_base_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_scale_base_t &set_payload_size(uint32_t value)
-    {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set Scale and bias stream input length
-struct npu_set_scale_length_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_SCALE_LENGTH
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32; // Scale and bias stream input length
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t addr : 32; //  address offset
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_SCALE_LENGTH) && must_be_zero == 0 &&
-               payload_size >= 1 && payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_SCALE_LENGTH);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_scale_length_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_scale_length_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_scale_length_t &set_payload_size(uint32_t value)
+      public:
+        npu_set_ifm2_stride_y_t(uint32_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_Y)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            addr(static_cast<uint32_t>(_addr))
+        {
+        }
+        CONSTEXPR npu_set_ifm2_stride_y_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_Y)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), addr(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_Y) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_Y);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm2_stride_y_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm2_stride_y_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_addr() const
+        {
+            return static_cast<uint32_t>(addr);
+        }
+        CONSTEXPR npu_set_ifm2_stride_y_t &set_addr(uint32_t value)
+        {
+            addr = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // IFM2 byte stride between channel blocks (of 16 bytes each block)
+    struct npu_set_ifm2_stride_c_t
     {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set scale (32-bit). Used by average pool with pad=0, elementwise MUL, ADD, SUB
-struct npu_set_ofm_scale_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_OFM_SCALE
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t shift : 16;
-    uint32_t data : 32; // scale (32-bit). Used by average pool with pad=0, elementwise MUL, ADD, SUB
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_OFM_SCALE) && must_be_zero == 0 && payload_size >= 1 &&
-               payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_OFM_SCALE);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_ofm_scale_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_ofm_scale_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_ofm_scale_t &set_payload_size(uint32_t value)
-    {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_shift() const
-    {
-        return static_cast<uint32_t>(shift);
-    }
-    CONSTEXPR npu_set_ofm_scale_t &set_shift(uint32_t value)
-    {
-        shift = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set scale (32-bit) used for elementwise ADD/SUB OPA prescale. If IFM scale mode is 0 then shift is ignored and scale
-// is 16-bit. If IFM scale mode is 1 or 2 then shift is 6-bit and scale is 32-bit
-struct npu_set_opa_scale_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_OPA_SCALE
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t shift : 16;
-    uint32_t
-        data : 32; // scale (32-bit) used for elementwise ADD/SUB OPA prescale. If IFM scale mode is 0 then shift is
-                   // ignored and scale is 16-bit. If IFM scale mode is 1 or 2 then shift is 6-bit and scale is 32-bit
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t addr : 32; //  address offset
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_OPA_SCALE) && must_be_zero == 0 && payload_size >= 1 &&
-               payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_OPA_SCALE);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_opa_scale_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_opa_scale_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_opa_scale_t &set_payload_size(uint32_t value)
-    {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_shift() const
-    {
-        return static_cast<uint32_t>(shift);
-    }
-    CONSTEXPR npu_set_opa_scale_t &set_shift(uint32_t value)
+      public:
+        npu_set_ifm2_stride_c_t(uint32_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_C)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            addr(static_cast<uint32_t>(_addr))
+        {
+        }
+        CONSTEXPR npu_set_ifm2_stride_c_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_C)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), addr(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_C) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_C);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm2_stride_c_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm2_stride_c_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_addr() const
+        {
+            return static_cast<uint32_t>(addr);
+        }
+        CONSTEXPR npu_set_ifm2_stride_c_t &set_addr(uint32_t value)
+        {
+            addr = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // User defined register 0
+    struct npu_set_user_defined0_t
     {
-        shift = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set scale (16-bit) used for elementwise ADD/SUB OPB prescale. If IFM scale mode is 0 then scale is 16-bit. If IFM
-// scale mode is 1 or 2 then this register is not used
-struct npu_set_opb_scale_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_OPB_SCALE
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32; // scale (16-bit) used for elementwise ADD/SUB OPB prescale. If IFM scale mode is 0 then scale
-                        // is 16-bit. If IFM scale mode is 1 or 2 then this register is not used
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_OPB_SCALE) && must_be_zero == 0 && payload_size >= 1 &&
-               payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_OPB_SCALE);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_opb_scale_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_opb_scale_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_opb_scale_t &set_payload_size(uint32_t value)
-    {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set DMA source address
-struct npu_set_dma0_src_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_DMA0_SRC
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32;
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t user_reg : 32; //  User defined register
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
+      public:
+        npu_set_user_defined0_t(uint32_t _user_reg) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED0)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            user_reg(static_cast<uint32_t>(_user_reg))
+        {
+        }
+        CONSTEXPR npu_set_user_defined0_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED0)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), user_reg(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED0) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED0);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_user_defined0_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_user_defined0_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_user_reg() const
+        {
+            return static_cast<uint32_t>(user_reg);
+        }
+        CONSTEXPR npu_set_user_defined0_t &set_user_reg(uint32_t value)
+        {
+            user_reg = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("user_reg", std::to_string(user_reg)));
+        }
+#endif
+#endif
+    };
+    // User defined register 1
+    struct npu_set_user_defined1_t
     {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_DMA0_SRC) && must_be_zero == 0 && payload_size >= 1 &&
-               payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_DMA0_SRC);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_dma0_src_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_dma0_src_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_dma0_src_t &set_payload_size(uint32_t value)
-    {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set DMA destination address
-struct npu_set_dma0_dst_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_DMA0_DST
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32;
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_DMA0_DST) && must_be_zero == 0 && payload_size >= 1 &&
-               payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_DMA0_DST);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_dma0_dst_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_dma0_dst_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_dma0_dst_t &set_payload_size(uint32_t value)
-    {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set DMA length
-struct npu_set_dma0_len_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_DMA0_LEN
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32; // DMA length
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t user_reg : 32; //  User defined register
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_DMA0_LEN) && must_be_zero == 0 && payload_size >= 1 &&
-               payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_DMA0_LEN);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_dma0_len_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_dma0_len_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_dma0_len_t &set_payload_size(uint32_t value)
+      public:
+        npu_set_user_defined1_t(uint32_t _user_reg) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            user_reg(static_cast<uint32_t>(_user_reg))
+        {
+        }
+        CONSTEXPR npu_set_user_defined1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), user_reg(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED1) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_user_defined1_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_user_defined1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_user_reg() const
+        {
+            return static_cast<uint32_t>(user_reg);
+        }
+        CONSTEXPR npu_set_user_defined1_t &set_user_reg(uint32_t value)
+        {
+            user_reg = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("user_reg", std::to_string(user_reg)));
+        }
+#endif
+#endif
+    };
+    // User defined register 2
+    struct npu_set_user_defined2_t
     {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set Byte distance to skip after inner size (2D/3D mode)
-struct npu_set_dma0_skip0_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_DMA0_SKIP0
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t param : 16;
-    uint32_t data : 32; // Byte distance to skip after inner size (2D/3D mode)
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_DMA0_SKIP0) && must_be_zero == 0 && payload_size >= 1 &&
-               payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_DMA0_SKIP0);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_dma0_skip0_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_dma0_skip0_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_dma0_skip0_t &set_param(uint32_t value)
-    {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_dma0_skip0_t &set_payload_size(uint32_t value)
-    {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set Byte distance to skip after outer size (3D mode)
-struct npu_set_dma0_skip1_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_DMA0_SKIP1
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t param : 16;
-    uint32_t data : 32; // Byte distance to skip after outer size (3D mode)
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t user_reg : 32; //  User defined register
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_DMA0_SKIP1) && must_be_zero == 0 && payload_size >= 1 &&
-               payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_DMA0_SKIP1);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_dma0_skip1_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_dma0_skip1_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_dma0_skip1_t &set_param(uint32_t value)
-    {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_dma0_skip1_t &set_payload_size(uint32_t value)
+      public:
+        npu_set_user_defined2_t(uint32_t _user_reg) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED2)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            user_reg(static_cast<uint32_t>(_user_reg))
+        {
+        }
+        CONSTEXPR npu_set_user_defined2_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED2)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), user_reg(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED2) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED2);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_user_defined2_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_user_defined2_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_user_reg() const
+        {
+            return static_cast<uint32_t>(user_reg);
+        }
+        CONSTEXPR npu_set_user_defined2_t &set_user_reg(uint32_t value)
+        {
+            user_reg = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("user_reg", std::to_string(user_reg)));
+        }
+#endif
+#endif
+    };
+    // User defined register 3
+    struct npu_set_user_defined3_t
     {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set IFM2 tile0 offset (top left tile) from IFM_REGION start
-struct npu_set_ifm2_base0_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_IFM2_BASE0
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32; // IFM2 tile0 offset (top left tile) from IFM_REGION start
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_IFM2_BASE0) && must_be_zero == 0 && payload_size >= 1 &&
-               payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_IFM2_BASE0);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm2_base0_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_ifm2_base0_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_ifm2_base0_t &set_payload_size(uint32_t value)
-    {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set IFM2 tile1 offset (top right tile) from IFM_REGION start
-struct npu_set_ifm2_base1_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_IFM2_BASE1
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32; // IFM2 tile1 offset (top right tile) from IFM_REGION start
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t user_reg : 32; //  User defined register
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_IFM2_BASE1) && must_be_zero == 0 && payload_size >= 1 &&
-               payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_IFM2_BASE1);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm2_base1_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_ifm2_base1_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_ifm2_base1_t &set_payload_size(uint32_t value)
+      public:
+        npu_set_user_defined3_t(uint32_t _user_reg) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED3)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            user_reg(static_cast<uint32_t>(_user_reg))
+        {
+        }
+        CONSTEXPR npu_set_user_defined3_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED3)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), user_reg(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED3) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED3);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_user_defined3_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_user_defined3_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_user_reg() const
+        {
+            return static_cast<uint32_t>(user_reg);
+        }
+        CONSTEXPR npu_set_user_defined3_t &set_user_reg(uint32_t value)
+        {
+            user_reg = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("user_reg", std::to_string(user_reg)));
+        }
+#endif
+#endif
+    };
+    // User defined register 4
+    struct npu_set_user_defined4_t
     {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set IFM2 tile2 offset (bottom left tile) from IFM_REGION start
-struct npu_set_ifm2_base2_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_IFM2_BASE2
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32; // IFM2 tile2 offset (bottom left tile) from IFM_REGION start
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_IFM2_BASE2) && must_be_zero == 0 && payload_size >= 1 &&
-               payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_IFM2_BASE2);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm2_base2_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_ifm2_base2_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_ifm2_base2_t &set_payload_size(uint32_t value)
-    {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set IFM2 tile3 offset (bottom right tile) from IFM_REGION start
-struct npu_set_ifm2_base3_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_IFM2_BASE3
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32; // IFM2 tile3 offset (bottom right tile) from IFM_REGION start
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t user_reg : 32; //  User defined register
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_IFM2_BASE3) && must_be_zero == 0 && payload_size >= 1 &&
-               payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_IFM2_BASE3);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm2_base3_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_ifm2_base3_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_ifm2_base3_t &set_payload_size(uint32_t value)
+      public:
+        npu_set_user_defined4_t(uint32_t _user_reg) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED4)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            user_reg(static_cast<uint32_t>(_user_reg))
+        {
+        }
+        CONSTEXPR npu_set_user_defined4_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED4)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), user_reg(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED4) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED4);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_user_defined4_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_user_defined4_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_user_reg() const
+        {
+            return static_cast<uint32_t>(user_reg);
+        }
+        CONSTEXPR npu_set_user_defined4_t &set_user_reg(uint32_t value)
+        {
+            user_reg = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("user_reg", std::to_string(user_reg)));
+        }
+#endif
+#endif
+    };
+    // User defined register 5
+    struct npu_set_user_defined5_t
     {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set IFM2 byte stride between horizontal values
-struct npu_set_ifm2_stride_x_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_IFM2_STRIDE_X
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32; // IFM2 byte stride between horizontal values
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_IFM2_STRIDE_X) && must_be_zero == 0 &&
-               payload_size >= 1 && payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_IFM2_STRIDE_X);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm2_stride_x_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_ifm2_stride_x_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_ifm2_stride_x_t &set_payload_size(uint32_t value)
-    {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set IFM2 byte stride between vertical values
-struct npu_set_ifm2_stride_y_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_IFM2_STRIDE_Y
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32; // IFM2 byte stride between vertical values
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t user_reg : 32; //  User defined register
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
+      public:
+        npu_set_user_defined5_t(uint32_t _user_reg) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED5)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            user_reg(static_cast<uint32_t>(_user_reg))
+        {
+        }
+        CONSTEXPR npu_set_user_defined5_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED5)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), user_reg(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED5) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED5);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_user_defined5_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_user_defined5_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_user_reg() const
+        {
+            return static_cast<uint32_t>(user_reg);
+        }
+        CONSTEXPR npu_set_user_defined5_t &set_user_reg(uint32_t value)
+        {
+            user_reg = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("user_reg", std::to_string(user_reg)));
+        }
+#endif
+#endif
+    };
+    // User defined register 6
+    struct npu_set_user_defined6_t
     {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_IFM2_STRIDE_Y) && must_be_zero == 0 &&
-               payload_size >= 1 && payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_IFM2_STRIDE_Y);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm2_stride_y_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_ifm2_stride_y_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_ifm2_stride_y_t &set_payload_size(uint32_t value)
-    {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set IFM2 byte stride between channel blocks (of 16 bytes each block)
-struct npu_set_ifm2_stride_c_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_IFM2_STRIDE_C
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32; // IFM2 byte stride between channel blocks (of 16 bytes each block)
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_IFM2_STRIDE_C) && must_be_zero == 0 &&
-               payload_size >= 1 && payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_IFM2_STRIDE_C);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_ifm2_stride_c_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_ifm2_stride_c_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_ifm2_stride_c_t &set_payload_size(uint32_t value)
-    {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set Weight stream byte offset in WEIGHT_REGION
-struct npu_set_weight1_base_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_WEIGHT1_BASE
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t param : 16;
-    uint32_t data : 32; // Weight stream byte offset in WEIGHT_REGION
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t user_reg : 32; //  User defined register
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_WEIGHT1_BASE) && must_be_zero == 0 &&
-               payload_size >= 1 && payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_WEIGHT1_BASE);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_weight1_base_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_weight1_base_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_weight1_base_t &set_param(uint32_t value)
-    {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_weight1_base_t &set_payload_size(uint32_t value)
+      public:
+        npu_set_user_defined6_t(uint32_t _user_reg) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED6)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            user_reg(static_cast<uint32_t>(_user_reg))
+        {
+        }
+        CONSTEXPR npu_set_user_defined6_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED6)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), user_reg(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED6) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED6);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_user_defined6_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_user_defined6_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_user_reg() const
+        {
+            return static_cast<uint32_t>(user_reg);
+        }
+        CONSTEXPR npu_set_user_defined6_t &set_user_reg(uint32_t value)
+        {
+            user_reg = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("user_reg", std::to_string(user_reg)));
+        }
+#endif
+#endif
+    };
+    // User defined register 7
+    struct npu_set_user_defined7_t
     {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set Weight stream byte length (unsigned 32 bits)
-struct npu_set_weight1_length_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_WEIGHT1_LENGTH
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32; // Weight stream byte length (unsigned 32 bits)
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_WEIGHT1_LENGTH) && must_be_zero == 0 &&
-               payload_size >= 1 && payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_WEIGHT1_LENGTH);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_weight1_length_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_weight1_length_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_weight1_length_t &set_payload_size(uint32_t value)
-    {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set Scale and bias stream input byte offset from SCALE_REGION
-struct npu_set_scale1_base_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_SCALE1_BASE
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t param : 16;
-    uint32_t data : 32; // Scale and bias stream input byte offset from SCALE_REGION
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t user_reg : 32; //  User defined register
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_SCALE1_BASE) && must_be_zero == 0 && payload_size >= 1 &&
-               payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_SCALE1_BASE);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_scale1_base_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_scale1_base_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_param() const
-    {
-        return static_cast<uint32_t>(param);
-    }
-    CONSTEXPR npu_set_scale1_base_t &set_param(uint32_t value)
-    {
-        param = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_scale1_base_t &set_payload_size(uint32_t value)
-    {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
-};
-
-// Set Scale and bias stream input byte length (unsigned 20 bits)
-struct npu_set_scale1_length_t
-{
-    uint32_t cmd_code : 10;    // NPU_SET_SCALE1_LENGTH
-    uint32_t must_be_zero : 4; // 0
-    uint32_t payload_size : 2; // Min:1 Max:2
-    uint32_t reserved0 : 16;
-    uint32_t data : 32; // Scale and bias stream input byte length (unsigned 20 bits)
+      public:
+        npu_set_user_defined7_t(uint32_t _user_reg) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED7)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            user_reg(static_cast<uint32_t>(_user_reg))
+        {
+        }
+        CONSTEXPR npu_set_user_defined7_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED7)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), user_reg(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED7) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_USER_DEFINED7);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_user_defined7_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_user_defined7_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_user_reg() const
+        {
+            return static_cast<uint32_t>(user_reg);
+        }
+        CONSTEXPR npu_set_user_defined7_t &set_user_reg(uint32_t value)
+        {
+            user_reg = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("user_reg", std::to_string(user_reg)));
+        }
+#endif
+#endif
+    };
 #ifdef __cplusplus
-    CONSTEXPR bool valid() const
-    {
-        return cmd_code == static_cast<uint32_t>(cmd1::NPU_SET_SCALE1_LENGTH) && must_be_zero == 0 &&
-               payload_size >= 1 && payload_size <= 2;
-    }
-    CONSTEXPR void init()
-    {
-        cmd_code     = static_cast<uint32_t>(cmd1::NPU_SET_SCALE1_LENGTH);
-        must_be_zero = 0;
-        payload_size = 1;
-    }
-    CONSTEXPR ::cmd1 get_cmd_code() const
-    {
-        return static_cast<::cmd1>(cmd_code);
-    }
-    CONSTEXPR npu_set_scale1_length_t &set_cmd_code(::cmd1 value)
-    {
-        cmd_code = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_data() const
-    {
-        return static_cast<uint32_t>(data);
-    }
-    CONSTEXPR npu_set_scale1_length_t &set_data(uint32_t value)
-    {
-        data = static_cast<uint32_t>(value);
-        return *this;
-    }
-    CONSTEXPR uint32_t get_payload_size() const
-    {
-        return static_cast<uint32_t>(payload_size);
-    }
-    CONSTEXPR npu_set_scale1_length_t &set_payload_size(uint32_t value)
-    {
-        payload_size = static_cast<uint32_t>(value);
-        return *this;
-    }
-#endif //__cplusplus
 };
-
-#define NPU_DATA_STRUCTS                                                                                               \
-    NPU_STRUCT(command_no_payload)                                                                                     \
-    NPU_STRUCT(command_with_payload)                                                                                   \
-    NPU_STRUCT(npu_op_stop)                                                                                            \
-    NPU_STRUCT(npu_op_irq)                                                                                             \
-    NPU_STRUCT(npu_op_conv)                                                                                            \
-    NPU_STRUCT(npu_op_depthwise)                                                                                       \
-    NPU_STRUCT(npu_op_pool)                                                                                            \
-    NPU_STRUCT(npu_op_elementwise)                                                                                     \
-    NPU_STRUCT(npu_op_dma_start)                                                                                       \
-    NPU_STRUCT(npu_op_dma_wait)                                                                                        \
-    NPU_STRUCT(npu_op_kernel_wait)                                                                                     \
-    NPU_STRUCT(npu_op_pmu_mask)                                                                                        \
-    NPU_STRUCT(npu_set_ifm_pad_top)                                                                                    \
-    NPU_STRUCT(npu_set_ifm_pad_left)                                                                                   \
-    NPU_STRUCT(npu_set_ifm_pad_right)                                                                                  \
-    NPU_STRUCT(npu_set_ifm_pad_bottom)                                                                                 \
-    NPU_STRUCT(npu_set_ifm_depth_m1)                                                                                   \
-    NPU_STRUCT(npu_set_ifm_precision)                                                                                  \
-    NPU_STRUCT(npu_set_ifm_upscale)                                                                                    \
-    NPU_STRUCT(npu_set_ifm_zero_point)                                                                                 \
-    NPU_STRUCT(npu_set_ifm_width0_m1)                                                                                  \
-    NPU_STRUCT(npu_set_ifm_height0_m1)                                                                                 \
-    NPU_STRUCT(npu_set_ifm_height1_m1)                                                                                 \
-    NPU_STRUCT(npu_set_ifm_ib_end)                                                                                     \
-    NPU_STRUCT(npu_set_ifm_region)                                                                                     \
-    NPU_STRUCT(npu_set_ofm_width_m1)                                                                                   \
-    NPU_STRUCT(npu_set_ofm_height_m1)                                                                                  \
-    NPU_STRUCT(npu_set_ofm_depth_m1)                                                                                   \
-    NPU_STRUCT(npu_set_ofm_precision)                                                                                  \
-    NPU_STRUCT(npu_set_ofm_blk_width_m1)                                                                               \
-    NPU_STRUCT(npu_set_ofm_blk_height_m1)                                                                              \
-    NPU_STRUCT(npu_set_ofm_blk_depth_m1)                                                                               \
-    NPU_STRUCT(npu_set_ofm_zero_point)                                                                                 \
-    NPU_STRUCT(npu_set_ofm_width0_m1)                                                                                  \
-    NPU_STRUCT(npu_set_ofm_height0_m1)                                                                                 \
-    NPU_STRUCT(npu_set_ofm_height1_m1)                                                                                 \
-    NPU_STRUCT(npu_set_ofm_region)                                                                                     \
-    NPU_STRUCT(npu_set_kernel_width_m1)                                                                                \
-    NPU_STRUCT(npu_set_kernel_height_m1)                                                                               \
-    NPU_STRUCT(npu_set_kernel_stride)                                                                                  \
-    NPU_STRUCT(npu_set_parallel_mode)                                                                                  \
-    NPU_STRUCT(npu_set_acc_format)                                                                                     \
-    NPU_STRUCT(npu_set_activation)                                                                                     \
-    NPU_STRUCT(npu_set_activation_min)                                                                                 \
-    NPU_STRUCT(npu_set_activation_max)                                                                                 \
-    NPU_STRUCT(npu_set_weight_region)                                                                                  \
-    NPU_STRUCT(npu_set_scale_region)                                                                                   \
-    NPU_STRUCT(npu_set_ab_start)                                                                                       \
-    NPU_STRUCT(npu_set_blockdep)                                                                                       \
-    NPU_STRUCT(npu_set_dma0_src_region)                                                                                \
-    NPU_STRUCT(npu_set_dma0_dst_region)                                                                                \
-    NPU_STRUCT(npu_set_dma0_size0)                                                                                     \
-    NPU_STRUCT(npu_set_dma0_size1)                                                                                     \
-    NPU_STRUCT(npu_set_ifm2_broadcast)                                                                                 \
-    NPU_STRUCT(npu_set_ifm2_scalar)                                                                                    \
-    NPU_STRUCT(npu_set_ifm2_precision)                                                                                 \
-    NPU_STRUCT(npu_set_ifm2_zero_point)                                                                                \
-    NPU_STRUCT(npu_set_ifm2_width0_m1)                                                                                 \
-    NPU_STRUCT(npu_set_ifm2_height0_m1)                                                                                \
-    NPU_STRUCT(npu_set_ifm2_height1_m1)                                                                                \
-    NPU_STRUCT(npu_set_ifm2_ib_start)                                                                                  \
-    NPU_STRUCT(npu_set_ifm2_region)                                                                                    \
-    NPU_STRUCT(npu_set_ifm_base0)                                                                                      \
-    NPU_STRUCT(npu_set_ifm_base1)                                                                                      \
-    NPU_STRUCT(npu_set_ifm_base2)                                                                                      \
-    NPU_STRUCT(npu_set_ifm_base3)                                                                                      \
-    NPU_STRUCT(npu_set_ifm_stride_x)                                                                                   \
-    NPU_STRUCT(npu_set_ifm_stride_y)                                                                                   \
-    NPU_STRUCT(npu_set_ifm_stride_c)                                                                                   \
-    NPU_STRUCT(npu_set_ofm_base0)                                                                                      \
-    NPU_STRUCT(npu_set_ofm_base1)                                                                                      \
-    NPU_STRUCT(npu_set_ofm_base2)                                                                                      \
-    NPU_STRUCT(npu_set_ofm_base3)                                                                                      \
-    NPU_STRUCT(npu_set_ofm_stride_x)                                                                                   \
-    NPU_STRUCT(npu_set_ofm_stride_y)                                                                                   \
-    NPU_STRUCT(npu_set_ofm_stride_c)                                                                                   \
-    NPU_STRUCT(npu_set_weight_base)                                                                                    \
-    NPU_STRUCT(npu_set_weight_length)                                                                                  \
-    NPU_STRUCT(npu_set_scale_base)                                                                                     \
-    NPU_STRUCT(npu_set_scale_length)                                                                                   \
-    NPU_STRUCT(npu_set_ofm_scale)                                                                                      \
-    NPU_STRUCT(npu_set_opa_scale)                                                                                      \
-    NPU_STRUCT(npu_set_opb_scale)                                                                                      \
-    NPU_STRUCT(npu_set_dma0_src)                                                                                       \
-    NPU_STRUCT(npu_set_dma0_dst)                                                                                       \
-    NPU_STRUCT(npu_set_dma0_len)                                                                                       \
-    NPU_STRUCT(npu_set_dma0_skip0)                                                                                     \
-    NPU_STRUCT(npu_set_dma0_skip1)                                                                                     \
-    NPU_STRUCT(npu_set_ifm2_base0)                                                                                     \
-    NPU_STRUCT(npu_set_ifm2_base1)                                                                                     \
-    NPU_STRUCT(npu_set_ifm2_base2)                                                                                     \
-    NPU_STRUCT(npu_set_ifm2_base3)                                                                                     \
-    NPU_STRUCT(npu_set_ifm2_stride_x)                                                                                  \
-    NPU_STRUCT(npu_set_ifm2_stride_y)                                                                                  \
-    NPU_STRUCT(npu_set_ifm2_stride_c)                                                                                  \
-    NPU_STRUCT(npu_set_weight1_base)                                                                                   \
-    NPU_STRUCT(npu_set_weight1_length)                                                                                 \
-    NPU_STRUCT(npu_set_scale1_base)                                                                                    \
-    NPU_STRUCT(npu_set_scale1_length)
+#endif
 #define NPU_OP_STRUCTS                                                                                                 \
     NPU_OP_(stop)                                                                                                      \
     NPU_OP_(irq)                                                                                                       \
@@ -13801,6 +23553,7 @@
     NPU_OP_(dma_wait)                                                                                                  \
     NPU_OP_(kernel_wait)                                                                                               \
     NPU_OP_(pmu_mask)
+
 #define NPU_SET_STRUCTS                                                                                                \
     NPU_SET_(ifm_pad_top)                                                                                              \
     NPU_SET_(ifm_pad_left)                                                                                             \
@@ -13830,7 +23583,6 @@
     NPU_SET_(kernel_width_m1)                                                                                          \
     NPU_SET_(kernel_height_m1)                                                                                         \
     NPU_SET_(kernel_stride)                                                                                            \
-    NPU_SET_(parallel_mode)                                                                                            \
     NPU_SET_(acc_format)                                                                                               \
     NPU_SET_(activation)                                                                                               \
     NPU_SET_(activation_min)                                                                                           \
@@ -13876,8 +23628,6 @@
     NPU_SET_(dma0_src)                                                                                                 \
     NPU_SET_(dma0_dst)                                                                                                 \
     NPU_SET_(dma0_len)                                                                                                 \
-    NPU_SET_(dma0_skip0)                                                                                               \
-    NPU_SET_(dma0_skip1)                                                                                               \
     NPU_SET_(ifm2_base0)                                                                                               \
     NPU_SET_(ifm2_base1)                                                                                               \
     NPU_SET_(ifm2_base2)                                                                                               \
@@ -13885,105 +23635,147 @@
     NPU_SET_(ifm2_stride_x)                                                                                            \
     NPU_SET_(ifm2_stride_y)                                                                                            \
     NPU_SET_(ifm2_stride_c)                                                                                            \
-    NPU_SET_(weight1_base)                                                                                             \
-    NPU_SET_(weight1_length)                                                                                           \
-    NPU_SET_(scale1_base)                                                                                              \
-    NPU_SET_(scale1_length)
-#define COMMAND_STRUCTS                                                                                                \
-    COMMAND_(no_payload)                                                                                               \
-    COMMAND_(with_payload)
+    NPU_SET_(user_defined0)                                                                                            \
+    NPU_SET_(user_defined1)                                                                                            \
+    NPU_SET_(user_defined2)                                                                                            \
+    NPU_SET_(user_defined3)                                                                                            \
+    NPU_SET_(user_defined4)                                                                                            \
+    NPU_SET_(user_defined5)                                                                                            \
+    NPU_SET_(user_defined6)                                                                                            \
+    NPU_SET_(user_defined7)
 
-#define EXPAND_ACC_FORMAT(FUNC, SEP)                                                                                   \
-    FUNC(acc_format, INT_32BIT) SEP FUNC(acc_format, INT_40BIT) SEP FUNC(acc_format, FP_S5_10)
+#define EXPAND_ACC_FORMAT(FUNC, SEP) FUNC(acc_format, I32) SEP FUNC(acc_format, I40) SEP FUNC(acc_format, F16)
 
-#define EXPAND_ACTIVATION(FUNC, SEP)                                                                                   \
-    FUNC(activation, NONE)                                                                                             \
-    SEP FUNC(activation, TANH) SEP FUNC(activation, SIGMOID) SEP FUNC(activation, LUT_START)                           \
-        SEP FUNC(activation, LUT_END)
+#define EXPAND_ACTIVATION_CLIP_RANGE(FUNC, SEP)                                                                        \
+    FUNC(activation_clip_range, OFM_PRECISION)                                                                         \
+    SEP FUNC(activation_clip_range, FORCE_UINT8) SEP FUNC(activation_clip_range, FORCE_INT8)                           \
+        SEP FUNC(activation_clip_range, FORCE_INT16)
 
-#define EXPAND_AXI_MEM_ENCODING_TYPE(FUNC, SEP)                                                                        \
-    FUNC(axi_mem_encoding_type, DEVICE_NON_BUFFERABLE)                                                                 \
-    SEP FUNC(axi_mem_encoding_type, DEVICE_BUFFERABLE)                                                                 \
-        SEP FUNC(axi_mem_encoding_type, NORMAL_NON_CACHEABLE_NON_BUFFERABLE)                                           \
-            SEP FUNC(axi_mem_encoding_type, NORMAL_NON_CACHEABLE_BUFFERABLE)                                           \
-                SEP FUNC(axi_mem_encoding_type, WRITE_THROUGH_NO_ALLOCATE)                                             \
-                    SEP FUNC(axi_mem_encoding_type, WRITE_THROUGH_READ_ALLOCATE)                                       \
-                        SEP FUNC(axi_mem_encoding_type, WRITE_THROUGH_WRITE_ALLOCATE)                                  \
-                            SEP FUNC(axi_mem_encoding_type, WRITE_THROUGH_READ_AND_WRITE_ALLOCATE)                     \
-                                SEP FUNC(axi_mem_encoding_type, WRITE_BACK_NO_ALLOCATE)                                \
-                                    SEP FUNC(axi_mem_encoding_type, WRITE_BACK_READ_ALLOCATE)                          \
-                                        SEP FUNC(axi_mem_encoding_type, WRITE_BACK_WRITE_ALLOCATE)                     \
-                                            SEP FUNC(axi_mem_encoding_type, WRITE_BACK_READ_AND_WRITE_ALLOCATE)        \
-                                                SEP FUNC(axi_mem_encoding_type, RESERVED_12)                           \
-                                                    SEP FUNC(axi_mem_encoding_type, RESERVED_13)                       \
-                                                        SEP FUNC(axi_mem_encoding_type, RESERVED_14)                   \
-                                                            SEP FUNC(axi_mem_encoding_type, RESERVED_15)
+#define EXPAND_ACTIVATION_FORMAT(FUNC, SEP) FUNC(activation_format, NHWC) SEP FUNC(activation_format, NHCWB16)
 
-#define EXPAND_CLIP_RANGE(FUNC, SEP)                                                                                   \
-    FUNC(clip_range, OFM_PRECISION)                                                                                    \
-    SEP FUNC(clip_range, FORCE_UINT8) SEP FUNC(clip_range, FORCE_INT8) SEP FUNC(clip_range, FORCE_INT16)
+#define EXPAND_ACTIVATION_FUNCTION(FUNC, SEP)                                                                          \
+    FUNC(activation_function, RELU)                                                                                    \
+    SEP FUNC(activation_function, TANH) SEP FUNC(activation_function, SIGMOID) SEP FUNC(activation_function, TABLE_0)  \
+        SEP FUNC(activation_function, TABLE_1) SEP FUNC(activation_function, TABLE_2)                                  \
+            SEP FUNC(activation_function, TABLE_3) SEP FUNC(activation_function, TABLE_4)                              \
+                SEP FUNC(activation_function, TABLE_5) SEP FUNC(activation_function, TABLE_6)                          \
+                    SEP FUNC(activation_function, TABLE_7)
 
-#define EXPAND_CMD0(FUNC, SEP)                                                                                         \
-    FUNC(cmd0, NPU_OP_STOP)                                                                                            \
-    SEP FUNC(cmd0, NPU_OP_IRQ) SEP FUNC(cmd0, NPU_OP_CONV) SEP FUNC(cmd0, NPU_OP_DEPTHWISE) SEP FUNC(                  \
-        cmd0, NPU_OP_POOL) SEP FUNC(cmd0, NPU_OP_ELEMENTWISE) SEP FUNC(cmd0, NPU_OP_DMA_START)                         \
-        SEP FUNC(cmd0, NPU_OP_DMA_WAIT) SEP FUNC(cmd0, NPU_OP_KERNEL_WAIT) SEP FUNC(cmd0, NPU_OP_PMU_MASK) SEP FUNC(   \
-            cmd0, NPU_SET_IFM_PAD_TOP) SEP FUNC(cmd0, NPU_SET_IFM_PAD_LEFT) SEP FUNC(cmd0, NPU_SET_IFM_PAD_RIGHT)      \
-            SEP FUNC(cmd0, NPU_SET_IFM_PAD_BOTTOM) SEP FUNC(cmd0, NPU_SET_IFM_DEPTH_M1) SEP FUNC(                      \
-                cmd0, NPU_SET_IFM_PRECISION) SEP FUNC(cmd0, NPU_SET_IFM_UPSCALE)                                       \
-                SEP FUNC(cmd0, NPU_SET_IFM_ZERO_POINT) SEP FUNC(cmd0, NPU_SET_IFM_WIDTH0_M1) SEP FUNC(                 \
-                    cmd0, NPU_SET_IFM_HEIGHT0_M1) SEP FUNC(cmd0, NPU_SET_IFM_HEIGHT1_M1) SEP FUNC(cmd0,                \
-                                                                                                  NPU_SET_IFM_IB_END)  \
-                    SEP FUNC(cmd0, NPU_SET_IFM_REGION) SEP FUNC(cmd0, NPU_SET_OFM_WIDTH_M1) SEP FUNC(                  \
-                        cmd0, NPU_SET_OFM_HEIGHT_M1) SEP FUNC(cmd0, NPU_SET_OFM_DEPTH_M1)                              \
-                        SEP FUNC(cmd0, NPU_SET_OFM_PRECISION) SEP FUNC(cmd0, NPU_SET_OFM_BLK_WIDTH_M1) SEP FUNC(       \
-                            cmd0, NPU_SET_OFM_BLK_HEIGHT_M1) SEP FUNC(cmd0, NPU_SET_OFM_BLK_DEPTH_M1)                  \
-                            SEP FUNC(cmd0, NPU_SET_OFM_ZERO_POINT) SEP FUNC(cmd0, NPU_SET_OFM_WIDTH0_M1) SEP FUNC(     \
-                                cmd0, NPU_SET_OFM_HEIGHT0_M1) SEP FUNC(cmd0, NPU_SET_OFM_HEIGHT1_M1)                   \
-                                SEP FUNC(cmd0, NPU_SET_OFM_REGION) SEP FUNC(cmd0, NPU_SET_KERNEL_WIDTH_M1) SEP FUNC(   \
-                                    cmd0, NPU_SET_KERNEL_HEIGHT_M1) SEP FUNC(cmd0, NPU_SET_KERNEL_STRIDE)              \
-                                    SEP FUNC(cmd0, NPU_SET_PARALLEL_MODE) SEP FUNC(cmd0, NPU_SET_ACC_FORMAT) SEP FUNC( \
-                                        cmd0, NPU_SET_ACTIVATION) SEP FUNC(cmd0, NPU_SET_ACTIVATION_MIN)               \
-                                        SEP FUNC(cmd0, NPU_SET_ACTIVATION_MAX) SEP FUNC(cmd0, NPU_SET_WEIGHT_REGION)   \
-                                            SEP FUNC(cmd0, NPU_SET_SCALE_REGION) SEP FUNC(cmd0, NPU_SET_AB_START)      \
-                                                SEP FUNC(cmd0,                                                         \
-                                                         NPU_SET_BLOCKDEP) SEP FUNC(cmd0, NPU_SET_DMA0_SRC_REGION)     \
-                                                    SEP FUNC(cmd0, NPU_SET_DMA0_DST_REGION) SEP FUNC(                  \
-                                                        cmd0, NPU_SET_DMA0_SIZE0) SEP FUNC(cmd0, NPU_SET_DMA0_SIZE1)   \
-                                                        SEP FUNC(cmd0, NPU_SET_IFM2_BROADCAST)                         \
-                                                            SEP FUNC(cmd0, NPU_SET_IFM2_SCALAR)                        \
-                                                                SEP FUNC(cmd0, NPU_SET_IFM2_PRECISION) SEP FUNC(       \
-                                                                    cmd0, NPU_SET_IFM2_ZERO_POINT)                     \
-                                                                    SEP FUNC(cmd0, NPU_SET_IFM2_WIDTH0_M1) SEP FUNC(   \
-                                                                        cmd0, NPU_SET_IFM2_HEIGHT0_M1)                 \
-                                                                        SEP FUNC(cmd0, NPU_SET_IFM2_HEIGHT1_M1)        \
-                                                                            SEP FUNC(cmd0, NPU_SET_IFM2_IB_START)      \
-                                                                                SEP FUNC(cmd0, NPU_SET_IFM2_REGION)
+#define EXPAND_ACTIVATION_PRECISION(FUNC, SEP)                                                                         \
+    FUNC(activation_precision, B8)                                                                                     \
+    SEP FUNC(activation_precision, B16) SEP FUNC(activation_precision, B32) SEP FUNC(activation_precision, B64)
 
-#define EXPAND_CMD1(FUNC, SEP)                                                                                         \
-    FUNC(cmd1, NPU_SET_IFM_BASE0)                                                                                      \
-    SEP FUNC(cmd1, NPU_SET_IFM_BASE1) SEP FUNC(cmd1, NPU_SET_IFM_BASE2) SEP FUNC(cmd1, NPU_SET_IFM_BASE3)              \
-        SEP FUNC(cmd1, NPU_SET_IFM_STRIDE_X) SEP FUNC(cmd1, NPU_SET_IFM_STRIDE_Y) SEP FUNC(cmd1, NPU_SET_IFM_STRIDE_C) \
-            SEP FUNC(cmd1, NPU_SET_OFM_BASE0) SEP FUNC(cmd1, NPU_SET_OFM_BASE1) SEP FUNC(cmd1, NPU_SET_OFM_BASE2)      \
-                SEP FUNC(cmd1, NPU_SET_OFM_BASE3) SEP FUNC(cmd1, NPU_SET_OFM_STRIDE_X)                                 \
-                    SEP FUNC(cmd1, NPU_SET_OFM_STRIDE_Y) SEP FUNC(cmd1, NPU_SET_OFM_STRIDE_C)                          \
-                        SEP FUNC(cmd1, NPU_SET_WEIGHT_BASE) SEP FUNC(cmd1, NPU_SET_WEIGHT_LENGTH)                      \
-                            SEP FUNC(cmd1, NPU_SET_SCALE_BASE) SEP FUNC(cmd1, NPU_SET_SCALE_LENGTH)                    \
-                                SEP FUNC(cmd1, NPU_SET_OFM_SCALE) SEP FUNC(cmd1, NPU_SET_OPA_SCALE)                    \
-                                    SEP FUNC(cmd1, NPU_SET_OPB_SCALE) SEP FUNC(cmd1, NPU_SET_DMA0_SRC)                 \
-                                        SEP FUNC(cmd1, NPU_SET_DMA0_DST) SEP FUNC(cmd1, NPU_SET_DMA0_LEN) SEP FUNC(    \
-                                            cmd1, NPU_SET_DMA0_SKIP0) SEP FUNC(cmd1, NPU_SET_DMA0_SKIP1)               \
-                                            SEP FUNC(cmd1, NPU_SET_IFM2_BASE0) SEP FUNC(cmd1, NPU_SET_IFM2_BASE1)      \
-                                                SEP FUNC(cmd1, NPU_SET_IFM2_BASE2) SEP FUNC(cmd1, NPU_SET_IFM2_BASE3)  \
-                                                    SEP FUNC(cmd1, NPU_SET_IFM2_STRIDE_X)                              \
-                                                        SEP FUNC(cmd1, NPU_SET_IFM2_STRIDE_Y)                          \
-                                                            SEP FUNC(cmd1, NPU_SET_IFM2_STRIDE_C)                      \
-                                                                SEP FUNC(cmd1, NPU_SET_WEIGHT1_BASE)                   \
-                                                                    SEP FUNC(cmd1, NPU_SET_WEIGHT1_LENGTH)             \
-                                                                        SEP FUNC(cmd1, NPU_SET_SCALE1_BASE)            \
-                                                                            SEP FUNC(cmd1, NPU_SET_SCALE1_LENGTH)
+#define EXPAND_ACTIVATION_TYPE(FUNC, SEP) FUNC(activation_type, UNSIGNED) SEP FUNC(activation_type, SIGNED)
 
-#define EXPAND_DATA_FORMAT(FUNC, SEP) FUNC(data_format, NHWC) SEP FUNC(data_format, NHCWB16)
+#define EXPAND_AXI_MEM_ENCODING(FUNC, SEP)                                                                             \
+    FUNC(axi_mem_encoding, DEVICE_NON_BUFFERABLE)                                                                      \
+    SEP FUNC(axi_mem_encoding, DEVICE_BUFFERABLE) SEP FUNC(axi_mem_encoding, NORMAL_NON_CACHEABLE_NON_BUFFERABLE)      \
+        SEP FUNC(axi_mem_encoding, NORMAL_NON_CACHEABLE_BUFFERABLE)                                                    \
+            SEP FUNC(axi_mem_encoding, WRITE_THROUGH_NO_ALLOCATE)                                                      \
+                SEP FUNC(axi_mem_encoding, WRITE_THROUGH_READ_ALLOCATE)                                                \
+                    SEP FUNC(axi_mem_encoding, WRITE_THROUGH_WRITE_ALLOCATE)                                           \
+                        SEP FUNC(axi_mem_encoding, WRITE_THROUGH_READ_AND_WRITE_ALLOCATE)                              \
+                            SEP FUNC(axi_mem_encoding, WRITE_BACK_NO_ALLOCATE)                                         \
+                                SEP FUNC(axi_mem_encoding, WRITE_BACK_READ_ALLOCATE)                                   \
+                                    SEP FUNC(axi_mem_encoding, WRITE_BACK_WRITE_ALLOCATE)                              \
+                                        SEP FUNC(axi_mem_encoding, WRITE_BACK_READ_AND_WRITE_ALLOCATE)
+
+#define EXPAND_BROADCAST_MODE(FUNC, SEP) FUNC(broadcast_mode, DISABLE) SEP FUNC(broadcast_mode, ENABLE)
+
+#define EXPAND_CMD0_OPCODE(FUNC, SEP)                                                                                  \
+    FUNC(cmd0_opcode, NPU_OP_STOP)                                                                                     \
+    SEP FUNC(cmd0_opcode, NPU_OP_IRQ) SEP FUNC(cmd0_opcode, NPU_OP_CONV) SEP FUNC(                                     \
+        cmd0_opcode, NPU_OP_DEPTHWISE) SEP FUNC(cmd0_opcode, NPU_OP_POOL) SEP FUNC(cmd0_opcode, NPU_OP_ELEMENTWISE)    \
+        SEP FUNC(cmd0_opcode, NPU_OP_DMA_START) SEP FUNC(cmd0_opcode, NPU_OP_DMA_WAIT) SEP FUNC(                       \
+            cmd0_opcode, NPU_OP_KERNEL_WAIT) SEP FUNC(cmd0_opcode, NPU_OP_PMU_MASK) SEP FUNC(cmd0_opcode,              \
+                                                                                             NPU_SET_IFM_PAD_TOP)      \
+            SEP FUNC(cmd0_opcode, NPU_SET_IFM_PAD_LEFT) SEP FUNC(cmd0_opcode, NPU_SET_IFM_PAD_RIGHT) SEP FUNC(         \
+                cmd0_opcode, NPU_SET_IFM_PAD_BOTTOM) SEP FUNC(cmd0_opcode,                                             \
+                                                              NPU_SET_IFM_DEPTH_M1) SEP FUNC(cmd0_opcode,              \
+                                                                                             NPU_SET_IFM_PRECISION)    \
+                SEP FUNC(cmd0_opcode, NPU_SET_IFM_UPSCALE) SEP FUNC(cmd0_opcode, NPU_SET_IFM_ZERO_POINT) SEP FUNC(     \
+                    cmd0_opcode, NPU_SET_IFM_WIDTH0_M1) SEP FUNC(cmd0_opcode, NPU_SET_IFM_HEIGHT0_M1)                  \
+                    SEP FUNC(cmd0_opcode, NPU_SET_IFM_HEIGHT1_M1) SEP FUNC(cmd0_opcode, NPU_SET_IFM_IB_END) SEP FUNC(  \
+                        cmd0_opcode, NPU_SET_IFM_REGION) SEP FUNC(cmd0_opcode, NPU_SET_OFM_WIDTH_M1)                   \
+                        SEP FUNC(cmd0_opcode, NPU_SET_OFM_HEIGHT_M1) SEP FUNC(cmd0_opcode, NPU_SET_OFM_DEPTH_M1)       \
+                            SEP FUNC(cmd0_opcode, NPU_SET_OFM_PRECISION) SEP FUNC(                                     \
+                                cmd0_opcode, NPU_SET_OFM_BLK_WIDTH_M1) SEP FUNC(cmd0_opcode,                           \
+                                                                                NPU_SET_OFM_BLK_HEIGHT_M1)             \
+                                SEP FUNC(cmd0_opcode, NPU_SET_OFM_BLK_DEPTH_M1) SEP FUNC(                              \
+                                    cmd0_opcode, NPU_SET_OFM_ZERO_POINT) SEP FUNC(cmd0_opcode, NPU_SET_OFM_WIDTH0_M1)  \
+                                    SEP FUNC(cmd0_opcode, NPU_SET_OFM_HEIGHT0_M1) SEP FUNC(                            \
+                                        cmd0_opcode,                                                                   \
+                                        NPU_SET_OFM_HEIGHT1_M1) SEP FUNC(cmd0_opcode, NPU_SET_OFM_REGION)              \
+                                        SEP FUNC(cmd0_opcode, NPU_SET_KERNEL_WIDTH_M1) SEP FUNC(                       \
+                                            cmd0_opcode,                                                               \
+                                            NPU_SET_KERNEL_HEIGHT_M1) SEP FUNC(cmd0_opcode, NPU_SET_KERNEL_STRIDE)     \
+                                            SEP FUNC(cmd0_opcode, NPU_SET_ACC_FORMAT) SEP FUNC(                        \
+                                                cmd0_opcode,                                                           \
+                                                NPU_SET_ACTIVATION) SEP FUNC(cmd0_opcode, NPU_SET_ACTIVATION_MIN)      \
+                                                SEP FUNC(cmd0_opcode, NPU_SET_ACTIVATION_MAX) SEP FUNC(                \
+                                                    cmd0_opcode,                                                       \
+                                                    NPU_SET_WEIGHT_REGION) SEP FUNC(cmd0_opcode, NPU_SET_SCALE_REGION) \
+                                                    SEP FUNC(cmd0_opcode,                                              \
+                                                             NPU_SET_AB_START) SEP FUNC(cmd0_opcode, NPU_SET_BLOCKDEP) \
+                                                        SEP FUNC(cmd0_opcode, NPU_SET_DMA0_SRC_REGION) SEP FUNC(       \
+                                                            cmd0_opcode,                                               \
+                                                            NPU_SET_DMA0_DST_REGION) SEP FUNC(cmd0_opcode,             \
+                                                                                              NPU_SET_DMA0_SIZE0)      \
+                                                            SEP FUNC(cmd0_opcode, NPU_SET_DMA0_SIZE1) SEP FUNC(        \
+                                                                cmd0_opcode,                                           \
+                                                                NPU_SET_IFM2_BROADCAST)                                \
+                                                                SEP FUNC(cmd0_opcode, NPU_SET_IFM2_SCALAR) SEP FUNC(   \
+                                                                    cmd0_opcode,                                       \
+                                                                    NPU_SET_IFM2_PRECISION)                            \
+                                                                    SEP FUNC(cmd0_opcode, NPU_SET_IFM2_ZERO_POINT)     \
+                                                                        SEP FUNC(cmd0_opcode, NPU_SET_IFM2_WIDTH0_M1)  \
+                                                                            SEP FUNC(cmd0_opcode,                      \
+                                                                                     NPU_SET_IFM2_HEIGHT0_M1)          \
+                                                                                SEP FUNC(cmd0_opcode,                  \
+                                                                                         NPU_SET_IFM2_HEIGHT1_M1)      \
+                                                                                    SEP FUNC(cmd0_opcode,              \
+                                                                                             NPU_SET_IFM2_IB_START)    \
+                                                                                        SEP FUNC(cmd0_opcode,          \
+                                                                                                 NPU_SET_IFM2_REGION)
+
+#define EXPAND_CMD1_OPCODE(FUNC, SEP)                                                                                  \
+    FUNC(cmd1_opcode, NPU_SET_IFM_BASE0)                                                                               \
+    SEP FUNC(cmd1_opcode, NPU_SET_IFM_BASE1) SEP FUNC(cmd1_opcode, NPU_SET_IFM_BASE2) SEP FUNC(                        \
+        cmd1_opcode, NPU_SET_IFM_BASE3) SEP FUNC(cmd1_opcode, NPU_SET_IFM_STRIDE_X)                                    \
+        SEP FUNC(cmd1_opcode, NPU_SET_IFM_STRIDE_Y) SEP FUNC(cmd1_opcode, NPU_SET_IFM_STRIDE_C) SEP FUNC(              \
+            cmd1_opcode, NPU_SET_OFM_BASE0) SEP FUNC(cmd1_opcode, NPU_SET_OFM_BASE1)                                   \
+            SEP FUNC(cmd1_opcode, NPU_SET_OFM_BASE2) SEP FUNC(cmd1_opcode, NPU_SET_OFM_BASE3) SEP FUNC(                \
+                cmd1_opcode, NPU_SET_OFM_STRIDE_X) SEP FUNC(cmd1_opcode, NPU_SET_OFM_STRIDE_Y)                         \
+                SEP FUNC(cmd1_opcode, NPU_SET_OFM_STRIDE_C) SEP FUNC(cmd1_opcode, NPU_SET_WEIGHT_BASE) SEP FUNC(       \
+                    cmd1_opcode, NPU_SET_WEIGHT_LENGTH) SEP FUNC(cmd1_opcode, NPU_SET_SCALE_BASE)                      \
+                    SEP FUNC(cmd1_opcode, NPU_SET_SCALE_LENGTH) SEP FUNC(cmd1_opcode, NPU_SET_OFM_SCALE) SEP FUNC(     \
+                        cmd1_opcode, NPU_SET_OPA_SCALE) SEP FUNC(cmd1_opcode, NPU_SET_OPB_SCALE)                       \
+                        SEP FUNC(cmd1_opcode, NPU_SET_DMA0_SRC) SEP FUNC(cmd1_opcode, NPU_SET_DMA0_DST) SEP FUNC(      \
+                            cmd1_opcode, NPU_SET_DMA0_LEN) SEP FUNC(cmd1_opcode, NPU_SET_IFM2_BASE0)                   \
+                            SEP FUNC(cmd1_opcode, NPU_SET_IFM2_BASE1) SEP FUNC(cmd1_opcode, NPU_SET_IFM2_BASE2)        \
+                                SEP FUNC(cmd1_opcode, NPU_SET_IFM2_BASE3) SEP FUNC(cmd1_opcode, NPU_SET_IFM2_STRIDE_X) \
+                                    SEP FUNC(cmd1_opcode, NPU_SET_IFM2_STRIDE_Y)                                       \
+                                        SEP FUNC(cmd1_opcode, NPU_SET_IFM2_STRIDE_C)                                   \
+                                            SEP FUNC(cmd1_opcode, NPU_SET_USER_DEFINED0)                               \
+                                                SEP FUNC(cmd1_opcode, NPU_SET_USER_DEFINED1)                           \
+                                                    SEP FUNC(cmd1_opcode, NPU_SET_USER_DEFINED2)                       \
+                                                        SEP FUNC(cmd1_opcode, NPU_SET_USER_DEFINED3)                   \
+                                                            SEP FUNC(cmd1_opcode, NPU_SET_USER_DEFINED4)               \
+                                                                SEP FUNC(cmd1_opcode, NPU_SET_USER_DEFINED5)           \
+                                                                    SEP FUNC(cmd1_opcode, NPU_SET_USER_DEFINED6)       \
+                                                                        SEP FUNC(cmd1_opcode, NPU_SET_USER_DEFINED7)
+
+#define EXPAND_CMD_CTRL(FUNC, SEP) FUNC(cmd_ctrl, CMD0_CTRL) SEP FUNC(cmd_ctrl, CMD1_CTRL)
+
+#define EXPAND_CUSTOM_DMA_CS(FUNC, SEP) FUNC(custom_dma_cs, DISABLE) SEP FUNC(custom_dma_cs, ENABLE)
+
+#define EXPAND_CUSTOM_DMA(FUNC, SEP) FUNC(custom_dma, NOT_IMPLEMENTED) SEP FUNC(custom_dma, IMPLEMENTED)
+
+#define EXPAND_DMA_FAULT_SRC(FUNC, SEP) FUNC(dma_fault_src, AXI_M0) SEP FUNC(dma_fault_src, AXI_M1)
+
+#define EXPAND_DMA_REGION_MODE(FUNC, SEP) FUNC(dma_region_mode, EXTERNAL) SEP FUNC(dma_region_mode, INTERNAL)
+
+#define EXPAND_DMA_STRIDE_MODE(FUNC, SEP) FUNC(dma_stride_mode, D1)
 
 #define EXPAND_ELEMENTWISE_MODE(FUNC, SEP)                                                                             \
     FUNC(elementwise_mode, MUL)                                                                                        \
@@ -13991,116 +23783,112 @@
         SEP FUNC(elementwise_mode, MAX) SEP FUNC(elementwise_mode, LRELU) SEP FUNC(elementwise_mode, ABS)              \
             SEP FUNC(elementwise_mode, CLZ) SEP FUNC(elementwise_mode, SHR) SEP FUNC(elementwise_mode, SHL)
 
-#define EXPAND_IFM_PRECISION(FUNC, SEP)                                                                                \
-    FUNC(ifm_precision, U8)                                                                                            \
-    SEP FUNC(ifm_precision, S8) SEP FUNC(ifm_precision, U16) SEP FUNC(ifm_precision, S16) SEP FUNC(ifm_precision, S32)
+#define EXPAND_FUNCTIONAL_SAFETY(FUNC, SEP)                                                                            \
+    FUNC(functional_safety, NOT_IMPLEMENTED) SEP FUNC(functional_safety, IMPLEMENTED)
+
+#define EXPAND_IFM2_OPERAND_ORDER(FUNC, SEP) FUNC(ifm2_operand_order, ORDER_B) SEP FUNC(ifm2_operand_order, ORDER_A)
 
 #define EXPAND_IFM_SCALE_MODE(FUNC, SEP)                                                                               \
-    FUNC(ifm_scale_mode, SCALE_16BIT)                                                                                  \
-    SEP FUNC(ifm_scale_mode, SCALE_OPA_32BIT) SEP FUNC(ifm_scale_mode, SCALE_OPB_32BIT)
+    FUNC(ifm_scale_mode, OPA_OPB_16) SEP FUNC(ifm_scale_mode, OPA_32) SEP FUNC(ifm_scale_mode, OPB_32)
 
-#define EXPAND_MACS_PER_CC(FUNC, SEP)                                                                                  \
-    FUNC(macs_per_cc, MACS_PER_CC_IS_5)                                                                                \
-    SEP FUNC(macs_per_cc, MACS_PER_CC_IS_6) SEP FUNC(macs_per_cc, MACS_PER_CC_IS_7)                                    \
-        SEP FUNC(macs_per_cc, MACS_PER_CC_IS_8)
+#define EXPAND_IFM_UPSCALE_MODE(FUNC, SEP)                                                                             \
+    FUNC(ifm_upscale_mode, NONE) SEP FUNC(ifm_upscale_mode, NEAREST) SEP FUNC(ifm_upscale_mode, ZEROS)
 
-#define EXPAND_MEMORY_TYPE(FUNC, SEP)                                                                                  \
-    FUNC(memory_type, AXI0_OUTSTANDING_COUNTER0)                                                                       \
-    SEP FUNC(memory_type, AXI0_OUTSTANDING_COUNTER1) SEP FUNC(memory_type, AXI1_OUTSTANDING_COUNTER2)                  \
-        SEP FUNC(memory_type, AXI1_OUTSTANDING_COUNTER3)
+#define EXPAND_KERNEL_DECOMPOSITION(FUNC, SEP) FUNC(kernel_decomposition, D8X8) SEP FUNC(kernel_decomposition, D4X4)
 
-#define EXPAND_OFM_PRECISION(FUNC, SEP)                                                                                \
-    FUNC(ofm_precision, U8)                                                                                            \
-    SEP FUNC(ofm_precision, S8) SEP FUNC(ofm_precision, U16) SEP FUNC(ofm_precision, S16) SEP FUNC(ofm_precision, S32)
+#define EXPAND_KERNEL_DILATION(FUNC, SEP) FUNC(kernel_dilation, NONE) SEP FUNC(kernel_dilation, X2)
 
-#define EXPAND_PMU_EVENT_TYPE(FUNC, SEP)                                                                                           \
-    FUNC(pmu_event_type, NO_EVENT)                                                                                                 \
-    SEP FUNC(pmu_event_type, CYCLE) SEP FUNC(pmu_event_type, NPU_IDLE) SEP FUNC(                                                   \
-        pmu_event_type, CC_STALLED_ON_BLOCKDEP) SEP FUNC(pmu_event_type,                                                           \
-                                                         CC_STALLED_ON_SHRAM_RECONFIG) SEP FUNC(pmu_event_type,                    \
-                                                                                                NPU_ACTIVE)                        \
-        SEP FUNC(pmu_event_type, MAC_ACTIVE) SEP FUNC(pmu_event_type, MAC_ACTIVE_8BIT) SEP FUNC(                                   \
-            pmu_event_type, MAC_ACTIVE_16BIT) SEP FUNC(pmu_event_type, MAC_DPU_ACTIVE) SEP FUNC(pmu_event_type,                    \
-                                                                                                MAC_STALLED_BY_WD_ACC)             \
-            SEP FUNC(pmu_event_type, MAC_STALLED_BY_WD) SEP FUNC(pmu_event_type, MAC_STALLED_BY_ACC) SEP FUNC(                     \
-                pmu_event_type, MAC_STALLED_BY_IB) SEP FUNC(pmu_event_type,                                                        \
-                                                            MAC_ACTIVE_32BIT) SEP FUNC(pmu_event_type,                             \
-                                                                                       MAC_STALLED_BY_INT_W)                       \
-                SEP FUNC(pmu_event_type, MAC_STALLED_BY_INT_ACC) SEP FUNC(pmu_event_type, AO_ACTIVE) SEP FUNC(                     \
-                    pmu_event_type, AO_ACTIVE_8BIT) SEP FUNC(pmu_event_type,                                                       \
-                                                             AO_ACTIVE_16BIT) SEP FUNC(pmu_event_type,                             \
-                                                                                       AO_STALLED_BY_OFMP_OB)                      \
-                    SEP FUNC(pmu_event_type, AO_STALLED_BY_OFMP) SEP FUNC(pmu_event_type, AO_STALLED_BY_OB) SEP FUNC(              \
-                        pmu_event_type,                                                                                            \
-                        AO_STALLED_BY_ACC_IB) SEP FUNC(pmu_event_type,                                                             \
-                                                       AO_STALLED_BY_ACC) SEP FUNC(pmu_event_type,                                 \
-                                                                                   AO_STALLED_BY_IB) SEP FUNC(pmu_event_type,      \
-                                                                                                              WD_ACTIVE) SEP       \
-                        FUNC(pmu_event_type, WD_STALLED) SEP FUNC(pmu_event_type, WD_STALLED_BY_WS) SEP FUNC(                      \
-                            pmu_event_type,                                                                                        \
-                            WD_STALLED_BY_WD_BUF) SEP                                                                              \
-                            FUNC(pmu_event_type, WD_PARSE_ACTIVE) SEP FUNC(pmu_event_type, WD_PARSE_STALLED) SEP FUNC(             \
-                                pmu_event_type,                                                                                    \
-                                WD_PARSE_STALLED_IN) SEP FUNC(pmu_event_type,                                                      \
-                                                              WD_PARSE_STALLED_OUT) SEP                                            \
-                                FUNC(pmu_event_type, WD_TRANS_WS) SEP FUNC(pmu_event_type, WD_TRANS_WB) SEP FUNC(                  \
-                                    pmu_event_type,                                                                                \
-                                    WD_TRANS_DW0) SEP FUNC(pmu_event_type,                                                         \
-                                                           WD_TRANS_DW1) SEP FUNC(pmu_event_type,                                  \
-                                                                                  AXI0_RD_TRANS_ACCEPTED) SEP                      \
-                                    FUNC(pmu_event_type, AXI0_RD_TRANS_COMPLETED) SEP FUNC(                                        \
-                                        pmu_event_type,                                                                            \
-                                        AXI0_RD_DATA_BEAT_RECEIVED) SEP FUNC(pmu_event_type, AXI0_RD_TRAN_REQ_STALLED)             \
-                                        SEP FUNC(pmu_event_type,                                                                   \
-                                                 AXI0_WR_TRANS_ACCEPTED) SEP FUNC(pmu_event_type,                                  \
-                                                                                  AXI0_WR_TRANS_COMPLETED_M)                       \
-                                            SEP FUNC(pmu_event_type, AXI0_WR_TRANS_COMPLETED_S) SEP FUNC(                          \
-                                                pmu_event_type,                                                                    \
-                                                AXI0_WR_DATA_BEAT_WRITTEN)                                                         \
-                                                SEP FUNC(pmu_event_type, AXI0_WR_TRAN_REQ_STALLED) SEP FUNC(                       \
-                                                    pmu_event_type,                                                                \
-                                                    AXI0_WR_DATA_BEAT_STALLED) SEP                                                 \
-                                                    FUNC(pmu_event_type, AXI0_ENABLED_CYCLES) SEP FUNC(                            \
-                                                        pmu_event_type,                                                            \
-                                                        AXI0_RD_STALL_LIMIT) SEP FUNC(pmu_event_type,                              \
-                                                                                      AXI0_WR_STALL_LIMIT) SEP                     \
-                                                        FUNC(pmu_event_type, AXI1_RD_TRANS_ACCEPTED) SEP FUNC(                     \
-                                                            pmu_event_type,                                                        \
-                                                            AXI1_RD_TRANS_COMPLETED) SEP FUNC(pmu_event_type,                      \
-                                                                                              AXI1_RD_DATA_BEAT_RECEIVED) SEP      \
-                                                            FUNC(pmu_event_type, AXI1_RD_TRAN_REQ_STALLED) SEP FUNC(               \
-                                                                pmu_event_type,                                                    \
-                                                                AXI1_WR_TRANS_ACCEPTED) SEP                                        \
-                                                                FUNC(pmu_event_type, AXI1_WR_TRANS_COMPLETED_M) SEP FUNC(          \
-                                                                    pmu_event_type,                                                \
-                                                                    AXI1_WR_TRANS_COMPLETED_S) SEP                                 \
-                                                                    FUNC(pmu_event_type, AXI1_WR_DATA_BEAT_WRITTEN) SEP FUNC(      \
-                                                                        pmu_event_type,                                            \
-                                                                        AXI1_WR_TRAN_REQ_STALLED) SEP                              \
-                                                                        FUNC(pmu_event_type, AXI1_WR_DATA_BEAT_STALLED) SEP FUNC(  \
-                                                                            pmu_event_type,                                        \
-                                                                            AXI1_ENABLED_CYCLES) SEP FUNC(pmu_event_type,          \
-                                                                                                          AXI1_RD_STALL_LIMIT) SEP \
-                                                                            FUNC(pmu_event_type, AXI1_WR_STALL_LIMIT) SEP FUNC(    \
-                                                                                pmu_event_type,                                    \
-                                                                                AXI_LATENCY_ANY) SEP FUNC(pmu_event_type,          \
-                                                                                                          AXI_LATENCY_32) SEP      \
-                                                                                FUNC(pmu_event_type, AXI_LATENCY_64) SEP FUNC(     \
-                                                                                    pmu_event_type,                                \
-                                                                                    AXI_LATENCY_128) SEP                           \
-                                                                                    FUNC(pmu_event_type,                           \
-                                                                                         AXI_LATENCY_256) SEP                      \
-                                                                                        FUNC(pmu_event_type,                       \
-                                                                                             AXI_LATENCY_512) SEP                  \
-                                                                                            FUNC(pmu_event_type,                   \
-                                                                                                 AXI_LATENCY_1024) SEP             \
-                                                                                                FUNC(pmu_event_type,               \
-                                                                                                     ECC_DMA) SEP                  \
-                                                                                                    FUNC(                          \
-                                                                                                        pmu_event_type,            \
-                                                                                                        ECC_SB0) SEP               \
-                                                                                                        FUNC(                      \
-                                                                                                            pmu_event_type,        \
+#define EXPAND_MAX_BEATS(FUNC, SEP) FUNC(max_beats, B64) SEP FUNC(max_beats, B128) SEP FUNC(max_beats, B256)
+
+#define EXPAND_MEM_ATTR(FUNC, SEP)                                                                                     \
+    FUNC(mem_attr, AXI0_OUTSTANDING_COUNTER0)                                                                          \
+    SEP FUNC(mem_attr, AXI0_OUTSTANDING_COUNTER1) SEP FUNC(mem_attr, AXI1_OUTSTANDING_COUNTER2)                        \
+        SEP FUNC(mem_attr, AXI1_OUTSTANDING_COUNTER3)
+
+#define EXPAND_OFM_SCALE_MODE(FUNC, SEP) FUNC(ofm_scale_mode, PER_CHANNEL) SEP FUNC(ofm_scale_mode, GLOBAL)
+
+#define EXPAND_PMU_AXI_CHANNEL(FUNC, SEP)                                                                              \
+    FUNC(pmu_axi_channel, RD_CMD)                                                                                      \
+    SEP FUNC(pmu_axi_channel, RD_IFM) SEP FUNC(pmu_axi_channel, RD_WEIGHTS) SEP FUNC(pmu_axi_channel, RD_SCALE_BIAS)   \
+        SEP FUNC(pmu_axi_channel, RD_MEM2MEM) SEP FUNC(pmu_axi_channel, WR_OFM) SEP FUNC(pmu_axi_channel, WR_MEM2MEM)
+
+#define EXPAND_PMU_EVENT(FUNC, SEP)                                                                                                    \
+    FUNC(pmu_event, NO_EVENT)                                                                                                          \
+    SEP FUNC(pmu_event, CYCLE) SEP FUNC(pmu_event, NPU_IDLE) SEP FUNC(pmu_event, CC_STALLED_ON_BLOCKDEP) SEP FUNC(                     \
+        pmu_event, CC_STALLED_ON_SHRAM_RECONFIG) SEP FUNC(pmu_event, NPU_ACTIVE) SEP FUNC(pmu_event, MAC_ACTIVE)                       \
+        SEP FUNC(pmu_event, MAC_ACTIVE_8BIT) SEP FUNC(pmu_event, MAC_ACTIVE_16BIT) SEP FUNC(                                           \
+            pmu_event, MAC_DPU_ACTIVE) SEP FUNC(pmu_event, MAC_STALLED_BY_WD_ACC) SEP FUNC(pmu_event,                                  \
+                                                                                           MAC_STALLED_BY_WD)                          \
+            SEP FUNC(pmu_event, MAC_STALLED_BY_ACC) SEP FUNC(pmu_event, MAC_STALLED_BY_IB) SEP FUNC(                                   \
+                pmu_event,                                                                                                             \
+                MAC_ACTIVE_32BIT) SEP FUNC(pmu_event,                                                                                  \
+                                           MAC_STALLED_BY_INT_W) SEP FUNC(pmu_event,                                                   \
+                                                                          MAC_STALLED_BY_INT_ACC) SEP FUNC(pmu_event,                  \
+                                                                                                           AO_ACTIVE)                  \
+                SEP FUNC(pmu_event, AO_ACTIVE_8BIT) SEP FUNC(pmu_event, AO_ACTIVE_16BIT) SEP FUNC(                                     \
+                    pmu_event, AO_STALLED_BY_OFMP_OB) SEP FUNC(pmu_event, AO_STALLED_BY_OFMP) SEP                                      \
+                    FUNC(pmu_event, AO_STALLED_BY_OB) SEP FUNC(pmu_event, AO_STALLED_BY_ACC_IB) SEP FUNC(                              \
+                        pmu_event, AO_STALLED_BY_ACC) SEP FUNC(pmu_event, AO_STALLED_BY_IB) SEP                                        \
+                        FUNC(pmu_event, WD_ACTIVE) SEP FUNC(pmu_event, WD_STALLED) SEP FUNC(pmu_event, WD_STALLED_BY_WS) SEP FUNC(     \
+                            pmu_event, WD_STALLED_BY_WD_BUF) SEP FUNC(pmu_event,                                                       \
+                                                                      WD_PARSE_ACTIVE) SEP                                             \
+                            FUNC(pmu_event, WD_PARSE_STALLED) SEP FUNC(pmu_event, WD_PARSE_STALLED_IN) SEP FUNC(                       \
+                                pmu_event, WD_PARSE_STALLED_OUT) SEP FUNC(pmu_event,                                                   \
+                                                                          WD_TRANS_WS) SEP                                             \
+                                FUNC(pmu_event, WD_TRANS_WB) SEP FUNC(pmu_event, WD_TRANS_DW0) SEP FUNC(                               \
+                                    pmu_event, WD_TRANS_DW1) SEP FUNC(pmu_event,                                                       \
+                                                                      AXI0_RD_TRANS_ACCEPTED) SEP                                      \
+                                    FUNC(pmu_event, AXI0_RD_TRANS_COMPLETED) SEP FUNC(pmu_event, AXI0_RD_DATA_BEAT_RECEIVED) SEP FUNC( \
+                                        pmu_event, AXI0_RD_TRAN_REQ_STALLED) SEP FUNC(pmu_event,                                       \
+                                                                                      AXI0_WR_TRANS_ACCEPTED) SEP                      \
+                                        FUNC(pmu_event, AXI0_WR_TRANS_COMPLETED_M) SEP FUNC(                                           \
+                                            pmu_event, AXI0_WR_TRANS_COMPLETED_S) SEP                                                  \
+                                            FUNC(pmu_event, AXI0_WR_DATA_BEAT_WRITTEN) SEP FUNC(                                       \
+                                                pmu_event, AXI0_WR_TRAN_REQ_STALLED) SEP                                               \
+                                                FUNC(pmu_event, AXI0_WR_DATA_BEAT_STALLED) SEP FUNC(                                   \
+                                                    pmu_event,                                                                         \
+                                                    AXI0_ENABLED_CYCLES) SEP FUNC(pmu_event,                                           \
+                                                                                  AXI0_RD_STALL_LIMIT) SEP                             \
+                                                    FUNC(pmu_event, AXI0_WR_STALL_LIMIT) SEP FUNC(                                     \
+                                                        pmu_event,                                                                     \
+                                                        AXI_LATENCY_ANY) SEP FUNC(pmu_event,                                           \
+                                                                                  AXI_LATENCY_32) SEP                                  \
+                                                        FUNC(pmu_event,                                                                \
+                                                             AXI_LATENCY_64) SEP FUNC(pmu_event,                                       \
+                                                                                      AXI_LATENCY_128) SEP                             \
+                                                            FUNC(pmu_event, AXI_LATENCY_256) SEP FUNC(                                 \
+                                                                pmu_event,                                                             \
+                                                                AXI_LATENCY_512) SEP FUNC(pmu_event,                                   \
+                                                                                          AXI_LATENCY_1024) SEP                        \
+                                                                FUNC(pmu_event, ECC_DMA) SEP FUNC(                                     \
+                                                                    pmu_event,                                                         \
+                                                                    ECC_SB0) SEP FUNC(pmu_event,                                       \
+                                                                                      AXI1_RD_TRANS_ACCEPTED) SEP                      \
+                                                                    FUNC(pmu_event, AXI1_RD_TRANS_COMPLETED) SEP FUNC(                 \
+                                                                        pmu_event, AXI1_RD_DATA_BEAT_RECEIVED) SEP                     \
+                                                                        FUNC(pmu_event, AXI1_RD_TRAN_REQ_STALLED) SEP FUNC(            \
+                                                                            pmu_event, AXI1_WR_TRANS_ACCEPTED) SEP                     \
+                                                                            FUNC(pmu_event, AXI1_WR_TRANS_COMPLETED_M) SEP FUNC(       \
+                                                                                pmu_event,                                             \
+                                                                                AXI1_WR_TRANS_COMPLETED_S) SEP                         \
+                                                                                FUNC(pmu_event,                                        \
+                                                                                     AXI1_WR_DATA_BEAT_WRITTEN) SEP                    \
+                                                                                    FUNC(pmu_event,                                    \
+                                                                                         AXI1_WR_TRAN_REQ_STALLED) SEP                 \
+                                                                                        FUNC(                                          \
+                                                                                            pmu_event,                                 \
+                                                                                            AXI1_WR_DATA_BEAT_STALLED) SEP             \
+                                                                                            FUNC(                                      \
+                                                                                                pmu_event,                             \
+                                                                                                AXI1_ENABLED_CYCLES) SEP               \
+                                                                                                FUNC(                                  \
+                                                                                                    pmu_event,                         \
+                                                                                                    AXI1_RD_STALL_LIMIT) SEP           \
+                                                                                                    FUNC(                              \
+                                                                                                        pmu_event,                     \
+                                                                                                        AXI1_WR_STALL_LIMIT)           \
+                                                                                                        SEP FUNC(                      \
+                                                                                                            pmu_event,                 \
                                                                                                             ECC_SB1)
 
 #define EXPAND_POOLING_MODE(FUNC, SEP)                                                                                 \
@@ -14108,19 +23896,22 @@
 
 #define EXPAND_PRIVILEGE_LEVEL(FUNC, SEP) FUNC(privilege_level, USER) SEP FUNC(privilege_level, PRIVILEGED)
 
-#define EXPAND_RESAMPLING_MODE(FUNC, SEP)                                                                              \
-    FUNC(resampling_mode, NONE) SEP FUNC(resampling_mode, NEAREST) SEP FUNC(resampling_mode, TRANSPOSE)
-
-#define EXPAND_ROUNDING(FUNC, SEP) FUNC(rounding, TFL) SEP FUNC(rounding, TRUNCATE) SEP FUNC(rounding, NATURAL)
+#define EXPAND_ROUND_MODE(FUNC, SEP) FUNC(round_mode, DBL) SEP FUNC(round_mode, TRUNCATE) SEP FUNC(round_mode, NATURAL)
 
 #define EXPAND_SECURITY_LEVEL(FUNC, SEP) FUNC(security_level, SECURE) SEP FUNC(security_level, NON_SECURE)
 
-#define EXPAND_SHRAM_SIZE(FUNC, SEP)                                                                                   \
-    FUNC(shram_size, SHRAM_96KB)                                                                                       \
-    SEP FUNC(shram_size, SHRAM_48KB) SEP FUNC(shram_size, SHRAM_24KB) SEP FUNC(shram_size, SHRAM_16KB)
-
 #define EXPAND_STATE(FUNC, SEP) FUNC(state, STOPPED) SEP FUNC(state, RUNNING)
 
-#define EXPAND_STRIDE_MODE(FUNC, SEP)                                                                                  \
-    FUNC(stride_mode, STRIDE_MODE_1D) SEP FUNC(stride_mode, STRIDE_MODE_2D) SEP FUNC(stride_mode, STRIDE_MODE_3D)
-#endif /* ETHOSU55_INTERFACE_H */
+#define EXPAND_WD_CORE_SLICE_STATE(FUNC, SEP)                                                                          \
+    FUNC(wd_core_slice_state, HEADER) SEP FUNC(wd_core_slice_state, PALETTE) SEP FUNC(wd_core_slice_state, WEIGHTS)
+
+#define EXPAND_WD_CTRL_STATE(FUNC, SEP)                                                                                \
+    FUNC(wd_ctrl_state, IDLE)                                                                                          \
+    SEP FUNC(wd_ctrl_state, DRAIN) SEP FUNC(wd_ctrl_state, OFD_INIT) SEP FUNC(wd_ctrl_state, OFD_RUN)
+
+#define EXPAND_WEIGHT_ORDER(FUNC, SEP) FUNC(weight_order, DEPTH_FIRST) SEP FUNC(weight_order, PART_KERNEL_FIRST)
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/src/ethosu65_interface.h b/src/ethosu65_interface.h
new file mode 100644
index 0000000..33737b2
--- /dev/null
+++ b/src/ethosu65_interface.h
@@ -0,0 +1,23797 @@
+/*
+ * Copyright (c) 2020-2021 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef ETHOSU65_INTERFACE_H
+#define ETHOSU65_INTERFACE_H
+
+#ifdef __KERNEL__
+#include <linux/types.h>
+#else
+#include <stdint.h>
+#endif
+
+#if !defined(__cplusplus) || __cplusplus < 201402L
+#define CONSTEXPR
+#else
+#define CONSTEXPR constexpr
+#endif
+
+#ifndef __cplusplus
+#define STRUCT struct
+#else
+#define STRUCT
+#endif
+
+#if defined(__cplusplus) && defined(NPU_DISASSEMBLE)
+#include <iomanip>
+#include <sstream>
+#include <vector>
+#endif
+
+#if defined(__cplusplus) && !defined(NPU_NAMESPACE)
+#define NPU_NAMESPACE npu
+#endif
+
+#ifdef __cplusplus
+#include <cstring>
+#include <limits>
+#endif
+
+#ifdef __cplusplus
+namespace NPU_NAMESPACE
+{
+#endif
+#define NNX_ARCH_VERSION_MAJOR 1
+#define NNX_ARCH_VERSION_MINOR 0
+#define NNX_ARCH_VERSION_PATCH 6
+
+// Register offsets
+//
+// Register subpage BASE
+//
+#define NPU_REG_ID 0x0000
+#define NPU_REG_STATUS 0x0004
+#define NPU_REG_CMD 0x0008
+#define NPU_REG_RESET 0x000C
+#define NPU_REG_QBASE 0x0010
+#define NPU_REG_QBASE_HI 0x0014
+#define NPU_REG_QREAD 0x0018
+#define NPU_REG_QCONFIG 0x001C
+#define NPU_REG_QSIZE 0x0020
+#define NPU_REG_PROT 0x0024
+#define NPU_REG_CONFIG 0x0028
+#define NPU_REG_LOCK 0x002C
+#define NPU_REG_REGIONCFG 0x003C
+#define NPU_REG_AXI_LIMIT0 0x0040
+#define NPU_REG_AXI_LIMIT1 0x0044
+#define NPU_REG_AXI_LIMIT2 0x0048
+#define NPU_REG_AXI_LIMIT3 0x004C
+#define BASE_REGISTERS_SIZE 0x0080
+
+//
+// Register subpage BASE_POINTERS
+//
+#define NPU_REG_BASEP_BASE 0x0080
+#define NPU_REG_BASEP_ARRLEN 0x0008
+#define BASE_POINTERS_REGISTERS_SIZE 0x0100
+
+//
+// Register subpage DEBUG
+//
+#define NPU_REG_WD_STATUS 0x0100
+#define NPU_REG_MAC_STATUS 0x0104
+#define NPU_REG_AO_STATUS 0x0108
+#define NPU_REG_DMA_STATUS0 0x0110
+#define NPU_REG_DMA_STATUS1 0x0114
+#define NPU_REG_CLKFORCE 0x0140
+#define NPU_REG_DEBUG_ADDRESS 0x0144
+#define NPU_REG_DEBUG_MISC 0x0148
+#define NPU_REG_DEBUGCORE 0x014C
+#define NPU_REG_DEBUG_BLOCK 0x0150
+#define DEBUG_REGISTERS_SIZE 0x0180
+
+//
+// Register subpage PMU
+//
+#define NPU_REG_PMCR 0x0180
+#define NPU_REG_PMCNTENSET 0x0184
+#define NPU_REG_PMCNTENCLR 0x0188
+#define NPU_REG_PMOVSSET 0x018C
+#define NPU_REG_PMOVSCLR 0x0190
+#define NPU_REG_PMINTSET 0x0194
+#define NPU_REG_PMINTCLR 0x0198
+#define NPU_REG_PMCCNTR 0x01A0
+#define NPU_REG_PMCCNTR_HI 0x01A4
+#define NPU_REG_PMCCNTR_CFG 0x01A8
+#define NPU_REG_PMCAXI_CHAN 0x01AC
+#define PMU_REGISTERS_SIZE 0x0200
+
+//
+// Register subpage TSU_DEBUG
+//
+#define NPU_REG_KERNEL_X 0x0200
+#define NPU_REG_KERNEL_Y 0x0204
+#define NPU_REG_KERNEL_W_M1 0x0208
+#define NPU_REG_KERNEL_H_M1 0x020C
+#define NPU_REG_OFM_CBLK_WIDTH_M1 0x0210
+#define NPU_REG_OFM_CBLK_HEIGHT_M1 0x0214
+#define NPU_REG_OFM_CBLK_DEPTH_M1 0x0218
+#define NPU_REG_IFM_CBLK_DEPTH_M1 0x021C
+#define NPU_REG_OFM_X 0x0220
+#define NPU_REG_OFM_Y 0x0224
+#define NPU_REG_OFM_Z 0x0228
+#define NPU_REG_IFM_Z 0x022C
+#define NPU_REG_PAD_TOP 0x0230
+#define NPU_REG_PAD_LEFT 0x0234
+#define NPU_REG_IFM_CBLK_WIDTH 0x0238
+#define NPU_REG_IFM_CBLK_HEIGHT 0x023C
+#define NPU_REG_DMA_IFM_SRC 0x0240
+#define NPU_REG_DMA_IFM_SRC_HI 0x0244
+#define NPU_REG_DMA_IFM_DST 0x0248
+#define NPU_REG_DMA_OFM_SRC 0x024C
+#define NPU_REG_DMA_OFM_DST 0x0250
+#define NPU_REG_DMA_OFM_DST_HI 0x0254
+#define NPU_REG_DMA_WEIGHT_SRC 0x0258
+#define NPU_REG_DMA_WEIGHT_SRC_HI 0x025C
+#define NPU_REG_DMA_CMD_SRC 0x0260
+#define NPU_REG_DMA_CMD_SRC_HI 0x0264
+#define NPU_REG_DMA_CMD_SIZE 0x0268
+#define NPU_REG_DMA_M2M_SRC 0x026C
+#define NPU_REG_DMA_M2M_SRC_HI 0x0270
+#define NPU_REG_DMA_M2M_DST 0x0274
+#define NPU_REG_DMA_M2M_DST_HI 0x0278
+#define NPU_REG_CURRENT_QREAD 0x027C
+#define NPU_REG_DMA_SCALE_SRC 0x0280
+#define NPU_REG_DMA_SCALE_SRC_HI 0x0284
+#define NPU_REG_CURRENT_BLOCK 0x02B4
+#define NPU_REG_CURRENT_OP 0x02B8
+#define NPU_REG_CURRENT_CMD 0x02BC
+#define TSU_DEBUG_REGISTERS_SIZE 0x02C0
+
+//
+// Register subpage PMU_COUNTERS
+//
+#define NPU_REG_PMEVCNTR_BASE 0x0300
+#define NPU_REG_PMEVCNTR_ARRLEN 0x0004
+#define NPU_REG_PMEVTYPER_BASE 0x0380
+#define NPU_REG_PMEVTYPER_ARRLEN 0x0004
+#define PMU_COUNTERS_REGISTERS_SIZE 0x0400
+
+//
+// Register subpage SHARED_BUFFER
+//
+#define NPU_REG_SHARED_BUFFER_BASE 0x0400
+#define NPU_REG_SHARED_BUFFER_ARRLEN 0x0100
+#define SHARED_BUFFER_REGISTERS_SIZE 0x0800
+
+//
+// Register subpage TSU_IFM
+//
+#define NPU_REG_IFM_PAD_TOP 0x0800
+#define NPU_REG_IFM_PAD_LEFT 0x0804
+#define NPU_REG_IFM_PAD_RIGHT 0x0808
+#define NPU_REG_IFM_PAD_BOTTOM 0x080C
+#define NPU_REG_IFM_DEPTH_M1 0x0810
+#define NPU_REG_IFM_PRECISION 0x0814
+#define NPU_REG_IFM_UPSCALE 0x081C
+#define NPU_REG_IFM_ZERO_POINT 0x0824
+#define NPU_REG_IFM_WIDTH0_M1 0x0828
+#define NPU_REG_IFM_HEIGHT0_M1 0x082C
+#define NPU_REG_IFM_HEIGHT1_M1 0x0830
+#define NPU_REG_IFM_IB_END 0x0834
+#define NPU_REG_IFM_REGION 0x083C
+#define TSU_IFM_REGISTERS_SIZE 0x0840
+
+//
+// Register subpage TSU_OFM
+//
+#define NPU_REG_OFM_WIDTH_M1 0x0844
+#define NPU_REG_OFM_HEIGHT_M1 0x0848
+#define NPU_REG_OFM_DEPTH_M1 0x084C
+#define NPU_REG_OFM_PRECISION 0x0850
+#define NPU_REG_OFM_BLK_WIDTH_M1 0x0854
+#define NPU_REG_OFM_BLK_HEIGHT_M1 0x0858
+#define NPU_REG_OFM_BLK_DEPTH_M1 0x085C
+#define NPU_REG_OFM_ZERO_POINT 0x0860
+#define NPU_REG_OFM_WIDTH0_M1 0x0868
+#define NPU_REG_OFM_HEIGHT0_M1 0x086C
+#define NPU_REG_OFM_HEIGHT1_M1 0x0870
+#define NPU_REG_OFM_REGION 0x087C
+#define TSU_OFM_REGISTERS_SIZE 0x0880
+
+//
+// Register subpage TSU_KERNEL
+//
+#define NPU_REG_KERNEL_WIDTH_M1 0x0880
+#define NPU_REG_KERNEL_HEIGHT_M1 0x0884
+#define NPU_REG_KERNEL_STRIDE 0x0888
+#define NPU_REG_PARALLEL_MODE 0x088C
+#define NPU_REG_ACC_FORMAT 0x0890
+#define NPU_REG_ACTIVATION 0x0894
+#define NPU_REG_ACTIVATION_MIN 0x0898
+#define NPU_REG_ACTIVATION_MAX 0x089C
+#define NPU_REG_WEIGHT_REGION 0x08A0
+#define NPU_REG_SCALE_REGION 0x08A4
+#define NPU_REG_AB_START 0x08B4
+#define NPU_REG_BLOCKDEP 0x08BC
+#define TSU_KERNEL_REGISTERS_SIZE 0x08C0
+
+//
+// Register subpage TSU_DMA
+//
+#define NPU_REG_DMA0_SRC_REGION 0x08C0
+#define NPU_REG_DMA0_DST_REGION 0x08C4
+#define NPU_REG_DMA0_SIZE0 0x08C8
+#define NPU_REG_DMA0_SIZE1 0x08CC
+#define TSU_DMA_REGISTERS_SIZE 0x0900
+
+//
+// Register subpage TSU_IFM2
+//
+#define NPU_REG_IFM2_BROADCAST 0x0900
+#define NPU_REG_IFM2_SCALAR 0x0904
+#define NPU_REG_IFM2_PRECISION 0x0914
+#define NPU_REG_IFM2_ZERO_POINT 0x0924
+#define NPU_REG_IFM2_WIDTH0_M1 0x0928
+#define NPU_REG_IFM2_HEIGHT0_M1 0x092C
+#define NPU_REG_IFM2_HEIGHT1_M1 0x0930
+#define NPU_REG_IFM2_IB_START 0x0934
+#define NPU_REG_IFM2_REGION 0x093C
+#define TSU_IFM2_REGISTERS_SIZE 0x0940
+
+//
+// Register subpage TSU_IFM_BASE
+//
+#define NPU_REG_IFM_BASE0 0x0A00
+#define NPU_REG_IFM_BASE0_HI 0x0A04
+#define NPU_REG_IFM_BASE1 0x0A08
+#define NPU_REG_IFM_BASE1_HI 0x0A0C
+#define NPU_REG_IFM_BASE2 0x0A10
+#define NPU_REG_IFM_BASE2_HI 0x0A14
+#define NPU_REG_IFM_BASE3 0x0A18
+#define NPU_REG_IFM_BASE3_HI 0x0A1C
+#define NPU_REG_IFM_STRIDE_X 0x0A20
+#define NPU_REG_IFM_STRIDE_X_HI 0x0A24
+#define NPU_REG_IFM_STRIDE_Y 0x0A28
+#define NPU_REG_IFM_STRIDE_Y_HI 0x0A2C
+#define NPU_REG_IFM_STRIDE_C 0x0A30
+#define NPU_REG_IFM_STRIDE_C_HI 0x0A34
+#define TSU_IFM_BASE_REGISTERS_SIZE 0x0A40
+
+//
+// Register subpage TSU_OFM_BASE
+//
+#define NPU_REG_OFM_BASE0 0x0A40
+#define NPU_REG_OFM_BASE0_HI 0x0A44
+#define NPU_REG_OFM_BASE1 0x0A48
+#define NPU_REG_OFM_BASE1_HI 0x0A4C
+#define NPU_REG_OFM_BASE2 0x0A50
+#define NPU_REG_OFM_BASE2_HI 0x0A54
+#define NPU_REG_OFM_BASE3 0x0A58
+#define NPU_REG_OFM_BASE3_HI 0x0A5C
+#define NPU_REG_OFM_STRIDE_X 0x0A60
+#define NPU_REG_OFM_STRIDE_X_HI 0x0A64
+#define NPU_REG_OFM_STRIDE_Y 0x0A68
+#define NPU_REG_OFM_STRIDE_Y_HI 0x0A6C
+#define NPU_REG_OFM_STRIDE_C 0x0A70
+#define NPU_REG_OFM_STRIDE_C_HI 0x0A74
+#define TSU_OFM_BASE_REGISTERS_SIZE 0x0A80
+
+//
+// Register subpage TSU_WS_BASE
+//
+#define NPU_REG_WEIGHT_BASE 0x0A80
+#define NPU_REG_WEIGHT_BASE_HI 0x0A84
+#define NPU_REG_WEIGHT_LENGTH 0x0A88
+#define NPU_REG_SCALE_BASE 0x0A90
+#define NPU_REG_SCALE_BASE_HI 0x0A94
+#define NPU_REG_SCALE_LENGTH 0x0A98
+#define NPU_REG_OFM_SCALE 0x0AA0
+#define NPU_REG_OFM_SCALE_SHIFT 0x0AA4
+#define NPU_REG_OPA_SCALE 0x0AA8
+#define NPU_REG_OPA_SCALE_SHIFT 0x0AAC
+#define NPU_REG_OPB_SCALE 0x0AB0
+#define TSU_WS_BASE_REGISTERS_SIZE 0x0AC0
+
+//
+// Register subpage TSU_DMA_BASE
+//
+#define NPU_REG_DMA0_SRC 0x0AC0
+#define NPU_REG_DMA0_SRC_HI 0x0AC4
+#define NPU_REG_DMA0_DST 0x0AC8
+#define NPU_REG_DMA0_DST_HI 0x0ACC
+#define NPU_REG_DMA0_LEN 0x0AD0
+#define NPU_REG_DMA0_LEN_HI 0x0AD4
+#define NPU_REG_DMA0_SKIP0 0x0AD8
+#define NPU_REG_DMA0_SKIP0_HI 0x0ADC
+#define NPU_REG_DMA0_SKIP1 0x0AE0
+#define NPU_REG_DMA0_SKIP1_HI 0x0AE4
+#define TSU_DMA_BASE_REGISTERS_SIZE 0x0B00
+
+//
+// Register subpage TSU_IFM2_BASE
+//
+#define NPU_REG_IFM2_BASE0 0x0B00
+#define NPU_REG_IFM2_BASE0_HI 0x0B04
+#define NPU_REG_IFM2_BASE1 0x0B08
+#define NPU_REG_IFM2_BASE1_HI 0x0B0C
+#define NPU_REG_IFM2_BASE2 0x0B10
+#define NPU_REG_IFM2_BASE2_HI 0x0B14
+#define NPU_REG_IFM2_BASE3 0x0B18
+#define NPU_REG_IFM2_BASE3_HI 0x0B1C
+#define NPU_REG_IFM2_STRIDE_X 0x0B20
+#define NPU_REG_IFM2_STRIDE_X_HI 0x0B24
+#define NPU_REG_IFM2_STRIDE_Y 0x0B28
+#define NPU_REG_IFM2_STRIDE_Y_HI 0x0B2C
+#define NPU_REG_IFM2_STRIDE_C 0x0B30
+#define NPU_REG_IFM2_STRIDE_C_HI 0x0B34
+#define TSU_IFM2_BASE_REGISTERS_SIZE 0x0B40
+
+//
+// Register subpage TSU_WS1_BASE
+//
+#define NPU_REG_WEIGHT1_BASE 0x0B40
+#define NPU_REG_WEIGHT1_BASE_HI 0x0B44
+#define NPU_REG_WEIGHT1_LENGTH 0x0B48
+#define NPU_REG_SCALE1_BASE 0x0B50
+#define NPU_REG_SCALE1_BASE_HI 0x0B54
+#define NPU_REG_SCALE1_LENGTH 0x0B58
+#define TSU_WS1_BASE_REGISTERS_SIZE 0x0B80
+
+//
+// Register subpage TSU_USER_BASE
+//
+#define TSU_USER_BASE_REGISTERS_SIZE 0x0BC0
+
+//
+// Register subpage TSU_DMA_EBASE
+//
+#define TSU_DMA_EBASE_REGISTERS_SIZE 0x0C00
+
+//
+// Register subpage ID
+//
+#define NPU_REG_REVISION 0x0FC0
+#define NPU_REG_PID4 0x0FD0
+#define NPU_REG_PID5 0x0FD4
+#define NPU_REG_PID6 0x0FD8
+#define NPU_REG_PID7 0x0FDC
+#define NPU_REG_PID0 0x0FE0
+#define NPU_REG_PID1 0x0FE4
+#define NPU_REG_PID2 0x0FE8
+#define NPU_REG_PID3 0x0FEC
+#define NPU_REG_CID0 0x0FF0
+#define NPU_REG_CID1 0x0FF4
+#define NPU_REG_CID2 0x0FF8
+#define NPU_REG_CID3 0x0FFC
+#define ID_REGISTERS_SIZE 0x1000
+
+#ifdef __cplusplus
+// Enum types
+enum class acc_format : uint8_t
+{
+    I32 = 0,
+    I40 = 1,
+    F16 = 2,
+};
+
+enum class activation_clip_range : uint8_t
+{
+    OFM_PRECISION = 0,
+    FORCE_UINT8   = 2,
+    FORCE_INT8    = 3,
+    FORCE_INT16   = 5,
+};
+
+enum class activation_format : uint8_t
+{
+    NHWC    = 0,
+    NHCWB16 = 1,
+};
+
+enum class activation_function : uint8_t
+{
+    RELU    = 0,
+    TANH    = 3,
+    SIGMOID = 4,
+    TABLE_0 = 16,
+    TABLE_1 = 17,
+    TABLE_2 = 18,
+    TABLE_3 = 19,
+    TABLE_4 = 20,
+    TABLE_5 = 21,
+    TABLE_6 = 22,
+    TABLE_7 = 23,
+};
+
+enum class activation_precision : uint8_t
+{
+    B8  = 0,
+    B16 = 1,
+    B32 = 2,
+    B64 = 3,
+};
+
+enum class activation_type : uint8_t
+{
+    UNSIGNED = 0,
+    SIGNED   = 1,
+};
+
+enum class axi_mem_encoding : uint8_t
+{
+    DEVICE_NON_BUFFERABLE                 = 0,
+    DEVICE_BUFFERABLE                     = 1,
+    NORMAL_NON_CACHEABLE_NON_BUFFERABLE   = 2,
+    NORMAL_NON_CACHEABLE_BUFFERABLE       = 3,
+    WRITE_THROUGH_NO_ALLOCATE             = 4,
+    WRITE_THROUGH_READ_ALLOCATE           = 5,
+    WRITE_THROUGH_WRITE_ALLOCATE          = 6,
+    WRITE_THROUGH_READ_AND_WRITE_ALLOCATE = 7,
+    WRITE_BACK_NO_ALLOCATE                = 8,
+    WRITE_BACK_READ_ALLOCATE              = 9,
+    WRITE_BACK_WRITE_ALLOCATE             = 10,
+    WRITE_BACK_READ_AND_WRITE_ALLOCATE    = 11,
+};
+
+enum class broadcast_mode : uint8_t
+{
+    DISABLE = 0,
+    ENABLE  = 1,
+};
+
+enum class cmd0_opcode : uint16_t
+{
+    NPU_OP_STOP               = 0,
+    NPU_OP_IRQ                = 1,
+    NPU_OP_CONV               = 2,
+    NPU_OP_DEPTHWISE          = 3,
+    NPU_OP_POOL               = 5,
+    NPU_OP_ELEMENTWISE        = 6,
+    NPU_OP_DMA_START          = 16,
+    NPU_OP_DMA_WAIT           = 17,
+    NPU_OP_KERNEL_WAIT        = 18,
+    NPU_OP_PMU_MASK           = 19,
+    NPU_SET_IFM_PAD_TOP       = 256,
+    NPU_SET_IFM_PAD_LEFT      = 257,
+    NPU_SET_IFM_PAD_RIGHT     = 258,
+    NPU_SET_IFM_PAD_BOTTOM    = 259,
+    NPU_SET_IFM_DEPTH_M1      = 260,
+    NPU_SET_IFM_PRECISION     = 261,
+    NPU_SET_IFM_UPSCALE       = 263,
+    NPU_SET_IFM_ZERO_POINT    = 265,
+    NPU_SET_IFM_WIDTH0_M1     = 266,
+    NPU_SET_IFM_HEIGHT0_M1    = 267,
+    NPU_SET_IFM_HEIGHT1_M1    = 268,
+    NPU_SET_IFM_IB_END        = 269,
+    NPU_SET_IFM_REGION        = 271,
+    NPU_SET_OFM_WIDTH_M1      = 273,
+    NPU_SET_OFM_HEIGHT_M1     = 274,
+    NPU_SET_OFM_DEPTH_M1      = 275,
+    NPU_SET_OFM_PRECISION     = 276,
+    NPU_SET_OFM_BLK_WIDTH_M1  = 277,
+    NPU_SET_OFM_BLK_HEIGHT_M1 = 278,
+    NPU_SET_OFM_BLK_DEPTH_M1  = 279,
+    NPU_SET_OFM_ZERO_POINT    = 280,
+    NPU_SET_OFM_WIDTH0_M1     = 282,
+    NPU_SET_OFM_HEIGHT0_M1    = 283,
+    NPU_SET_OFM_HEIGHT1_M1    = 284,
+    NPU_SET_OFM_REGION        = 287,
+    NPU_SET_KERNEL_WIDTH_M1   = 288,
+    NPU_SET_KERNEL_HEIGHT_M1  = 289,
+    NPU_SET_KERNEL_STRIDE     = 290,
+    NPU_SET_PARALLEL_MODE     = 291,
+    NPU_SET_ACC_FORMAT        = 292,
+    NPU_SET_ACTIVATION        = 293,
+    NPU_SET_ACTIVATION_MIN    = 294,
+    NPU_SET_ACTIVATION_MAX    = 295,
+    NPU_SET_WEIGHT_REGION     = 296,
+    NPU_SET_SCALE_REGION      = 297,
+    NPU_SET_AB_START          = 301,
+    NPU_SET_BLOCKDEP          = 303,
+    NPU_SET_DMA0_SRC_REGION   = 304,
+    NPU_SET_DMA0_DST_REGION   = 305,
+    NPU_SET_DMA0_SIZE0        = 306,
+    NPU_SET_DMA0_SIZE1        = 307,
+    NPU_SET_IFM2_BROADCAST    = 384,
+    NPU_SET_IFM2_SCALAR       = 385,
+    NPU_SET_IFM2_PRECISION    = 389,
+    NPU_SET_IFM2_ZERO_POINT   = 393,
+    NPU_SET_IFM2_WIDTH0_M1    = 394,
+    NPU_SET_IFM2_HEIGHT0_M1   = 395,
+    NPU_SET_IFM2_HEIGHT1_M1   = 396,
+    NPU_SET_IFM2_IB_START     = 397,
+    NPU_SET_IFM2_REGION       = 399,
+};
+
+enum class cmd1_opcode : uint16_t
+{
+    NPU_SET_IFM_BASE0      = 0,
+    NPU_SET_IFM_BASE1      = 1,
+    NPU_SET_IFM_BASE2      = 2,
+    NPU_SET_IFM_BASE3      = 3,
+    NPU_SET_IFM_STRIDE_X   = 4,
+    NPU_SET_IFM_STRIDE_Y   = 5,
+    NPU_SET_IFM_STRIDE_C   = 6,
+    NPU_SET_OFM_BASE0      = 16,
+    NPU_SET_OFM_BASE1      = 17,
+    NPU_SET_OFM_BASE2      = 18,
+    NPU_SET_OFM_BASE3      = 19,
+    NPU_SET_OFM_STRIDE_X   = 20,
+    NPU_SET_OFM_STRIDE_Y   = 21,
+    NPU_SET_OFM_STRIDE_C   = 22,
+    NPU_SET_WEIGHT_BASE    = 32,
+    NPU_SET_WEIGHT_LENGTH  = 33,
+    NPU_SET_SCALE_BASE     = 34,
+    NPU_SET_SCALE_LENGTH   = 35,
+    NPU_SET_OFM_SCALE      = 36,
+    NPU_SET_OPA_SCALE      = 37,
+    NPU_SET_OPB_SCALE      = 38,
+    NPU_SET_DMA0_SRC       = 48,
+    NPU_SET_DMA0_DST       = 49,
+    NPU_SET_DMA0_LEN       = 50,
+    NPU_SET_DMA0_SKIP0     = 51,
+    NPU_SET_DMA0_SKIP1     = 52,
+    NPU_SET_IFM2_BASE0     = 128,
+    NPU_SET_IFM2_BASE1     = 129,
+    NPU_SET_IFM2_BASE2     = 130,
+    NPU_SET_IFM2_BASE3     = 131,
+    NPU_SET_IFM2_STRIDE_X  = 132,
+    NPU_SET_IFM2_STRIDE_Y  = 133,
+    NPU_SET_IFM2_STRIDE_C  = 134,
+    NPU_SET_WEIGHT1_BASE   = 144,
+    NPU_SET_WEIGHT1_LENGTH = 145,
+    NPU_SET_SCALE1_BASE    = 146,
+    NPU_SET_SCALE1_LENGTH  = 147,
+};
+
+enum class cmd_ctrl : uint8_t
+{
+    CMD0_CTRL = 0,
+    CMD1_CTRL = 1,
+};
+
+enum class custom_dma : uint8_t
+{
+    NOT_IMPLEMENTED = 0,
+    IMPLEMENTED     = 1,
+};
+
+enum class dma_fault_src : uint8_t
+{
+    AXI_M0 = 0,
+    AXI_M1 = 1,
+};
+
+enum class dma_region_mode : uint8_t
+{
+    EXTERNAL = 0,
+    INTERNAL = 1,
+};
+
+enum class dma_stride_mode : uint8_t
+{
+    D1 = 0,
+    D2 = 1,
+    D3 = 2,
+};
+
+enum class elementwise_mode : uint8_t
+{
+    MUL   = 0,
+    ADD   = 1,
+    SUB   = 2,
+    MIN   = 3,
+    MAX   = 4,
+    LRELU = 5,
+    ABS   = 6,
+    CLZ   = 7,
+    SHR   = 8,
+    SHL   = 9,
+};
+
+enum class functional_safety : uint8_t
+{
+    NOT_IMPLEMENTED = 0,
+    IMPLEMENTED     = 1,
+};
+
+enum class ifm2_operand_order : uint8_t
+{
+    ORDER_B = 0,
+    ORDER_A = 1,
+};
+
+enum class ifm_scale_mode : uint8_t
+{
+    OPA_OPB_16 = 0,
+    OPA_32     = 1,
+    OPB_32     = 2,
+};
+
+enum class ifm_upscale_mode : uint8_t
+{
+    NONE    = 0,
+    NEAREST = 1,
+    ZEROS   = 2,
+};
+
+enum class kernel_decomposition : uint8_t
+{
+    D8X8 = 0,
+    D4X4 = 1,
+};
+
+enum class kernel_dilation : uint8_t
+{
+    NONE = 0,
+    X2   = 1,
+};
+
+enum class max_beats : uint8_t
+{
+    B64  = 0,
+    B128 = 1,
+    B256 = 2,
+};
+
+enum class mem_attr : uint8_t
+{
+    AXI0_OUTSTANDING_COUNTER0 = 0,
+    AXI0_OUTSTANDING_COUNTER1 = 1,
+    AXI1_OUTSTANDING_COUNTER2 = 2,
+    AXI1_OUTSTANDING_COUNTER3 = 3,
+};
+
+enum class ofm_scale_mode : uint8_t
+{
+    PER_CHANNEL = 0,
+    GLOBAL      = 1,
+};
+
+enum class parallel_mode : uint8_t
+{
+    SINGLE_CORE     = 0,
+    DUAL_CORE_DEPTH = 1,
+};
+
+enum class pmu_axi_channel : uint8_t
+{
+    RD_CMD        = 0,
+    RD_IFM        = 1,
+    RD_WEIGHTS    = 2,
+    RD_SCALE_BIAS = 3,
+    RD_MEM2MEM    = 4,
+    WR_OFM        = 8,
+    WR_MEM2MEM    = 9,
+};
+
+enum class pmu_event : uint16_t
+{
+    NO_EVENT                     = 0,
+    CYCLE                        = 17,
+    NPU_IDLE                     = 32,
+    CC_STALLED_ON_BLOCKDEP       = 33,
+    CC_STALLED_ON_SHRAM_RECONFIG = 34,
+    NPU_ACTIVE                   = 35,
+    MAC_ACTIVE                   = 48,
+    MAC_ACTIVE_8BIT              = 49,
+    MAC_ACTIVE_16BIT             = 50,
+    MAC_DPU_ACTIVE               = 51,
+    MAC_STALLED_BY_WD_ACC        = 52,
+    MAC_STALLED_BY_WD            = 53,
+    MAC_STALLED_BY_ACC           = 54,
+    MAC_STALLED_BY_IB            = 55,
+    MAC_ACTIVE_32BIT             = 56,
+    MAC_STALLED_BY_INT_W         = 57,
+    MAC_STALLED_BY_INT_ACC       = 58,
+    AO_ACTIVE                    = 64,
+    AO_ACTIVE_8BIT               = 65,
+    AO_ACTIVE_16BIT              = 66,
+    AO_STALLED_BY_OFMP_OB        = 67,
+    AO_STALLED_BY_OFMP           = 68,
+    AO_STALLED_BY_OB             = 69,
+    AO_STALLED_BY_ACC_IB         = 70,
+    AO_STALLED_BY_ACC            = 71,
+    AO_STALLED_BY_IB             = 72,
+    WD_ACTIVE                    = 80,
+    WD_STALLED                   = 81,
+    WD_STALLED_BY_WS             = 82,
+    WD_STALLED_BY_WD_BUF         = 83,
+    WD_PARSE_ACTIVE              = 84,
+    WD_PARSE_STALLED             = 85,
+    WD_PARSE_STALLED_IN          = 86,
+    WD_PARSE_STALLED_OUT         = 87,
+    WD_TRANS_WS                  = 88,
+    WD_TRANS_WB                  = 89,
+    WD_TRANS_DW0                 = 90,
+    WD_TRANS_DW1                 = 91,
+    AXI0_RD_TRANS_ACCEPTED       = 128,
+    AXI0_RD_TRANS_COMPLETED      = 129,
+    AXI0_RD_DATA_BEAT_RECEIVED   = 130,
+    AXI0_RD_TRAN_REQ_STALLED     = 131,
+    AXI0_WR_TRANS_ACCEPTED       = 132,
+    AXI0_WR_TRANS_COMPLETED_M    = 133,
+    AXI0_WR_TRANS_COMPLETED_S    = 134,
+    AXI0_WR_DATA_BEAT_WRITTEN    = 135,
+    AXI0_WR_TRAN_REQ_STALLED     = 136,
+    AXI0_WR_DATA_BEAT_STALLED    = 137,
+    AXI0_ENABLED_CYCLES          = 140,
+    AXI0_RD_STALL_LIMIT          = 142,
+    AXI0_WR_STALL_LIMIT          = 143,
+    AXI_LATENCY_ANY              = 160,
+    AXI_LATENCY_32               = 161,
+    AXI_LATENCY_64               = 162,
+    AXI_LATENCY_128              = 163,
+    AXI_LATENCY_256              = 164,
+    AXI_LATENCY_512              = 165,
+    AXI_LATENCY_1024             = 166,
+    ECC_DMA                      = 176,
+    ECC_SB0                      = 177,
+    AXI1_RD_TRANS_ACCEPTED       = 384,
+    AXI1_RD_TRANS_COMPLETED      = 385,
+    AXI1_RD_DATA_BEAT_RECEIVED   = 386,
+    AXI1_RD_TRAN_REQ_STALLED     = 387,
+    AXI1_WR_TRANS_ACCEPTED       = 388,
+    AXI1_WR_TRANS_COMPLETED_M    = 389,
+    AXI1_WR_TRANS_COMPLETED_S    = 390,
+    AXI1_WR_DATA_BEAT_WRITTEN    = 391,
+    AXI1_WR_TRAN_REQ_STALLED     = 392,
+    AXI1_WR_DATA_BEAT_STALLED    = 393,
+    AXI1_ENABLED_CYCLES          = 396,
+    AXI1_RD_STALL_LIMIT          = 398,
+    AXI1_WR_STALL_LIMIT          = 399,
+    ECC_SB1                      = 433,
+};
+
+enum class pooling_mode : uint8_t
+{
+    MAX        = 0,
+    AVERAGE    = 1,
+    REDUCE_SUM = 2,
+};
+
+enum class privilege_level : uint8_t
+{
+    USER       = 0,
+    PRIVILEGED = 1,
+};
+
+enum class round_mode : uint8_t
+{
+    DBL      = 0,
+    TRUNCATE = 1,
+    NATURAL  = 2,
+};
+
+enum class security_level : uint8_t
+{
+    SECURE     = 0,
+    NON_SECURE = 1,
+};
+
+enum class state : uint8_t
+{
+    STOPPED = 0,
+    RUNNING = 1,
+};
+
+enum class wd_core_slice_state : uint8_t
+{
+    HEADER  = 0,
+    PALETTE = 1,
+    WEIGHTS = 2,
+};
+
+enum class wd_ctrl_state : uint8_t
+{
+    IDLE     = 0,
+    DRAIN    = 1,
+    OFD_INIT = 2,
+    OFD_RUN  = 3,
+};
+
+enum class weight_order : uint8_t
+{
+    DEPTH_FIRST       = 0,
+    PART_KERNEL_FIRST = 1,
+};
+
+#else
+
+enum acc_format
+{
+    ACC_FORMAT_I32 = 0,
+    ACC_FORMAT_I40 = 1,
+    ACC_FORMAT_F16 = 2,
+};
+
+enum activation_clip_range
+{
+    ACTIVATION_CLIP_RANGE_OFM_PRECISION = 0,
+    ACTIVATION_CLIP_RANGE_FORCE_UINT8   = 2,
+    ACTIVATION_CLIP_RANGE_FORCE_INT8    = 3,
+    ACTIVATION_CLIP_RANGE_FORCE_INT16   = 5,
+};
+
+enum activation_format
+{
+    ACTIVATION_FORMAT_NHWC    = 0,
+    ACTIVATION_FORMAT_NHCWB16 = 1,
+};
+
+enum activation_function
+{
+    ACTIVATION_FUNCTION_RELU    = 0,
+    ACTIVATION_FUNCTION_TANH    = 3,
+    ACTIVATION_FUNCTION_SIGMOID = 4,
+    ACTIVATION_FUNCTION_TABLE_0 = 16,
+    ACTIVATION_FUNCTION_TABLE_1 = 17,
+    ACTIVATION_FUNCTION_TABLE_2 = 18,
+    ACTIVATION_FUNCTION_TABLE_3 = 19,
+    ACTIVATION_FUNCTION_TABLE_4 = 20,
+    ACTIVATION_FUNCTION_TABLE_5 = 21,
+    ACTIVATION_FUNCTION_TABLE_6 = 22,
+    ACTIVATION_FUNCTION_TABLE_7 = 23,
+};
+
+enum activation_precision
+{
+    ACTIVATION_PRECISION_B8  = 0,
+    ACTIVATION_PRECISION_B16 = 1,
+    ACTIVATION_PRECISION_B32 = 2,
+    ACTIVATION_PRECISION_B64 = 3,
+};
+
+enum activation_type
+{
+    ACTIVATION_TYPE_UNSIGNED = 0,
+    ACTIVATION_TYPE_SIGNED   = 1,
+};
+
+enum axi_mem_encoding
+{
+    AXI_MEM_ENCODING_DEVICE_NON_BUFFERABLE                 = 0,
+    AXI_MEM_ENCODING_DEVICE_BUFFERABLE                     = 1,
+    AXI_MEM_ENCODING_NORMAL_NON_CACHEABLE_NON_BUFFERABLE   = 2,
+    AXI_MEM_ENCODING_NORMAL_NON_CACHEABLE_BUFFERABLE       = 3,
+    AXI_MEM_ENCODING_WRITE_THROUGH_NO_ALLOCATE             = 4,
+    AXI_MEM_ENCODING_WRITE_THROUGH_READ_ALLOCATE           = 5,
+    AXI_MEM_ENCODING_WRITE_THROUGH_WRITE_ALLOCATE          = 6,
+    AXI_MEM_ENCODING_WRITE_THROUGH_READ_AND_WRITE_ALLOCATE = 7,
+    AXI_MEM_ENCODING_WRITE_BACK_NO_ALLOCATE                = 8,
+    AXI_MEM_ENCODING_WRITE_BACK_READ_ALLOCATE              = 9,
+    AXI_MEM_ENCODING_WRITE_BACK_WRITE_ALLOCATE             = 10,
+    AXI_MEM_ENCODING_WRITE_BACK_READ_AND_WRITE_ALLOCATE    = 11,
+};
+
+enum broadcast_mode
+{
+    BROADCAST_MODE_DISABLE = 0,
+    BROADCAST_MODE_ENABLE  = 1,
+};
+
+enum cmd0_opcode
+{
+    CMD0_OPCODE_NPU_OP_STOP               = 0,
+    CMD0_OPCODE_NPU_OP_IRQ                = 1,
+    CMD0_OPCODE_NPU_OP_CONV               = 2,
+    CMD0_OPCODE_NPU_OP_DEPTHWISE          = 3,
+    CMD0_OPCODE_NPU_OP_POOL               = 5,
+    CMD0_OPCODE_NPU_OP_ELEMENTWISE        = 6,
+    CMD0_OPCODE_NPU_OP_DMA_START          = 16,
+    CMD0_OPCODE_NPU_OP_DMA_WAIT           = 17,
+    CMD0_OPCODE_NPU_OP_KERNEL_WAIT        = 18,
+    CMD0_OPCODE_NPU_OP_PMU_MASK           = 19,
+    CMD0_OPCODE_NPU_SET_IFM_PAD_TOP       = 256,
+    CMD0_OPCODE_NPU_SET_IFM_PAD_LEFT      = 257,
+    CMD0_OPCODE_NPU_SET_IFM_PAD_RIGHT     = 258,
+    CMD0_OPCODE_NPU_SET_IFM_PAD_BOTTOM    = 259,
+    CMD0_OPCODE_NPU_SET_IFM_DEPTH_M1      = 260,
+    CMD0_OPCODE_NPU_SET_IFM_PRECISION     = 261,
+    CMD0_OPCODE_NPU_SET_IFM_UPSCALE       = 263,
+    CMD0_OPCODE_NPU_SET_IFM_ZERO_POINT    = 265,
+    CMD0_OPCODE_NPU_SET_IFM_WIDTH0_M1     = 266,
+    CMD0_OPCODE_NPU_SET_IFM_HEIGHT0_M1    = 267,
+    CMD0_OPCODE_NPU_SET_IFM_HEIGHT1_M1    = 268,
+    CMD0_OPCODE_NPU_SET_IFM_IB_END        = 269,
+    CMD0_OPCODE_NPU_SET_IFM_REGION        = 271,
+    CMD0_OPCODE_NPU_SET_OFM_WIDTH_M1      = 273,
+    CMD0_OPCODE_NPU_SET_OFM_HEIGHT_M1     = 274,
+    CMD0_OPCODE_NPU_SET_OFM_DEPTH_M1      = 275,
+    CMD0_OPCODE_NPU_SET_OFM_PRECISION     = 276,
+    CMD0_OPCODE_NPU_SET_OFM_BLK_WIDTH_M1  = 277,
+    CMD0_OPCODE_NPU_SET_OFM_BLK_HEIGHT_M1 = 278,
+    CMD0_OPCODE_NPU_SET_OFM_BLK_DEPTH_M1  = 279,
+    CMD0_OPCODE_NPU_SET_OFM_ZERO_POINT    = 280,
+    CMD0_OPCODE_NPU_SET_OFM_WIDTH0_M1     = 282,
+    CMD0_OPCODE_NPU_SET_OFM_HEIGHT0_M1    = 283,
+    CMD0_OPCODE_NPU_SET_OFM_HEIGHT1_M1    = 284,
+    CMD0_OPCODE_NPU_SET_OFM_REGION        = 287,
+    CMD0_OPCODE_NPU_SET_KERNEL_WIDTH_M1   = 288,
+    CMD0_OPCODE_NPU_SET_KERNEL_HEIGHT_M1  = 289,
+    CMD0_OPCODE_NPU_SET_KERNEL_STRIDE     = 290,
+    CMD0_OPCODE_NPU_SET_PARALLEL_MODE     = 291,
+    CMD0_OPCODE_NPU_SET_ACC_FORMAT        = 292,
+    CMD0_OPCODE_NPU_SET_ACTIVATION        = 293,
+    CMD0_OPCODE_NPU_SET_ACTIVATION_MIN    = 294,
+    CMD0_OPCODE_NPU_SET_ACTIVATION_MAX    = 295,
+    CMD0_OPCODE_NPU_SET_WEIGHT_REGION     = 296,
+    CMD0_OPCODE_NPU_SET_SCALE_REGION      = 297,
+    CMD0_OPCODE_NPU_SET_AB_START          = 301,
+    CMD0_OPCODE_NPU_SET_BLOCKDEP          = 303,
+    CMD0_OPCODE_NPU_SET_DMA0_SRC_REGION   = 304,
+    CMD0_OPCODE_NPU_SET_DMA0_DST_REGION   = 305,
+    CMD0_OPCODE_NPU_SET_DMA0_SIZE0        = 306,
+    CMD0_OPCODE_NPU_SET_DMA0_SIZE1        = 307,
+    CMD0_OPCODE_NPU_SET_IFM2_BROADCAST    = 384,
+    CMD0_OPCODE_NPU_SET_IFM2_SCALAR       = 385,
+    CMD0_OPCODE_NPU_SET_IFM2_PRECISION    = 389,
+    CMD0_OPCODE_NPU_SET_IFM2_ZERO_POINT   = 393,
+    CMD0_OPCODE_NPU_SET_IFM2_WIDTH0_M1    = 394,
+    CMD0_OPCODE_NPU_SET_IFM2_HEIGHT0_M1   = 395,
+    CMD0_OPCODE_NPU_SET_IFM2_HEIGHT1_M1   = 396,
+    CMD0_OPCODE_NPU_SET_IFM2_IB_START     = 397,
+    CMD0_OPCODE_NPU_SET_IFM2_REGION       = 399,
+};
+
+enum cmd1_opcode
+{
+    CMD1_OPCODE_NPU_SET_IFM_BASE0      = 0,
+    CMD1_OPCODE_NPU_SET_IFM_BASE1      = 1,
+    CMD1_OPCODE_NPU_SET_IFM_BASE2      = 2,
+    CMD1_OPCODE_NPU_SET_IFM_BASE3      = 3,
+    CMD1_OPCODE_NPU_SET_IFM_STRIDE_X   = 4,
+    CMD1_OPCODE_NPU_SET_IFM_STRIDE_Y   = 5,
+    CMD1_OPCODE_NPU_SET_IFM_STRIDE_C   = 6,
+    CMD1_OPCODE_NPU_SET_OFM_BASE0      = 16,
+    CMD1_OPCODE_NPU_SET_OFM_BASE1      = 17,
+    CMD1_OPCODE_NPU_SET_OFM_BASE2      = 18,
+    CMD1_OPCODE_NPU_SET_OFM_BASE3      = 19,
+    CMD1_OPCODE_NPU_SET_OFM_STRIDE_X   = 20,
+    CMD1_OPCODE_NPU_SET_OFM_STRIDE_Y   = 21,
+    CMD1_OPCODE_NPU_SET_OFM_STRIDE_C   = 22,
+    CMD1_OPCODE_NPU_SET_WEIGHT_BASE    = 32,
+    CMD1_OPCODE_NPU_SET_WEIGHT_LENGTH  = 33,
+    CMD1_OPCODE_NPU_SET_SCALE_BASE     = 34,
+    CMD1_OPCODE_NPU_SET_SCALE_LENGTH   = 35,
+    CMD1_OPCODE_NPU_SET_OFM_SCALE      = 36,
+    CMD1_OPCODE_NPU_SET_OPA_SCALE      = 37,
+    CMD1_OPCODE_NPU_SET_OPB_SCALE      = 38,
+    CMD1_OPCODE_NPU_SET_DMA0_SRC       = 48,
+    CMD1_OPCODE_NPU_SET_DMA0_DST       = 49,
+    CMD1_OPCODE_NPU_SET_DMA0_LEN       = 50,
+    CMD1_OPCODE_NPU_SET_DMA0_SKIP0     = 51,
+    CMD1_OPCODE_NPU_SET_DMA0_SKIP1     = 52,
+    CMD1_OPCODE_NPU_SET_IFM2_BASE0     = 128,
+    CMD1_OPCODE_NPU_SET_IFM2_BASE1     = 129,
+    CMD1_OPCODE_NPU_SET_IFM2_BASE2     = 130,
+    CMD1_OPCODE_NPU_SET_IFM2_BASE3     = 131,
+    CMD1_OPCODE_NPU_SET_IFM2_STRIDE_X  = 132,
+    CMD1_OPCODE_NPU_SET_IFM2_STRIDE_Y  = 133,
+    CMD1_OPCODE_NPU_SET_IFM2_STRIDE_C  = 134,
+    CMD1_OPCODE_NPU_SET_WEIGHT1_BASE   = 144,
+    CMD1_OPCODE_NPU_SET_WEIGHT1_LENGTH = 145,
+    CMD1_OPCODE_NPU_SET_SCALE1_BASE    = 146,
+    CMD1_OPCODE_NPU_SET_SCALE1_LENGTH  = 147,
+};
+
+enum cmd_ctrl
+{
+    CMD_CTRL_CMD0_CTRL = 0,
+    CMD_CTRL_CMD1_CTRL = 1,
+};
+
+enum custom_dma
+{
+    CUSTOM_DMA_NOT_IMPLEMENTED = 0,
+    CUSTOM_DMA_IMPLEMENTED     = 1,
+};
+
+enum dma_fault_src
+{
+    DMA_FAULT_SRC_AXI_M0 = 0,
+    DMA_FAULT_SRC_AXI_M1 = 1,
+};
+
+enum dma_region_mode
+{
+    DMA_REGION_MODE_EXTERNAL = 0,
+    DMA_REGION_MODE_INTERNAL = 1,
+};
+
+enum dma_stride_mode
+{
+    DMA_STRIDE_MODE_D1 = 0,
+    DMA_STRIDE_MODE_D2 = 1,
+    DMA_STRIDE_MODE_D3 = 2,
+};
+
+enum elementwise_mode
+{
+    ELEMENTWISE_MODE_MUL   = 0,
+    ELEMENTWISE_MODE_ADD   = 1,
+    ELEMENTWISE_MODE_SUB   = 2,
+    ELEMENTWISE_MODE_MIN   = 3,
+    ELEMENTWISE_MODE_MAX   = 4,
+    ELEMENTWISE_MODE_LRELU = 5,
+    ELEMENTWISE_MODE_ABS   = 6,
+    ELEMENTWISE_MODE_CLZ   = 7,
+    ELEMENTWISE_MODE_SHR   = 8,
+    ELEMENTWISE_MODE_SHL   = 9,
+};
+
+enum functional_safety
+{
+    FUNCTIONAL_SAFETY_NOT_IMPLEMENTED = 0,
+    FUNCTIONAL_SAFETY_IMPLEMENTED     = 1,
+};
+
+enum ifm2_operand_order
+{
+    IFM2_OPERAND_ORDER_ORDER_B = 0,
+    IFM2_OPERAND_ORDER_ORDER_A = 1,
+};
+
+enum ifm_scale_mode
+{
+    IFM_SCALE_MODE_OPA_OPB_16 = 0,
+    IFM_SCALE_MODE_OPA_32     = 1,
+    IFM_SCALE_MODE_OPB_32     = 2,
+};
+
+enum ifm_upscale_mode
+{
+    IFM_UPSCALE_MODE_NONE    = 0,
+    IFM_UPSCALE_MODE_NEAREST = 1,
+    IFM_UPSCALE_MODE_ZEROS   = 2,
+};
+
+enum kernel_decomposition
+{
+    KERNEL_DECOMPOSITION_D8X8 = 0,
+    KERNEL_DECOMPOSITION_D4X4 = 1,
+};
+
+enum kernel_dilation
+{
+    KERNEL_DILATION_NONE = 0,
+    KERNEL_DILATION_X2   = 1,
+};
+
+enum max_beats
+{
+    MAX_BEATS_B64  = 0,
+    MAX_BEATS_B128 = 1,
+    MAX_BEATS_B256 = 2,
+};
+
+enum mem_attr
+{
+    MEM_ATTR_AXI0_OUTSTANDING_COUNTER0 = 0,
+    MEM_ATTR_AXI0_OUTSTANDING_COUNTER1 = 1,
+    MEM_ATTR_AXI1_OUTSTANDING_COUNTER2 = 2,
+    MEM_ATTR_AXI1_OUTSTANDING_COUNTER3 = 3,
+};
+
+enum ofm_scale_mode
+{
+    OFM_SCALE_MODE_PER_CHANNEL = 0,
+    OFM_SCALE_MODE_GLOBAL      = 1,
+};
+
+enum parallel_mode
+{
+    PARALLEL_MODE_SINGLE_CORE     = 0,
+    PARALLEL_MODE_DUAL_CORE_DEPTH = 1,
+};
+
+enum pmu_axi_channel
+{
+    PMU_AXI_CHANNEL_RD_CMD        = 0,
+    PMU_AXI_CHANNEL_RD_IFM        = 1,
+    PMU_AXI_CHANNEL_RD_WEIGHTS    = 2,
+    PMU_AXI_CHANNEL_RD_SCALE_BIAS = 3,
+    PMU_AXI_CHANNEL_RD_MEM2MEM    = 4,
+    PMU_AXI_CHANNEL_WR_OFM        = 8,
+    PMU_AXI_CHANNEL_WR_MEM2MEM    = 9,
+};
+
+enum pmu_event
+{
+    PMU_EVENT_NO_EVENT                     = 0,
+    PMU_EVENT_CYCLE                        = 17,
+    PMU_EVENT_NPU_IDLE                     = 32,
+    PMU_EVENT_CC_STALLED_ON_BLOCKDEP       = 33,
+    PMU_EVENT_CC_STALLED_ON_SHRAM_RECONFIG = 34,
+    PMU_EVENT_NPU_ACTIVE                   = 35,
+    PMU_EVENT_MAC_ACTIVE                   = 48,
+    PMU_EVENT_MAC_ACTIVE_8BIT              = 49,
+    PMU_EVENT_MAC_ACTIVE_16BIT             = 50,
+    PMU_EVENT_MAC_DPU_ACTIVE               = 51,
+    PMU_EVENT_MAC_STALLED_BY_WD_ACC        = 52,
+    PMU_EVENT_MAC_STALLED_BY_WD            = 53,
+    PMU_EVENT_MAC_STALLED_BY_ACC           = 54,
+    PMU_EVENT_MAC_STALLED_BY_IB            = 55,
+    PMU_EVENT_MAC_ACTIVE_32BIT             = 56,
+    PMU_EVENT_MAC_STALLED_BY_INT_W         = 57,
+    PMU_EVENT_MAC_STALLED_BY_INT_ACC       = 58,
+    PMU_EVENT_AO_ACTIVE                    = 64,
+    PMU_EVENT_AO_ACTIVE_8BIT               = 65,
+    PMU_EVENT_AO_ACTIVE_16BIT              = 66,
+    PMU_EVENT_AO_STALLED_BY_OFMP_OB        = 67,
+    PMU_EVENT_AO_STALLED_BY_OFMP           = 68,
+    PMU_EVENT_AO_STALLED_BY_OB             = 69,
+    PMU_EVENT_AO_STALLED_BY_ACC_IB         = 70,
+    PMU_EVENT_AO_STALLED_BY_ACC            = 71,
+    PMU_EVENT_AO_STALLED_BY_IB             = 72,
+    PMU_EVENT_WD_ACTIVE                    = 80,
+    PMU_EVENT_WD_STALLED                   = 81,
+    PMU_EVENT_WD_STALLED_BY_WS             = 82,
+    PMU_EVENT_WD_STALLED_BY_WD_BUF         = 83,
+    PMU_EVENT_WD_PARSE_ACTIVE              = 84,
+    PMU_EVENT_WD_PARSE_STALLED             = 85,
+    PMU_EVENT_WD_PARSE_STALLED_IN          = 86,
+    PMU_EVENT_WD_PARSE_STALLED_OUT         = 87,
+    PMU_EVENT_WD_TRANS_WS                  = 88,
+    PMU_EVENT_WD_TRANS_WB                  = 89,
+    PMU_EVENT_WD_TRANS_DW0                 = 90,
+    PMU_EVENT_WD_TRANS_DW1                 = 91,
+    PMU_EVENT_AXI0_RD_TRANS_ACCEPTED       = 128,
+    PMU_EVENT_AXI0_RD_TRANS_COMPLETED      = 129,
+    PMU_EVENT_AXI0_RD_DATA_BEAT_RECEIVED   = 130,
+    PMU_EVENT_AXI0_RD_TRAN_REQ_STALLED     = 131,
+    PMU_EVENT_AXI0_WR_TRANS_ACCEPTED       = 132,
+    PMU_EVENT_AXI0_WR_TRANS_COMPLETED_M    = 133,
+    PMU_EVENT_AXI0_WR_TRANS_COMPLETED_S    = 134,
+    PMU_EVENT_AXI0_WR_DATA_BEAT_WRITTEN    = 135,
+    PMU_EVENT_AXI0_WR_TRAN_REQ_STALLED     = 136,
+    PMU_EVENT_AXI0_WR_DATA_BEAT_STALLED    = 137,
+    PMU_EVENT_AXI0_ENABLED_CYCLES          = 140,
+    PMU_EVENT_AXI0_RD_STALL_LIMIT          = 142,
+    PMU_EVENT_AXI0_WR_STALL_LIMIT          = 143,
+    PMU_EVENT_AXI_LATENCY_ANY              = 160,
+    PMU_EVENT_AXI_LATENCY_32               = 161,
+    PMU_EVENT_AXI_LATENCY_64               = 162,
+    PMU_EVENT_AXI_LATENCY_128              = 163,
+    PMU_EVENT_AXI_LATENCY_256              = 164,
+    PMU_EVENT_AXI_LATENCY_512              = 165,
+    PMU_EVENT_AXI_LATENCY_1024             = 166,
+    PMU_EVENT_ECC_DMA                      = 176,
+    PMU_EVENT_ECC_SB0                      = 177,
+    PMU_EVENT_AXI1_RD_TRANS_ACCEPTED       = 384,
+    PMU_EVENT_AXI1_RD_TRANS_COMPLETED      = 385,
+    PMU_EVENT_AXI1_RD_DATA_BEAT_RECEIVED   = 386,
+    PMU_EVENT_AXI1_RD_TRAN_REQ_STALLED     = 387,
+    PMU_EVENT_AXI1_WR_TRANS_ACCEPTED       = 388,
+    PMU_EVENT_AXI1_WR_TRANS_COMPLETED_M    = 389,
+    PMU_EVENT_AXI1_WR_TRANS_COMPLETED_S    = 390,
+    PMU_EVENT_AXI1_WR_DATA_BEAT_WRITTEN    = 391,
+    PMU_EVENT_AXI1_WR_TRAN_REQ_STALLED     = 392,
+    PMU_EVENT_AXI1_WR_DATA_BEAT_STALLED    = 393,
+    PMU_EVENT_AXI1_ENABLED_CYCLES          = 396,
+    PMU_EVENT_AXI1_RD_STALL_LIMIT          = 398,
+    PMU_EVENT_AXI1_WR_STALL_LIMIT          = 399,
+    PMU_EVENT_ECC_SB1                      = 433,
+};
+
+enum pooling_mode
+{
+    POOLING_MODE_MAX        = 0,
+    POOLING_MODE_AVERAGE    = 1,
+    POOLING_MODE_REDUCE_SUM = 2,
+};
+
+enum privilege_level
+{
+    PRIVILEGE_LEVEL_USER       = 0,
+    PRIVILEGE_LEVEL_PRIVILEGED = 1,
+};
+
+enum round_mode
+{
+    ROUND_MODE_DBL      = 0,
+    ROUND_MODE_TRUNCATE = 1,
+    ROUND_MODE_NATURAL  = 2,
+};
+
+enum security_level
+{
+    SECURITY_LEVEL_SECURE     = 0,
+    SECURITY_LEVEL_NON_SECURE = 1,
+};
+
+enum state
+{
+    STATE_STOPPED = 0,
+    STATE_RUNNING = 1,
+};
+
+enum wd_core_slice_state
+{
+    WD_CORE_SLICE_STATE_HEADER  = 0,
+    WD_CORE_SLICE_STATE_PALETTE = 1,
+    WD_CORE_SLICE_STATE_WEIGHTS = 2,
+};
+
+enum wd_ctrl_state
+{
+    WD_CTRL_STATE_IDLE     = 0,
+    WD_CTRL_STATE_DRAIN    = 1,
+    WD_CTRL_STATE_OFD_INIT = 2,
+    WD_CTRL_STATE_OFD_RUN  = 3,
+};
+
+enum weight_order
+{
+    WEIGHT_ORDER_DEPTH_FIRST       = 0,
+    WEIGHT_ORDER_PART_KERNEL_FIRST = 1,
+};
+
+#endif
+
+#ifdef NPU_DISASSEMBLE
+
+static const char *acc_format_str[] = {
+    "ACC_FORMAT_I32",
+    "ACC_FORMAT_I40",
+    "ACC_FORMAT_F16",
+};
+
+static const char *activation_clip_range_str[] = {
+    "ACTIVATION_CLIP_RANGE_OFM_PRECISION",
+    "ACTIVATION_CLIP_RANGE_FORCE_UINT8",
+    "ACTIVATION_CLIP_RANGE_FORCE_INT8",
+    "ACTIVATION_CLIP_RANGE_FORCE_INT16",
+};
+
+static const char *activation_format_str[] = {
+    "ACTIVATION_FORMAT_NHWC",
+    "ACTIVATION_FORMAT_NHCWB16",
+};
+
+static const char *activation_function_str[] = {
+    "ACTIVATION_FUNCTION_RELU",
+    "ACTIVATION_FUNCTION_TANH",
+    "ACTIVATION_FUNCTION_SIGMOID",
+    "ACTIVATION_FUNCTION_TABLE_0",
+    "ACTIVATION_FUNCTION_TABLE_1",
+    "ACTIVATION_FUNCTION_TABLE_2",
+    "ACTIVATION_FUNCTION_TABLE_3",
+    "ACTIVATION_FUNCTION_TABLE_4",
+    "ACTIVATION_FUNCTION_TABLE_5",
+    "ACTIVATION_FUNCTION_TABLE_6",
+    "ACTIVATION_FUNCTION_TABLE_7",
+};
+
+static const char *activation_precision_str[] = {
+    "ACTIVATION_PRECISION_B8",
+    "ACTIVATION_PRECISION_B16",
+    "ACTIVATION_PRECISION_B32",
+    "ACTIVATION_PRECISION_B64",
+};
+
+static const char *activation_type_str[] = {
+    "ACTIVATION_TYPE_UNSIGNED",
+    "ACTIVATION_TYPE_SIGNED",
+};
+
+static const char *axi_mem_encoding_str[] = {
+    "AXI_MEM_ENCODING_DEVICE_NON_BUFFERABLE",
+    "AXI_MEM_ENCODING_DEVICE_BUFFERABLE",
+    "AXI_MEM_ENCODING_NORMAL_NON_CACHEABLE_NON_BUFFERABLE",
+    "AXI_MEM_ENCODING_NORMAL_NON_CACHEABLE_BUFFERABLE",
+    "AXI_MEM_ENCODING_WRITE_THROUGH_NO_ALLOCATE",
+    "AXI_MEM_ENCODING_WRITE_THROUGH_READ_ALLOCATE",
+    "AXI_MEM_ENCODING_WRITE_THROUGH_WRITE_ALLOCATE",
+    "AXI_MEM_ENCODING_WRITE_THROUGH_READ_AND_WRITE_ALLOCATE",
+    "AXI_MEM_ENCODING_WRITE_BACK_NO_ALLOCATE",
+    "AXI_MEM_ENCODING_WRITE_BACK_READ_ALLOCATE",
+    "AXI_MEM_ENCODING_WRITE_BACK_WRITE_ALLOCATE",
+    "AXI_MEM_ENCODING_WRITE_BACK_READ_AND_WRITE_ALLOCATE",
+};
+
+static const char *broadcast_mode_str[] = {
+    "BROADCAST_MODE_DISABLE",
+    "BROADCAST_MODE_ENABLE",
+};
+
+static const char *cmd0_opcode_str[] = {
+    "CMD0_OPCODE_NPU_OP_STOP",
+    "CMD0_OPCODE_NPU_OP_IRQ",
+    "CMD0_OPCODE_NPU_OP_CONV",
+    "CMD0_OPCODE_NPU_OP_DEPTHWISE",
+    "CMD0_OPCODE_NPU_OP_POOL",
+    "CMD0_OPCODE_NPU_OP_ELEMENTWISE",
+    "CMD0_OPCODE_NPU_OP_DMA_START",
+    "CMD0_OPCODE_NPU_OP_DMA_WAIT",
+    "CMD0_OPCODE_NPU_OP_KERNEL_WAIT",
+    "CMD0_OPCODE_NPU_OP_PMU_MASK",
+    "CMD0_OPCODE_NPU_SET_IFM_PAD_TOP",
+    "CMD0_OPCODE_NPU_SET_IFM_PAD_LEFT",
+    "CMD0_OPCODE_NPU_SET_IFM_PAD_RIGHT",
+    "CMD0_OPCODE_NPU_SET_IFM_PAD_BOTTOM",
+    "CMD0_OPCODE_NPU_SET_IFM_DEPTH_M1",
+    "CMD0_OPCODE_NPU_SET_IFM_PRECISION",
+    "CMD0_OPCODE_NPU_SET_IFM_UPSCALE",
+    "CMD0_OPCODE_NPU_SET_IFM_ZERO_POINT",
+    "CMD0_OPCODE_NPU_SET_IFM_WIDTH0_M1",
+    "CMD0_OPCODE_NPU_SET_IFM_HEIGHT0_M1",
+    "CMD0_OPCODE_NPU_SET_IFM_HEIGHT1_M1",
+    "CMD0_OPCODE_NPU_SET_IFM_IB_END",
+    "CMD0_OPCODE_NPU_SET_IFM_REGION",
+    "CMD0_OPCODE_NPU_SET_OFM_WIDTH_M1",
+    "CMD0_OPCODE_NPU_SET_OFM_HEIGHT_M1",
+    "CMD0_OPCODE_NPU_SET_OFM_DEPTH_M1",
+    "CMD0_OPCODE_NPU_SET_OFM_PRECISION",
+    "CMD0_OPCODE_NPU_SET_OFM_BLK_WIDTH_M1",
+    "CMD0_OPCODE_NPU_SET_OFM_BLK_HEIGHT_M1",
+    "CMD0_OPCODE_NPU_SET_OFM_BLK_DEPTH_M1",
+    "CMD0_OPCODE_NPU_SET_OFM_ZERO_POINT",
+    "CMD0_OPCODE_NPU_SET_OFM_WIDTH0_M1",
+    "CMD0_OPCODE_NPU_SET_OFM_HEIGHT0_M1",
+    "CMD0_OPCODE_NPU_SET_OFM_HEIGHT1_M1",
+    "CMD0_OPCODE_NPU_SET_OFM_REGION",
+    "CMD0_OPCODE_NPU_SET_KERNEL_WIDTH_M1",
+    "CMD0_OPCODE_NPU_SET_KERNEL_HEIGHT_M1",
+    "CMD0_OPCODE_NPU_SET_KERNEL_STRIDE",
+    "CMD0_OPCODE_NPU_SET_PARALLEL_MODE",
+    "CMD0_OPCODE_NPU_SET_ACC_FORMAT",
+    "CMD0_OPCODE_NPU_SET_ACTIVATION",
+    "CMD0_OPCODE_NPU_SET_ACTIVATION_MIN",
+    "CMD0_OPCODE_NPU_SET_ACTIVATION_MAX",
+    "CMD0_OPCODE_NPU_SET_WEIGHT_REGION",
+    "CMD0_OPCODE_NPU_SET_SCALE_REGION",
+    "CMD0_OPCODE_NPU_SET_AB_START",
+    "CMD0_OPCODE_NPU_SET_BLOCKDEP",
+    "CMD0_OPCODE_NPU_SET_DMA0_SRC_REGION",
+    "CMD0_OPCODE_NPU_SET_DMA0_DST_REGION",
+    "CMD0_OPCODE_NPU_SET_DMA0_SIZE0",
+    "CMD0_OPCODE_NPU_SET_DMA0_SIZE1",
+    "CMD0_OPCODE_NPU_SET_IFM2_BROADCAST",
+    "CMD0_OPCODE_NPU_SET_IFM2_SCALAR",
+    "CMD0_OPCODE_NPU_SET_IFM2_PRECISION",
+    "CMD0_OPCODE_NPU_SET_IFM2_ZERO_POINT",
+    "CMD0_OPCODE_NPU_SET_IFM2_WIDTH0_M1",
+    "CMD0_OPCODE_NPU_SET_IFM2_HEIGHT0_M1",
+    "CMD0_OPCODE_NPU_SET_IFM2_HEIGHT1_M1",
+    "CMD0_OPCODE_NPU_SET_IFM2_IB_START",
+    "CMD0_OPCODE_NPU_SET_IFM2_REGION",
+};
+
+static const char *cmd1_opcode_str[] = {
+    "CMD1_OPCODE_NPU_SET_IFM_BASE0",     "CMD1_OPCODE_NPU_SET_IFM_BASE1",      "CMD1_OPCODE_NPU_SET_IFM_BASE2",
+    "CMD1_OPCODE_NPU_SET_IFM_BASE3",     "CMD1_OPCODE_NPU_SET_IFM_STRIDE_X",   "CMD1_OPCODE_NPU_SET_IFM_STRIDE_Y",
+    "CMD1_OPCODE_NPU_SET_IFM_STRIDE_C",  "CMD1_OPCODE_NPU_SET_OFM_BASE0",      "CMD1_OPCODE_NPU_SET_OFM_BASE1",
+    "CMD1_OPCODE_NPU_SET_OFM_BASE2",     "CMD1_OPCODE_NPU_SET_OFM_BASE3",      "CMD1_OPCODE_NPU_SET_OFM_STRIDE_X",
+    "CMD1_OPCODE_NPU_SET_OFM_STRIDE_Y",  "CMD1_OPCODE_NPU_SET_OFM_STRIDE_C",   "CMD1_OPCODE_NPU_SET_WEIGHT_BASE",
+    "CMD1_OPCODE_NPU_SET_WEIGHT_LENGTH", "CMD1_OPCODE_NPU_SET_SCALE_BASE",     "CMD1_OPCODE_NPU_SET_SCALE_LENGTH",
+    "CMD1_OPCODE_NPU_SET_OFM_SCALE",     "CMD1_OPCODE_NPU_SET_OPA_SCALE",      "CMD1_OPCODE_NPU_SET_OPB_SCALE",
+    "CMD1_OPCODE_NPU_SET_DMA0_SRC",      "CMD1_OPCODE_NPU_SET_DMA0_DST",       "CMD1_OPCODE_NPU_SET_DMA0_LEN",
+    "CMD1_OPCODE_NPU_SET_DMA0_SKIP0",    "CMD1_OPCODE_NPU_SET_DMA0_SKIP1",     "CMD1_OPCODE_NPU_SET_IFM2_BASE0",
+    "CMD1_OPCODE_NPU_SET_IFM2_BASE1",    "CMD1_OPCODE_NPU_SET_IFM2_BASE2",     "CMD1_OPCODE_NPU_SET_IFM2_BASE3",
+    "CMD1_OPCODE_NPU_SET_IFM2_STRIDE_X", "CMD1_OPCODE_NPU_SET_IFM2_STRIDE_Y",  "CMD1_OPCODE_NPU_SET_IFM2_STRIDE_C",
+    "CMD1_OPCODE_NPU_SET_WEIGHT1_BASE",  "CMD1_OPCODE_NPU_SET_WEIGHT1_LENGTH", "CMD1_OPCODE_NPU_SET_SCALE1_BASE",
+    "CMD1_OPCODE_NPU_SET_SCALE1_LENGTH",
+};
+
+static const char *cmd_ctrl_str[] = {
+    "CMD_CTRL_CMD0_CTRL",
+    "CMD_CTRL_CMD1_CTRL",
+};
+
+static const char *custom_dma_str[] = {
+    "CUSTOM_DMA_NOT_IMPLEMENTED",
+    "CUSTOM_DMA_IMPLEMENTED",
+};
+
+static const char *dma_fault_src_str[] = {
+    "DMA_FAULT_SRC_AXI_M0",
+    "DMA_FAULT_SRC_AXI_M1",
+};
+
+static const char *dma_region_mode_str[] = {
+    "DMA_REGION_MODE_EXTERNAL",
+    "DMA_REGION_MODE_INTERNAL",
+};
+
+static const char *dma_stride_mode_str[] = {
+    "DMA_STRIDE_MODE_D1",
+    "DMA_STRIDE_MODE_D2",
+    "DMA_STRIDE_MODE_D3",
+};
+
+static const char *elementwise_mode_str[] = {
+    "ELEMENTWISE_MODE_MUL",
+    "ELEMENTWISE_MODE_ADD",
+    "ELEMENTWISE_MODE_SUB",
+    "ELEMENTWISE_MODE_MIN",
+    "ELEMENTWISE_MODE_MAX",
+    "ELEMENTWISE_MODE_LRELU",
+    "ELEMENTWISE_MODE_ABS",
+    "ELEMENTWISE_MODE_CLZ",
+    "ELEMENTWISE_MODE_SHR",
+    "ELEMENTWISE_MODE_SHL",
+};
+
+static const char *functional_safety_str[] = {
+    "FUNCTIONAL_SAFETY_NOT_IMPLEMENTED",
+    "FUNCTIONAL_SAFETY_IMPLEMENTED",
+};
+
+static const char *ifm2_operand_order_str[] = {
+    "IFM2_OPERAND_ORDER_ORDER_B",
+    "IFM2_OPERAND_ORDER_ORDER_A",
+};
+
+static const char *ifm_scale_mode_str[] = {
+    "IFM_SCALE_MODE_OPA_OPB_16",
+    "IFM_SCALE_MODE_OPA_32",
+    "IFM_SCALE_MODE_OPB_32",
+};
+
+static const char *ifm_upscale_mode_str[] = {
+    "IFM_UPSCALE_MODE_NONE",
+    "IFM_UPSCALE_MODE_NEAREST",
+    "IFM_UPSCALE_MODE_ZEROS",
+};
+
+static const char *kernel_decomposition_str[] = {
+    "KERNEL_DECOMPOSITION_D8X8",
+    "KERNEL_DECOMPOSITION_D4X4",
+};
+
+static const char *kernel_dilation_str[] = {
+    "KERNEL_DILATION_NONE",
+    "KERNEL_DILATION_X2",
+};
+
+static const char *max_beats_str[] = {
+    "MAX_BEATS_B64",
+    "MAX_BEATS_B128",
+    "MAX_BEATS_B256",
+};
+
+static const char *mem_attr_str[] = {
+    "MEM_ATTR_AXI0_OUTSTANDING_COUNTER0",
+    "MEM_ATTR_AXI0_OUTSTANDING_COUNTER1",
+    "MEM_ATTR_AXI1_OUTSTANDING_COUNTER2",
+    "MEM_ATTR_AXI1_OUTSTANDING_COUNTER3",
+};
+
+static const char *ofm_scale_mode_str[] = {
+    "OFM_SCALE_MODE_PER_CHANNEL",
+    "OFM_SCALE_MODE_GLOBAL",
+};
+
+static const char *parallel_mode_str[] = {
+    "PARALLEL_MODE_SINGLE_CORE",
+    "PARALLEL_MODE_DUAL_CORE_DEPTH",
+};
+
+static const char *pmu_axi_channel_str[] = {
+    "PMU_AXI_CHANNEL_RD_CMD",
+    "PMU_AXI_CHANNEL_RD_IFM",
+    "PMU_AXI_CHANNEL_RD_WEIGHTS",
+    "PMU_AXI_CHANNEL_RD_SCALE_BIAS",
+    "PMU_AXI_CHANNEL_RD_MEM2MEM",
+    "PMU_AXI_CHANNEL_WR_OFM",
+    "PMU_AXI_CHANNEL_WR_MEM2MEM",
+};
+
+static const char *pmu_event_str[] = {
+    "PMU_EVENT_NO_EVENT",
+    "PMU_EVENT_CYCLE",
+    "PMU_EVENT_NPU_IDLE",
+    "PMU_EVENT_CC_STALLED_ON_BLOCKDEP",
+    "PMU_EVENT_CC_STALLED_ON_SHRAM_RECONFIG",
+    "PMU_EVENT_NPU_ACTIVE",
+    "PMU_EVENT_MAC_ACTIVE",
+    "PMU_EVENT_MAC_ACTIVE_8BIT",
+    "PMU_EVENT_MAC_ACTIVE_16BIT",
+    "PMU_EVENT_MAC_DPU_ACTIVE",
+    "PMU_EVENT_MAC_STALLED_BY_WD_ACC",
+    "PMU_EVENT_MAC_STALLED_BY_WD",
+    "PMU_EVENT_MAC_STALLED_BY_ACC",
+    "PMU_EVENT_MAC_STALLED_BY_IB",
+    "PMU_EVENT_MAC_ACTIVE_32BIT",
+    "PMU_EVENT_MAC_STALLED_BY_INT_W",
+    "PMU_EVENT_MAC_STALLED_BY_INT_ACC",
+    "PMU_EVENT_AO_ACTIVE",
+    "PMU_EVENT_AO_ACTIVE_8BIT",
+    "PMU_EVENT_AO_ACTIVE_16BIT",
+    "PMU_EVENT_AO_STALLED_BY_OFMP_OB",
+    "PMU_EVENT_AO_STALLED_BY_OFMP",
+    "PMU_EVENT_AO_STALLED_BY_OB",
+    "PMU_EVENT_AO_STALLED_BY_ACC_IB",
+    "PMU_EVENT_AO_STALLED_BY_ACC",
+    "PMU_EVENT_AO_STALLED_BY_IB",
+    "PMU_EVENT_WD_ACTIVE",
+    "PMU_EVENT_WD_STALLED",
+    "PMU_EVENT_WD_STALLED_BY_WS",
+    "PMU_EVENT_WD_STALLED_BY_WD_BUF",
+    "PMU_EVENT_WD_PARSE_ACTIVE",
+    "PMU_EVENT_WD_PARSE_STALLED",
+    "PMU_EVENT_WD_PARSE_STALLED_IN",
+    "PMU_EVENT_WD_PARSE_STALLED_OUT",
+    "PMU_EVENT_WD_TRANS_WS",
+    "PMU_EVENT_WD_TRANS_WB",
+    "PMU_EVENT_WD_TRANS_DW0",
+    "PMU_EVENT_WD_TRANS_DW1",
+    "PMU_EVENT_AXI0_RD_TRANS_ACCEPTED",
+    "PMU_EVENT_AXI0_RD_TRANS_COMPLETED",
+    "PMU_EVENT_AXI0_RD_DATA_BEAT_RECEIVED",
+    "PMU_EVENT_AXI0_RD_TRAN_REQ_STALLED",
+    "PMU_EVENT_AXI0_WR_TRANS_ACCEPTED",
+    "PMU_EVENT_AXI0_WR_TRANS_COMPLETED_M",
+    "PMU_EVENT_AXI0_WR_TRANS_COMPLETED_S",
+    "PMU_EVENT_AXI0_WR_DATA_BEAT_WRITTEN",
+    "PMU_EVENT_AXI0_WR_TRAN_REQ_STALLED",
+    "PMU_EVENT_AXI0_WR_DATA_BEAT_STALLED",
+    "PMU_EVENT_AXI0_ENABLED_CYCLES",
+    "PMU_EVENT_AXI0_RD_STALL_LIMIT",
+    "PMU_EVENT_AXI0_WR_STALL_LIMIT",
+    "PMU_EVENT_AXI_LATENCY_ANY",
+    "PMU_EVENT_AXI_LATENCY_32",
+    "PMU_EVENT_AXI_LATENCY_64",
+    "PMU_EVENT_AXI_LATENCY_128",
+    "PMU_EVENT_AXI_LATENCY_256",
+    "PMU_EVENT_AXI_LATENCY_512",
+    "PMU_EVENT_AXI_LATENCY_1024",
+    "PMU_EVENT_ECC_DMA",
+    "PMU_EVENT_ECC_SB0",
+    "PMU_EVENT_AXI1_RD_TRANS_ACCEPTED",
+    "PMU_EVENT_AXI1_RD_TRANS_COMPLETED",
+    "PMU_EVENT_AXI1_RD_DATA_BEAT_RECEIVED",
+    "PMU_EVENT_AXI1_RD_TRAN_REQ_STALLED",
+    "PMU_EVENT_AXI1_WR_TRANS_ACCEPTED",
+    "PMU_EVENT_AXI1_WR_TRANS_COMPLETED_M",
+    "PMU_EVENT_AXI1_WR_TRANS_COMPLETED_S",
+    "PMU_EVENT_AXI1_WR_DATA_BEAT_WRITTEN",
+    "PMU_EVENT_AXI1_WR_TRAN_REQ_STALLED",
+    "PMU_EVENT_AXI1_WR_DATA_BEAT_STALLED",
+    "PMU_EVENT_AXI1_ENABLED_CYCLES",
+    "PMU_EVENT_AXI1_RD_STALL_LIMIT",
+    "PMU_EVENT_AXI1_WR_STALL_LIMIT",
+    "PMU_EVENT_ECC_SB1",
+};
+
+static const char *pooling_mode_str[] = {
+    "POOLING_MODE_MAX",
+    "POOLING_MODE_AVERAGE",
+    "POOLING_MODE_REDUCE_SUM",
+};
+
+static const char *privilege_level_str[] = {
+    "PRIVILEGE_LEVEL_USER",
+    "PRIVILEGE_LEVEL_PRIVILEGED",
+};
+
+static const char *round_mode_str[] = {
+    "ROUND_MODE_DBL",
+    "ROUND_MODE_TRUNCATE",
+    "ROUND_MODE_NATURAL",
+};
+
+static const char *security_level_str[] = {
+    "SECURITY_LEVEL_SECURE",
+    "SECURITY_LEVEL_NON_SECURE",
+};
+
+static const char *state_str[] = {
+    "STATE_STOPPED",
+    "STATE_RUNNING",
+};
+
+static const char *wd_core_slice_state_str[] = {
+    "WD_CORE_SLICE_STATE_HEADER",
+    "WD_CORE_SLICE_STATE_PALETTE",
+    "WD_CORE_SLICE_STATE_WEIGHTS",
+};
+
+static const char *wd_ctrl_state_str[] = {
+    "WD_CTRL_STATE_IDLE",
+    "WD_CTRL_STATE_DRAIN",
+    "WD_CTRL_STATE_OFD_INIT",
+    "WD_CTRL_STATE_OFD_RUN",
+};
+
+static const char *weight_order_str[] = {
+    "WEIGHT_ORDER_DEPTH_FIRST",
+    "WEIGHT_ORDER_PART_KERNEL_FIRST",
+};
+
+#endif
+
+// Register type structs
+// id_r - ID register
+struct id_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t version_status : 4; // This is the version of the product
+            uint32_t version_minor : 4;  // This is the n for the P part of an RnPn release number
+            uint32_t version_major : 4;  // This is the n for the R part of an RnPn release number
+            uint32_t product_major : 4;  // Product major ID number (unique per base product)
+            uint32_t arch_patch_rev : 4; // This is the patch number of the architecture version a.b
+            uint32_t
+                arch_minor_rev : 8; // This is the minor architecture version number, b in the architecture version a.b
+            uint32_t
+                arch_major_rev : 4; // This is the major architecture version number, a in the architecture version a.b
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR id_r() : word0(268853249) {}
+    CONSTEXPR id_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    id_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_version_status() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 0));
+        return value;
+    }
+    uint32_t get_version_status() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 0));
+        return value;
+    }
+    CONSTEXPR id_r &set_version_status(uint32_t value)
+    {
+        word0 = (((~((1U << 4) - 1)) << 0) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 0);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_version_minor() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 4));
+        return value;
+    }
+    uint32_t get_version_minor() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 4));
+        return value;
+    }
+    CONSTEXPR id_r &set_version_minor(uint32_t value)
+    {
+        word0 = (((~((1U << 4) - 1)) << 4) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 4);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_version_major() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 8));
+        return value;
+    }
+    uint32_t get_version_major() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 8));
+        return value;
+    }
+    CONSTEXPR id_r &set_version_major(uint32_t value)
+    {
+        word0 = (((~((1U << 4) - 1)) << 8) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 8);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_product_major() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 12));
+        return value;
+    }
+    uint32_t get_product_major() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 12));
+        return value;
+    }
+    CONSTEXPR id_r &set_product_major(uint32_t value)
+    {
+        word0 = (((~((1U << 4) - 1)) << 12) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 12);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_arch_patch_rev() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 16));
+        return value;
+    }
+    uint32_t get_arch_patch_rev() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 16));
+        return value;
+    }
+    CONSTEXPR id_r &set_arch_patch_rev(uint32_t value)
+    {
+        word0 = (((~((1U << 4) - 1)) << 16) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 16);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_arch_minor_rev() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 8) - 1) & (word0 >> 20));
+        return value;
+    }
+    uint32_t get_arch_minor_rev() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 8) - 1) & (word0 >> 20));
+        return value;
+    }
+    CONSTEXPR id_r &set_arch_minor_rev(uint32_t value)
+    {
+        word0 = (((~((1U << 8) - 1)) << 20) & word0) | ((((1U << 8) - 1) & static_cast<uint32_t>(value)) << 20);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_arch_major_rev() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 28));
+        return value;
+    }
+    uint32_t get_arch_major_rev() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 28));
+        return value;
+    }
+    CONSTEXPR id_r &set_arch_major_rev(uint32_t value)
+    {
+        word0 = (((~((1U << 4) - 1)) << 28) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 28);
+        return *this;
+    }
+#endif
+};
+
+// status_r - Register describes the current operating status of the NPU
+struct status_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t state : 1;      // NPU state, 0 = Stopped, 1 = Running
+            uint32_t irq_raised : 1; // Raw IRQ status, 0 = IRQ not raised, 1 = IRQ raised. IRQ is cleared using command
+                                     // register bit 1
+            uint32_t
+                bus_status : 1; // 0=OK, 1=Bus abort detected and processing halted (NPU will reach IDLE state and not
+                                // to start process any more commands/AXI transactions). Can only be cleared by a reset
+            uint32_t reset_status : 1; // Reset is ongoing and only this register can be read (other registers read as 0
+                                       // and writes are ignored.) A value of 0 means NPU is not being reset and can be
+                                       // accessed as normal
+            uint32_t
+                cmd_parse_error : 1; // 0=No error 1=Command stream parsing error detected. Can only be cleared by reset
+            uint32_t cmd_end_reached : 1; // 0=Not reached, 1=Reached. Cleared by writing QBASE or QSIZE when NPU is in
+                                          // stopped state
+            uint32_t pmu_irq_raised : 1;  // 0=No PMU IRQ, 1=PMU IRQ raised. Cleared by using command register bit 1
+            uint32_t wd_fault : 1; // Weight decoder state: 0=no fault 1=weight decoder decompression fault. Can only be
+                                   // cleared by reset
+            uint32_t ecc_fault : 1; // ECC state for internal RAMs: 0=no fault 1=ECC fault signalled. Can only be
+                                    // cleared by reset
+            uint32_t reserved0 : 2;
+            uint32_t faulting_interface : 1; // Faulting interface on bus abort
+            uint32_t faulting_channel : 4;  // Faulting channel on a bus abort. Read: 0=Cmd 1=IFM 2=Weights 3=Scale+Bias
+                                            // 4=Mem2Mem; Write: 8=OFM 9=Mem2Mem
+            uint32_t irq_history_mask : 16; // IRQ History mask
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR status_r() : word0(8) {}
+    CONSTEXPR status_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    status_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::state get_state() const
+    {
+        NPU_NAMESPACE::state value = static_cast<NPU_NAMESPACE::state>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    NPU_NAMESPACE::state get_state() const volatile
+    {
+        NPU_NAMESPACE::state value = static_cast<NPU_NAMESPACE::state>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    CONSTEXPR status_r &set_state(NPU_NAMESPACE::state value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_irq_raised() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    uint32_t get_irq_raised() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    CONSTEXPR status_r &set_irq_raised(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_bus_status() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    uint32_t get_bus_status() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    CONSTEXPR status_r &set_bus_status(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_reset_status() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
+        return value;
+    }
+    uint32_t get_reset_status() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
+        return value;
+    }
+    CONSTEXPR status_r &set_reset_status(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_cmd_parse_error() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4));
+        return value;
+    }
+    uint32_t get_cmd_parse_error() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4));
+        return value;
+    }
+    CONSTEXPR status_r &set_cmd_parse_error(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 4) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 4);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_cmd_end_reached() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5));
+        return value;
+    }
+    uint32_t get_cmd_end_reached() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5));
+        return value;
+    }
+    CONSTEXPR status_r &set_cmd_end_reached(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 5) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 5);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_pmu_irq_raised() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6));
+        return value;
+    }
+    uint32_t get_pmu_irq_raised() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6));
+        return value;
+    }
+    CONSTEXPR status_r &set_pmu_irq_raised(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 6) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 6);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_wd_fault() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7));
+        return value;
+    }
+    uint32_t get_wd_fault() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7));
+        return value;
+    }
+    CONSTEXPR status_r &set_wd_fault(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 7) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 7);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_ecc_fault() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 8));
+        return value;
+    }
+    uint32_t get_ecc_fault() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 8));
+        return value;
+    }
+    CONSTEXPR status_r &set_ecc_fault(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 8) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 8);
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::dma_fault_src get_faulting_interface() const
+    {
+        NPU_NAMESPACE::dma_fault_src value = static_cast<NPU_NAMESPACE::dma_fault_src>(((1U << 1) - 1) & (word0 >> 11));
+        return value;
+    }
+    NPU_NAMESPACE::dma_fault_src get_faulting_interface() const volatile
+    {
+        NPU_NAMESPACE::dma_fault_src value = static_cast<NPU_NAMESPACE::dma_fault_src>(((1U << 1) - 1) & (word0 >> 11));
+        return value;
+    }
+    CONSTEXPR status_r &set_faulting_interface(NPU_NAMESPACE::dma_fault_src value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 11) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 11);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_faulting_channel() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 12));
+        return value;
+    }
+    uint32_t get_faulting_channel() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 12));
+        return value;
+    }
+    CONSTEXPR status_r &set_faulting_channel(uint32_t value)
+    {
+        word0 = (((~((1U << 4) - 1)) << 12) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 12);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_irq_history_mask() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 16) - 1) & (word0 >> 16));
+        return value;
+    }
+    uint32_t get_irq_history_mask() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 16) - 1) & (word0 >> 16));
+        return value;
+    }
+    CONSTEXPR status_r &set_irq_history_mask(uint32_t value)
+    {
+        word0 = (((~((1U << 16) - 1)) << 16) & word0) | ((((1U << 16) - 1) & static_cast<uint32_t>(value)) << 16);
+        return *this;
+    }
+#endif
+};
+
+// cmd_r - Command register, reads as last written command
+struct cmd_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t transition_to_running_state : 1; // Write 1 to transition the NPU to running state. Writing 0 has
+                                                      // no effect
+            uint32_t clear_irq : 1; // Write 1 to clear the IRQ status in the STATUS register. Writing 0 has no effect
+            uint32_t clock_q_enable : 1; // Write 1 to this bit to enable clock off using clock q-interface and enable
+                                         // the requester clock gate
+            uint32_t power_q_enable : 1; // Write 1 to this bit to enable power off using power q-interface
+            uint32_t
+                stop_request : 1; // Write 1 to this bit to request STOP after completing any already-started commands
+            uint32_t reserved0 : 11;
+            uint32_t clear_irq_history : 16; // Clears the IRQ history mask
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR cmd_r() : word0(12) {}
+    CONSTEXPR cmd_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    cmd_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_transition_to_running_state() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    uint32_t get_transition_to_running_state() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    CONSTEXPR cmd_r &set_transition_to_running_state(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_clear_irq() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    uint32_t get_clear_irq() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    CONSTEXPR cmd_r &set_clear_irq(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_clock_q_enable() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    uint32_t get_clock_q_enable() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    CONSTEXPR cmd_r &set_clock_q_enable(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_power_q_enable() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
+        return value;
+    }
+    uint32_t get_power_q_enable() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
+        return value;
+    }
+    CONSTEXPR cmd_r &set_power_q_enable(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_stop_request() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4));
+        return value;
+    }
+    uint32_t get_stop_request() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4));
+        return value;
+    }
+    CONSTEXPR cmd_r &set_stop_request(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 4) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 4);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_clear_irq_history() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 16) - 1) & (word0 >> 16));
+        return value;
+    }
+    uint32_t get_clear_irq_history() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 16) - 1) & (word0 >> 16));
+        return value;
+    }
+    CONSTEXPR cmd_r &set_clear_irq_history(uint32_t value)
+    {
+        word0 = (((~((1U << 16) - 1)) << 16) & word0) | ((((1U << 16) - 1) & static_cast<uint32_t>(value)) << 16);
+        return *this;
+    }
+#endif
+};
+
+// reset_r - Request Reset and new security mode
+struct reset_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t pending_CPL : 1; // Current privilege level 0=User 1=Privileged
+            uint32_t pending_CSL : 1; // Current security level 0=Secure 1=Non secure
+            uint32_t reserved0 : 30;
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR reset_r() : word0(0) {}
+    CONSTEXPR reset_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    reset_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::privilege_level get_pending_CPL() const
+    {
+        NPU_NAMESPACE::privilege_level value =
+            static_cast<NPU_NAMESPACE::privilege_level>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    NPU_NAMESPACE::privilege_level get_pending_CPL() const volatile
+    {
+        NPU_NAMESPACE::privilege_level value =
+            static_cast<NPU_NAMESPACE::privilege_level>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    CONSTEXPR reset_r &set_pending_CPL(NPU_NAMESPACE::privilege_level value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::security_level get_pending_CSL() const
+    {
+        NPU_NAMESPACE::security_level value =
+            static_cast<NPU_NAMESPACE::security_level>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    NPU_NAMESPACE::security_level get_pending_CSL() const volatile
+    {
+        NPU_NAMESPACE::security_level value =
+            static_cast<NPU_NAMESPACE::security_level>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    CONSTEXPR reset_r &set_pending_CSL(NPU_NAMESPACE::security_level value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
+        return *this;
+    }
+#endif
+};
+
+// qbase_r - Base address of command queue. The address is 4 byte aligned
+struct qbase_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t offset_LO : 32; // Offset - LSB
+            uint32_t offset_HI : 8;  // Offset - MSB
+            uint32_t reserved0 : 24;
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR qbase_r() : word0(0), word1(0) {}
+    CONSTEXPR qbase_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    qbase_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// qread_r - Read offset in the command stream in bytes. Multiple of 4 in the range 0 to 16 MB
+struct qread_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t QREAD : 32; // The read offset of the current command under execution
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR qread_r() : word0(0) {}
+    CONSTEXPR qread_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    qread_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_QREAD() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_QREAD() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR qread_r &set_QREAD(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// qconfig_r - AXI configuration for the command stream in the range 0-3. Same encoding as for REGIONCFG
+struct qconfig_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t cmd_region0 : 2; // Command region configuration
+            uint32_t reserved0 : 30;
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR qconfig_r() : word0(0) {}
+    CONSTEXPR qconfig_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    qconfig_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::mem_attr get_cmd_region0() const
+    {
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 0));
+        return value;
+    }
+    NPU_NAMESPACE::mem_attr get_cmd_region0() const volatile
+    {
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 0));
+        return value;
+    }
+    CONSTEXPR qconfig_r &set_cmd_region0(NPU_NAMESPACE::mem_attr value)
+    {
+        word0 = (((~((1U << 2) - 1)) << 0) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 0);
+        return *this;
+    }
+#endif
+};
+
+// qsize_r - Size of the command stream in bytes. Multiple of 4 in the range 0 to 16 MB
+struct qsize_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t QSIZE : 32; // Size of the next command stream to be executed by the NPU
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR qsize_r() : word0(0) {}
+    CONSTEXPR qsize_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    qsize_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_QSIZE() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_QSIZE() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR qsize_r &set_QSIZE(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// prot_r - Protection level configured for the NPU when acting as an AXI requester
+struct prot_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t active_CPL : 1; // Current privilege level 0=User 1=Privileged
+            uint32_t active_CSL : 1; // Current security level 0=Secure 1=Non secure
+            uint32_t reserved0 : 30;
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR prot_r() : word0(0) {}
+    CONSTEXPR prot_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    prot_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::privilege_level get_active_CPL() const
+    {
+        NPU_NAMESPACE::privilege_level value =
+            static_cast<NPU_NAMESPACE::privilege_level>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    NPU_NAMESPACE::privilege_level get_active_CPL() const volatile
+    {
+        NPU_NAMESPACE::privilege_level value =
+            static_cast<NPU_NAMESPACE::privilege_level>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    CONSTEXPR prot_r &set_active_CPL(NPU_NAMESPACE::privilege_level value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::security_level get_active_CSL() const
+    {
+        NPU_NAMESPACE::security_level value =
+            static_cast<NPU_NAMESPACE::security_level>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    NPU_NAMESPACE::security_level get_active_CSL() const volatile
+    {
+        NPU_NAMESPACE::security_level value =
+            static_cast<NPU_NAMESPACE::security_level>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    CONSTEXPR prot_r &set_active_CSL(NPU_NAMESPACE::security_level value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
+        return *this;
+    }
+#endif
+};
+
+// config_r - RTL configuration
+struct config_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t macs_per_cc : 4;        // The log2(macs/clock cycle)
+            uint32_t cmd_stream_version : 4; // command stream version accepted by this NPU
+            uint32_t shram_size : 8;         // Total size in KB of internal SHRAM
+            uint32_t reserved0 : 10;
+            uint32_t functional_safety : 1; // Functional safety configuration
+            uint32_t custom_dma : 1;        // Custom DMA configuration
+            uint32_t product : 4;           // Product configuration
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR config_r() : word0(268435456) {}
+    CONSTEXPR config_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    config_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_macs_per_cc() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 0));
+        return value;
+    }
+    uint32_t get_macs_per_cc() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 0));
+        return value;
+    }
+    CONSTEXPR config_r &set_macs_per_cc(uint32_t value)
+    {
+        word0 = (((~((1U << 4) - 1)) << 0) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 0);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_cmd_stream_version() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 4));
+        return value;
+    }
+    uint32_t get_cmd_stream_version() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 4));
+        return value;
+    }
+    CONSTEXPR config_r &set_cmd_stream_version(uint32_t value)
+    {
+        word0 = (((~((1U << 4) - 1)) << 4) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 4);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_shram_size() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 8) - 1) & (word0 >> 8));
+        return value;
+    }
+    uint32_t get_shram_size() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 8) - 1) & (word0 >> 8));
+        return value;
+    }
+    CONSTEXPR config_r &set_shram_size(uint32_t value)
+    {
+        word0 = (((~((1U << 8) - 1)) << 8) & word0) | ((((1U << 8) - 1) & static_cast<uint32_t>(value)) << 8);
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::functional_safety get_functional_safety() const
+    {
+        NPU_NAMESPACE::functional_safety value =
+            static_cast<NPU_NAMESPACE::functional_safety>(((1U << 1) - 1) & (word0 >> 26));
+        return value;
+    }
+    NPU_NAMESPACE::functional_safety get_functional_safety() const volatile
+    {
+        NPU_NAMESPACE::functional_safety value =
+            static_cast<NPU_NAMESPACE::functional_safety>(((1U << 1) - 1) & (word0 >> 26));
+        return value;
+    }
+    CONSTEXPR config_r &set_functional_safety(NPU_NAMESPACE::functional_safety value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 26) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 26);
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::custom_dma get_custom_dma() const
+    {
+        NPU_NAMESPACE::custom_dma value = static_cast<NPU_NAMESPACE::custom_dma>(((1U << 1) - 1) & (word0 >> 27));
+        return value;
+    }
+    NPU_NAMESPACE::custom_dma get_custom_dma() const volatile
+    {
+        NPU_NAMESPACE::custom_dma value = static_cast<NPU_NAMESPACE::custom_dma>(((1U << 1) - 1) & (word0 >> 27));
+        return value;
+    }
+    CONSTEXPR config_r &set_custom_dma(NPU_NAMESPACE::custom_dma value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 27) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 27);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_product() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 28));
+        return value;
+    }
+    uint32_t get_product() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 28));
+        return value;
+    }
+    CONSTEXPR config_r &set_product(uint32_t value)
+    {
+        word0 = (((~((1U << 4) - 1)) << 28) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 28);
+        return *this;
+    }
+#endif
+};
+
+// lock_r - Lock register. This register is designed for driver use and does not affect NPU functionality
+struct lock_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t LOCK : 32; // 32 bit value for LOCK configuration
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR lock_r() : word0(0) {}
+    CONSTEXPR lock_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    lock_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_LOCK() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_LOCK() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR lock_r &set_LOCK(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// regioncfg_r - Region memory type configuration. Bits[2*k+1:2*k] give the memory type for REGION[k]
+struct regioncfg_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t region0 : 2; // Bits for Region0 Configuration
+            uint32_t region1 : 2; // Bits for Region1 Configuration
+            uint32_t region2 : 2; // Bits for Region2 Configuration
+            uint32_t region3 : 2; // Bits for Region3 Configuration
+            uint32_t region4 : 2; // Bits for Region4 Configuration
+            uint32_t region5 : 2; // Bits for Region5 Configuration
+            uint32_t region6 : 2; // Bits for Region6 Configuration
+            uint32_t region7 : 2; // Bits for Region7 Configuration
+            uint32_t reserved0 : 16;
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR regioncfg_r() : word0(0) {}
+    CONSTEXPR regioncfg_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    regioncfg_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::mem_attr get_region0() const
+    {
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 0));
+        return value;
+    }
+    NPU_NAMESPACE::mem_attr get_region0() const volatile
+    {
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 0));
+        return value;
+    }
+    CONSTEXPR regioncfg_r &set_region0(NPU_NAMESPACE::mem_attr value)
+    {
+        word0 = (((~((1U << 2) - 1)) << 0) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 0);
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::mem_attr get_region1() const
+    {
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 2));
+        return value;
+    }
+    NPU_NAMESPACE::mem_attr get_region1() const volatile
+    {
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 2));
+        return value;
+    }
+    CONSTEXPR regioncfg_r &set_region1(NPU_NAMESPACE::mem_attr value)
+    {
+        word0 = (((~((1U << 2) - 1)) << 2) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 2);
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::mem_attr get_region2() const
+    {
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 4));
+        return value;
+    }
+    NPU_NAMESPACE::mem_attr get_region2() const volatile
+    {
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 4));
+        return value;
+    }
+    CONSTEXPR regioncfg_r &set_region2(NPU_NAMESPACE::mem_attr value)
+    {
+        word0 = (((~((1U << 2) - 1)) << 4) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 4);
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::mem_attr get_region3() const
+    {
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 6));
+        return value;
+    }
+    NPU_NAMESPACE::mem_attr get_region3() const volatile
+    {
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 6));
+        return value;
+    }
+    CONSTEXPR regioncfg_r &set_region3(NPU_NAMESPACE::mem_attr value)
+    {
+        word0 = (((~((1U << 2) - 1)) << 6) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 6);
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::mem_attr get_region4() const
+    {
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 8));
+        return value;
+    }
+    NPU_NAMESPACE::mem_attr get_region4() const volatile
+    {
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 8));
+        return value;
+    }
+    CONSTEXPR regioncfg_r &set_region4(NPU_NAMESPACE::mem_attr value)
+    {
+        word0 = (((~((1U << 2) - 1)) << 8) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 8);
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::mem_attr get_region5() const
+    {
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 10));
+        return value;
+    }
+    NPU_NAMESPACE::mem_attr get_region5() const volatile
+    {
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 10));
+        return value;
+    }
+    CONSTEXPR regioncfg_r &set_region5(NPU_NAMESPACE::mem_attr value)
+    {
+        word0 = (((~((1U << 2) - 1)) << 10) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 10);
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::mem_attr get_region6() const
+    {
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 12));
+        return value;
+    }
+    NPU_NAMESPACE::mem_attr get_region6() const volatile
+    {
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 12));
+        return value;
+    }
+    CONSTEXPR regioncfg_r &set_region6(NPU_NAMESPACE::mem_attr value)
+    {
+        word0 = (((~((1U << 2) - 1)) << 12) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 12);
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::mem_attr get_region7() const
+    {
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 14));
+        return value;
+    }
+    NPU_NAMESPACE::mem_attr get_region7() const volatile
+    {
+        NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 14));
+        return value;
+    }
+    CONSTEXPR regioncfg_r &set_region7(NPU_NAMESPACE::mem_attr value)
+    {
+        word0 = (((~((1U << 2) - 1)) << 14) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 14);
+        return *this;
+    }
+#endif
+};
+
+// axi_limit0_r - AXI limits for port 0 counter 0
+struct axi_limit0_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t max_beats : 2; // Burst split alignment
+            uint32_t reserved0 : 2;
+            uint32_t memtype : 4; // Memtype to be used to encode AxCACHE signals
+            uint32_t reserved1 : 8;
+            uint32_t
+                max_outstanding_read_m1 : 6; // Maximum number of outstanding AXI read transactions - 1 in range 0 to 63
+            uint32_t reserved2 : 2;
+            uint32_t max_outstanding_write_m1 : 5; // Maximum number of outstanding AXI write transactions - 1 in range
+                                                   // 0 to 31
+            uint32_t reserved3 : 3;
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR axi_limit0_r() : word0(0) {}
+    CONSTEXPR axi_limit0_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    axi_limit0_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::max_beats get_max_beats() const
+    {
+        NPU_NAMESPACE::max_beats value = static_cast<NPU_NAMESPACE::max_beats>(((1U << 2) - 1) & (word0 >> 0));
+        return value;
+    }
+    NPU_NAMESPACE::max_beats get_max_beats() const volatile
+    {
+        NPU_NAMESPACE::max_beats value = static_cast<NPU_NAMESPACE::max_beats>(((1U << 2) - 1) & (word0 >> 0));
+        return value;
+    }
+    CONSTEXPR axi_limit0_r &set_max_beats(NPU_NAMESPACE::max_beats value)
+    {
+        word0 = (((~((1U << 2) - 1)) << 0) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 0);
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::axi_mem_encoding get_memtype() const
+    {
+        NPU_NAMESPACE::axi_mem_encoding value =
+            static_cast<NPU_NAMESPACE::axi_mem_encoding>(((1U << 4) - 1) & (word0 >> 4));
+        return value;
+    }
+    NPU_NAMESPACE::axi_mem_encoding get_memtype() const volatile
+    {
+        NPU_NAMESPACE::axi_mem_encoding value =
+            static_cast<NPU_NAMESPACE::axi_mem_encoding>(((1U << 4) - 1) & (word0 >> 4));
+        return value;
+    }
+    CONSTEXPR axi_limit0_r &set_memtype(NPU_NAMESPACE::axi_mem_encoding value)
+    {
+        word0 = (((~((1U << 4) - 1)) << 4) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 4);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_max_outstanding_read_m1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 6) - 1) & (word0 >> 16));
+        return value;
+    }
+    uint32_t get_max_outstanding_read_m1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 6) - 1) & (word0 >> 16));
+        return value;
+    }
+    CONSTEXPR axi_limit0_r &set_max_outstanding_read_m1(uint32_t value)
+    {
+        word0 = (((~((1U << 6) - 1)) << 16) & word0) | ((((1U << 6) - 1) & static_cast<uint32_t>(value)) << 16);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_max_outstanding_write_m1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 24));
+        return value;
+    }
+    uint32_t get_max_outstanding_write_m1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 24));
+        return value;
+    }
+    CONSTEXPR axi_limit0_r &set_max_outstanding_write_m1(uint32_t value)
+    {
+        word0 = (((~((1U << 5) - 1)) << 24) & word0) | ((((1U << 5) - 1) & static_cast<uint32_t>(value)) << 24);
+        return *this;
+    }
+#endif
+};
+
+// axi_limit1_r - AXI limits for port 0 counter 1
+struct axi_limit1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t max_beats : 2; // Burst split alignment
+            uint32_t reserved0 : 2;
+            uint32_t memtype : 4; // Memtype to be used to encode AxCACHE signals
+            uint32_t reserved1 : 8;
+            uint32_t
+                max_outstanding_read_m1 : 6; // Maximum number of outstanding AXI read transactions - 1 in range 0 to 63
+            uint32_t reserved2 : 2;
+            uint32_t max_outstanding_write_m1 : 5; // Maximum number of outstanding AXI write transactions - 1 in range
+                                                   // 0 to 31
+            uint32_t reserved3 : 3;
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR axi_limit1_r() : word0(0) {}
+    CONSTEXPR axi_limit1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    axi_limit1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::max_beats get_max_beats() const
+    {
+        NPU_NAMESPACE::max_beats value = static_cast<NPU_NAMESPACE::max_beats>(((1U << 2) - 1) & (word0 >> 0));
+        return value;
+    }
+    NPU_NAMESPACE::max_beats get_max_beats() const volatile
+    {
+        NPU_NAMESPACE::max_beats value = static_cast<NPU_NAMESPACE::max_beats>(((1U << 2) - 1) & (word0 >> 0));
+        return value;
+    }
+    CONSTEXPR axi_limit1_r &set_max_beats(NPU_NAMESPACE::max_beats value)
+    {
+        word0 = (((~((1U << 2) - 1)) << 0) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 0);
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::axi_mem_encoding get_memtype() const
+    {
+        NPU_NAMESPACE::axi_mem_encoding value =
+            static_cast<NPU_NAMESPACE::axi_mem_encoding>(((1U << 4) - 1) & (word0 >> 4));
+        return value;
+    }
+    NPU_NAMESPACE::axi_mem_encoding get_memtype() const volatile
+    {
+        NPU_NAMESPACE::axi_mem_encoding value =
+            static_cast<NPU_NAMESPACE::axi_mem_encoding>(((1U << 4) - 1) & (word0 >> 4));
+        return value;
+    }
+    CONSTEXPR axi_limit1_r &set_memtype(NPU_NAMESPACE::axi_mem_encoding value)
+    {
+        word0 = (((~((1U << 4) - 1)) << 4) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 4);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_max_outstanding_read_m1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 6) - 1) & (word0 >> 16));
+        return value;
+    }
+    uint32_t get_max_outstanding_read_m1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 6) - 1) & (word0 >> 16));
+        return value;
+    }
+    CONSTEXPR axi_limit1_r &set_max_outstanding_read_m1(uint32_t value)
+    {
+        word0 = (((~((1U << 6) - 1)) << 16) & word0) | ((((1U << 6) - 1) & static_cast<uint32_t>(value)) << 16);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_max_outstanding_write_m1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 24));
+        return value;
+    }
+    uint32_t get_max_outstanding_write_m1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 24));
+        return value;
+    }
+    CONSTEXPR axi_limit1_r &set_max_outstanding_write_m1(uint32_t value)
+    {
+        word0 = (((~((1U << 5) - 1)) << 24) & word0) | ((((1U << 5) - 1) & static_cast<uint32_t>(value)) << 24);
+        return *this;
+    }
+#endif
+};
+
+// axi_limit2_r - AXI limits for port 1 counter 2
+struct axi_limit2_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t max_beats : 2; // Burst split alignment
+            uint32_t reserved0 : 2;
+            uint32_t memtype : 4; // Memtype to be used to encode AxCACHE signals
+            uint32_t reserved1 : 8;
+            uint32_t
+                max_outstanding_read_m1 : 6; // Maximum number of outstanding AXI read transactions - 1 in range 0 to 63
+            uint32_t reserved2 : 2;
+            uint32_t max_outstanding_write_m1 : 5; // Maximum number of outstanding AXI write transactions - 1 in range
+                                                   // 0 to 31
+            uint32_t reserved3 : 3;
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR axi_limit2_r() : word0(0) {}
+    CONSTEXPR axi_limit2_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    axi_limit2_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::max_beats get_max_beats() const
+    {
+        NPU_NAMESPACE::max_beats value = static_cast<NPU_NAMESPACE::max_beats>(((1U << 2) - 1) & (word0 >> 0));
+        return value;
+    }
+    NPU_NAMESPACE::max_beats get_max_beats() const volatile
+    {
+        NPU_NAMESPACE::max_beats value = static_cast<NPU_NAMESPACE::max_beats>(((1U << 2) - 1) & (word0 >> 0));
+        return value;
+    }
+    CONSTEXPR axi_limit2_r &set_max_beats(NPU_NAMESPACE::max_beats value)
+    {
+        word0 = (((~((1U << 2) - 1)) << 0) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 0);
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::axi_mem_encoding get_memtype() const
+    {
+        NPU_NAMESPACE::axi_mem_encoding value =
+            static_cast<NPU_NAMESPACE::axi_mem_encoding>(((1U << 4) - 1) & (word0 >> 4));
+        return value;
+    }
+    NPU_NAMESPACE::axi_mem_encoding get_memtype() const volatile
+    {
+        NPU_NAMESPACE::axi_mem_encoding value =
+            static_cast<NPU_NAMESPACE::axi_mem_encoding>(((1U << 4) - 1) & (word0 >> 4));
+        return value;
+    }
+    CONSTEXPR axi_limit2_r &set_memtype(NPU_NAMESPACE::axi_mem_encoding value)
+    {
+        word0 = (((~((1U << 4) - 1)) << 4) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 4);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_max_outstanding_read_m1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 6) - 1) & (word0 >> 16));
+        return value;
+    }
+    uint32_t get_max_outstanding_read_m1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 6) - 1) & (word0 >> 16));
+        return value;
+    }
+    CONSTEXPR axi_limit2_r &set_max_outstanding_read_m1(uint32_t value)
+    {
+        word0 = (((~((1U << 6) - 1)) << 16) & word0) | ((((1U << 6) - 1) & static_cast<uint32_t>(value)) << 16);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_max_outstanding_write_m1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 24));
+        return value;
+    }
+    uint32_t get_max_outstanding_write_m1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 24));
+        return value;
+    }
+    CONSTEXPR axi_limit2_r &set_max_outstanding_write_m1(uint32_t value)
+    {
+        word0 = (((~((1U << 5) - 1)) << 24) & word0) | ((((1U << 5) - 1) & static_cast<uint32_t>(value)) << 24);
+        return *this;
+    }
+#endif
+};
+
+// axi_limit3_r - AXI limits for port 1 counter 3
+struct axi_limit3_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t max_beats : 2; // Burst split alignment
+            uint32_t reserved0 : 2;
+            uint32_t memtype : 4; // Memtype to be used to encode AxCACHE signals
+            uint32_t reserved1 : 8;
+            uint32_t
+                max_outstanding_read_m1 : 6; // Maximum number of outstanding AXI read transactions - 1 in range 0 to 63
+            uint32_t reserved2 : 2;
+            uint32_t max_outstanding_write_m1 : 5; // Maximum number of outstanding AXI write transactions - 1 in range
+                                                   // 0 to 31
+            uint32_t reserved3 : 3;
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR axi_limit3_r() : word0(0) {}
+    CONSTEXPR axi_limit3_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    axi_limit3_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::max_beats get_max_beats() const
+    {
+        NPU_NAMESPACE::max_beats value = static_cast<NPU_NAMESPACE::max_beats>(((1U << 2) - 1) & (word0 >> 0));
+        return value;
+    }
+    NPU_NAMESPACE::max_beats get_max_beats() const volatile
+    {
+        NPU_NAMESPACE::max_beats value = static_cast<NPU_NAMESPACE::max_beats>(((1U << 2) - 1) & (word0 >> 0));
+        return value;
+    }
+    CONSTEXPR axi_limit3_r &set_max_beats(NPU_NAMESPACE::max_beats value)
+    {
+        word0 = (((~((1U << 2) - 1)) << 0) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 0);
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::axi_mem_encoding get_memtype() const
+    {
+        NPU_NAMESPACE::axi_mem_encoding value =
+            static_cast<NPU_NAMESPACE::axi_mem_encoding>(((1U << 4) - 1) & (word0 >> 4));
+        return value;
+    }
+    NPU_NAMESPACE::axi_mem_encoding get_memtype() const volatile
+    {
+        NPU_NAMESPACE::axi_mem_encoding value =
+            static_cast<NPU_NAMESPACE::axi_mem_encoding>(((1U << 4) - 1) & (word0 >> 4));
+        return value;
+    }
+    CONSTEXPR axi_limit3_r &set_memtype(NPU_NAMESPACE::axi_mem_encoding value)
+    {
+        word0 = (((~((1U << 4) - 1)) << 4) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 4);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_max_outstanding_read_m1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 6) - 1) & (word0 >> 16));
+        return value;
+    }
+    uint32_t get_max_outstanding_read_m1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 6) - 1) & (word0 >> 16));
+        return value;
+    }
+    CONSTEXPR axi_limit3_r &set_max_outstanding_read_m1(uint32_t value)
+    {
+        word0 = (((~((1U << 6) - 1)) << 16) & word0) | ((((1U << 6) - 1) & static_cast<uint32_t>(value)) << 16);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_max_outstanding_write_m1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 24));
+        return value;
+    }
+    uint32_t get_max_outstanding_write_m1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 24));
+        return value;
+    }
+    CONSTEXPR axi_limit3_r &set_max_outstanding_write_m1(uint32_t value)
+    {
+        word0 = (((~((1U << 5) - 1)) << 24) & word0) | ((((1U << 5) - 1) & static_cast<uint32_t>(value)) << 24);
+        return *this;
+    }
+#endif
+};
+
+// basep_r - The driver can use this address to relocate the command stream on region 0
+struct basep_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t offset_LO : 32; // Offset - LSB
+            uint32_t offset_HI : 8;  // Offset - MSB
+            uint32_t reserved0 : 24;
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR basep_r() : word0(0), word1(0) {}
+    CONSTEXPR basep_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    basep_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// wd_status_r - WD_STATUS
+struct wd_status_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t core_slice_state : 2; // WD core slice parser state
+            uint32_t core_idle : 1;        // Core idle
+            uint32_t ctrl_state : 2;       // WD control state
+            uint32_t ctrl_idle : 1;        // All stripe jobs idle (all weights consumed)
+            uint32_t write_buf_index0 : 3; // current write index for next data from core
+            uint32_t write_buf_valid0 : 1; // write buf valid (full)
+            uint32_t write_buf_idle0 : 1;  // write buf idle (empty)
+            uint32_t write_buf_index1 : 3; // current write index for next data from core
+            uint32_t write_buf_valid1 : 1; // write buf valid (full)
+            uint32_t write_buf_idle1 : 1;  // write buf idle (empty)
+            uint32_t events : 12;          // WD events mapped as appendix A
+            uint32_t reserved0 : 4;
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR wd_status_r() : word0(0) {}
+    CONSTEXPR wd_status_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    wd_status_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::wd_core_slice_state get_core_slice_state() const
+    {
+        NPU_NAMESPACE::wd_core_slice_state value =
+            static_cast<NPU_NAMESPACE::wd_core_slice_state>(((1U << 2) - 1) & (word0 >> 0));
+        return value;
+    }
+    NPU_NAMESPACE::wd_core_slice_state get_core_slice_state() const volatile
+    {
+        NPU_NAMESPACE::wd_core_slice_state value =
+            static_cast<NPU_NAMESPACE::wd_core_slice_state>(((1U << 2) - 1) & (word0 >> 0));
+        return value;
+    }
+    CONSTEXPR wd_status_r &set_core_slice_state(NPU_NAMESPACE::wd_core_slice_state value)
+    {
+        word0 = (((~((1U << 2) - 1)) << 0) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 0);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_core_idle() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    uint32_t get_core_idle() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    CONSTEXPR wd_status_r &set_core_idle(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::wd_ctrl_state get_ctrl_state() const
+    {
+        NPU_NAMESPACE::wd_ctrl_state value = static_cast<NPU_NAMESPACE::wd_ctrl_state>(((1U << 2) - 1) & (word0 >> 3));
+        return value;
+    }
+    NPU_NAMESPACE::wd_ctrl_state get_ctrl_state() const volatile
+    {
+        NPU_NAMESPACE::wd_ctrl_state value = static_cast<NPU_NAMESPACE::wd_ctrl_state>(((1U << 2) - 1) & (word0 >> 3));
+        return value;
+    }
+    CONSTEXPR wd_status_r &set_ctrl_state(NPU_NAMESPACE::wd_ctrl_state value)
+    {
+        word0 = (((~((1U << 2) - 1)) << 3) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 3);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_ctrl_idle() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5));
+        return value;
+    }
+    uint32_t get_ctrl_idle() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5));
+        return value;
+    }
+    CONSTEXPR wd_status_r &set_ctrl_idle(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 5) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 5);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_write_buf_index0() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 3) - 1) & (word0 >> 6));
+        return value;
+    }
+    uint32_t get_write_buf_index0() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 3) - 1) & (word0 >> 6));
+        return value;
+    }
+    CONSTEXPR wd_status_r &set_write_buf_index0(uint32_t value)
+    {
+        word0 = (((~((1U << 3) - 1)) << 6) & word0) | ((((1U << 3) - 1) & static_cast<uint32_t>(value)) << 6);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_write_buf_valid0() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 9));
+        return value;
+    }
+    uint32_t get_write_buf_valid0() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 9));
+        return value;
+    }
+    CONSTEXPR wd_status_r &set_write_buf_valid0(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 9) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 9);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_write_buf_idle0() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10));
+        return value;
+    }
+    uint32_t get_write_buf_idle0() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10));
+        return value;
+    }
+    CONSTEXPR wd_status_r &set_write_buf_idle0(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 10) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 10);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_write_buf_index1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 3) - 1) & (word0 >> 11));
+        return value;
+    }
+    uint32_t get_write_buf_index1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 3) - 1) & (word0 >> 11));
+        return value;
+    }
+    CONSTEXPR wd_status_r &set_write_buf_index1(uint32_t value)
+    {
+        word0 = (((~((1U << 3) - 1)) << 11) & word0) | ((((1U << 3) - 1) & static_cast<uint32_t>(value)) << 11);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_write_buf_valid1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 14));
+        return value;
+    }
+    uint32_t get_write_buf_valid1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 14));
+        return value;
+    }
+    CONSTEXPR wd_status_r &set_write_buf_valid1(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 14) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 14);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_write_buf_idle1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 15));
+        return value;
+    }
+    uint32_t get_write_buf_idle1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 15));
+        return value;
+    }
+    CONSTEXPR wd_status_r &set_write_buf_idle1(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 15) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 15);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_events() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 12) - 1) & (word0 >> 16));
+        return value;
+    }
+    uint32_t get_events() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 12) - 1) & (word0 >> 16));
+        return value;
+    }
+    CONSTEXPR wd_status_r &set_events(uint32_t value)
+    {
+        word0 = (((~((1U << 12) - 1)) << 16) & word0) | ((((1U << 12) - 1) & static_cast<uint32_t>(value)) << 16);
+        return *this;
+    }
+#endif
+};
+
+// mac_status_r - MAC_STATUS
+struct mac_status_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t block_cfg_valid : 1;     // MAC has a valid block configuration
+            uint32_t trav_en : 1;             // MAC is doing block traversal
+            uint32_t wait_for_ib : 1;         // MAC is waiting for an Input Buffer to become available
+            uint32_t wait_for_acc_buf : 1;    // MAC is waiting for an Accumulator Buffer to become available
+            uint32_t wait_for_weights : 1;    // MAC is waiting for a Weight Block to become available
+            uint32_t stall_stripe : 1;        // MAC is stalling between two stripes
+            uint32_t dw_sel : 1;              // Currently used weight interface in MAC AI
+            uint32_t wait_for_dw0_ready : 1;  // MAC AI is waiting for MAC DPU to send dw0_ready to WD
+            uint32_t wait_for_dw1_ready : 1;  // MAC AI is waiting for MAC DPU to send dw1_ready to WD
+            uint32_t acc_buf_sel_ai : 1;      // Currently used AccBuf interface in MAC AI
+            uint32_t wait_for_acc0_ready : 1; // MAC AI is waiting for acc0_ready from AO
+            uint32_t wait_for_acc1_ready : 1; // MAC AI is waiting for acc1_ready from AO
+            uint32_t acc_buf_sel_aa : 1;      // Currently used AccBuf interface in MAC ADDER_ARRAY
+            uint32_t acc0_valid : 1;          // MAC outgoing value of acc0_valid
+            uint32_t acc1_valid : 1;          // MAC outgoing value of acc1_valid
+            uint32_t reserved0 : 1;
+            uint32_t events : 11; // Mapped to MAC events described in Appendix A
+            uint32_t reserved1 : 5;
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR mac_status_r() : word0(0) {}
+    CONSTEXPR mac_status_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    mac_status_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_block_cfg_valid() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    uint32_t get_block_cfg_valid() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    CONSTEXPR mac_status_r &set_block_cfg_valid(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_trav_en() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    uint32_t get_trav_en() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    CONSTEXPR mac_status_r &set_trav_en(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_wait_for_ib() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    uint32_t get_wait_for_ib() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    CONSTEXPR mac_status_r &set_wait_for_ib(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_wait_for_acc_buf() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
+        return value;
+    }
+    uint32_t get_wait_for_acc_buf() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
+        return value;
+    }
+    CONSTEXPR mac_status_r &set_wait_for_acc_buf(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_wait_for_weights() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4));
+        return value;
+    }
+    uint32_t get_wait_for_weights() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4));
+        return value;
+    }
+    CONSTEXPR mac_status_r &set_wait_for_weights(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 4) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 4);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_stall_stripe() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5));
+        return value;
+    }
+    uint32_t get_stall_stripe() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5));
+        return value;
+    }
+    CONSTEXPR mac_status_r &set_stall_stripe(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 5) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 5);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_dw_sel() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6));
+        return value;
+    }
+    uint32_t get_dw_sel() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6));
+        return value;
+    }
+    CONSTEXPR mac_status_r &set_dw_sel(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 6) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 6);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_wait_for_dw0_ready() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7));
+        return value;
+    }
+    uint32_t get_wait_for_dw0_ready() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7));
+        return value;
+    }
+    CONSTEXPR mac_status_r &set_wait_for_dw0_ready(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 7) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 7);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_wait_for_dw1_ready() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 8));
+        return value;
+    }
+    uint32_t get_wait_for_dw1_ready() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 8));
+        return value;
+    }
+    CONSTEXPR mac_status_r &set_wait_for_dw1_ready(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 8) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 8);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_acc_buf_sel_ai() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 9));
+        return value;
+    }
+    uint32_t get_acc_buf_sel_ai() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 9));
+        return value;
+    }
+    CONSTEXPR mac_status_r &set_acc_buf_sel_ai(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 9) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 9);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_wait_for_acc0_ready() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10));
+        return value;
+    }
+    uint32_t get_wait_for_acc0_ready() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10));
+        return value;
+    }
+    CONSTEXPR mac_status_r &set_wait_for_acc0_ready(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 10) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 10);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_wait_for_acc1_ready() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 11));
+        return value;
+    }
+    uint32_t get_wait_for_acc1_ready() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 11));
+        return value;
+    }
+    CONSTEXPR mac_status_r &set_wait_for_acc1_ready(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 11) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 11);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_acc_buf_sel_aa() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 12));
+        return value;
+    }
+    uint32_t get_acc_buf_sel_aa() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 12));
+        return value;
+    }
+    CONSTEXPR mac_status_r &set_acc_buf_sel_aa(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 12) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 12);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_acc0_valid() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 13));
+        return value;
+    }
+    uint32_t get_acc0_valid() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 13));
+        return value;
+    }
+    CONSTEXPR mac_status_r &set_acc0_valid(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 13) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 13);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_acc1_valid() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 14));
+        return value;
+    }
+    uint32_t get_acc1_valid() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 14));
+        return value;
+    }
+    CONSTEXPR mac_status_r &set_acc1_valid(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 14) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 14);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_events() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 11) - 1) & (word0 >> 16));
+        return value;
+    }
+    uint32_t get_events() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 11) - 1) & (word0 >> 16));
+        return value;
+    }
+    CONSTEXPR mac_status_r &set_events(uint32_t value)
+    {
+        word0 = (((~((1U << 11) - 1)) << 16) & word0) | ((((1U << 11) - 1) & static_cast<uint32_t>(value)) << 16);
+        return *this;
+    }
+#endif
+};
+
+// ao_status_r - AO_STATUS
+struct ao_status_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t cmd_sbw_valid : 1; // Block command to shared buffer write module is valid
+            uint32_t cmd_act_valid : 1; // Block command to activation function module is valid
+            uint32_t cmd_ctl_valid : 1; // Block command to control module is valid
+            uint32_t cmd_scl_valid : 1; // Block command to scale module is valid
+            uint32_t cmd_sbr_valid : 1; // Block command to shared buffer read module is valid
+            uint32_t cmd_ofm_valid : 1; // Block command to ofm parameter module is valid
+            uint32_t blk_cmd_ready : 1; // Ready to accept block command
+            uint32_t blk_cmd_valid : 1; // Block command from CC is valid
+            uint32_t reserved0 : 8;
+            uint32_t events : 8; // Mapped to AO events described in Appendix A
+            uint32_t reserved1 : 8;
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ao_status_r() : word0(0) {}
+    CONSTEXPR ao_status_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ao_status_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_cmd_sbw_valid() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    uint32_t get_cmd_sbw_valid() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    CONSTEXPR ao_status_r &set_cmd_sbw_valid(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_cmd_act_valid() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    uint32_t get_cmd_act_valid() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    CONSTEXPR ao_status_r &set_cmd_act_valid(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_cmd_ctl_valid() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    uint32_t get_cmd_ctl_valid() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    CONSTEXPR ao_status_r &set_cmd_ctl_valid(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_cmd_scl_valid() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
+        return value;
+    }
+    uint32_t get_cmd_scl_valid() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
+        return value;
+    }
+    CONSTEXPR ao_status_r &set_cmd_scl_valid(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_cmd_sbr_valid() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4));
+        return value;
+    }
+    uint32_t get_cmd_sbr_valid() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4));
+        return value;
+    }
+    CONSTEXPR ao_status_r &set_cmd_sbr_valid(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 4) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 4);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_cmd_ofm_valid() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5));
+        return value;
+    }
+    uint32_t get_cmd_ofm_valid() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5));
+        return value;
+    }
+    CONSTEXPR ao_status_r &set_cmd_ofm_valid(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 5) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 5);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_blk_cmd_ready() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6));
+        return value;
+    }
+    uint32_t get_blk_cmd_ready() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6));
+        return value;
+    }
+    CONSTEXPR ao_status_r &set_blk_cmd_ready(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 6) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 6);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_blk_cmd_valid() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7));
+        return value;
+    }
+    uint32_t get_blk_cmd_valid() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7));
+        return value;
+    }
+    CONSTEXPR ao_status_r &set_blk_cmd_valid(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 7) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 7);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_events() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 8) - 1) & (word0 >> 16));
+        return value;
+    }
+    uint32_t get_events() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 8) - 1) & (word0 >> 16));
+        return value;
+    }
+    CONSTEXPR ao_status_r &set_events(uint32_t value)
+    {
+        word0 = (((~((1U << 8) - 1)) << 16) & word0) | ((((1U << 8) - 1) & static_cast<uint32_t>(value)) << 16);
+        return *this;
+    }
+#endif
+};
+
+// dma_status0_r - DMA_STATUS0
+struct dma_status0_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t cmd_idle : 1; // When this bit is high means that the CMD block is not busy in generating addresses
+                                   // for a CMD job
+            uint32_t ifm_idle : 1; // When this bit is high means that there are no ongoing IFM jobs
+            uint32_t wgt_idle_c0 : 1; // When this bit is high means that the WGT block is not busy in generating
+                                      // addresses for a WGT job
+            uint32_t bas_idle_c0 : 1; // When this bit is high means that the BAS block is not busy in generating
+                                      // addresses for a BAS job
+            uint32_t m2m_idle : 1;    // When this bit is high means that there are no ongoing M2M jobs
+            uint32_t ofm_idle : 1;    // When this bit is high means that there are no ongoing OFM jobs
+            uint32_t halt_req : 1;    // CPM has requested to HALT AXI bus before soft reset
+            uint32_t halt_ack : 1;    // DMA is in condition to halt the AXI bus since there are no pending transactions
+            uint32_t pause_req : 1;   // CC has requested to pause the AXI
+            uint32_t pause_ack : 1; // DMA is in condition to pause the AXI bus since there are no pending transactions
+            uint32_t ib0_ai_valid_c0 : 1;       // Data for AI to be read in IFM input buffer 0 - Core 0
+            uint32_t ib0_ai_ready_c0 : 1;       // Data consumed from AI in IFM input buffer 0 - Core 0
+            uint32_t ib1_ai_valid_c0 : 1;       // Data for AI to be read in IFM input buffer 1 - Core 0
+            uint32_t ib1_ai_ready_c0 : 1;       // Data consumed from AI in IFM input buffer 1 - Core 0
+            uint32_t ib0_ao_valid_c0 : 1;       // Data for AO to be read in IFM input buffer 0 - Core 0
+            uint32_t ib0_ao_ready_c0 : 1;       // Data consumed from AO in IFM input buffer 0 - Core 0
+            uint32_t ib1_ao_valid_c0 : 1;       // Data for AO to be read in IFM input buffer 0 - Core 0
+            uint32_t ib1_ao_ready_c0 : 1;       // Data consumed from AO in IFM input buffer 1 - Core 0
+            uint32_t ob0_valid_c0 : 1;          // Data for DMA ready to be consumed in OFM output buffer 0 -  Core 0
+            uint32_t ob0_ready_c0 : 1;          // Data consumed from DMA in OFM output buffer 0 - Core 0
+            uint32_t ob1_valid_c0 : 1;          // Data for DMA ready to be consumed in OFM output buffer 1 -  Core 0
+            uint32_t ob1_ready_c0 : 1;          // Data consumed from DMA in OFM output buffer 1 - Core 0
+            uint32_t cmd_valid : 1;             // New command word for CC to be consumed
+            uint32_t cmd_ready : 1;             // command word consumed by CC
+            uint32_t wd_bitstream_valid_c0 : 1; // New weight word for WD to be consumed - Core 0
+            uint32_t wd_bitstream_ready_c0 : 1; // Weight word consumed by WD - Core 0
+            uint32_t bs_bitstream_valid_c0 : 1; // New BaS word for AO to be consumed - Core 0
+            uint32_t bs_bitstream_ready_c0 : 1; // BaS word consumed by AO - Core 0
+            uint32_t axi0_ar_stalled : 1; // Read transfer request stalled on arready low AXI0 (due to memory system)
+            uint32_t axi0_rd_limit_stall : 1; // Read stalled due to one AXI0 limit counter being reached
+            uint32_t axi0_aw_stalled : 1; // Write transfer request stalled on awready low AXI0 (due to memory system)
+            uint32_t axi0_w_stalled : 1;  // Write transfer stalled on awready low AXI0 (due to memory system)
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR dma_status0_r() : word0(0) {}
+    CONSTEXPR dma_status0_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    dma_status0_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_cmd_idle() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    uint32_t get_cmd_idle() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_cmd_idle(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_ifm_idle() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    uint32_t get_ifm_idle() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_ifm_idle(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_wgt_idle_c0() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    uint32_t get_wgt_idle_c0() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_wgt_idle_c0(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_bas_idle_c0() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
+        return value;
+    }
+    uint32_t get_bas_idle_c0() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_bas_idle_c0(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_m2m_idle() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4));
+        return value;
+    }
+    uint32_t get_m2m_idle() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_m2m_idle(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 4) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 4);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_ofm_idle() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5));
+        return value;
+    }
+    uint32_t get_ofm_idle() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_ofm_idle(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 5) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 5);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_halt_req() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6));
+        return value;
+    }
+    uint32_t get_halt_req() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_halt_req(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 6) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 6);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_halt_ack() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7));
+        return value;
+    }
+    uint32_t get_halt_ack() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_halt_ack(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 7) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 7);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_pause_req() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 8));
+        return value;
+    }
+    uint32_t get_pause_req() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 8));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_pause_req(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 8) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 8);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_pause_ack() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 9));
+        return value;
+    }
+    uint32_t get_pause_ack() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 9));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_pause_ack(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 9) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 9);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_ib0_ai_valid_c0() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10));
+        return value;
+    }
+    uint32_t get_ib0_ai_valid_c0() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_ib0_ai_valid_c0(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 10) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 10);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_ib0_ai_ready_c0() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 11));
+        return value;
+    }
+    uint32_t get_ib0_ai_ready_c0() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 11));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_ib0_ai_ready_c0(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 11) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 11);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_ib1_ai_valid_c0() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 12));
+        return value;
+    }
+    uint32_t get_ib1_ai_valid_c0() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 12));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_ib1_ai_valid_c0(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 12) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 12);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_ib1_ai_ready_c0() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 13));
+        return value;
+    }
+    uint32_t get_ib1_ai_ready_c0() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 13));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_ib1_ai_ready_c0(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 13) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 13);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_ib0_ao_valid_c0() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 14));
+        return value;
+    }
+    uint32_t get_ib0_ao_valid_c0() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 14));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_ib0_ao_valid_c0(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 14) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 14);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_ib0_ao_ready_c0() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 15));
+        return value;
+    }
+    uint32_t get_ib0_ao_ready_c0() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 15));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_ib0_ao_ready_c0(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 15) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 15);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_ib1_ao_valid_c0() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 16));
+        return value;
+    }
+    uint32_t get_ib1_ao_valid_c0() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 16));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_ib1_ao_valid_c0(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 16) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 16);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_ib1_ao_ready_c0() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 17));
+        return value;
+    }
+    uint32_t get_ib1_ao_ready_c0() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 17));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_ib1_ao_ready_c0(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 17) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 17);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_ob0_valid_c0() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 18));
+        return value;
+    }
+    uint32_t get_ob0_valid_c0() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 18));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_ob0_valid_c0(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 18) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 18);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_ob0_ready_c0() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 19));
+        return value;
+    }
+    uint32_t get_ob0_ready_c0() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 19));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_ob0_ready_c0(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 19) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 19);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_ob1_valid_c0() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 20));
+        return value;
+    }
+    uint32_t get_ob1_valid_c0() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 20));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_ob1_valid_c0(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 20) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 20);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_ob1_ready_c0() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 21));
+        return value;
+    }
+    uint32_t get_ob1_ready_c0() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 21));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_ob1_ready_c0(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 21) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 21);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_cmd_valid() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 22));
+        return value;
+    }
+    uint32_t get_cmd_valid() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 22));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_cmd_valid(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 22) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 22);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_cmd_ready() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 23));
+        return value;
+    }
+    uint32_t get_cmd_ready() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 23));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_cmd_ready(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 23) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 23);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_wd_bitstream_valid_c0() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 24));
+        return value;
+    }
+    uint32_t get_wd_bitstream_valid_c0() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 24));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_wd_bitstream_valid_c0(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 24) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 24);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_wd_bitstream_ready_c0() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 25));
+        return value;
+    }
+    uint32_t get_wd_bitstream_ready_c0() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 25));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_wd_bitstream_ready_c0(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 25) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 25);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_bs_bitstream_valid_c0() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 26));
+        return value;
+    }
+    uint32_t get_bs_bitstream_valid_c0() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 26));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_bs_bitstream_valid_c0(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 26) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 26);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_bs_bitstream_ready_c0() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 27));
+        return value;
+    }
+    uint32_t get_bs_bitstream_ready_c0() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 27));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_bs_bitstream_ready_c0(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 27) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 27);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_axi0_ar_stalled() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 28));
+        return value;
+    }
+    uint32_t get_axi0_ar_stalled() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 28));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_axi0_ar_stalled(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 28) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 28);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_axi0_rd_limit_stall() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 29));
+        return value;
+    }
+    uint32_t get_axi0_rd_limit_stall() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 29));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_axi0_rd_limit_stall(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 29) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 29);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_axi0_aw_stalled() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 30));
+        return value;
+    }
+    uint32_t get_axi0_aw_stalled() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 30));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_axi0_aw_stalled(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 30) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 30);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_axi0_w_stalled() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31));
+        return value;
+    }
+    uint32_t get_axi0_w_stalled() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31));
+        return value;
+    }
+    CONSTEXPR dma_status0_r &set_axi0_w_stalled(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 31) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 31);
+        return *this;
+    }
+#endif
+};
+
+// dma_status1_r - DMA_STATUS1
+struct dma_status1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t axi0_wr_limit_stall : 1; // Write stalled due to one AXI0 limit counter being reached
+            uint32_t axi1_ar_stalled : 1; // Read transfer request stalled on arready low AXI1 (due to memory system)
+            uint32_t axi1_rd_limit_stall : 1; // Read stalled due to one AXI1 limit counter being reached
+            uint32_t axi1_wr_stalled : 1; // Write transfer request stalled on awready low AXI1 (due to memory system)
+            uint32_t axi1_w_stalled : 1;  // Write transfer stalled on wready low AXI1 (due to memory system)
+            uint32_t axi1_wr_limit_stall : 1; // Write stalled due to one AXI1 limit counter being reached
+            uint32_t wgt_idle_c1 : 1;     // When this bit is high means that the WGT block is not busy in generating
+                                          // addresses for a WGT job
+            uint32_t bas_idle_c1 : 1;     // When this bit is high means that the BAS block is not busy in generating
+                                          // addresses for a BAS job
+            uint32_t ib0_ai_valid_c1 : 1; // Data for AI to be read in IFM input buffer 0 - Core 1
+            uint32_t ib0_ai_ready_c1 : 1; // Data consumed from AI in IFM input buffer 0 - Core 1
+            uint32_t ib1_ai_valid_c1 : 1; // Data for AI to be read in IFM input buffer 1 - Core 1
+            uint32_t ib1_ai_ready_c1 : 1; // Data consumed from AI in IFM input buffer 1 - Core 1
+            uint32_t ib0_ao_valid_c1 : 1; // Data for AO to be read in IFM input buffer 0 - Core 1
+            uint32_t ib0_ao_ready_c1 : 1; // Data consumed from AO in IFM input buffer 0 - Core 1
+            uint32_t ib1_ao_valid_c1 : 1; // Data for AO to be read in IFM input buffer 0 - Core 1
+            uint32_t ib1_ao_ready_c1 : 1; // Data consumed from AO in IFM input buffer 1 - Core 1
+            uint32_t ob0_valid_c1 : 1;    // Data for DMA ready to be consumed in OFM output buffer 0 - Core 1
+            uint32_t ob0_ready_c1 : 1;    // Data consumed from DMA in OFM output buffer 0 - Core 1
+            uint32_t ob1_valid_c1 : 1;    // Data for DMA ready to be consumed in OFM output buffer 1 - Core 1
+            uint32_t ob1_ready_c1 : 1;    // Data consumed from DMA in OFM output buffer 1 - Core 1
+            uint32_t wd_bitstream_valid_c1 : 1; // New weight word for WD to be consumed - Core 1
+            uint32_t wd_bitstream_ready_c1 : 1; // Weight word consumed by WD - Core 1
+            uint32_t bs_bitstream_valid_c1 : 1; // New BaS word for AO to be consumed - Core 1
+            uint32_t bs_bitstream_ready_c1 : 1; // BaS word consumed by AO - Core 1
+            uint32_t reserved0 : 8;
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR dma_status1_r() : word0(0) {}
+    CONSTEXPR dma_status1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    dma_status1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_axi0_wr_limit_stall() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    uint32_t get_axi0_wr_limit_stall() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    CONSTEXPR dma_status1_r &set_axi0_wr_limit_stall(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_axi1_ar_stalled() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    uint32_t get_axi1_ar_stalled() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    CONSTEXPR dma_status1_r &set_axi1_ar_stalled(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_axi1_rd_limit_stall() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    uint32_t get_axi1_rd_limit_stall() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    CONSTEXPR dma_status1_r &set_axi1_rd_limit_stall(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_axi1_wr_stalled() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
+        return value;
+    }
+    uint32_t get_axi1_wr_stalled() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
+        return value;
+    }
+    CONSTEXPR dma_status1_r &set_axi1_wr_stalled(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_axi1_w_stalled() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4));
+        return value;
+    }
+    uint32_t get_axi1_w_stalled() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4));
+        return value;
+    }
+    CONSTEXPR dma_status1_r &set_axi1_w_stalled(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 4) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 4);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_axi1_wr_limit_stall() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5));
+        return value;
+    }
+    uint32_t get_axi1_wr_limit_stall() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5));
+        return value;
+    }
+    CONSTEXPR dma_status1_r &set_axi1_wr_limit_stall(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 5) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 5);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_wgt_idle_c1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6));
+        return value;
+    }
+    uint32_t get_wgt_idle_c1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6));
+        return value;
+    }
+    CONSTEXPR dma_status1_r &set_wgt_idle_c1(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 6) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 6);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_bas_idle_c1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7));
+        return value;
+    }
+    uint32_t get_bas_idle_c1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7));
+        return value;
+    }
+    CONSTEXPR dma_status1_r &set_bas_idle_c1(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 7) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 7);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_ib0_ai_valid_c1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 8));
+        return value;
+    }
+    uint32_t get_ib0_ai_valid_c1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 8));
+        return value;
+    }
+    CONSTEXPR dma_status1_r &set_ib0_ai_valid_c1(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 8) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 8);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_ib0_ai_ready_c1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 9));
+        return value;
+    }
+    uint32_t get_ib0_ai_ready_c1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 9));
+        return value;
+    }
+    CONSTEXPR dma_status1_r &set_ib0_ai_ready_c1(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 9) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 9);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_ib1_ai_valid_c1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10));
+        return value;
+    }
+    uint32_t get_ib1_ai_valid_c1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10));
+        return value;
+    }
+    CONSTEXPR dma_status1_r &set_ib1_ai_valid_c1(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 10) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 10);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_ib1_ai_ready_c1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 11));
+        return value;
+    }
+    uint32_t get_ib1_ai_ready_c1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 11));
+        return value;
+    }
+    CONSTEXPR dma_status1_r &set_ib1_ai_ready_c1(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 11) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 11);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_ib0_ao_valid_c1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 12));
+        return value;
+    }
+    uint32_t get_ib0_ao_valid_c1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 12));
+        return value;
+    }
+    CONSTEXPR dma_status1_r &set_ib0_ao_valid_c1(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 12) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 12);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_ib0_ao_ready_c1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 13));
+        return value;
+    }
+    uint32_t get_ib0_ao_ready_c1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 13));
+        return value;
+    }
+    CONSTEXPR dma_status1_r &set_ib0_ao_ready_c1(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 13) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 13);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_ib1_ao_valid_c1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 14));
+        return value;
+    }
+    uint32_t get_ib1_ao_valid_c1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 14));
+        return value;
+    }
+    CONSTEXPR dma_status1_r &set_ib1_ao_valid_c1(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 14) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 14);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_ib1_ao_ready_c1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 15));
+        return value;
+    }
+    uint32_t get_ib1_ao_ready_c1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 15));
+        return value;
+    }
+    CONSTEXPR dma_status1_r &set_ib1_ao_ready_c1(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 15) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 15);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_ob0_valid_c1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 16));
+        return value;
+    }
+    uint32_t get_ob0_valid_c1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 16));
+        return value;
+    }
+    CONSTEXPR dma_status1_r &set_ob0_valid_c1(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 16) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 16);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_ob0_ready_c1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 17));
+        return value;
+    }
+    uint32_t get_ob0_ready_c1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 17));
+        return value;
+    }
+    CONSTEXPR dma_status1_r &set_ob0_ready_c1(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 17) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 17);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_ob1_valid_c1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 18));
+        return value;
+    }
+    uint32_t get_ob1_valid_c1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 18));
+        return value;
+    }
+    CONSTEXPR dma_status1_r &set_ob1_valid_c1(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 18) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 18);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_ob1_ready_c1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 19));
+        return value;
+    }
+    uint32_t get_ob1_ready_c1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 19));
+        return value;
+    }
+    CONSTEXPR dma_status1_r &set_ob1_ready_c1(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 19) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 19);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_wd_bitstream_valid_c1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 20));
+        return value;
+    }
+    uint32_t get_wd_bitstream_valid_c1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 20));
+        return value;
+    }
+    CONSTEXPR dma_status1_r &set_wd_bitstream_valid_c1(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 20) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 20);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_wd_bitstream_ready_c1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 21));
+        return value;
+    }
+    uint32_t get_wd_bitstream_ready_c1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 21));
+        return value;
+    }
+    CONSTEXPR dma_status1_r &set_wd_bitstream_ready_c1(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 21) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 21);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_bs_bitstream_valid_c1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 22));
+        return value;
+    }
+    uint32_t get_bs_bitstream_valid_c1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 22));
+        return value;
+    }
+    CONSTEXPR dma_status1_r &set_bs_bitstream_valid_c1(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 22) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 22);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_bs_bitstream_ready_c1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 23));
+        return value;
+    }
+    uint32_t get_bs_bitstream_ready_c1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 23));
+        return value;
+    }
+    CONSTEXPR dma_status1_r &set_bs_bitstream_ready_c1(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 23) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 23);
+        return *this;
+    }
+#endif
+};
+
+// clkforce_r - Force clocks on for clock gating
+struct clkforce_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t top_level_clk : 1; // set to 1 to force on TOP level clock
+            uint32_t cc_clk : 1;        // set to 1 to force on CC clock
+            uint32_t dma_clk : 1;       // set to 1 to force on DMA clock
+            uint32_t mac_clk : 1;       // set to 1 to force on MAC clock
+            uint32_t ao_clk : 1;        // set to 1 to force on AO clock
+            uint32_t wd_clk : 1;        // set to 1 to force on WD clock
+            uint32_t reserved0 : 26;
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR clkforce_r() : word0(0) {}
+    CONSTEXPR clkforce_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    clkforce_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_top_level_clk() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    uint32_t get_top_level_clk() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    CONSTEXPR clkforce_r &set_top_level_clk(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_cc_clk() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    uint32_t get_cc_clk() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    CONSTEXPR clkforce_r &set_cc_clk(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_dma_clk() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    uint32_t get_dma_clk() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    CONSTEXPR clkforce_r &set_dma_clk(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_mac_clk() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
+        return value;
+    }
+    uint32_t get_mac_clk() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
+        return value;
+    }
+    CONSTEXPR clkforce_r &set_mac_clk(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_ao_clk() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4));
+        return value;
+    }
+    uint32_t get_ao_clk() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4));
+        return value;
+    }
+    CONSTEXPR clkforce_r &set_ao_clk(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 4) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 4);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_wd_clk() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5));
+        return value;
+    }
+    uint32_t get_wd_clk() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5));
+        return value;
+    }
+    CONSTEXPR clkforce_r &set_wd_clk(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 5) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 5);
+        return *this;
+    }
+#endif
+};
+
+// debug_address_r - Set debug address for register reads 0x400-0x7FF. The address must be 1KB aligned
+struct debug_address_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t addr : 32; // Register address
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR debug_address_r() : word0(0) {}
+    CONSTEXPR debug_address_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    debug_address_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_addr() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_addr() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR debug_address_r &set_addr(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// debug_misc_r - 32-bit read/write register for driver debug use. This does not affect NPU function
+struct debug_misc_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t misc : 32; // Debug misc
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR debug_misc_r() : word0(0) {}
+    CONSTEXPR debug_misc_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    debug_misc_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_misc() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_misc() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR debug_misc_r &set_misc(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// debugcore_r - Select core number for debug registers (0x200-0x2FF) and RAM reads (0x400-0x7FF). Value is 0 or 1
+struct debugcore_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t core : 32; // Debug core
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR debugcore_r() : word0(0) {}
+    CONSTEXPR debugcore_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    debugcore_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_core() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_core() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR debugcore_r &set_core(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// debug_block_r - Set from which of four block banks the TSU registers are read. 0 = read from the current bank 256+n =
+// force to read from bank n where n is in the range 0 to 3
+struct debug_block_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t block : 32; // Debug block
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR debug_block_r() : word0(0) {}
+    CONSTEXPR debug_block_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    debug_block_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_block() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_block() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR debug_block_r &set_block(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// pmcr_r - PMU Register control
+struct pmcr_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t cnt_en : 1;        // Enable counter
+            uint32_t event_cnt_rst : 1; // Reset event counter
+            uint32_t cycle_cnt_rst : 1; // Reset cycle counter
+            uint32_t mask_en : 1;       // PMU can be enabled/disabled by command stream operation NPU_OP_PMU_MASK
+            uint32_t reserved0 : 7;
+            uint32_t num_event_cnt : 5; // Number of event counters
+            uint32_t reserved1 : 16;
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pmcr_r() : word0(8192) {}
+    CONSTEXPR pmcr_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pmcr_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_cnt_en() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    uint32_t get_cnt_en() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    CONSTEXPR pmcr_r &set_cnt_en(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_event_cnt_rst() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    uint32_t get_event_cnt_rst() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    CONSTEXPR pmcr_r &set_event_cnt_rst(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_cycle_cnt_rst() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    uint32_t get_cycle_cnt_rst() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    CONSTEXPR pmcr_r &set_cycle_cnt_rst(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_mask_en() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
+        return value;
+    }
+    uint32_t get_mask_en() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
+        return value;
+    }
+    CONSTEXPR pmcr_r &set_mask_en(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_num_event_cnt() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 11));
+        return value;
+    }
+    uint32_t get_num_event_cnt() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 11));
+        return value;
+    }
+    CONSTEXPR pmcr_r &set_num_event_cnt(uint32_t value)
+    {
+        word0 = (((~((1U << 5) - 1)) << 11) & word0) | ((((1U << 5) - 1) & static_cast<uint32_t>(value)) << 11);
+        return *this;
+    }
+#endif
+};
+
+// pmcntenset_r - Count enable set register
+struct pmcntenset_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t EVENT_CNT_0 : 1; // Event counter enable bit for PMEVCNTR0
+            uint32_t EVENT_CNT_1 : 1; // Event counter enable bit for PMEVCNTR1
+            uint32_t EVENT_CNT_2 : 1; // Event counter enable bit for PMEVCNTR2
+            uint32_t EVENT_CNT_3 : 1; // Event counter enable bit for PMEVCNTR3
+            uint32_t reserved0 : 27;
+            uint32_t CYCLE_CNT : 1; // PMCCNTR enable bit
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pmcntenset_r() : word0(0) {}
+    CONSTEXPR pmcntenset_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pmcntenset_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_EVENT_CNT_0() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    uint32_t get_EVENT_CNT_0() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    CONSTEXPR pmcntenset_r &set_EVENT_CNT_0(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_EVENT_CNT_1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    uint32_t get_EVENT_CNT_1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    CONSTEXPR pmcntenset_r &set_EVENT_CNT_1(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_EVENT_CNT_2() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    uint32_t get_EVENT_CNT_2() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    CONSTEXPR pmcntenset_r &set_EVENT_CNT_2(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_EVENT_CNT_3() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
+        return value;
+    }
+    uint32_t get_EVENT_CNT_3() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
+        return value;
+    }
+    CONSTEXPR pmcntenset_r &set_EVENT_CNT_3(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_CYCLE_CNT() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31));
+        return value;
+    }
+    uint32_t get_CYCLE_CNT() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31));
+        return value;
+    }
+    CONSTEXPR pmcntenset_r &set_CYCLE_CNT(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 31) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 31);
+        return *this;
+    }
+#endif
+};
+
+// pmcntenclr_r - Count enable clear register
+struct pmcntenclr_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t EVENT_CNT_0 : 1; // Event counter disable bit for PMEVCNTR0
+            uint32_t EVENT_CNT_1 : 1; // Event counter disable bit for PMEVCNTR1
+            uint32_t EVENT_CNT_2 : 1; // Event counter disable bit for PMEVCNTR2
+            uint32_t EVENT_CNT_3 : 1; // Event counter disable bit for PMEVCNTR3
+            uint32_t reserved0 : 27;
+            uint32_t CYCLE_CNT : 1; // PMCCNTR disable bit
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pmcntenclr_r() : word0(0) {}
+    CONSTEXPR pmcntenclr_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pmcntenclr_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_EVENT_CNT_0() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    uint32_t get_EVENT_CNT_0() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    CONSTEXPR pmcntenclr_r &set_EVENT_CNT_0(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_EVENT_CNT_1() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    uint32_t get_EVENT_CNT_1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    CONSTEXPR pmcntenclr_r &set_EVENT_CNT_1(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_EVENT_CNT_2() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    uint32_t get_EVENT_CNT_2() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    CONSTEXPR pmcntenclr_r &set_EVENT_CNT_2(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_EVENT_CNT_3() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
+        return value;
+    }
+    uint32_t get_EVENT_CNT_3() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
+        return value;
+    }
+    CONSTEXPR pmcntenclr_r &set_EVENT_CNT_3(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_CYCLE_CNT() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31));
+        return value;
+    }
+    uint32_t get_CYCLE_CNT() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31));
+        return value;
+    }
+    CONSTEXPR pmcntenclr_r &set_CYCLE_CNT(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 31) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 31);
+        return *this;
+    }
+#endif
+};
+
+// pmovsset_r - Overflow flag status set register
+struct pmovsset_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t EVENT_CNT_0_OVF : 1; // Event counter overflow set bit for PMEVCNTR0
+            uint32_t EVENT_CNT_1_OVF : 1; // Event counter overflow set bit for PMEVCNTR1
+            uint32_t EVENT_CNT_2_OVF : 1; // Event counter overflow set bit for PMEVCNTR2
+            uint32_t EVENT_CNT_3_OVF : 1; // Event counter overflow set bit for PMEVCNTR3
+            uint32_t reserved0 : 27;
+            uint32_t CYCLE_CNT_OVF : 1; // PMCCNTR overflow set bit
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pmovsset_r() : word0(0) {}
+    CONSTEXPR pmovsset_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pmovsset_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_EVENT_CNT_0_OVF() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    uint32_t get_EVENT_CNT_0_OVF() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    CONSTEXPR pmovsset_r &set_EVENT_CNT_0_OVF(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_EVENT_CNT_1_OVF() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    uint32_t get_EVENT_CNT_1_OVF() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    CONSTEXPR pmovsset_r &set_EVENT_CNT_1_OVF(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_EVENT_CNT_2_OVF() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    uint32_t get_EVENT_CNT_2_OVF() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    CONSTEXPR pmovsset_r &set_EVENT_CNT_2_OVF(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_EVENT_CNT_3_OVF() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
+        return value;
+    }
+    uint32_t get_EVENT_CNT_3_OVF() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
+        return value;
+    }
+    CONSTEXPR pmovsset_r &set_EVENT_CNT_3_OVF(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_CYCLE_CNT_OVF() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31));
+        return value;
+    }
+    uint32_t get_CYCLE_CNT_OVF() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31));
+        return value;
+    }
+    CONSTEXPR pmovsset_r &set_CYCLE_CNT_OVF(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 31) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 31);
+        return *this;
+    }
+#endif
+};
+
+// pmovsclr_r - Overflow flag status clear register
+struct pmovsclr_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t EVENT_CNT_0_OVF : 1; // Event counter overflow clear bit for PMEVCNTR0
+            uint32_t EVENT_CNT_1_OVF : 1; // Event counter overflow clear bit for PMEVCNTR1
+            uint32_t EVENT_CNT_2_OVF : 1; // Event counter overflow clear bit for PMEVCNTR2
+            uint32_t EVENT_CNT_3_OVF : 1; // Event counter overflow clear bit for PMEVCNTR3
+            uint32_t reserved0 : 27;
+            uint32_t CYCLE_CNT_OVF : 1; // PMCCNTR overflow clear bit
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pmovsclr_r() : word0(0) {}
+    CONSTEXPR pmovsclr_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pmovsclr_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_EVENT_CNT_0_OVF() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    uint32_t get_EVENT_CNT_0_OVF() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    CONSTEXPR pmovsclr_r &set_EVENT_CNT_0_OVF(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_EVENT_CNT_1_OVF() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    uint32_t get_EVENT_CNT_1_OVF() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    CONSTEXPR pmovsclr_r &set_EVENT_CNT_1_OVF(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_EVENT_CNT_2_OVF() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    uint32_t get_EVENT_CNT_2_OVF() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    CONSTEXPR pmovsclr_r &set_EVENT_CNT_2_OVF(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_EVENT_CNT_3_OVF() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
+        return value;
+    }
+    uint32_t get_EVENT_CNT_3_OVF() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
+        return value;
+    }
+    CONSTEXPR pmovsclr_r &set_EVENT_CNT_3_OVF(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_CYCLE_CNT_OVF() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31));
+        return value;
+    }
+    uint32_t get_CYCLE_CNT_OVF() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31));
+        return value;
+    }
+    CONSTEXPR pmovsclr_r &set_CYCLE_CNT_OVF(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 31) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 31);
+        return *this;
+    }
+#endif
+};
+
+// pmintset_r - Interrupt enable set register
+struct pmintset_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t EVENT_CNT_0_INT : 1; // Event counter overflow interrupt request enable bit for PMEVCNTR0
+            uint32_t EVENT_CNT_1_INT : 1; // Event counter overflow interrupt request enable bit for PMEVCNTR1
+            uint32_t EVENT_CNT_2_INT : 1; // Event counter overflow interrupt request enable bit for PMEVCNTR2
+            uint32_t EVENT_CNT_3_INT : 1; // Event counter overflow interrupt request enable bit for PMEVCNTR3
+            uint32_t reserved0 : 27;
+            uint32_t CYCLE_CNT_INT : 1; // PMCCNTR overflow interrupt request enable bit
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pmintset_r() : word0(0) {}
+    CONSTEXPR pmintset_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pmintset_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_EVENT_CNT_0_INT() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    uint32_t get_EVENT_CNT_0_INT() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    CONSTEXPR pmintset_r &set_EVENT_CNT_0_INT(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_EVENT_CNT_1_INT() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    uint32_t get_EVENT_CNT_1_INT() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    CONSTEXPR pmintset_r &set_EVENT_CNT_1_INT(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_EVENT_CNT_2_INT() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    uint32_t get_EVENT_CNT_2_INT() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    CONSTEXPR pmintset_r &set_EVENT_CNT_2_INT(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_EVENT_CNT_3_INT() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
+        return value;
+    }
+    uint32_t get_EVENT_CNT_3_INT() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
+        return value;
+    }
+    CONSTEXPR pmintset_r &set_EVENT_CNT_3_INT(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_CYCLE_CNT_INT() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31));
+        return value;
+    }
+    uint32_t get_CYCLE_CNT_INT() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31));
+        return value;
+    }
+    CONSTEXPR pmintset_r &set_CYCLE_CNT_INT(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 31) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 31);
+        return *this;
+    }
+#endif
+};
+
+// pmintclr_r - Interrupt enable clear register
+struct pmintclr_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t EVENT_CNT_0_INT : 1; // Event counter overflow interrupt request disable bit for PMEVCNTR0
+            uint32_t EVENT_CNT_1_INT : 1; // Event counter overflow interrupt request disable bit for PMEVCNTR1
+            uint32_t EVENT_CNT_2_INT : 1; // Event counter overflow interrupt request disable bit for PMEVCNTR2
+            uint32_t EVENT_CNT_3_INT : 1; // Event counter overflow interrupt request disable bit for PMEVCNTR3
+            uint32_t reserved0 : 27;
+            uint32_t CYCLE_CNT_INT : 1; // PMCCNTR overflow interrupt request disable bit
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pmintclr_r() : word0(0) {}
+    CONSTEXPR pmintclr_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pmintclr_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_EVENT_CNT_0_INT() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    uint32_t get_EVENT_CNT_0_INT() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0));
+        return value;
+    }
+    CONSTEXPR pmintclr_r &set_EVENT_CNT_0_INT(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_EVENT_CNT_1_INT() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    uint32_t get_EVENT_CNT_1_INT() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1));
+        return value;
+    }
+    CONSTEXPR pmintclr_r &set_EVENT_CNT_1_INT(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_EVENT_CNT_2_INT() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    uint32_t get_EVENT_CNT_2_INT() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2));
+        return value;
+    }
+    CONSTEXPR pmintclr_r &set_EVENT_CNT_2_INT(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_EVENT_CNT_3_INT() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
+        return value;
+    }
+    uint32_t get_EVENT_CNT_3_INT() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3));
+        return value;
+    }
+    CONSTEXPR pmintclr_r &set_EVENT_CNT_3_INT(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_CYCLE_CNT_INT() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31));
+        return value;
+    }
+    uint32_t get_CYCLE_CNT_INT() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31));
+        return value;
+    }
+    CONSTEXPR pmintclr_r &set_CYCLE_CNT_INT(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 31) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 31);
+        return *this;
+    }
+#endif
+};
+
+// pmccntr_r - Performance monitor cycle count register
+struct pmccntr_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t CYCLE_CNT_LO : 32; // Cycle count - LSB
+            uint32_t CYCLE_CNT_HI : 16; // Cycle count - MSB
+            uint32_t reserved0 : 16;
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR pmccntr_r() : word0(0), word1(0) {}
+    CONSTEXPR pmccntr_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    pmccntr_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// pmccntr_cfg_r - Set start/stop event on the cycle counter
+struct pmccntr_cfg_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t CYCLE_CNT_CFG_START : 10; // Cycle counter start event
+            uint32_t reserved0 : 6;
+            uint32_t CYCLE_CNT_CFG_STOP : 10; // Cycle counter stop event
+            uint32_t reserved1 : 6;
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pmccntr_cfg_r() : word0(0) {}
+    CONSTEXPR pmccntr_cfg_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pmccntr_cfg_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::pmu_event get_CYCLE_CNT_CFG_START() const
+    {
+        NPU_NAMESPACE::pmu_event value = static_cast<NPU_NAMESPACE::pmu_event>(((1U << 10) - 1) & (word0 >> 0));
+        return value;
+    }
+    NPU_NAMESPACE::pmu_event get_CYCLE_CNT_CFG_START() const volatile
+    {
+        NPU_NAMESPACE::pmu_event value = static_cast<NPU_NAMESPACE::pmu_event>(((1U << 10) - 1) & (word0 >> 0));
+        return value;
+    }
+    CONSTEXPR pmccntr_cfg_r &set_CYCLE_CNT_CFG_START(NPU_NAMESPACE::pmu_event value)
+    {
+        word0 = (((~((1U << 10) - 1)) << 0) & word0) | ((((1U << 10) - 1) & static_cast<uint32_t>(value)) << 0);
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::pmu_event get_CYCLE_CNT_CFG_STOP() const
+    {
+        NPU_NAMESPACE::pmu_event value = static_cast<NPU_NAMESPACE::pmu_event>(((1U << 10) - 1) & (word0 >> 16));
+        return value;
+    }
+    NPU_NAMESPACE::pmu_event get_CYCLE_CNT_CFG_STOP() const volatile
+    {
+        NPU_NAMESPACE::pmu_event value = static_cast<NPU_NAMESPACE::pmu_event>(((1U << 10) - 1) & (word0 >> 16));
+        return value;
+    }
+    CONSTEXPR pmccntr_cfg_r &set_CYCLE_CNT_CFG_STOP(NPU_NAMESPACE::pmu_event value)
+    {
+        word0 = (((~((1U << 10) - 1)) << 16) & word0) | ((((1U << 10) - 1) & static_cast<uint32_t>(value)) << 16);
+        return *this;
+    }
+#endif
+};
+
+// pmcaxi_chan_r - Set which AXI channel to monitor for latency measurements in PMU
+struct pmcaxi_chan_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t CH_SEL : 4; // Channel select for latency measurements
+            uint32_t reserved0 : 4;
+            uint32_t AXI_CNT_SEL : 2;  // AXI counter to monitor for latency measurements
+            uint32_t BW_CH_SEL_EN : 1; // Bandwidth channel selector
+            uint32_t reserved1 : 21;
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pmcaxi_chan_r() : word0(0) {}
+    CONSTEXPR pmcaxi_chan_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pmcaxi_chan_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::pmu_axi_channel get_CH_SEL() const
+    {
+        NPU_NAMESPACE::pmu_axi_channel value =
+            static_cast<NPU_NAMESPACE::pmu_axi_channel>(((1U << 4) - 1) & (word0 >> 0));
+        return value;
+    }
+    NPU_NAMESPACE::pmu_axi_channel get_CH_SEL() const volatile
+    {
+        NPU_NAMESPACE::pmu_axi_channel value =
+            static_cast<NPU_NAMESPACE::pmu_axi_channel>(((1U << 4) - 1) & (word0 >> 0));
+        return value;
+    }
+    CONSTEXPR pmcaxi_chan_r &set_CH_SEL(NPU_NAMESPACE::pmu_axi_channel value)
+    {
+        word0 = (((~((1U << 4) - 1)) << 0) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 0);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_AXI_CNT_SEL() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 2) - 1) & (word0 >> 8));
+        return value;
+    }
+    uint32_t get_AXI_CNT_SEL() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 2) - 1) & (word0 >> 8));
+        return value;
+    }
+    CONSTEXPR pmcaxi_chan_r &set_AXI_CNT_SEL(uint32_t value)
+    {
+        word0 = (((~((1U << 2) - 1)) << 8) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 8);
+        return *this;
+    }
+    CONSTEXPR uint32_t get_BW_CH_SEL_EN() const
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10));
+        return value;
+    }
+    uint32_t get_BW_CH_SEL_EN() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10));
+        return value;
+    }
+    CONSTEXPR pmcaxi_chan_r &set_BW_CH_SEL_EN(uint32_t value)
+    {
+        word0 = (((~((1U << 1) - 1)) << 10) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 10);
+        return *this;
+    }
+#endif
+};
+
+// kernel_x_r - Kernel X offset of in kernel decomposition
+struct kernel_x_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR kernel_x_r() : word0(0) {}
+    CONSTEXPR kernel_x_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    kernel_x_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR kernel_x_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// kernel_y_r - Kernel Y offset of in kernel decomposition
+struct kernel_y_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR kernel_y_r() : word0(0) {}
+    CONSTEXPR kernel_y_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    kernel_y_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR kernel_y_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// kernel_w_m1_r - Kernel (width-1) of current block
+struct kernel_w_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR kernel_w_m1_r() : word0(0) {}
+    CONSTEXPR kernel_w_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    kernel_w_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR kernel_w_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// kernel_h_m1_r - Kernel (height-1) of current block
+struct kernel_h_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR kernel_h_m1_r() : word0(0) {}
+    CONSTEXPR kernel_h_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    kernel_h_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR kernel_h_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_cblk_width_m1_r - OFM current block (width-1)
+struct ofm_cblk_width_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_cblk_width_m1_r() : word0(0) {}
+    CONSTEXPR ofm_cblk_width_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_cblk_width_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_cblk_width_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_cblk_height_m1_r - OFM current block (height-1)
+struct ofm_cblk_height_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_cblk_height_m1_r() : word0(0) {}
+    CONSTEXPR ofm_cblk_height_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_cblk_height_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_cblk_height_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_cblk_depth_m1_r - OFM current block (depth-1)
+struct ofm_cblk_depth_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_cblk_depth_m1_r() : word0(0) {}
+    CONSTEXPR ofm_cblk_depth_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_cblk_depth_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_cblk_depth_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_cblk_depth_m1_r - IFM current block (depth-1)
+struct ifm_cblk_depth_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_cblk_depth_m1_r() : word0(0) {}
+    CONSTEXPR ifm_cblk_depth_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_cblk_depth_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_cblk_depth_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_x_r - Block X coordinate in OFM
+struct ofm_x_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_x_r() : word0(0) {}
+    CONSTEXPR ofm_x_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_x_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_x_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_y_r - Block Y coordinate in OFM
+struct ofm_y_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_y_r() : word0(0) {}
+    CONSTEXPR ofm_y_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_y_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_y_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_z_r - Block Z (channel) coordinate in OFM
+struct ofm_z_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_z_r() : word0(0) {}
+    CONSTEXPR ofm_z_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_z_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_z_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_z_r - Block Z (channel) coordinate in IFM
+struct ifm_z_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_z_r() : word0(0) {}
+    CONSTEXPR ifm_z_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_z_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_z_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// pad_top_r - Block top pad
+struct pad_top_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pad_top_r() : word0(0) {}
+    CONSTEXPR pad_top_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pad_top_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR pad_top_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// pad_left_r - Block left pad
+struct pad_left_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pad_left_r() : word0(0) {}
+    CONSTEXPR pad_left_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pad_left_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR pad_left_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_cblk_width_r - IFM current block derived width
+struct ifm_cblk_width_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_cblk_width_r() : word0(0) {}
+    CONSTEXPR ifm_cblk_width_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_cblk_width_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_cblk_width_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_cblk_height_r - IFM current block derived height
+struct ifm_cblk_height_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_cblk_height_r() : word0(0) {}
+    CONSTEXPR ifm_cblk_height_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_cblk_height_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_cblk_height_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// dma_ifm_src_r - DMA IFM channel source position on AXI
+struct dma_ifm_src_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t offset_LO : 32; // Offset - LSB
+            uint32_t offset_HI : 8;  // Offset - MSB
+            uint32_t reserved0 : 24;
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR dma_ifm_src_r() : word0(0), word1(0) {}
+    CONSTEXPR dma_ifm_src_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    dma_ifm_src_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// dma_ifm_dst_r - DMA IFM channel destination position in SHRAM
+struct dma_ifm_dst_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR dma_ifm_dst_r() : word0(0) {}
+    CONSTEXPR dma_ifm_dst_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    dma_ifm_dst_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR dma_ifm_dst_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// dma_ofm_src_r - DMA OFM channel source position in SHRAM
+struct dma_ofm_src_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR dma_ofm_src_r() : word0(0) {}
+    CONSTEXPR dma_ofm_src_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    dma_ofm_src_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR dma_ofm_src_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// dma_ofm_dst_r - DMA OFM channel destination position on AXI
+struct dma_ofm_dst_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t offset_LO : 32; // Offset - LSB
+            uint32_t offset_HI : 8;  // Offset - MSB
+            uint32_t reserved0 : 24;
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR dma_ofm_dst_r() : word0(0), word1(0) {}
+    CONSTEXPR dma_ofm_dst_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    dma_ofm_dst_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// dma_weight_src_r - DMA weight channel source position on AXI
+struct dma_weight_src_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t offset_LO : 32; // Offset - LSB
+            uint32_t offset_HI : 8;  // Offset - MSB
+            uint32_t reserved0 : 24;
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR dma_weight_src_r() : word0(0), word1(0) {}
+    CONSTEXPR dma_weight_src_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    dma_weight_src_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// dma_cmd_src_r - DMA command channel source position on AXI
+struct dma_cmd_src_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t offset_LO : 32; // Offset - LSB
+            uint32_t offset_HI : 8;  // Offset - MSB
+            uint32_t reserved0 : 24;
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR dma_cmd_src_r() : word0(0), word1(0) {}
+    CONSTEXPR dma_cmd_src_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    dma_cmd_src_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// dma_cmd_size_r - DMA command channel number of bytes buffered
+struct dma_cmd_size_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR dma_cmd_size_r() : word0(0) {}
+    CONSTEXPR dma_cmd_size_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    dma_cmd_size_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR dma_cmd_size_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// dma_m2m_src_r - DMA memory to memory source position on AXI
+struct dma_m2m_src_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t offset_LO : 32; // Offset - LSB
+            uint32_t offset_HI : 8;  // Offset - MSB
+            uint32_t reserved0 : 24;
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR dma_m2m_src_r() : word0(0), word1(0) {}
+    CONSTEXPR dma_m2m_src_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    dma_m2m_src_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// dma_m2m_dst_r - DMA memory to memory destination position on AXI
+struct dma_m2m_dst_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t offset_LO : 32; // Offset - LSB
+            uint32_t offset_HI : 8;  // Offset - MSB
+            uint32_t reserved0 : 24;
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR dma_m2m_dst_r() : word0(0), word1(0) {}
+    CONSTEXPR dma_m2m_dst_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    dma_m2m_dst_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// current_qread_r - QREAD position being issued (rather than completed)
+struct current_qread_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR current_qread_r() : word0(0) {}
+    CONSTEXPR current_qread_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    current_qread_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR current_qread_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// dma_scale_src_r - DMA scale and bias channel source position on AXI
+struct dma_scale_src_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t offset_LO : 32; // Offset - LSB
+            uint32_t offset_HI : 8;  // Offset - MSB
+            uint32_t reserved0 : 24;
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR dma_scale_src_r() : word0(0), word1(0) {}
+    CONSTEXPR dma_scale_src_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    dma_scale_src_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// current_block_r - 0-3. Current block bank being executed by the TSU or last one executed if TSU is stopped
+struct current_block_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR current_block_r() : word0(0) {}
+    CONSTEXPR current_block_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    current_block_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR current_block_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// current_op_r - Current NPU OP command being executed by the TSU
+struct current_op_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR current_op_r() : word0(0) {}
+    CONSTEXPR current_op_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    current_op_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR current_op_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// current_cmd_r - Current 32-bit command being parsed by the command stream parser
+struct current_cmd_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR current_cmd_r() : word0(0) {}
+    CONSTEXPR current_cmd_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    current_cmd_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR current_cmd_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// pmevcntr_r - Performance monitor event 0 count register
+struct pmevcntr_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t count : 32; // Count word
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pmevcntr_r() : word0(0) {}
+    CONSTEXPR pmevcntr_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pmevcntr_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_count() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_count() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR pmevcntr_r &set_count(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// pmevtyper_r - Performance monitor event type register 0
+struct pmevtyper_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t EV_TYPE : 10; // Event Type
+            uint32_t reserved0 : 22;
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pmevtyper_r() : word0(0) {}
+    CONSTEXPR pmevtyper_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pmevtyper_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR NPU_NAMESPACE::pmu_event get_EV_TYPE() const
+    {
+        NPU_NAMESPACE::pmu_event value = static_cast<NPU_NAMESPACE::pmu_event>(((1U << 10) - 1) & (word0 >> 0));
+        return value;
+    }
+    NPU_NAMESPACE::pmu_event get_EV_TYPE() const volatile
+    {
+        NPU_NAMESPACE::pmu_event value = static_cast<NPU_NAMESPACE::pmu_event>(((1U << 10) - 1) & (word0 >> 0));
+        return value;
+    }
+    CONSTEXPR pmevtyper_r &set_EV_TYPE(NPU_NAMESPACE::pmu_event value)
+    {
+        word0 = (((~((1U << 10) - 1)) << 0) & word0) | ((((1U << 10) - 1) & static_cast<uint32_t>(value)) << 0);
+        return *this;
+    }
+#endif
+};
+
+// shared_buffer_r - Shared buffer debug access. Only valid in STOPPED state
+struct shared_buffer_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t mem_word : 32; // Memory word
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR shared_buffer_r() : word0(0) {}
+    CONSTEXPR shared_buffer_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    shared_buffer_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_mem_word() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_mem_word() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR shared_buffer_r &set_mem_word(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_pad_top_r - None
+struct ifm_pad_top_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_pad_top_r() : word0(0) {}
+    CONSTEXPR ifm_pad_top_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_pad_top_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_pad_top_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_pad_left_r - None
+struct ifm_pad_left_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_pad_left_r() : word0(0) {}
+    CONSTEXPR ifm_pad_left_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_pad_left_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_pad_left_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_pad_right_r - None
+struct ifm_pad_right_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_pad_right_r() : word0(0) {}
+    CONSTEXPR ifm_pad_right_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_pad_right_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_pad_right_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_pad_bottom_r - None
+struct ifm_pad_bottom_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_pad_bottom_r() : word0(0) {}
+    CONSTEXPR ifm_pad_bottom_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_pad_bottom_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_pad_bottom_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_depth_m1_r - None
+struct ifm_depth_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_depth_m1_r() : word0(0) {}
+    CONSTEXPR ifm_depth_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_depth_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_depth_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_precision_r - None
+struct ifm_precision_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_precision_r() : word0(0) {}
+    CONSTEXPR ifm_precision_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_precision_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_precision_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_upscale_r - None
+struct ifm_upscale_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_upscale_r() : word0(0) {}
+    CONSTEXPR ifm_upscale_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_upscale_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_upscale_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_zero_point_r - None
+struct ifm_zero_point_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_zero_point_r() : word0(0) {}
+    CONSTEXPR ifm_zero_point_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_zero_point_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_zero_point_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_width0_m1_r - None
+struct ifm_width0_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_width0_m1_r() : word0(0) {}
+    CONSTEXPR ifm_width0_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_width0_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_width0_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_height0_m1_r - None
+struct ifm_height0_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_height0_m1_r() : word0(0) {}
+    CONSTEXPR ifm_height0_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_height0_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_height0_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_height1_m1_r - None
+struct ifm_height1_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_height1_m1_r() : word0(0) {}
+    CONSTEXPR ifm_height1_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_height1_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_height1_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_ib_end_r - None
+struct ifm_ib_end_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_ib_end_r() : word0(0) {}
+    CONSTEXPR ifm_ib_end_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_ib_end_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_ib_end_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_region_r - None
+struct ifm_region_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm_region_r() : word0(0) {}
+    CONSTEXPR ifm_region_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm_region_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm_region_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_width_m1_r - None
+struct ofm_width_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_width_m1_r() : word0(0) {}
+    CONSTEXPR ofm_width_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_width_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_width_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_height_m1_r - None
+struct ofm_height_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_height_m1_r() : word0(0) {}
+    CONSTEXPR ofm_height_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_height_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_height_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_depth_m1_r - None
+struct ofm_depth_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_depth_m1_r() : word0(0) {}
+    CONSTEXPR ofm_depth_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_depth_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_depth_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_precision_r - None
+struct ofm_precision_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_precision_r() : word0(0) {}
+    CONSTEXPR ofm_precision_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_precision_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_precision_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_blk_width_m1_r - None
+struct ofm_blk_width_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_blk_width_m1_r() : word0(0) {}
+    CONSTEXPR ofm_blk_width_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_blk_width_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_blk_width_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_blk_height_m1_r - None
+struct ofm_blk_height_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_blk_height_m1_r() : word0(0) {}
+    CONSTEXPR ofm_blk_height_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_blk_height_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_blk_height_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_blk_depth_m1_r - None
+struct ofm_blk_depth_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_blk_depth_m1_r() : word0(0) {}
+    CONSTEXPR ofm_blk_depth_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_blk_depth_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_blk_depth_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_zero_point_r - None
+struct ofm_zero_point_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_zero_point_r() : word0(0) {}
+    CONSTEXPR ofm_zero_point_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_zero_point_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_zero_point_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_width0_m1_r - None
+struct ofm_width0_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_width0_m1_r() : word0(0) {}
+    CONSTEXPR ofm_width0_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_width0_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_width0_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_height0_m1_r - None
+struct ofm_height0_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_height0_m1_r() : word0(0) {}
+    CONSTEXPR ofm_height0_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_height0_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_height0_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_height1_m1_r - None
+struct ofm_height1_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_height1_m1_r() : word0(0) {}
+    CONSTEXPR ofm_height1_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_height1_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_height1_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_region_r - None
+struct ofm_region_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_region_r() : word0(0) {}
+    CONSTEXPR ofm_region_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_region_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_region_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// kernel_width_m1_r - None
+struct kernel_width_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR kernel_width_m1_r() : word0(0) {}
+    CONSTEXPR kernel_width_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    kernel_width_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR kernel_width_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// kernel_height_m1_r - None
+struct kernel_height_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR kernel_height_m1_r() : word0(0) {}
+    CONSTEXPR kernel_height_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    kernel_height_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR kernel_height_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// kernel_stride_r - None
+struct kernel_stride_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR kernel_stride_r() : word0(0) {}
+    CONSTEXPR kernel_stride_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    kernel_stride_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR kernel_stride_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// parallel_mode_r - None
+struct parallel_mode_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR parallel_mode_r() : word0(0) {}
+    CONSTEXPR parallel_mode_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    parallel_mode_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR parallel_mode_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// acc_format_r - None
+struct acc_format_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR acc_format_r() : word0(0) {}
+    CONSTEXPR acc_format_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    acc_format_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR acc_format_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// activation_r - None
+struct activation_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR activation_r() : word0(0) {}
+    CONSTEXPR activation_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    activation_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR activation_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// activation_min_r - None
+struct activation_min_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR activation_min_r() : word0(0) {}
+    CONSTEXPR activation_min_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    activation_min_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR activation_min_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// activation_max_r - None
+struct activation_max_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR activation_max_r() : word0(0) {}
+    CONSTEXPR activation_max_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    activation_max_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR activation_max_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// weight_region_r - None
+struct weight_region_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR weight_region_r() : word0(0) {}
+    CONSTEXPR weight_region_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    weight_region_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR weight_region_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// scale_region_r - None
+struct scale_region_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR scale_region_r() : word0(0) {}
+    CONSTEXPR scale_region_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    scale_region_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR scale_region_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ab_start_r - None
+struct ab_start_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ab_start_r() : word0(0) {}
+    CONSTEXPR ab_start_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ab_start_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ab_start_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// blockdep_r - None
+struct blockdep_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR blockdep_r() : word0(0) {}
+    CONSTEXPR blockdep_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    blockdep_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR blockdep_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// dma0_src_region_r - None
+struct dma0_src_region_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR dma0_src_region_r() : word0(0) {}
+    CONSTEXPR dma0_src_region_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    dma0_src_region_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR dma0_src_region_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// dma0_dst_region_r - None
+struct dma0_dst_region_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR dma0_dst_region_r() : word0(0) {}
+    CONSTEXPR dma0_dst_region_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    dma0_dst_region_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR dma0_dst_region_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// dma0_size0_r - None
+struct dma0_size0_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR dma0_size0_r() : word0(0) {}
+    CONSTEXPR dma0_size0_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    dma0_size0_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR dma0_size0_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// dma0_size1_r - None
+struct dma0_size1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR dma0_size1_r() : word0(0) {}
+    CONSTEXPR dma0_size1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    dma0_size1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR dma0_size1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm2_broadcast_r - None
+struct ifm2_broadcast_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm2_broadcast_r() : word0(0) {}
+    CONSTEXPR ifm2_broadcast_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm2_broadcast_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm2_broadcast_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm2_scalar_r - None
+struct ifm2_scalar_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm2_scalar_r() : word0(0) {}
+    CONSTEXPR ifm2_scalar_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm2_scalar_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm2_scalar_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm2_precision_r - None
+struct ifm2_precision_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm2_precision_r() : word0(0) {}
+    CONSTEXPR ifm2_precision_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm2_precision_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm2_precision_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm2_zero_point_r - None
+struct ifm2_zero_point_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm2_zero_point_r() : word0(0) {}
+    CONSTEXPR ifm2_zero_point_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm2_zero_point_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm2_zero_point_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm2_width0_m1_r - None
+struct ifm2_width0_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm2_width0_m1_r() : word0(0) {}
+    CONSTEXPR ifm2_width0_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm2_width0_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm2_width0_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm2_height0_m1_r - None
+struct ifm2_height0_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm2_height0_m1_r() : word0(0) {}
+    CONSTEXPR ifm2_height0_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm2_height0_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm2_height0_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm2_height1_m1_r - None
+struct ifm2_height1_m1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm2_height1_m1_r() : word0(0) {}
+    CONSTEXPR ifm2_height1_m1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm2_height1_m1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm2_height1_m1_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm2_ib_start_r - None
+struct ifm2_ib_start_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm2_ib_start_r() : word0(0) {}
+    CONSTEXPR ifm2_ib_start_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm2_ib_start_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm2_ib_start_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm2_region_r - None
+struct ifm2_region_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ifm2_region_r() : word0(0) {}
+    CONSTEXPR ifm2_region_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ifm2_region_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ifm2_region_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ifm_base0_r - None
+struct ifm_base0_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ifm_base0_r() : word0(0), word1(0) {}
+    CONSTEXPR ifm_base0_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ifm_base0_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ifm_base1_r - None
+struct ifm_base1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ifm_base1_r() : word0(0), word1(0) {}
+    CONSTEXPR ifm_base1_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ifm_base1_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ifm_base2_r - None
+struct ifm_base2_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ifm_base2_r() : word0(0), word1(0) {}
+    CONSTEXPR ifm_base2_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ifm_base2_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ifm_base3_r - None
+struct ifm_base3_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ifm_base3_r() : word0(0), word1(0) {}
+    CONSTEXPR ifm_base3_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ifm_base3_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ifm_stride_x_r - None
+struct ifm_stride_x_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ifm_stride_x_r() : word0(0), word1(0) {}
+    CONSTEXPR ifm_stride_x_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ifm_stride_x_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ifm_stride_y_r - None
+struct ifm_stride_y_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ifm_stride_y_r() : word0(0), word1(0) {}
+    CONSTEXPR ifm_stride_y_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ifm_stride_y_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ifm_stride_c_r - None
+struct ifm_stride_c_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ifm_stride_c_r() : word0(0), word1(0) {}
+    CONSTEXPR ifm_stride_c_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ifm_stride_c_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ofm_base0_r - None
+struct ofm_base0_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ofm_base0_r() : word0(0), word1(0) {}
+    CONSTEXPR ofm_base0_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ofm_base0_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ofm_base1_r - None
+struct ofm_base1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ofm_base1_r() : word0(0), word1(0) {}
+    CONSTEXPR ofm_base1_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ofm_base1_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ofm_base2_r - None
+struct ofm_base2_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ofm_base2_r() : word0(0), word1(0) {}
+    CONSTEXPR ofm_base2_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ofm_base2_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ofm_base3_r - None
+struct ofm_base3_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ofm_base3_r() : word0(0), word1(0) {}
+    CONSTEXPR ofm_base3_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ofm_base3_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ofm_stride_x_r - None
+struct ofm_stride_x_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ofm_stride_x_r() : word0(0), word1(0) {}
+    CONSTEXPR ofm_stride_x_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ofm_stride_x_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ofm_stride_y_r - None
+struct ofm_stride_y_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ofm_stride_y_r() : word0(0), word1(0) {}
+    CONSTEXPR ofm_stride_y_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ofm_stride_y_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ofm_stride_c_r - None
+struct ofm_stride_c_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ofm_stride_c_r() : word0(0), word1(0) {}
+    CONSTEXPR ofm_stride_c_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ofm_stride_c_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// weight_base_r - None
+struct weight_base_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR weight_base_r() : word0(0), word1(0) {}
+    CONSTEXPR weight_base_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    weight_base_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// weight_length_r - None
+struct weight_length_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR weight_length_r() : word0(0) {}
+    CONSTEXPR weight_length_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    weight_length_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR weight_length_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// scale_base_r - None
+struct scale_base_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR scale_base_r() : word0(0), word1(0) {}
+    CONSTEXPR scale_base_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    scale_base_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// scale_length_r - None
+struct scale_length_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR scale_length_r() : word0(0) {}
+    CONSTEXPR scale_length_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    scale_length_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR scale_length_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_scale_r - None
+struct ofm_scale_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_scale_r() : word0(0) {}
+    CONSTEXPR ofm_scale_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_scale_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_scale_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// ofm_scale_shift_r - None
+struct ofm_scale_shift_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR ofm_scale_shift_r() : word0(0) {}
+    CONSTEXPR ofm_scale_shift_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    ofm_scale_shift_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR ofm_scale_shift_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// opa_scale_r - None
+struct opa_scale_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR opa_scale_r() : word0(0) {}
+    CONSTEXPR opa_scale_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    opa_scale_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR opa_scale_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// opa_scale_shift_r - None
+struct opa_scale_shift_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR opa_scale_shift_r() : word0(0) {}
+    CONSTEXPR opa_scale_shift_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    opa_scale_shift_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR opa_scale_shift_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// opb_scale_r - None
+struct opb_scale_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR opb_scale_r() : word0(0) {}
+    CONSTEXPR opb_scale_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    opb_scale_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR opb_scale_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// dma0_src_r - None
+struct dma0_src_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR dma0_src_r() : word0(0), word1(0) {}
+    CONSTEXPR dma0_src_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    dma0_src_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// dma0_dst_r - None
+struct dma0_dst_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR dma0_dst_r() : word0(0), word1(0) {}
+    CONSTEXPR dma0_dst_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    dma0_dst_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// dma0_len_r - None
+struct dma0_len_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR dma0_len_r() : word0(0), word1(0) {}
+    CONSTEXPR dma0_len_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    dma0_len_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// dma0_skip0_r - None
+struct dma0_skip0_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR dma0_skip0_r() : word0(0), word1(0) {}
+    CONSTEXPR dma0_skip0_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    dma0_skip0_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// dma0_skip1_r - None
+struct dma0_skip1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR dma0_skip1_r() : word0(0), word1(0) {}
+    CONSTEXPR dma0_skip1_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    dma0_skip1_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ifm2_base0_r - None
+struct ifm2_base0_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ifm2_base0_r() : word0(0), word1(0) {}
+    CONSTEXPR ifm2_base0_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ifm2_base0_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ifm2_base1_r - None
+struct ifm2_base1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ifm2_base1_r() : word0(0), word1(0) {}
+    CONSTEXPR ifm2_base1_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ifm2_base1_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ifm2_base2_r - None
+struct ifm2_base2_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ifm2_base2_r() : word0(0), word1(0) {}
+    CONSTEXPR ifm2_base2_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ifm2_base2_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ifm2_base3_r - None
+struct ifm2_base3_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ifm2_base3_r() : word0(0), word1(0) {}
+    CONSTEXPR ifm2_base3_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ifm2_base3_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ifm2_stride_x_r - None
+struct ifm2_stride_x_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ifm2_stride_x_r() : word0(0), word1(0) {}
+    CONSTEXPR ifm2_stride_x_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ifm2_stride_x_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ifm2_stride_y_r - None
+struct ifm2_stride_y_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ifm2_stride_y_r() : word0(0), word1(0) {}
+    CONSTEXPR ifm2_stride_y_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ifm2_stride_y_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// ifm2_stride_c_r - None
+struct ifm2_stride_c_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR ifm2_stride_c_r() : word0(0), word1(0) {}
+    CONSTEXPR ifm2_stride_c_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    ifm2_stride_c_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// weight1_base_r - None
+struct weight1_base_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR weight1_base_r() : word0(0), word1(0) {}
+    CONSTEXPR weight1_base_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    weight1_base_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// weight1_length_r - None
+struct weight1_length_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR weight1_length_r() : word0(0) {}
+    CONSTEXPR weight1_length_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    weight1_length_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR weight1_length_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// scale1_base_r - None
+struct scale1_base_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value_LO : 32; // 64-bit register value - LSB
+            uint32_t value_HI : 32; // 64-bit register value - MSB
+        };
+        uint32_t word[2];
+    };
+#else
+  private:
+    uint32_t word0;
+    uint32_t word1;
+
+  public:
+    CONSTEXPR scale1_base_r() : word0(0), word1(0) {}
+    CONSTEXPR scale1_base_r(uint64_t init) :
+        word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+        word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+    {
+    }
+    CONSTEXPR void operator=(uint64_t value)
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    void operator=(uint64_t value) volatile
+    {
+        word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+        word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+    }
+    CONSTEXPR operator uint64_t()
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    operator uint64_t() volatile
+    {
+        return (static_cast<uint64_t>(word1) << 32) | word0;
+    }
+    scale1_base_r copy() volatile
+    {
+        return *this;
+    }
+#endif
+};
+
+// scale1_length_r - None
+struct scale1_length_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR scale1_length_r() : word0(0) {}
+    CONSTEXPR scale1_length_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    scale1_length_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR scale1_length_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// revision_r - Internal FPGA build revision: first 32-bits of the Ultan Git hash used for the build
+struct revision_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t value : 32; // 32-bit register value
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR revision_r() : word0(0) {}
+    CONSTEXPR revision_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    revision_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_value() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_value() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR revision_r &set_value(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// pid4_r - Peripheral ID byte 4 (Arm=code 4)
+struct pid4_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t PID4 : 32; // Byte 4 of Peripheral ID (Lower 8 bits valid)
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pid4_r() : word0(4) {}
+    CONSTEXPR pid4_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pid4_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_PID4() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_PID4() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR pid4_r &set_PID4(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// pid5_r - Peripheral ID byte 5 (reserved)
+struct pid5_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t PID5 : 32; // Byte 5 of Peripheral ID (Lower 8 bits valid)
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pid5_r() : word0(0) {}
+    CONSTEXPR pid5_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pid5_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_PID5() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_PID5() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR pid5_r &set_PID5(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// pid6_r - Peripheral ID byte 6 (reserved)
+struct pid6_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t PID6 : 32; // Byte 6 of Peripheral ID (Lower 8 bits valid)
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pid6_r() : word0(0) {}
+    CONSTEXPR pid6_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pid6_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_PID6() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_PID6() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR pid6_r &set_PID6(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// pid7_r - Peripheral ID byte 7 (reserved)
+struct pid7_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t PID7 : 32; // Byte 7 of Peripheral ID (Lower 8 bits valid)
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pid7_r() : word0(0) {}
+    CONSTEXPR pid7_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pid7_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_PID7() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_PID7() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR pid7_r &set_PID7(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// pid0_r - Peripheral ID byte 0. This is bits[7:0] of the part number
+struct pid0_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t PID0 : 32; // Byte 0 of Peripheral ID (Lower 8 bits valid)
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pid0_r() : word0(129) {}
+    CONSTEXPR pid0_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pid0_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_PID0() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_PID0() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR pid0_r &set_PID0(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// pid1_r - Peripheral ID byte 1. This is bits[11:8] of the part number in bits[3:0], and bits[3:0] of the Arm ID in
+// bits[7:4]
+struct pid1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t PID1 : 32; // Byte 1 of Peripheral ID (Lower 8 bits valid)
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pid1_r() : word0(181) {}
+    CONSTEXPR pid1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pid1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_PID1() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_PID1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR pid1_r &set_PID1(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// pid2_r - Peripheral ID byte 2. This is bits[6:4] of the Arm ID in bits[2:0], and bit 3 indicates format B
+struct pid2_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t PID2 : 32; // Byte 2 of Peripheral ID (Lower 8 bits valid)
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pid2_r() : word0(11) {}
+    CONSTEXPR pid2_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pid2_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_PID2() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_PID2() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR pid2_r &set_PID2(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// pid3_r - Peripheral ID byte 3
+struct pid3_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t PID3 : 32; // Byte 1 of Peripheral ID (Lower 8 bits valid)
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR pid3_r() : word0(0) {}
+    CONSTEXPR pid3_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    pid3_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_PID3() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_PID3() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR pid3_r &set_PID3(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// cid0_r - Component ID byte 0
+struct cid0_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t CID0 : 32; // Byte 0 of Component ID (Lower 8 bits valid)
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR cid0_r() : word0(13) {}
+    CONSTEXPR cid0_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    cid0_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_CID0() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_CID0() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR cid0_r &set_CID0(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// cid1_r - Component ID byte 1
+struct cid1_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t CID1 : 32; // Byte 1 of Component ID (Lower 8 bits valid)
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR cid1_r() : word0(240) {}
+    CONSTEXPR cid1_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    cid1_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_CID1() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_CID1() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR cid1_r &set_CID1(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// cid2_r - Component ID byte 2
+struct cid2_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t CID2 : 32; // Byte 2 of Component ID (Lower 8 bits valid)
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR cid2_r() : word0(5) {}
+    CONSTEXPR cid2_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    cid2_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_CID2() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_CID2() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR cid2_r &set_CID2(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+// cid3_r - Component ID byte 3
+struct cid3_r
+{
+#ifndef __cplusplus
+    union
+    {
+        struct
+        {
+            uint32_t CID3 : 32; // Byte 3 of Component ID (Lower 8 bits valid)
+        };
+        uint32_t word;
+    };
+#else
+  private:
+    uint32_t word0;
+
+  public:
+    CONSTEXPR cid3_r() : word0(177) {}
+    CONSTEXPR cid3_r(uint32_t init) : word0(init) {}
+    CONSTEXPR void operator=(uint32_t value)
+    {
+        word0 = value;
+    }
+    void operator=(uint32_t value) volatile
+    {
+        word0 = value;
+    }
+    CONSTEXPR operator uint32_t()
+    {
+        return word0;
+    }
+    operator uint32_t() volatile
+    {
+        return word0;
+    }
+    cid3_r copy() volatile
+    {
+        return *this;
+    }
+    CONSTEXPR uint32_t get_CID3() const
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    uint32_t get_CID3() const volatile
+    {
+        uint32_t value = static_cast<uint32_t>(word0);
+        return value;
+    }
+    CONSTEXPR cid3_r &set_CID3(uint32_t value)
+    {
+        word0 = static_cast<uint32_t>(value);
+        return *this;
+    }
+#endif
+};
+
+struct NPU_REG
+{
+    STRUCT id_r ID;           // 0x0000
+    STRUCT status_r STATUS;   // 0x0004
+    STRUCT cmd_r CMD;         // 0x0008
+    STRUCT reset_r RESET;     // 0x000C
+    STRUCT qbase_r QBASE;     // 0x0010
+    STRUCT qread_r QREAD;     // 0x0018
+    STRUCT qconfig_r QCONFIG; // 0x001C
+    STRUCT qsize_r QSIZE;     // 0x0020
+    STRUCT prot_r PROT;       // 0x0024
+    STRUCT config_r CONFIG;   // 0x0028
+    STRUCT lock_r LOCK;       // 0x002C
+    uint32_t unused0[3];
+    STRUCT regioncfg_r REGIONCFG;   // 0x003C
+    STRUCT axi_limit0_r AXI_LIMIT0; // 0x0040
+    STRUCT axi_limit1_r AXI_LIMIT1; // 0x0044
+    STRUCT axi_limit2_r AXI_LIMIT2; // 0x0048
+    STRUCT axi_limit3_r AXI_LIMIT3; // 0x004C
+    uint32_t unused1[12];
+    STRUCT basep_r BASEP[8]; // 0x0080
+    uint32_t unused2[16];
+    STRUCT wd_status_r WD_STATUS;   // 0x0100
+    STRUCT mac_status_r MAC_STATUS; // 0x0104
+    STRUCT ao_status_r AO_STATUS;   // 0x0108
+    uint32_t unused3[1];
+    STRUCT dma_status0_r DMA_STATUS0; // 0x0110
+    STRUCT dma_status1_r DMA_STATUS1; // 0x0114
+    uint32_t unused4[10];
+    STRUCT clkforce_r CLKFORCE;           // 0x0140
+    STRUCT debug_address_r DEBUG_ADDRESS; // 0x0144
+    STRUCT debug_misc_r DEBUG_MISC;       // 0x0148
+    STRUCT debugcore_r DEBUGCORE;         // 0x014C
+    STRUCT debug_block_r DEBUG_BLOCK;     // 0x0150
+    uint32_t unused5[11];
+    STRUCT pmcr_r PMCR;             // 0x0180
+    STRUCT pmcntenset_r PMCNTENSET; // 0x0184
+    STRUCT pmcntenclr_r PMCNTENCLR; // 0x0188
+    STRUCT pmovsset_r PMOVSSET;     // 0x018C
+    STRUCT pmovsclr_r PMOVSCLR;     // 0x0190
+    STRUCT pmintset_r PMINTSET;     // 0x0194
+    STRUCT pmintclr_r PMINTCLR;     // 0x0198
+    uint32_t unused6[1];
+    STRUCT pmccntr_r PMCCNTR;         // 0x01A0
+    STRUCT pmccntr_cfg_r PMCCNTR_CFG; // 0x01A8
+    STRUCT pmcaxi_chan_r PMCAXI_CHAN; // 0x01AC
+    uint32_t unused7[20];
+    STRUCT kernel_x_r KERNEL_X;                     // 0x0200
+    STRUCT kernel_y_r KERNEL_Y;                     // 0x0204
+    STRUCT kernel_w_m1_r KERNEL_W_M1;               // 0x0208
+    STRUCT kernel_h_m1_r KERNEL_H_M1;               // 0x020C
+    STRUCT ofm_cblk_width_m1_r OFM_CBLK_WIDTH_M1;   // 0x0210
+    STRUCT ofm_cblk_height_m1_r OFM_CBLK_HEIGHT_M1; // 0x0214
+    STRUCT ofm_cblk_depth_m1_r OFM_CBLK_DEPTH_M1;   // 0x0218
+    STRUCT ifm_cblk_depth_m1_r IFM_CBLK_DEPTH_M1;   // 0x021C
+    STRUCT ofm_x_r OFM_X;                           // 0x0220
+    STRUCT ofm_y_r OFM_Y;                           // 0x0224
+    STRUCT ofm_z_r OFM_Z;                           // 0x0228
+    STRUCT ifm_z_r IFM_Z;                           // 0x022C
+    STRUCT pad_top_r PAD_TOP;                       // 0x0230
+    STRUCT pad_left_r PAD_LEFT;                     // 0x0234
+    STRUCT ifm_cblk_width_r IFM_CBLK_WIDTH;         // 0x0238
+    STRUCT ifm_cblk_height_r IFM_CBLK_HEIGHT;       // 0x023C
+    STRUCT dma_ifm_src_r DMA_IFM_SRC;               // 0x0240
+    STRUCT dma_ifm_dst_r DMA_IFM_DST;               // 0x0248
+    STRUCT dma_ofm_src_r DMA_OFM_SRC;               // 0x024C
+    STRUCT dma_ofm_dst_r DMA_OFM_DST;               // 0x0250
+    STRUCT dma_weight_src_r DMA_WEIGHT_SRC;         // 0x0258
+    STRUCT dma_cmd_src_r DMA_CMD_SRC;               // 0x0260
+    STRUCT dma_cmd_size_r DMA_CMD_SIZE;             // 0x0268
+    STRUCT dma_m2m_src_r DMA_M2M_SRC;               // 0x026C
+    STRUCT dma_m2m_dst_r DMA_M2M_DST;               // 0x0274
+    STRUCT current_qread_r CURRENT_QREAD;           // 0x027C
+    STRUCT dma_scale_src_r DMA_SCALE_SRC;           // 0x0280
+    uint32_t unused8[11];
+    STRUCT current_block_r CURRENT_BLOCK; // 0x02B4
+    STRUCT current_op_r CURRENT_OP;       // 0x02B8
+    STRUCT current_cmd_r CURRENT_CMD;     // 0x02BC
+    uint32_t unused9[16];
+    STRUCT pmevcntr_r PMEVCNTR[4]; // 0x0300
+    uint32_t unused10[28];
+    STRUCT pmevtyper_r PMEVTYPER[4]; // 0x0380
+    uint32_t unused11[28];
+    STRUCT shared_buffer_r SHARED_BUFFER[256]; // 0x0400
+    STRUCT ifm_pad_top_r IFM_PAD_TOP;          // 0x0800
+    STRUCT ifm_pad_left_r IFM_PAD_LEFT;        // 0x0804
+    STRUCT ifm_pad_right_r IFM_PAD_RIGHT;      // 0x0808
+    STRUCT ifm_pad_bottom_r IFM_PAD_BOTTOM;    // 0x080C
+    STRUCT ifm_depth_m1_r IFM_DEPTH_M1;        // 0x0810
+    STRUCT ifm_precision_r IFM_PRECISION;      // 0x0814
+    uint32_t unused12[1];
+    STRUCT ifm_upscale_r IFM_UPSCALE; // 0x081C
+    uint32_t unused13[1];
+    STRUCT ifm_zero_point_r IFM_ZERO_POINT; // 0x0824
+    STRUCT ifm_width0_m1_r IFM_WIDTH0_M1;   // 0x0828
+    STRUCT ifm_height0_m1_r IFM_HEIGHT0_M1; // 0x082C
+    STRUCT ifm_height1_m1_r IFM_HEIGHT1_M1; // 0x0830
+    STRUCT ifm_ib_end_r IFM_IB_END;         // 0x0834
+    uint32_t unused14[1];
+    STRUCT ifm_region_r IFM_REGION; // 0x083C
+    uint32_t unused15[1];
+    STRUCT ofm_width_m1_r OFM_WIDTH_M1;           // 0x0844
+    STRUCT ofm_height_m1_r OFM_HEIGHT_M1;         // 0x0848
+    STRUCT ofm_depth_m1_r OFM_DEPTH_M1;           // 0x084C
+    STRUCT ofm_precision_r OFM_PRECISION;         // 0x0850
+    STRUCT ofm_blk_width_m1_r OFM_BLK_WIDTH_M1;   // 0x0854
+    STRUCT ofm_blk_height_m1_r OFM_BLK_HEIGHT_M1; // 0x0858
+    STRUCT ofm_blk_depth_m1_r OFM_BLK_DEPTH_M1;   // 0x085C
+    STRUCT ofm_zero_point_r OFM_ZERO_POINT;       // 0x0860
+    uint32_t unused16[1];
+    STRUCT ofm_width0_m1_r OFM_WIDTH0_M1;   // 0x0868
+    STRUCT ofm_height0_m1_r OFM_HEIGHT0_M1; // 0x086C
+    STRUCT ofm_height1_m1_r OFM_HEIGHT1_M1; // 0x0870
+    uint32_t unused17[2];
+    STRUCT ofm_region_r OFM_REGION;             // 0x087C
+    STRUCT kernel_width_m1_r KERNEL_WIDTH_M1;   // 0x0880
+    STRUCT kernel_height_m1_r KERNEL_HEIGHT_M1; // 0x0884
+    STRUCT kernel_stride_r KERNEL_STRIDE;       // 0x0888
+    STRUCT parallel_mode_r PARALLEL_MODE;       // 0x088C
+    STRUCT acc_format_r ACC_FORMAT;             // 0x0890
+    STRUCT activation_r ACTIVATION;             // 0x0894
+    STRUCT activation_min_r ACTIVATION_MIN;     // 0x0898
+    STRUCT activation_max_r ACTIVATION_MAX;     // 0x089C
+    STRUCT weight_region_r WEIGHT_REGION;       // 0x08A0
+    STRUCT scale_region_r SCALE_REGION;         // 0x08A4
+    uint32_t unused18[3];
+    STRUCT ab_start_r AB_START; // 0x08B4
+    uint32_t unused19[1];
+    STRUCT blockdep_r BLOCKDEP;               // 0x08BC
+    STRUCT dma0_src_region_r DMA0_SRC_REGION; // 0x08C0
+    STRUCT dma0_dst_region_r DMA0_DST_REGION; // 0x08C4
+    STRUCT dma0_size0_r DMA0_SIZE0;           // 0x08C8
+    STRUCT dma0_size1_r DMA0_SIZE1;           // 0x08CC
+    uint32_t unused20[12];
+    STRUCT ifm2_broadcast_r IFM2_BROADCAST; // 0x0900
+    STRUCT ifm2_scalar_r IFM2_SCALAR;       // 0x0904
+    uint32_t unused21[3];
+    STRUCT ifm2_precision_r IFM2_PRECISION; // 0x0914
+    uint32_t unused22[3];
+    STRUCT ifm2_zero_point_r IFM2_ZERO_POINT; // 0x0924
+    STRUCT ifm2_width0_m1_r IFM2_WIDTH0_M1;   // 0x0928
+    STRUCT ifm2_height0_m1_r IFM2_HEIGHT0_M1; // 0x092C
+    STRUCT ifm2_height1_m1_r IFM2_HEIGHT1_M1; // 0x0930
+    STRUCT ifm2_ib_start_r IFM2_IB_START;     // 0x0934
+    uint32_t unused23[1];
+    STRUCT ifm2_region_r IFM2_REGION; // 0x093C
+    uint32_t unused24[48];
+    STRUCT ifm_base0_r IFM_BASE0;       // 0x0A00
+    STRUCT ifm_base1_r IFM_BASE1;       // 0x0A08
+    STRUCT ifm_base2_r IFM_BASE2;       // 0x0A10
+    STRUCT ifm_base3_r IFM_BASE3;       // 0x0A18
+    STRUCT ifm_stride_x_r IFM_STRIDE_X; // 0x0A20
+    STRUCT ifm_stride_y_r IFM_STRIDE_Y; // 0x0A28
+    STRUCT ifm_stride_c_r IFM_STRIDE_C; // 0x0A30
+    uint32_t unused25[2];
+    STRUCT ofm_base0_r OFM_BASE0;       // 0x0A40
+    STRUCT ofm_base1_r OFM_BASE1;       // 0x0A48
+    STRUCT ofm_base2_r OFM_BASE2;       // 0x0A50
+    STRUCT ofm_base3_r OFM_BASE3;       // 0x0A58
+    STRUCT ofm_stride_x_r OFM_STRIDE_X; // 0x0A60
+    STRUCT ofm_stride_y_r OFM_STRIDE_Y; // 0x0A68
+    STRUCT ofm_stride_c_r OFM_STRIDE_C; // 0x0A70
+    uint32_t unused26[2];
+    STRUCT weight_base_r WEIGHT_BASE;     // 0x0A80
+    STRUCT weight_length_r WEIGHT_LENGTH; // 0x0A88
+    uint32_t unused27[1];
+    STRUCT scale_base_r SCALE_BASE;     // 0x0A90
+    STRUCT scale_length_r SCALE_LENGTH; // 0x0A98
+    uint32_t unused28[1];
+    STRUCT ofm_scale_r OFM_SCALE;             // 0x0AA0
+    STRUCT ofm_scale_shift_r OFM_SCALE_SHIFT; // 0x0AA4
+    STRUCT opa_scale_r OPA_SCALE;             // 0x0AA8
+    STRUCT opa_scale_shift_r OPA_SCALE_SHIFT; // 0x0AAC
+    STRUCT opb_scale_r OPB_SCALE;             // 0x0AB0
+    uint32_t unused29[3];
+    STRUCT dma0_src_r DMA0_SRC;     // 0x0AC0
+    STRUCT dma0_dst_r DMA0_DST;     // 0x0AC8
+    STRUCT dma0_len_r DMA0_LEN;     // 0x0AD0
+    STRUCT dma0_skip0_r DMA0_SKIP0; // 0x0AD8
+    STRUCT dma0_skip1_r DMA0_SKIP1; // 0x0AE0
+    uint32_t unused30[6];
+    STRUCT ifm2_base0_r IFM2_BASE0;       // 0x0B00
+    STRUCT ifm2_base1_r IFM2_BASE1;       // 0x0B08
+    STRUCT ifm2_base2_r IFM2_BASE2;       // 0x0B10
+    STRUCT ifm2_base3_r IFM2_BASE3;       // 0x0B18
+    STRUCT ifm2_stride_x_r IFM2_STRIDE_X; // 0x0B20
+    STRUCT ifm2_stride_y_r IFM2_STRIDE_Y; // 0x0B28
+    STRUCT ifm2_stride_c_r IFM2_STRIDE_C; // 0x0B30
+    uint32_t unused31[2];
+    STRUCT weight1_base_r WEIGHT1_BASE;     // 0x0B40
+    STRUCT weight1_length_r WEIGHT1_LENGTH; // 0x0B48
+    uint32_t unused32[1];
+    STRUCT scale1_base_r SCALE1_BASE;     // 0x0B50
+    STRUCT scale1_length_r SCALE1_LENGTH; // 0x0B58
+    uint32_t unused33[281];
+    STRUCT revision_r REVISION; // 0x0FC0
+    uint32_t unused34[3];
+    STRUCT pid4_r PID4; // 0x0FD0
+    STRUCT pid5_r PID5; // 0x0FD4
+    STRUCT pid6_r PID6; // 0x0FD8
+    STRUCT pid7_r PID7; // 0x0FDC
+    STRUCT pid0_r PID0; // 0x0FE0
+    STRUCT pid1_r PID1; // 0x0FE4
+    STRUCT pid2_r PID2; // 0x0FE8
+    STRUCT pid3_r PID3; // 0x0FEC
+    STRUCT cid0_r CID0; // 0x0FF0
+    STRUCT cid1_r CID1; // 0x0FF4
+    STRUCT cid2_r CID2; // 0x0FF8
+    STRUCT cid3_r CID3; // 0x0FFC
+
+#ifdef __cplusplus
+    enum class access_type_t : uint8_t
+    {
+        RW,
+        RO,
+        WO
+    };
+    NPU_REG()
+    {
+        reset();
+    }
+    void reset()
+    {
+        ID         = 268853249;
+        STATUS     = 8;
+        CMD        = 12;
+        RESET      = 0;
+        QBASE      = 0;
+        QREAD      = 0;
+        QCONFIG    = 0;
+        QSIZE      = 0;
+        PROT       = 0;
+        CONFIG     = 268435456;
+        LOCK       = 0;
+        REGIONCFG  = 0;
+        AXI_LIMIT0 = 0;
+        AXI_LIMIT1 = 0;
+        AXI_LIMIT2 = 0;
+        AXI_LIMIT3 = 0;
+        for (size_t i = 0; i < (sizeof(BASEP) / sizeof(BASEP[0])); ++i)
+            BASEP[i] = 0;
+        WD_STATUS          = 0;
+        MAC_STATUS         = 0;
+        AO_STATUS          = 0;
+        DMA_STATUS0        = 0;
+        DMA_STATUS1        = 0;
+        CLKFORCE           = 0;
+        DEBUG_ADDRESS      = 0;
+        DEBUG_MISC         = 0;
+        DEBUGCORE          = 0;
+        DEBUG_BLOCK        = 0;
+        PMCR               = 8192;
+        PMCNTENSET         = 0;
+        PMCNTENCLR         = 0;
+        PMOVSSET           = 0;
+        PMOVSCLR           = 0;
+        PMINTSET           = 0;
+        PMINTCLR           = 0;
+        PMCCNTR            = 0;
+        PMCCNTR_CFG        = 0;
+        PMCAXI_CHAN        = 0;
+        KERNEL_X           = 0;
+        KERNEL_Y           = 0;
+        KERNEL_W_M1        = 0;
+        KERNEL_H_M1        = 0;
+        OFM_CBLK_WIDTH_M1  = 0;
+        OFM_CBLK_HEIGHT_M1 = 0;
+        OFM_CBLK_DEPTH_M1  = 0;
+        IFM_CBLK_DEPTH_M1  = 0;
+        OFM_X              = 0;
+        OFM_Y              = 0;
+        OFM_Z              = 0;
+        IFM_Z              = 0;
+        PAD_TOP            = 0;
+        PAD_LEFT           = 0;
+        IFM_CBLK_WIDTH     = 0;
+        IFM_CBLK_HEIGHT    = 0;
+        DMA_IFM_SRC        = 0;
+        DMA_IFM_DST        = 0;
+        DMA_OFM_SRC        = 0;
+        DMA_OFM_DST        = 0;
+        DMA_WEIGHT_SRC     = 0;
+        DMA_CMD_SRC        = 0;
+        DMA_CMD_SIZE       = 0;
+        DMA_M2M_SRC        = 0;
+        DMA_M2M_DST        = 0;
+        CURRENT_QREAD      = 0;
+        DMA_SCALE_SRC      = 0;
+        CURRENT_BLOCK      = 0;
+        CURRENT_OP         = 0;
+        CURRENT_CMD        = 0;
+        for (size_t i = 0; i < (sizeof(PMEVCNTR) / sizeof(PMEVCNTR[0])); ++i)
+            PMEVCNTR[i] = 0;
+        for (size_t i = 0; i < (sizeof(PMEVTYPER) / sizeof(PMEVTYPER[0])); ++i)
+            PMEVTYPER[i] = 0;
+        for (size_t i = 0; i < (sizeof(SHARED_BUFFER) / sizeof(SHARED_BUFFER[0])); ++i)
+            SHARED_BUFFER[i] = 0;
+        IFM_PAD_TOP       = 0;
+        IFM_PAD_LEFT      = 0;
+        IFM_PAD_RIGHT     = 0;
+        IFM_PAD_BOTTOM    = 0;
+        IFM_DEPTH_M1      = 0;
+        IFM_PRECISION     = 0;
+        IFM_UPSCALE       = 0;
+        IFM_ZERO_POINT    = 0;
+        IFM_WIDTH0_M1     = 0;
+        IFM_HEIGHT0_M1    = 0;
+        IFM_HEIGHT1_M1    = 0;
+        IFM_IB_END        = 0;
+        IFM_REGION        = 0;
+        OFM_WIDTH_M1      = 0;
+        OFM_HEIGHT_M1     = 0;
+        OFM_DEPTH_M1      = 0;
+        OFM_PRECISION     = 0;
+        OFM_BLK_WIDTH_M1  = 0;
+        OFM_BLK_HEIGHT_M1 = 0;
+        OFM_BLK_DEPTH_M1  = 0;
+        OFM_ZERO_POINT    = 0;
+        OFM_WIDTH0_M1     = 0;
+        OFM_HEIGHT0_M1    = 0;
+        OFM_HEIGHT1_M1    = 0;
+        OFM_REGION        = 0;
+        KERNEL_WIDTH_M1   = 0;
+        KERNEL_HEIGHT_M1  = 0;
+        KERNEL_STRIDE     = 0;
+        PARALLEL_MODE     = 0;
+        ACC_FORMAT        = 0;
+        ACTIVATION        = 0;
+        ACTIVATION_MIN    = 0;
+        ACTIVATION_MAX    = 0;
+        WEIGHT_REGION     = 0;
+        SCALE_REGION      = 0;
+        AB_START          = 0;
+        BLOCKDEP          = 0;
+        DMA0_SRC_REGION   = 0;
+        DMA0_DST_REGION   = 0;
+        DMA0_SIZE0        = 0;
+        DMA0_SIZE1        = 0;
+        IFM2_BROADCAST    = 0;
+        IFM2_SCALAR       = 0;
+        IFM2_PRECISION    = 0;
+        IFM2_ZERO_POINT   = 0;
+        IFM2_WIDTH0_M1    = 0;
+        IFM2_HEIGHT0_M1   = 0;
+        IFM2_HEIGHT1_M1   = 0;
+        IFM2_IB_START     = 0;
+        IFM2_REGION       = 0;
+        IFM_BASE0         = 0;
+        IFM_BASE1         = 0;
+        IFM_BASE2         = 0;
+        IFM_BASE3         = 0;
+        IFM_STRIDE_X      = 0;
+        IFM_STRIDE_Y      = 0;
+        IFM_STRIDE_C      = 0;
+        OFM_BASE0         = 0;
+        OFM_BASE1         = 0;
+        OFM_BASE2         = 0;
+        OFM_BASE3         = 0;
+        OFM_STRIDE_X      = 0;
+        OFM_STRIDE_Y      = 0;
+        OFM_STRIDE_C      = 0;
+        WEIGHT_BASE       = 0;
+        WEIGHT_LENGTH     = 0;
+        SCALE_BASE        = 0;
+        SCALE_LENGTH      = 0;
+        OFM_SCALE         = 0;
+        OFM_SCALE_SHIFT   = 0;
+        OPA_SCALE         = 0;
+        OPA_SCALE_SHIFT   = 0;
+        OPB_SCALE         = 0;
+        DMA0_SRC          = 0;
+        DMA0_DST          = 0;
+        DMA0_LEN          = 0;
+        DMA0_SKIP0        = 0;
+        DMA0_SKIP1        = 0;
+        IFM2_BASE0        = 0;
+        IFM2_BASE1        = 0;
+        IFM2_BASE2        = 0;
+        IFM2_BASE3        = 0;
+        IFM2_STRIDE_X     = 0;
+        IFM2_STRIDE_Y     = 0;
+        IFM2_STRIDE_C     = 0;
+        WEIGHT1_BASE      = 0;
+        WEIGHT1_LENGTH    = 0;
+        SCALE1_BASE       = 0;
+        SCALE1_LENGTH     = 0;
+        REVISION          = 0;
+        PID4              = 4;
+        PID5              = 0;
+        PID6              = 0;
+        PID7              = 0;
+        PID0              = 129;
+        PID1              = 181;
+        PID2              = 11;
+        PID3              = 0;
+        CID0              = 13;
+        CID1              = 240;
+        CID2              = 5;
+        CID3              = 177;
+    }
+    uint32_t &operator[](const int addr_offset)
+    {
+        return reinterpret_cast<uint32_t *>(this)[addr_offset / 4];
+    }
+    access_type_t get_access_type(uint32_t offset)
+    {
+        switch (offset)
+        {
+        case 0:
+            return access_type_t::RO;
+        case 4:
+            return access_type_t::RO;
+        case 8:
+            return access_type_t::RW;
+        case 12:
+            return access_type_t::RW;
+        case 16:
+            return access_type_t::RW;
+        case 24:
+            return access_type_t::RO;
+        case 28:
+            return access_type_t::RW;
+        case 32:
+            return access_type_t::RW;
+        case 36:
+            return access_type_t::RO;
+        case 40:
+            return access_type_t::RO;
+        case 44:
+            return access_type_t::RW;
+        case 60:
+            return access_type_t::RW;
+        case 64:
+            return access_type_t::RW;
+        case 68:
+            return access_type_t::RW;
+        case 72:
+            return access_type_t::RW;
+        case 76:
+            return access_type_t::RW;
+        case 128:
+            return access_type_t::RW;
+        case 136:
+            return access_type_t::RW;
+        case 144:
+            return access_type_t::RW;
+        case 152:
+            return access_type_t::RW;
+        case 160:
+            return access_type_t::RW;
+        case 168:
+            return access_type_t::RW;
+        case 176:
+            return access_type_t::RW;
+        case 184:
+            return access_type_t::RW;
+        case 256:
+            return access_type_t::RO;
+        case 260:
+            return access_type_t::RO;
+        case 264:
+            return access_type_t::RO;
+        case 272:
+            return access_type_t::RO;
+        case 276:
+            return access_type_t::RO;
+        case 320:
+            return access_type_t::RW;
+        case 324:
+            return access_type_t::RW;
+        case 328:
+            return access_type_t::RW;
+        case 332:
+            return access_type_t::RW;
+        case 336:
+            return access_type_t::RW;
+        case 384:
+            return access_type_t::RW;
+        case 388:
+            return access_type_t::RW;
+        case 392:
+            return access_type_t::RW;
+        case 396:
+            return access_type_t::RW;
+        case 400:
+            return access_type_t::RW;
+        case 404:
+            return access_type_t::RW;
+        case 408:
+            return access_type_t::RW;
+        case 416:
+            return access_type_t::RW;
+        case 424:
+            return access_type_t::RW;
+        case 428:
+            return access_type_t::RW;
+        case 512:
+            return access_type_t::RO;
+        case 516:
+            return access_type_t::RO;
+        case 520:
+            return access_type_t::RO;
+        case 524:
+            return access_type_t::RO;
+        case 528:
+            return access_type_t::RO;
+        case 532:
+            return access_type_t::RO;
+        case 536:
+            return access_type_t::RO;
+        case 540:
+            return access_type_t::RO;
+        case 544:
+            return access_type_t::RO;
+        case 548:
+            return access_type_t::RO;
+        case 552:
+            return access_type_t::RO;
+        case 556:
+            return access_type_t::RO;
+        case 560:
+            return access_type_t::RO;
+        case 564:
+            return access_type_t::RO;
+        case 568:
+            return access_type_t::RO;
+        case 572:
+            return access_type_t::RO;
+        case 576:
+            return access_type_t::RO;
+        case 584:
+            return access_type_t::RO;
+        case 588:
+            return access_type_t::RO;
+        case 592:
+            return access_type_t::RO;
+        case 600:
+            return access_type_t::RO;
+        case 608:
+            return access_type_t::RO;
+        case 616:
+            return access_type_t::RO;
+        case 620:
+            return access_type_t::RO;
+        case 628:
+            return access_type_t::RO;
+        case 636:
+            return access_type_t::RO;
+        case 640:
+            return access_type_t::RO;
+        case 692:
+            return access_type_t::RO;
+        case 696:
+            return access_type_t::RO;
+        case 700:
+            return access_type_t::RO;
+        case 768:
+            return access_type_t::RW;
+        case 772:
+            return access_type_t::RW;
+        case 776:
+            return access_type_t::RW;
+        case 780:
+            return access_type_t::RW;
+        case 896:
+            return access_type_t::RW;
+        case 900:
+            return access_type_t::RW;
+        case 904:
+            return access_type_t::RW;
+        case 908:
+            return access_type_t::RW;
+        case 1024:
+            return access_type_t::RW;
+        case 1028:
+            return access_type_t::RW;
+        case 1032:
+            return access_type_t::RW;
+        case 1036:
+            return access_type_t::RW;
+        case 1040:
+            return access_type_t::RW;
+        case 1044:
+            return access_type_t::RW;
+        case 1048:
+            return access_type_t::RW;
+        case 1052:
+            return access_type_t::RW;
+        case 1056:
+            return access_type_t::RW;
+        case 1060:
+            return access_type_t::RW;
+        case 1064:
+            return access_type_t::RW;
+        case 1068:
+            return access_type_t::RW;
+        case 1072:
+            return access_type_t::RW;
+        case 1076:
+            return access_type_t::RW;
+        case 1080:
+            return access_type_t::RW;
+        case 1084:
+            return access_type_t::RW;
+        case 1088:
+            return access_type_t::RW;
+        case 1092:
+            return access_type_t::RW;
+        case 1096:
+            return access_type_t::RW;
+        case 1100:
+            return access_type_t::RW;
+        case 1104:
+            return access_type_t::RW;
+        case 1108:
+            return access_type_t::RW;
+        case 1112:
+            return access_type_t::RW;
+        case 1116:
+            return access_type_t::RW;
+        case 1120:
+            return access_type_t::RW;
+        case 1124:
+            return access_type_t::RW;
+        case 1128:
+            return access_type_t::RW;
+        case 1132:
+            return access_type_t::RW;
+        case 1136:
+            return access_type_t::RW;
+        case 1140:
+            return access_type_t::RW;
+        case 1144:
+            return access_type_t::RW;
+        case 1148:
+            return access_type_t::RW;
+        case 1152:
+            return access_type_t::RW;
+        case 1156:
+            return access_type_t::RW;
+        case 1160:
+            return access_type_t::RW;
+        case 1164:
+            return access_type_t::RW;
+        case 1168:
+            return access_type_t::RW;
+        case 1172:
+            return access_type_t::RW;
+        case 1176:
+            return access_type_t::RW;
+        case 1180:
+            return access_type_t::RW;
+        case 1184:
+            return access_type_t::RW;
+        case 1188:
+            return access_type_t::RW;
+        case 1192:
+            return access_type_t::RW;
+        case 1196:
+            return access_type_t::RW;
+        case 1200:
+            return access_type_t::RW;
+        case 1204:
+            return access_type_t::RW;
+        case 1208:
+            return access_type_t::RW;
+        case 1212:
+            return access_type_t::RW;
+        case 1216:
+            return access_type_t::RW;
+        case 1220:
+            return access_type_t::RW;
+        case 1224:
+            return access_type_t::RW;
+        case 1228:
+            return access_type_t::RW;
+        case 1232:
+            return access_type_t::RW;
+        case 1236:
+            return access_type_t::RW;
+        case 1240:
+            return access_type_t::RW;
+        case 1244:
+            return access_type_t::RW;
+        case 1248:
+            return access_type_t::RW;
+        case 1252:
+            return access_type_t::RW;
+        case 1256:
+            return access_type_t::RW;
+        case 1260:
+            return access_type_t::RW;
+        case 1264:
+            return access_type_t::RW;
+        case 1268:
+            return access_type_t::RW;
+        case 1272:
+            return access_type_t::RW;
+        case 1276:
+            return access_type_t::RW;
+        case 1280:
+            return access_type_t::RW;
+        case 1284:
+            return access_type_t::RW;
+        case 1288:
+            return access_type_t::RW;
+        case 1292:
+            return access_type_t::RW;
+        case 1296:
+            return access_type_t::RW;
+        case 1300:
+            return access_type_t::RW;
+        case 1304:
+            return access_type_t::RW;
+        case 1308:
+            return access_type_t::RW;
+        case 1312:
+            return access_type_t::RW;
+        case 1316:
+            return access_type_t::RW;
+        case 1320:
+            return access_type_t::RW;
+        case 1324:
+            return access_type_t::RW;
+        case 1328:
+            return access_type_t::RW;
+        case 1332:
+            return access_type_t::RW;
+        case 1336:
+            return access_type_t::RW;
+        case 1340:
+            return access_type_t::RW;
+        case 1344:
+            return access_type_t::RW;
+        case 1348:
+            return access_type_t::RW;
+        case 1352:
+            return access_type_t::RW;
+        case 1356:
+            return access_type_t::RW;
+        case 1360:
+            return access_type_t::RW;
+        case 1364:
+            return access_type_t::RW;
+        case 1368:
+            return access_type_t::RW;
+        case 1372:
+            return access_type_t::RW;
+        case 1376:
+            return access_type_t::RW;
+        case 1380:
+            return access_type_t::RW;
+        case 1384:
+            return access_type_t::RW;
+        case 1388:
+            return access_type_t::RW;
+        case 1392:
+            return access_type_t::RW;
+        case 1396:
+            return access_type_t::RW;
+        case 1400:
+            return access_type_t::RW;
+        case 1404:
+            return access_type_t::RW;
+        case 1408:
+            return access_type_t::RW;
+        case 1412:
+            return access_type_t::RW;
+        case 1416:
+            return access_type_t::RW;
+        case 1420:
+            return access_type_t::RW;
+        case 1424:
+            return access_type_t::RW;
+        case 1428:
+            return access_type_t::RW;
+        case 1432:
+            return access_type_t::RW;
+        case 1436:
+            return access_type_t::RW;
+        case 1440:
+            return access_type_t::RW;
+        case 1444:
+            return access_type_t::RW;
+        case 1448:
+            return access_type_t::RW;
+        case 1452:
+            return access_type_t::RW;
+        case 1456:
+            return access_type_t::RW;
+        case 1460:
+            return access_type_t::RW;
+        case 1464:
+            return access_type_t::RW;
+        case 1468:
+            return access_type_t::RW;
+        case 1472:
+            return access_type_t::RW;
+        case 1476:
+            return access_type_t::RW;
+        case 1480:
+            return access_type_t::RW;
+        case 1484:
+            return access_type_t::RW;
+        case 1488:
+            return access_type_t::RW;
+        case 1492:
+            return access_type_t::RW;
+        case 1496:
+            return access_type_t::RW;
+        case 1500:
+            return access_type_t::RW;
+        case 1504:
+            return access_type_t::RW;
+        case 1508:
+            return access_type_t::RW;
+        case 1512:
+            return access_type_t::RW;
+        case 1516:
+            return access_type_t::RW;
+        case 1520:
+            return access_type_t::RW;
+        case 1524:
+            return access_type_t::RW;
+        case 1528:
+            return access_type_t::RW;
+        case 1532:
+            return access_type_t::RW;
+        case 1536:
+            return access_type_t::RW;
+        case 1540:
+            return access_type_t::RW;
+        case 1544:
+            return access_type_t::RW;
+        case 1548:
+            return access_type_t::RW;
+        case 1552:
+            return access_type_t::RW;
+        case 1556:
+            return access_type_t::RW;
+        case 1560:
+            return access_type_t::RW;
+        case 1564:
+            return access_type_t::RW;
+        case 1568:
+            return access_type_t::RW;
+        case 1572:
+            return access_type_t::RW;
+        case 1576:
+            return access_type_t::RW;
+        case 1580:
+            return access_type_t::RW;
+        case 1584:
+            return access_type_t::RW;
+        case 1588:
+            return access_type_t::RW;
+        case 1592:
+            return access_type_t::RW;
+        case 1596:
+            return access_type_t::RW;
+        case 1600:
+            return access_type_t::RW;
+        case 1604:
+            return access_type_t::RW;
+        case 1608:
+            return access_type_t::RW;
+        case 1612:
+            return access_type_t::RW;
+        case 1616:
+            return access_type_t::RW;
+        case 1620:
+            return access_type_t::RW;
+        case 1624:
+            return access_type_t::RW;
+        case 1628:
+            return access_type_t::RW;
+        case 1632:
+            return access_type_t::RW;
+        case 1636:
+            return access_type_t::RW;
+        case 1640:
+            return access_type_t::RW;
+        case 1644:
+            return access_type_t::RW;
+        case 1648:
+            return access_type_t::RW;
+        case 1652:
+            return access_type_t::RW;
+        case 1656:
+            return access_type_t::RW;
+        case 1660:
+            return access_type_t::RW;
+        case 1664:
+            return access_type_t::RW;
+        case 1668:
+            return access_type_t::RW;
+        case 1672:
+            return access_type_t::RW;
+        case 1676:
+            return access_type_t::RW;
+        case 1680:
+            return access_type_t::RW;
+        case 1684:
+            return access_type_t::RW;
+        case 1688:
+            return access_type_t::RW;
+        case 1692:
+            return access_type_t::RW;
+        case 1696:
+            return access_type_t::RW;
+        case 1700:
+            return access_type_t::RW;
+        case 1704:
+            return access_type_t::RW;
+        case 1708:
+            return access_type_t::RW;
+        case 1712:
+            return access_type_t::RW;
+        case 1716:
+            return access_type_t::RW;
+        case 1720:
+            return access_type_t::RW;
+        case 1724:
+            return access_type_t::RW;
+        case 1728:
+            return access_type_t::RW;
+        case 1732:
+            return access_type_t::RW;
+        case 1736:
+            return access_type_t::RW;
+        case 1740:
+            return access_type_t::RW;
+        case 1744:
+            return access_type_t::RW;
+        case 1748:
+            return access_type_t::RW;
+        case 1752:
+            return access_type_t::RW;
+        case 1756:
+            return access_type_t::RW;
+        case 1760:
+            return access_type_t::RW;
+        case 1764:
+            return access_type_t::RW;
+        case 1768:
+            return access_type_t::RW;
+        case 1772:
+            return access_type_t::RW;
+        case 1776:
+            return access_type_t::RW;
+        case 1780:
+            return access_type_t::RW;
+        case 1784:
+            return access_type_t::RW;
+        case 1788:
+            return access_type_t::RW;
+        case 1792:
+            return access_type_t::RW;
+        case 1796:
+            return access_type_t::RW;
+        case 1800:
+            return access_type_t::RW;
+        case 1804:
+            return access_type_t::RW;
+        case 1808:
+            return access_type_t::RW;
+        case 1812:
+            return access_type_t::RW;
+        case 1816:
+            return access_type_t::RW;
+        case 1820:
+            return access_type_t::RW;
+        case 1824:
+            return access_type_t::RW;
+        case 1828:
+            return access_type_t::RW;
+        case 1832:
+            return access_type_t::RW;
+        case 1836:
+            return access_type_t::RW;
+        case 1840:
+            return access_type_t::RW;
+        case 1844:
+            return access_type_t::RW;
+        case 1848:
+            return access_type_t::RW;
+        case 1852:
+            return access_type_t::RW;
+        case 1856:
+            return access_type_t::RW;
+        case 1860:
+            return access_type_t::RW;
+        case 1864:
+            return access_type_t::RW;
+        case 1868:
+            return access_type_t::RW;
+        case 1872:
+            return access_type_t::RW;
+        case 1876:
+            return access_type_t::RW;
+        case 1880:
+            return access_type_t::RW;
+        case 1884:
+            return access_type_t::RW;
+        case 1888:
+            return access_type_t::RW;
+        case 1892:
+            return access_type_t::RW;
+        case 1896:
+            return access_type_t::RW;
+        case 1900:
+            return access_type_t::RW;
+        case 1904:
+            return access_type_t::RW;
+        case 1908:
+            return access_type_t::RW;
+        case 1912:
+            return access_type_t::RW;
+        case 1916:
+            return access_type_t::RW;
+        case 1920:
+            return access_type_t::RW;
+        case 1924:
+            return access_type_t::RW;
+        case 1928:
+            return access_type_t::RW;
+        case 1932:
+            return access_type_t::RW;
+        case 1936:
+            return access_type_t::RW;
+        case 1940:
+            return access_type_t::RW;
+        case 1944:
+            return access_type_t::RW;
+        case 1948:
+            return access_type_t::RW;
+        case 1952:
+            return access_type_t::RW;
+        case 1956:
+            return access_type_t::RW;
+        case 1960:
+            return access_type_t::RW;
+        case 1964:
+            return access_type_t::RW;
+        case 1968:
+            return access_type_t::RW;
+        case 1972:
+            return access_type_t::RW;
+        case 1976:
+            return access_type_t::RW;
+        case 1980:
+            return access_type_t::RW;
+        case 1984:
+            return access_type_t::RW;
+        case 1988:
+            return access_type_t::RW;
+        case 1992:
+            return access_type_t::RW;
+        case 1996:
+            return access_type_t::RW;
+        case 2000:
+            return access_type_t::RW;
+        case 2004:
+            return access_type_t::RW;
+        case 2008:
+            return access_type_t::RW;
+        case 2012:
+            return access_type_t::RW;
+        case 2016:
+            return access_type_t::RW;
+        case 2020:
+            return access_type_t::RW;
+        case 2024:
+            return access_type_t::RW;
+        case 2028:
+            return access_type_t::RW;
+        case 2032:
+            return access_type_t::RW;
+        case 2036:
+            return access_type_t::RW;
+        case 2040:
+            return access_type_t::RW;
+        case 2044:
+            return access_type_t::RW;
+        case 2048:
+            return access_type_t::RW;
+        case 2052:
+            return access_type_t::RW;
+        case 2056:
+            return access_type_t::RW;
+        case 2060:
+            return access_type_t::RW;
+        case 2064:
+            return access_type_t::RW;
+        case 2068:
+            return access_type_t::RW;
+        case 2076:
+            return access_type_t::RW;
+        case 2084:
+            return access_type_t::RW;
+        case 2088:
+            return access_type_t::RW;
+        case 2092:
+            return access_type_t::RW;
+        case 2096:
+            return access_type_t::RW;
+        case 2100:
+            return access_type_t::RW;
+        case 2108:
+            return access_type_t::RW;
+        case 2116:
+            return access_type_t::RW;
+        case 2120:
+            return access_type_t::RW;
+        case 2124:
+            return access_type_t::RW;
+        case 2128:
+            return access_type_t::RW;
+        case 2132:
+            return access_type_t::RW;
+        case 2136:
+            return access_type_t::RW;
+        case 2140:
+            return access_type_t::RW;
+        case 2144:
+            return access_type_t::RW;
+        case 2152:
+            return access_type_t::RW;
+        case 2156:
+            return access_type_t::RW;
+        case 2160:
+            return access_type_t::RW;
+        case 2172:
+            return access_type_t::RW;
+        case 2176:
+            return access_type_t::RW;
+        case 2180:
+            return access_type_t::RW;
+        case 2184:
+            return access_type_t::RW;
+        case 2188:
+            return access_type_t::RW;
+        case 2192:
+            return access_type_t::RW;
+        case 2196:
+            return access_type_t::RW;
+        case 2200:
+            return access_type_t::RW;
+        case 2204:
+            return access_type_t::RW;
+        case 2208:
+            return access_type_t::RW;
+        case 2212:
+            return access_type_t::RW;
+        case 2228:
+            return access_type_t::RW;
+        case 2236:
+            return access_type_t::RW;
+        case 2240:
+            return access_type_t::RW;
+        case 2244:
+            return access_type_t::RW;
+        case 2248:
+            return access_type_t::RW;
+        case 2252:
+            return access_type_t::RW;
+        case 2304:
+            return access_type_t::RW;
+        case 2308:
+            return access_type_t::RW;
+        case 2324:
+            return access_type_t::RW;
+        case 2340:
+            return access_type_t::RW;
+        case 2344:
+            return access_type_t::RW;
+        case 2348:
+            return access_type_t::RW;
+        case 2352:
+            return access_type_t::RW;
+        case 2356:
+            return access_type_t::RW;
+        case 2364:
+            return access_type_t::RW;
+        case 2560:
+            return access_type_t::RW;
+        case 2568:
+            return access_type_t::RW;
+        case 2576:
+            return access_type_t::RW;
+        case 2584:
+            return access_type_t::RW;
+        case 2592:
+            return access_type_t::RW;
+        case 2600:
+            return access_type_t::RW;
+        case 2608:
+            return access_type_t::RW;
+        case 2624:
+            return access_type_t::RW;
+        case 2632:
+            return access_type_t::RW;
+        case 2640:
+            return access_type_t::RW;
+        case 2648:
+            return access_type_t::RW;
+        case 2656:
+            return access_type_t::RW;
+        case 2664:
+            return access_type_t::RW;
+        case 2672:
+            return access_type_t::RW;
+        case 2688:
+            return access_type_t::RW;
+        case 2696:
+            return access_type_t::RW;
+        case 2704:
+            return access_type_t::RW;
+        case 2712:
+            return access_type_t::RW;
+        case 2720:
+            return access_type_t::RW;
+        case 2724:
+            return access_type_t::RW;
+        case 2728:
+            return access_type_t::RW;
+        case 2732:
+            return access_type_t::RW;
+        case 2736:
+            return access_type_t::RW;
+        case 2752:
+            return access_type_t::RW;
+        case 2760:
+            return access_type_t::RW;
+        case 2768:
+            return access_type_t::RW;
+        case 2776:
+            return access_type_t::RW;
+        case 2784:
+            return access_type_t::RW;
+        case 2816:
+            return access_type_t::RW;
+        case 2824:
+            return access_type_t::RW;
+        case 2832:
+            return access_type_t::RW;
+        case 2840:
+            return access_type_t::RW;
+        case 2848:
+            return access_type_t::RW;
+        case 2856:
+            return access_type_t::RW;
+        case 2864:
+            return access_type_t::RW;
+        case 2880:
+            return access_type_t::RW;
+        case 2888:
+            return access_type_t::RW;
+        case 2896:
+            return access_type_t::RW;
+        case 2904:
+            return access_type_t::RW;
+        case 4032:
+            return access_type_t::RO;
+        case 4048:
+            return access_type_t::RO;
+        case 4052:
+            return access_type_t::RO;
+        case 4056:
+            return access_type_t::RO;
+        case 4060:
+            return access_type_t::RO;
+        case 4064:
+            return access_type_t::RO;
+        case 4068:
+            return access_type_t::RO;
+        case 4072:
+            return access_type_t::RO;
+        case 4076:
+            return access_type_t::RO;
+        case 4080:
+            return access_type_t::RO;
+        case 4084:
+            return access_type_t::RO;
+        case 4088:
+            return access_type_t::RO;
+        case 4092:
+            return access_type_t::RO;
+        default:
+            return access_type_t::RO;
+        }
+    }
+#endif
+};
+
+#ifdef __cplusplus
+struct isa
+{
+#ifdef NPU_DISASSEMBLE
+    static int disassemble(const uint32_t *in,
+                           std::string &op,
+                           std::vector<std::pair<std::string, std::string>> &fields)
+    {
+        switch (*in & 0xffff)
+        {
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_STOP):
+        {
+            const npu_op_stop_t &v = *reinterpret_cast<const npu_op_stop_t *>(in);
+            op                     = "NPU_OP_STOP";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_IRQ):
+        {
+            const npu_op_irq_t &v = *reinterpret_cast<const npu_op_irq_t *>(in);
+            op                    = "NPU_OP_IRQ";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_CONV):
+        {
+            const npu_op_conv_t &v = *reinterpret_cast<const npu_op_conv_t *>(in);
+            op                     = "NPU_OP_CONV";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DEPTHWISE):
+        {
+            const npu_op_depthwise_t &v = *reinterpret_cast<const npu_op_depthwise_t *>(in);
+            op                          = "NPU_OP_DEPTHWISE";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_POOL):
+        {
+            const npu_op_pool_t &v = *reinterpret_cast<const npu_op_pool_t *>(in);
+            op                     = "NPU_OP_POOL";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_ELEMENTWISE):
+        {
+            const npu_op_elementwise_t &v = *reinterpret_cast<const npu_op_elementwise_t *>(in);
+            op                            = "NPU_OP_ELEMENTWISE";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DMA_START):
+        {
+            const npu_op_dma_start_t &v = *reinterpret_cast<const npu_op_dma_start_t *>(in);
+            op                          = "NPU_OP_DMA_START";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DMA_WAIT):
+        {
+            const npu_op_dma_wait_t &v = *reinterpret_cast<const npu_op_dma_wait_t *>(in);
+            op                         = "NPU_OP_DMA_WAIT";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_KERNEL_WAIT):
+        {
+            const npu_op_kernel_wait_t &v = *reinterpret_cast<const npu_op_kernel_wait_t *>(in);
+            op                            = "NPU_OP_KERNEL_WAIT";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_PMU_MASK):
+        {
+            const npu_op_pmu_mask_t &v = *reinterpret_cast<const npu_op_pmu_mask_t *>(in);
+            op                         = "NPU_OP_PMU_MASK";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_TOP):
+        {
+            const npu_set_ifm_pad_top_t &v = *reinterpret_cast<const npu_set_ifm_pad_top_t *>(in);
+            op                             = "NPU_SET_IFM_PAD_TOP";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_LEFT):
+        {
+            const npu_set_ifm_pad_left_t &v = *reinterpret_cast<const npu_set_ifm_pad_left_t *>(in);
+            op                              = "NPU_SET_IFM_PAD_LEFT";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_RIGHT):
+        {
+            const npu_set_ifm_pad_right_t &v = *reinterpret_cast<const npu_set_ifm_pad_right_t *>(in);
+            op                               = "NPU_SET_IFM_PAD_RIGHT";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_BOTTOM):
+        {
+            const npu_set_ifm_pad_bottom_t &v = *reinterpret_cast<const npu_set_ifm_pad_bottom_t *>(in);
+            op                                = "NPU_SET_IFM_PAD_BOTTOM";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_DEPTH_M1):
+        {
+            const npu_set_ifm_depth_m1_t &v = *reinterpret_cast<const npu_set_ifm_depth_m1_t *>(in);
+            op                              = "NPU_SET_IFM_DEPTH_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PRECISION):
+        {
+            const npu_set_ifm_precision_t &v = *reinterpret_cast<const npu_set_ifm_precision_t *>(in);
+            op                               = "NPU_SET_IFM_PRECISION";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_UPSCALE):
+        {
+            const npu_set_ifm_upscale_t &v = *reinterpret_cast<const npu_set_ifm_upscale_t *>(in);
+            op                             = "NPU_SET_IFM_UPSCALE";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_ZERO_POINT):
+        {
+            const npu_set_ifm_zero_point_t &v = *reinterpret_cast<const npu_set_ifm_zero_point_t *>(in);
+            op                                = "NPU_SET_IFM_ZERO_POINT";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_WIDTH0_M1):
+        {
+            const npu_set_ifm_width0_m1_t &v = *reinterpret_cast<const npu_set_ifm_width0_m1_t *>(in);
+            op                               = "NPU_SET_IFM_WIDTH0_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT0_M1):
+        {
+            const npu_set_ifm_height0_m1_t &v = *reinterpret_cast<const npu_set_ifm_height0_m1_t *>(in);
+            op                                = "NPU_SET_IFM_HEIGHT0_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT1_M1):
+        {
+            const npu_set_ifm_height1_m1_t &v = *reinterpret_cast<const npu_set_ifm_height1_m1_t *>(in);
+            op                                = "NPU_SET_IFM_HEIGHT1_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_IB_END):
+        {
+            const npu_set_ifm_ib_end_t &v = *reinterpret_cast<const npu_set_ifm_ib_end_t *>(in);
+            op                            = "NPU_SET_IFM_IB_END";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_REGION):
+        {
+            const npu_set_ifm_region_t &v = *reinterpret_cast<const npu_set_ifm_region_t *>(in);
+            op                            = "NPU_SET_IFM_REGION";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH_M1):
+        {
+            const npu_set_ofm_width_m1_t &v = *reinterpret_cast<const npu_set_ofm_width_m1_t *>(in);
+            op                              = "NPU_SET_OFM_WIDTH_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT_M1):
+        {
+            const npu_set_ofm_height_m1_t &v = *reinterpret_cast<const npu_set_ofm_height_m1_t *>(in);
+            op                               = "NPU_SET_OFM_HEIGHT_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_DEPTH_M1):
+        {
+            const npu_set_ofm_depth_m1_t &v = *reinterpret_cast<const npu_set_ofm_depth_m1_t *>(in);
+            op                              = "NPU_SET_OFM_DEPTH_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_PRECISION):
+        {
+            const npu_set_ofm_precision_t &v = *reinterpret_cast<const npu_set_ofm_precision_t *>(in);
+            op                               = "NPU_SET_OFM_PRECISION";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_WIDTH_M1):
+        {
+            const npu_set_ofm_blk_width_m1_t &v = *reinterpret_cast<const npu_set_ofm_blk_width_m1_t *>(in);
+            op                                  = "NPU_SET_OFM_BLK_WIDTH_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_HEIGHT_M1):
+        {
+            const npu_set_ofm_blk_height_m1_t &v = *reinterpret_cast<const npu_set_ofm_blk_height_m1_t *>(in);
+            op                                   = "NPU_SET_OFM_BLK_HEIGHT_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_DEPTH_M1):
+        {
+            const npu_set_ofm_blk_depth_m1_t &v = *reinterpret_cast<const npu_set_ofm_blk_depth_m1_t *>(in);
+            op                                  = "NPU_SET_OFM_BLK_DEPTH_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_ZERO_POINT):
+        {
+            const npu_set_ofm_zero_point_t &v = *reinterpret_cast<const npu_set_ofm_zero_point_t *>(in);
+            op                                = "NPU_SET_OFM_ZERO_POINT";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH0_M1):
+        {
+            const npu_set_ofm_width0_m1_t &v = *reinterpret_cast<const npu_set_ofm_width0_m1_t *>(in);
+            op                               = "NPU_SET_OFM_WIDTH0_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT0_M1):
+        {
+            const npu_set_ofm_height0_m1_t &v = *reinterpret_cast<const npu_set_ofm_height0_m1_t *>(in);
+            op                                = "NPU_SET_OFM_HEIGHT0_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT1_M1):
+        {
+            const npu_set_ofm_height1_m1_t &v = *reinterpret_cast<const npu_set_ofm_height1_m1_t *>(in);
+            op                                = "NPU_SET_OFM_HEIGHT1_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_REGION):
+        {
+            const npu_set_ofm_region_t &v = *reinterpret_cast<const npu_set_ofm_region_t *>(in);
+            op                            = "NPU_SET_OFM_REGION";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_WIDTH_M1):
+        {
+            const npu_set_kernel_width_m1_t &v = *reinterpret_cast<const npu_set_kernel_width_m1_t *>(in);
+            op                                 = "NPU_SET_KERNEL_WIDTH_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_HEIGHT_M1):
+        {
+            const npu_set_kernel_height_m1_t &v = *reinterpret_cast<const npu_set_kernel_height_m1_t *>(in);
+            op                                  = "NPU_SET_KERNEL_HEIGHT_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_STRIDE):
+        {
+            const npu_set_kernel_stride_t &v = *reinterpret_cast<const npu_set_kernel_stride_t *>(in);
+            op                               = "NPU_SET_KERNEL_STRIDE";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_PARALLEL_MODE):
+        {
+            const npu_set_parallel_mode_t &v = *reinterpret_cast<const npu_set_parallel_mode_t *>(in);
+            op                               = "NPU_SET_PARALLEL_MODE";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACC_FORMAT):
+        {
+            const npu_set_acc_format_t &v = *reinterpret_cast<const npu_set_acc_format_t *>(in);
+            op                            = "NPU_SET_ACC_FORMAT";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION):
+        {
+            const npu_set_activation_t &v = *reinterpret_cast<const npu_set_activation_t *>(in);
+            op                            = "NPU_SET_ACTIVATION";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MIN):
+        {
+            const npu_set_activation_min_t &v = *reinterpret_cast<const npu_set_activation_min_t *>(in);
+            op                                = "NPU_SET_ACTIVATION_MIN";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MAX):
+        {
+            const npu_set_activation_max_t &v = *reinterpret_cast<const npu_set_activation_max_t *>(in);
+            op                                = "NPU_SET_ACTIVATION_MAX";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_WEIGHT_REGION):
+        {
+            const npu_set_weight_region_t &v = *reinterpret_cast<const npu_set_weight_region_t *>(in);
+            op                               = "NPU_SET_WEIGHT_REGION";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_SCALE_REGION):
+        {
+            const npu_set_scale_region_t &v = *reinterpret_cast<const npu_set_scale_region_t *>(in);
+            op                              = "NPU_SET_SCALE_REGION";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_AB_START):
+        {
+            const npu_set_ab_start_t &v = *reinterpret_cast<const npu_set_ab_start_t *>(in);
+            op                          = "NPU_SET_AB_START";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_BLOCKDEP):
+        {
+            const npu_set_blockdep_t &v = *reinterpret_cast<const npu_set_blockdep_t *>(in);
+            op                          = "NPU_SET_BLOCKDEP";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SRC_REGION):
+        {
+            const npu_set_dma0_src_region_t &v = *reinterpret_cast<const npu_set_dma0_src_region_t *>(in);
+            op                                 = "NPU_SET_DMA0_SRC_REGION";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_DST_REGION):
+        {
+            const npu_set_dma0_dst_region_t &v = *reinterpret_cast<const npu_set_dma0_dst_region_t *>(in);
+            op                                 = "NPU_SET_DMA0_DST_REGION";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE0):
+        {
+            const npu_set_dma0_size0_t &v = *reinterpret_cast<const npu_set_dma0_size0_t *>(in);
+            op                            = "NPU_SET_DMA0_SIZE0";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE1):
+        {
+            const npu_set_dma0_size1_t &v = *reinterpret_cast<const npu_set_dma0_size1_t *>(in);
+            op                            = "NPU_SET_DMA0_SIZE1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_BROADCAST):
+        {
+            const npu_set_ifm2_broadcast_t &v = *reinterpret_cast<const npu_set_ifm2_broadcast_t *>(in);
+            op                                = "NPU_SET_IFM2_BROADCAST";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_SCALAR):
+        {
+            const npu_set_ifm2_scalar_t &v = *reinterpret_cast<const npu_set_ifm2_scalar_t *>(in);
+            op                             = "NPU_SET_IFM2_SCALAR";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_PRECISION):
+        {
+            const npu_set_ifm2_precision_t &v = *reinterpret_cast<const npu_set_ifm2_precision_t *>(in);
+            op                                = "NPU_SET_IFM2_PRECISION";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_ZERO_POINT):
+        {
+            const npu_set_ifm2_zero_point_t &v = *reinterpret_cast<const npu_set_ifm2_zero_point_t *>(in);
+            op                                 = "NPU_SET_IFM2_ZERO_POINT";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_WIDTH0_M1):
+        {
+            const npu_set_ifm2_width0_m1_t &v = *reinterpret_cast<const npu_set_ifm2_width0_m1_t *>(in);
+            op                                = "NPU_SET_IFM2_WIDTH0_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT0_M1):
+        {
+            const npu_set_ifm2_height0_m1_t &v = *reinterpret_cast<const npu_set_ifm2_height0_m1_t *>(in);
+            op                                 = "NPU_SET_IFM2_HEIGHT0_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT1_M1):
+        {
+            const npu_set_ifm2_height1_m1_t &v = *reinterpret_cast<const npu_set_ifm2_height1_m1_t *>(in);
+            op                                 = "NPU_SET_IFM2_HEIGHT1_M1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_IB_START):
+        {
+            const npu_set_ifm2_ib_start_t &v = *reinterpret_cast<const npu_set_ifm2_ib_start_t *>(in);
+            op                               = "NPU_SET_IFM2_IB_START";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_REGION):
+        {
+            const npu_set_ifm2_region_t &v = *reinterpret_cast<const npu_set_ifm2_region_t *>(in);
+            op                             = "NPU_SET_IFM2_REGION";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE0):
+        {
+            const npu_set_ifm_base0_t &v = *reinterpret_cast<const npu_set_ifm_base0_t *>(in);
+            op                           = "NPU_SET_IFM_BASE0";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE1):
+        {
+            const npu_set_ifm_base1_t &v = *reinterpret_cast<const npu_set_ifm_base1_t *>(in);
+            op                           = "NPU_SET_IFM_BASE1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE2):
+        {
+            const npu_set_ifm_base2_t &v = *reinterpret_cast<const npu_set_ifm_base2_t *>(in);
+            op                           = "NPU_SET_IFM_BASE2";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE3):
+        {
+            const npu_set_ifm_base3_t &v = *reinterpret_cast<const npu_set_ifm_base3_t *>(in);
+            op                           = "NPU_SET_IFM_BASE3";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_X):
+        {
+            const npu_set_ifm_stride_x_t &v = *reinterpret_cast<const npu_set_ifm_stride_x_t *>(in);
+            op                              = "NPU_SET_IFM_STRIDE_X";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_Y):
+        {
+            const npu_set_ifm_stride_y_t &v = *reinterpret_cast<const npu_set_ifm_stride_y_t *>(in);
+            op                              = "NPU_SET_IFM_STRIDE_Y";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_C):
+        {
+            const npu_set_ifm_stride_c_t &v = *reinterpret_cast<const npu_set_ifm_stride_c_t *>(in);
+            op                              = "NPU_SET_IFM_STRIDE_C";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE0):
+        {
+            const npu_set_ofm_base0_t &v = *reinterpret_cast<const npu_set_ofm_base0_t *>(in);
+            op                           = "NPU_SET_OFM_BASE0";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE1):
+        {
+            const npu_set_ofm_base1_t &v = *reinterpret_cast<const npu_set_ofm_base1_t *>(in);
+            op                           = "NPU_SET_OFM_BASE1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE2):
+        {
+            const npu_set_ofm_base2_t &v = *reinterpret_cast<const npu_set_ofm_base2_t *>(in);
+            op                           = "NPU_SET_OFM_BASE2";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE3):
+        {
+            const npu_set_ofm_base3_t &v = *reinterpret_cast<const npu_set_ofm_base3_t *>(in);
+            op                           = "NPU_SET_OFM_BASE3";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_X):
+        {
+            const npu_set_ofm_stride_x_t &v = *reinterpret_cast<const npu_set_ofm_stride_x_t *>(in);
+            op                              = "NPU_SET_OFM_STRIDE_X";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_Y):
+        {
+            const npu_set_ofm_stride_y_t &v = *reinterpret_cast<const npu_set_ofm_stride_y_t *>(in);
+            op                              = "NPU_SET_OFM_STRIDE_Y";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_C):
+        {
+            const npu_set_ofm_stride_c_t &v = *reinterpret_cast<const npu_set_ofm_stride_c_t *>(in);
+            op                              = "NPU_SET_OFM_STRIDE_C";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_BASE):
+        {
+            const npu_set_weight_base_t &v = *reinterpret_cast<const npu_set_weight_base_t *>(in);
+            op                             = "NPU_SET_WEIGHT_BASE";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_LENGTH):
+        {
+            const npu_set_weight_length_t &v = *reinterpret_cast<const npu_set_weight_length_t *>(in);
+            op                               = "NPU_SET_WEIGHT_LENGTH";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_BASE):
+        {
+            const npu_set_scale_base_t &v = *reinterpret_cast<const npu_set_scale_base_t *>(in);
+            op                            = "NPU_SET_SCALE_BASE";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_LENGTH):
+        {
+            const npu_set_scale_length_t &v = *reinterpret_cast<const npu_set_scale_length_t *>(in);
+            op                              = "NPU_SET_SCALE_LENGTH";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_SCALE):
+        {
+            const npu_set_ofm_scale_t &v = *reinterpret_cast<const npu_set_ofm_scale_t *>(in);
+            op                           = "NPU_SET_OFM_SCALE";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPA_SCALE):
+        {
+            const npu_set_opa_scale_t &v = *reinterpret_cast<const npu_set_opa_scale_t *>(in);
+            op                           = "NPU_SET_OPA_SCALE";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPB_SCALE):
+        {
+            const npu_set_opb_scale_t &v = *reinterpret_cast<const npu_set_opb_scale_t *>(in);
+            op                           = "NPU_SET_OPB_SCALE";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SRC):
+        {
+            const npu_set_dma0_src_t &v = *reinterpret_cast<const npu_set_dma0_src_t *>(in);
+            op                          = "NPU_SET_DMA0_SRC";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_DST):
+        {
+            const npu_set_dma0_dst_t &v = *reinterpret_cast<const npu_set_dma0_dst_t *>(in);
+            op                          = "NPU_SET_DMA0_DST";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_LEN):
+        {
+            const npu_set_dma0_len_t &v = *reinterpret_cast<const npu_set_dma0_len_t *>(in);
+            op                          = "NPU_SET_DMA0_LEN";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SKIP0):
+        {
+            const npu_set_dma0_skip0_t &v = *reinterpret_cast<const npu_set_dma0_skip0_t *>(in);
+            op                            = "NPU_SET_DMA0_SKIP0";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SKIP1):
+        {
+            const npu_set_dma0_skip1_t &v = *reinterpret_cast<const npu_set_dma0_skip1_t *>(in);
+            op                            = "NPU_SET_DMA0_SKIP1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE0):
+        {
+            const npu_set_ifm2_base0_t &v = *reinterpret_cast<const npu_set_ifm2_base0_t *>(in);
+            op                            = "NPU_SET_IFM2_BASE0";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE1):
+        {
+            const npu_set_ifm2_base1_t &v = *reinterpret_cast<const npu_set_ifm2_base1_t *>(in);
+            op                            = "NPU_SET_IFM2_BASE1";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE2):
+        {
+            const npu_set_ifm2_base2_t &v = *reinterpret_cast<const npu_set_ifm2_base2_t *>(in);
+            op                            = "NPU_SET_IFM2_BASE2";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE3):
+        {
+            const npu_set_ifm2_base3_t &v = *reinterpret_cast<const npu_set_ifm2_base3_t *>(in);
+            op                            = "NPU_SET_IFM2_BASE3";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_X):
+        {
+            const npu_set_ifm2_stride_x_t &v = *reinterpret_cast<const npu_set_ifm2_stride_x_t *>(in);
+            op                               = "NPU_SET_IFM2_STRIDE_X";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_Y):
+        {
+            const npu_set_ifm2_stride_y_t &v = *reinterpret_cast<const npu_set_ifm2_stride_y_t *>(in);
+            op                               = "NPU_SET_IFM2_STRIDE_Y";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_C):
+        {
+            const npu_set_ifm2_stride_c_t &v = *reinterpret_cast<const npu_set_ifm2_stride_c_t *>(in);
+            op                               = "NPU_SET_IFM2_STRIDE_C";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT1_BASE):
+        {
+            const npu_set_weight1_base_t &v = *reinterpret_cast<const npu_set_weight1_base_t *>(in);
+            op                              = "NPU_SET_WEIGHT1_BASE";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT1_LENGTH):
+        {
+            const npu_set_weight1_length_t &v = *reinterpret_cast<const npu_set_weight1_length_t *>(in);
+            op                                = "NPU_SET_WEIGHT1_LENGTH";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE1_BASE):
+        {
+            const npu_set_scale1_base_t &v = *reinterpret_cast<const npu_set_scale1_base_t *>(in);
+            op                             = "NPU_SET_SCALE1_BASE";
+            v.disassemble(fields);
+            break;
+        }
+        case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) |
+            static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE1_LENGTH):
+        {
+            const npu_set_scale1_length_t &v = *reinterpret_cast<const npu_set_scale1_length_t *>(in);
+            op                               = "NPU_SET_SCALE1_LENGTH";
+            v.disassemble(fields);
+            break;
+        }
+        }
+        return (*in & (3 << 14)) != 0 ? 2 : 1;
+    }
+#endif
+#endif
+    // Signal the end of command stream
+    struct npu_op_stop_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t mask : 16;   //  Encoding for 16-bit mask value
+#ifdef __cplusplus
+      public:
+        npu_op_stop_t(uint32_t _mask) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_STOP)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            mask(static_cast<uint16_t>(_mask) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_op_stop_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_STOP)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), mask(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_STOP) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_STOP);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_op_stop_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_op_stop_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_mask() const
+        {
+            return static_cast<uint32_t>(mask);
+        }
+        CONSTEXPR npu_op_stop_t &set_mask(uint32_t value)
+        {
+            mask = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("mask", std::to_string(mask)));
+        }
+#endif
+#endif
+    };
+    // Raises an IRQ to the host
+    struct npu_op_irq_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t mask : 16;   //  Encoding for 16-bit mask value
+#ifdef __cplusplus
+      public:
+        npu_op_irq_t(uint32_t _mask) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_IRQ)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            mask(static_cast<uint16_t>(_mask) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_op_irq_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_IRQ)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), mask(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_IRQ) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_IRQ);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_op_irq_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_op_irq_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_mask() const
+        {
+            return static_cast<uint32_t>(mask);
+        }
+        CONSTEXPR npu_op_irq_t &set_mask(uint32_t value)
+        {
+            mask = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("mask", std::to_string(mask)));
+        }
+#endif
+#endif
+    };
+    // 2D convolution
+    struct npu_op_conv_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+#ifdef __cplusplus
+      public:
+        CONSTEXPR npu_op_conv_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_CONV)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_CONV) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_CONV);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_op_conv_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_op_conv_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const {}
+#endif
+#endif
+    };
+    // Depth-wise 2D convolution
+    struct npu_op_depthwise_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+#ifdef __cplusplus
+      public:
+        CONSTEXPR npu_op_depthwise_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DEPTHWISE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DEPTHWISE) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DEPTHWISE);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_op_depthwise_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_op_depthwise_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const {}
+#endif
+#endif
+    };
+    // Pooling
+    struct npu_op_pool_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;      //  control
+        uint32_t pooling_mode : 3; //  Pooling mode
+        uint32_t reserved1 : 13;
+#ifdef __cplusplus
+      public:
+        npu_op_pool_t(NPU_NAMESPACE::pooling_mode _pooling_mode) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_POOL)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            pooling_mode(static_cast<uint8_t>(_pooling_mode) & ((1U << 3) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_op_pool_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_POOL)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), pooling_mode(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_POOL) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_POOL);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_op_pool_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_op_pool_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::pooling_mode get_pooling_mode() const
+        {
+            return static_cast<NPU_NAMESPACE::pooling_mode>(pooling_mode);
+        }
+        CONSTEXPR npu_op_pool_t &set_pooling_mode(NPU_NAMESPACE::pooling_mode value)
+        {
+            pooling_mode = static_cast<uint8_t>(value) & ((1U << 3) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "pooling_mode",
+                (pooling_mode < (sizeof(pooling_mode_str) / sizeof(pooling_mode_str[0])) ?
+                     pooling_mode_str[pooling_mode] :
+                     "****")));
+        }
+#endif
+#endif
+    };
+    // Elementwise operation
+    struct npu_op_elementwise_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;          //  control
+        uint32_t elementwise_mode : 6; //  Elementwise mode
+        uint32_t reserved1 : 10;
+#ifdef __cplusplus
+      public:
+        npu_op_elementwise_t(NPU_NAMESPACE::elementwise_mode _elementwise_mode) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_ELEMENTWISE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            elementwise_mode(static_cast<uint8_t>(_elementwise_mode) & ((1U << 6) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_op_elementwise_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_ELEMENTWISE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), elementwise_mode(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_ELEMENTWISE) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_ELEMENTWISE);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_op_elementwise_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_op_elementwise_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::elementwise_mode get_elementwise_mode() const
+        {
+            return static_cast<NPU_NAMESPACE::elementwise_mode>(elementwise_mode);
+        }
+        CONSTEXPR npu_op_elementwise_t &set_elementwise_mode(NPU_NAMESPACE::elementwise_mode value)
+        {
+            elementwise_mode = static_cast<uint8_t>(value) & ((1U << 6) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "elementwise_mode",
+                (elementwise_mode < (sizeof(elementwise_mode_str) / sizeof(elementwise_mode_str[0])) ?
+                     elementwise_mode_str[elementwise_mode] :
+                     "****")));
+        }
+#endif
+#endif
+    };
+    // Queue new DMA for the given channel
+    struct npu_op_dma_start_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+#ifdef __cplusplus
+      public:
+        CONSTEXPR npu_op_dma_start_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DMA_START)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DMA_START) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DMA_START);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_op_dma_start_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_op_dma_start_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const {}
+#endif
+#endif
+    };
+    // Wait for the DMA channel to have k or fewer active descriptors outstanding
+    struct npu_op_dma_wait_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t k : 4;       //  Number of outstanding descriptors
+        uint32_t reserved1 : 12;
+#ifdef __cplusplus
+      public:
+        npu_op_dma_wait_t(uint32_t _k) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DMA_WAIT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            k(static_cast<uint8_t>(_k) & ((1U << 4) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_op_dma_wait_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DMA_WAIT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), k(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DMA_WAIT) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DMA_WAIT);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_op_dma_wait_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_op_dma_wait_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_k() const
+        {
+            return static_cast<uint32_t>(k);
+        }
+        CONSTEXPR npu_op_dma_wait_t &set_k(uint32_t value)
+        {
+            k = static_cast<uint8_t>(value) & ((1U << 4) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("k", std::to_string(k)));
+        }
+#endif
+#endif
+    };
+    // Wait for n or fewer kernel operations to be remaining
+    struct npu_op_kernel_wait_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t n : 2;       //  Number of kernel operations in range 0-3
+        uint32_t reserved1 : 14;
+#ifdef __cplusplus
+      public:
+        npu_op_kernel_wait_t(uint32_t _n) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_KERNEL_WAIT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            n(static_cast<uint8_t>(_n) & ((1U << 2) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_op_kernel_wait_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_KERNEL_WAIT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), n(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_KERNEL_WAIT) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_KERNEL_WAIT);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_op_kernel_wait_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_op_kernel_wait_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_n() const
+        {
+            return static_cast<uint32_t>(n);
+        }
+        CONSTEXPR npu_op_kernel_wait_t &set_n(uint32_t value)
+        {
+            n = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("n", std::to_string(n)));
+        }
+#endif
+#endif
+    };
+    // Enable or disable PMU counting (debug feature only)
+    struct npu_op_pmu_mask_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t enable : 1;  //  Enable or disable PMU mask
+        uint32_t reserved1 : 15;
+#ifdef __cplusplus
+      public:
+        npu_op_pmu_mask_t(uint32_t _enable) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_PMU_MASK)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            enable(static_cast<uint8_t>(_enable) & ((1U << 1) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_op_pmu_mask_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_PMU_MASK)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), enable(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_PMU_MASK) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_PMU_MASK);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_op_pmu_mask_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_op_pmu_mask_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_enable() const
+        {
+            return static_cast<uint32_t>(enable);
+        }
+        CONSTEXPR npu_op_pmu_mask_t &set_enable(uint32_t value)
+        {
+            enable = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("enable", std::to_string(enable)));
+        }
+#endif
+#endif
+    };
+    // IFM top pad
+    struct npu_set_ifm_pad_top_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t pad : 7;     //  IFM top pad
+        uint32_t reserved1 : 9;
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_pad_top_t(uint32_t _pad) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_TOP)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            pad(static_cast<uint8_t>(_pad) & ((1U << 7) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_ifm_pad_top_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_TOP)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), pad(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_TOP) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_TOP);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_pad_top_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_pad_top_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_pad() const
+        {
+            return static_cast<uint32_t>(pad);
+        }
+        CONSTEXPR npu_set_ifm_pad_top_t &set_pad(uint32_t value)
+        {
+            pad = static_cast<uint8_t>(value) & ((1U << 7) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("pad", std::to_string(pad)));
+        }
+#endif
+#endif
+    };
+    // IFM left pad
+    struct npu_set_ifm_pad_left_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t pad : 7;     //  IFM left pad
+        uint32_t reserved1 : 9;
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_pad_left_t(uint32_t _pad) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_LEFT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            pad(static_cast<uint8_t>(_pad) & ((1U << 7) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_ifm_pad_left_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_LEFT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), pad(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_LEFT) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_LEFT);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_pad_left_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_pad_left_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_pad() const
+        {
+            return static_cast<uint32_t>(pad);
+        }
+        CONSTEXPR npu_set_ifm_pad_left_t &set_pad(uint32_t value)
+        {
+            pad = static_cast<uint8_t>(value) & ((1U << 7) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("pad", std::to_string(pad)));
+        }
+#endif
+#endif
+    };
+    // IFM right pad
+    struct npu_set_ifm_pad_right_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t pad : 8;     //  IFM right pad. Max value is 128
+        uint32_t reserved1 : 8;
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_pad_right_t(uint32_t _pad) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_RIGHT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            pad(static_cast<uint8_t>(_pad) & ((1U << 8) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_ifm_pad_right_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_RIGHT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), pad(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_RIGHT) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_RIGHT);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_pad_right_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_pad_right_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_pad() const
+        {
+            return static_cast<uint32_t>(pad);
+        }
+        CONSTEXPR npu_set_ifm_pad_right_t &set_pad(uint32_t value)
+        {
+            pad = static_cast<uint8_t>(value) & ((1U << 8) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("pad", std::to_string(pad)));
+        }
+#endif
+#endif
+    };
+    // IFM bottom pad
+    struct npu_set_ifm_pad_bottom_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t pad : 8;     //  IFM bottom pad. Max value is 128
+        uint32_t reserved1 : 8;
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_pad_bottom_t(uint32_t _pad) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_BOTTOM)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            pad(static_cast<uint8_t>(_pad) & ((1U << 8) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_ifm_pad_bottom_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_BOTTOM)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), pad(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_BOTTOM) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_BOTTOM);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_pad_bottom_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_pad_bottom_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_pad() const
+        {
+            return static_cast<uint32_t>(pad);
+        }
+        CONSTEXPR npu_set_ifm_pad_bottom_t &set_pad(uint32_t value)
+        {
+            pad = static_cast<uint8_t>(value) & ((1U << 8) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("pad", std::to_string(pad)));
+        }
+#endif
+#endif
+    };
+    // Number of input channels for convolution
+    struct npu_set_ifm_depth_m1_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;   //  control
+        uint32_t depth_m1 : 16; //  Number of input channels for convolution
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_depth_m1_t(uint32_t _depth_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_DEPTH_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            depth_m1(static_cast<uint16_t>(_depth_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ifm_depth_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_DEPTH_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), depth_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_DEPTH_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_DEPTH_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_depth_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_depth_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_depth_m1() const
+        {
+            return static_cast<uint32_t>(depth_m1);
+        }
+        CONSTEXPR npu_set_ifm_depth_m1_t &set_depth_m1(uint32_t value)
+        {
+            depth_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("depth_m1", std::to_string(depth_m1)));
+        }
+#endif
+#endif
+    };
+    // IFM Precision
+    struct npu_set_ifm_precision_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;         //  control
+        uint32_t activation_type : 1; //  IFM type
+        uint32_t reserved1 : 1;
+        uint32_t activation_precision : 2; //  IFM precision
+        uint32_t reserved2 : 2;
+        uint32_t activation_format : 2; //  IFM format
+        uint32_t scale_mode : 2;        //  IFM scale mode
+        uint32_t reserved3 : 4;
+        uint32_t round_mode : 2; //  IFM round mode
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_precision_t(NPU_NAMESPACE::activation_type _activation_type,
+                                NPU_NAMESPACE::activation_precision _activation_precision,
+                                NPU_NAMESPACE::activation_format _activation_format,
+                                NPU_NAMESPACE::ifm_scale_mode _scale_mode,
+                                NPU_NAMESPACE::round_mode _round_mode) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PRECISION)),
+            reserved0(0), control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            activation_type(static_cast<uint8_t>(_activation_type) & ((1U << 1) - 1)), reserved1(0),
+            activation_precision(static_cast<uint8_t>(_activation_precision) & ((1U << 2) - 1)), reserved2(0),
+            activation_format(static_cast<uint8_t>(_activation_format) & ((1U << 2) - 1)),
+            scale_mode(static_cast<uint8_t>(_scale_mode) & ((1U << 2) - 1)), reserved3(0),
+            round_mode(static_cast<uint8_t>(_round_mode) & ((1U << 2) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ifm_precision_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PRECISION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), activation_type(0), reserved1(0),
+            activation_precision(0), reserved2(0), activation_format(0), scale_mode(0), reserved3(0), round_mode(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PRECISION) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PRECISION);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_precision_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_precision_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::activation_type get_activation_type() const
+        {
+            return static_cast<NPU_NAMESPACE::activation_type>(activation_type);
+        }
+        CONSTEXPR npu_set_ifm_precision_t &set_activation_type(NPU_NAMESPACE::activation_type value)
+        {
+            activation_type = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::activation_precision get_activation_precision() const
+        {
+            return static_cast<NPU_NAMESPACE::activation_precision>(activation_precision);
+        }
+        CONSTEXPR npu_set_ifm_precision_t &set_activation_precision(NPU_NAMESPACE::activation_precision value)
+        {
+            activation_precision = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::activation_format get_activation_format() const
+        {
+            return static_cast<NPU_NAMESPACE::activation_format>(activation_format);
+        }
+        CONSTEXPR npu_set_ifm_precision_t &set_activation_format(NPU_NAMESPACE::activation_format value)
+        {
+            activation_format = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::ifm_scale_mode get_scale_mode() const
+        {
+            return static_cast<NPU_NAMESPACE::ifm_scale_mode>(scale_mode);
+        }
+        CONSTEXPR npu_set_ifm_precision_t &set_scale_mode(NPU_NAMESPACE::ifm_scale_mode value)
+        {
+            scale_mode = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::round_mode get_round_mode() const
+        {
+            return static_cast<NPU_NAMESPACE::round_mode>(round_mode);
+        }
+        CONSTEXPR npu_set_ifm_precision_t &set_round_mode(NPU_NAMESPACE::round_mode value)
+        {
+            round_mode = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "activation_type",
+                (activation_type < (sizeof(activation_type_str) / sizeof(activation_type_str[0])) ?
+                     activation_type_str[activation_type] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "activation_precision",
+                (activation_precision < (sizeof(activation_precision_str) / sizeof(activation_precision_str[0])) ?
+                     activation_precision_str[activation_precision] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "activation_format",
+                (activation_format < (sizeof(activation_format_str) / sizeof(activation_format_str[0])) ?
+                     activation_format_str[activation_format] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "scale_mode",
+                (scale_mode < (sizeof(ifm_scale_mode_str) / sizeof(ifm_scale_mode_str[0])) ?
+                     ifm_scale_mode_str[scale_mode] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "round_mode",
+                (round_mode < (sizeof(round_mode_str) / sizeof(round_mode_str[0])) ? round_mode_str[round_mode] :
+                                                                                     "****")));
+        }
+#endif
+#endif
+    };
+    // IFM upscale mode
+    struct npu_set_ifm_upscale_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t mode : 2;    //  IFM upscale mode
+        uint32_t reserved1 : 14;
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_upscale_t(NPU_NAMESPACE::ifm_upscale_mode _mode) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_UPSCALE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            mode(static_cast<uint8_t>(_mode) & ((1U << 2) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_ifm_upscale_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_UPSCALE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), mode(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_UPSCALE) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_UPSCALE);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_upscale_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_upscale_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::ifm_upscale_mode get_mode() const
+        {
+            return static_cast<NPU_NAMESPACE::ifm_upscale_mode>(mode);
+        }
+        CONSTEXPR npu_set_ifm_upscale_t &set_mode(NPU_NAMESPACE::ifm_upscale_mode value)
+        {
+            mode = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "mode",
+                (mode < (sizeof(ifm_upscale_mode_str) / sizeof(ifm_upscale_mode_str[0])) ? ifm_upscale_mode_str[mode] :
+                                                                                           "****")));
+        }
+#endif
+#endif
+    };
+    // IFM zero point
+    struct npu_set_ifm_zero_point_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;     //  control
+        uint32_t zero_point : 16; //  Zero point offset
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_zero_point_t(uint32_t _zero_point) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_ZERO_POINT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            zero_point(static_cast<uint16_t>(_zero_point) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ifm_zero_point_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_ZERO_POINT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), zero_point(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_ZERO_POINT) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_ZERO_POINT);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_zero_point_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_zero_point_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_zero_point() const
+        {
+            return static_cast<uint32_t>(zero_point);
+        }
+        CONSTEXPR npu_set_ifm_zero_point_t &set_zero_point(uint32_t value)
+        {
+            zero_point = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("zero_point", std::to_string(zero_point)));
+        }
+#endif
+#endif
+    };
+    // IFM Tile 0 and tile 2 width
+    struct npu_set_ifm_width0_m1_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;   //  control
+        uint32_t width_m1 : 16; //  IFM Tile 0 and tile 2 width
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_width0_m1_t(uint32_t _width_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_WIDTH0_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            width_m1(static_cast<uint16_t>(_width_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ifm_width0_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_WIDTH0_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), width_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_WIDTH0_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_WIDTH0_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_width0_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_width0_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_width_m1() const
+        {
+            return static_cast<uint32_t>(width_m1);
+        }
+        CONSTEXPR npu_set_ifm_width0_m1_t &set_width_m1(uint32_t value)
+        {
+            width_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("width_m1", std::to_string(width_m1)));
+        }
+#endif
+#endif
+    };
+    // IFM Tile 0 height
+    struct npu_set_ifm_height0_m1_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;    //  control
+        uint32_t height_m1 : 16; //  IFM Tile 0 height
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_height0_m1_t(uint32_t _height_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT0_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            height_m1(static_cast<uint16_t>(_height_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ifm_height0_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT0_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), height_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT0_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT0_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_height0_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_height0_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_height_m1() const
+        {
+            return static_cast<uint32_t>(height_m1);
+        }
+        CONSTEXPR npu_set_ifm_height0_m1_t &set_height_m1(uint32_t value)
+        {
+            height_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("height_m1", std::to_string(height_m1)));
+        }
+#endif
+#endif
+    };
+    // IFM Tile 1 height
+    struct npu_set_ifm_height1_m1_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;    //  control
+        uint32_t height_m1 : 16; //  IFM Tile 1 height
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_height1_m1_t(uint32_t _height_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT1_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            height_m1(static_cast<uint16_t>(_height_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ifm_height1_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT1_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), height_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT1_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT1_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_height1_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_height1_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_height_m1() const
+        {
+            return static_cast<uint32_t>(height_m1);
+        }
+        CONSTEXPR npu_set_ifm_height1_m1_t &set_height_m1(uint32_t value)
+        {
+            height_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("height_m1", std::to_string(height_m1)));
+        }
+#endif
+#endif
+    };
+    // End of IB0,IB1 buffers
+    struct npu_set_ifm_ib_end_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t ib_end : 6;  //  End of IB0,IB1 buffers in the SHRAM in KB units. Multiple of 2
+        uint32_t reserved1 : 10;
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_ib_end_t(uint32_t _ib_end) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_IB_END)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            ib_end(static_cast<uint8_t>(_ib_end) & ((1U << 6) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_ifm_ib_end_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_IB_END)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), ib_end(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_IB_END) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_IB_END);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_ib_end_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_ib_end_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_ib_end() const
+        {
+            return static_cast<uint32_t>(ib_end);
+        }
+        CONSTEXPR npu_set_ifm_ib_end_t &set_ib_end(uint32_t value)
+        {
+            ib_end = static_cast<uint8_t>(value) & ((1U << 6) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("ib_end", std::to_string(ib_end)));
+        }
+#endif
+#endif
+    };
+    // Index n for IFM access
+    struct npu_set_ifm_region_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t region : 3;  //  Region number n
+        uint32_t reserved1 : 13;
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_region_t(uint32_t _region) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_REGION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            region(static_cast<uint8_t>(_region) & ((1U << 3) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_ifm_region_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_REGION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), region(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_REGION) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_REGION);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm_region_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm_region_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_region() const
+        {
+            return static_cast<uint32_t>(region);
+        }
+        CONSTEXPR npu_set_ifm_region_t &set_region(uint32_t value)
+        {
+            region = static_cast<uint8_t>(value) & ((1U << 3) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("region", std::to_string(region)));
+        }
+#endif
+#endif
+    };
+    // Output feature map width
+    struct npu_set_ofm_width_m1_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;   //  control
+        uint32_t width_m1 : 16; //  Output feature map width
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_width_m1_t(uint32_t _width_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            width_m1(static_cast<uint16_t>(_width_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ofm_width_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), width_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_width_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_width_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_width_m1() const
+        {
+            return static_cast<uint32_t>(width_m1);
+        }
+        CONSTEXPR npu_set_ofm_width_m1_t &set_width_m1(uint32_t value)
+        {
+            width_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("width_m1", std::to_string(width_m1)));
+        }
+#endif
+#endif
+    };
+    // Output feature map height
+    struct npu_set_ofm_height_m1_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;    //  control
+        uint32_t height_m1 : 16; //  Output feature map height
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_height_m1_t(uint32_t _height_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            height_m1(static_cast<uint16_t>(_height_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ofm_height_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), height_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_height_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_height_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_height_m1() const
+        {
+            return static_cast<uint32_t>(height_m1);
+        }
+        CONSTEXPR npu_set_ofm_height_m1_t &set_height_m1(uint32_t value)
+        {
+            height_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("height_m1", std::to_string(height_m1)));
+        }
+#endif
+#endif
+    };
+    // Output feature map depth
+    struct npu_set_ofm_depth_m1_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;   //  control
+        uint32_t depth_m1 : 16; //  Output feature map depth
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_depth_m1_t(uint32_t _depth_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_DEPTH_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            depth_m1(static_cast<uint16_t>(_depth_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ofm_depth_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_DEPTH_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), depth_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_DEPTH_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_DEPTH_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_depth_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_depth_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_depth_m1() const
+        {
+            return static_cast<uint32_t>(depth_m1);
+        }
+        CONSTEXPR npu_set_ofm_depth_m1_t &set_depth_m1(uint32_t value)
+        {
+            depth_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("depth_m1", std::to_string(depth_m1)));
+        }
+#endif
+#endif
+    };
+    // OFM Precision
+    struct npu_set_ofm_precision_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;              //  control
+        uint32_t activation_type : 1;      //  OFM type
+        uint32_t activation_precision : 2; //  OFM precision
+        uint32_t reserved1 : 3;
+        uint32_t activation_format : 2; //  OFM format
+        uint32_t scale_mode : 1;        //  OFM scale mode
+        uint32_t reserved2 : 5;
+        uint32_t round_mode : 2; //  OFM round mode
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_precision_t(NPU_NAMESPACE::activation_type _activation_type,
+                                NPU_NAMESPACE::activation_precision _activation_precision,
+                                NPU_NAMESPACE::activation_format _activation_format,
+                                NPU_NAMESPACE::ofm_scale_mode _scale_mode,
+                                NPU_NAMESPACE::round_mode _round_mode) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_PRECISION)),
+            reserved0(0), control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            activation_type(static_cast<uint8_t>(_activation_type) & ((1U << 1) - 1)),
+            activation_precision(static_cast<uint8_t>(_activation_precision) & ((1U << 2) - 1)), reserved1(0),
+            activation_format(static_cast<uint8_t>(_activation_format) & ((1U << 2) - 1)),
+            scale_mode(static_cast<uint8_t>(_scale_mode) & ((1U << 1) - 1)), reserved2(0),
+            round_mode(static_cast<uint8_t>(_round_mode) & ((1U << 2) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ofm_precision_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_PRECISION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), activation_type(0),
+            activation_precision(0), reserved1(0), activation_format(0), scale_mode(0), reserved2(0), round_mode(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_PRECISION) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_PRECISION);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_precision_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_precision_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::activation_type get_activation_type() const
+        {
+            return static_cast<NPU_NAMESPACE::activation_type>(activation_type);
+        }
+        CONSTEXPR npu_set_ofm_precision_t &set_activation_type(NPU_NAMESPACE::activation_type value)
+        {
+            activation_type = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::activation_precision get_activation_precision() const
+        {
+            return static_cast<NPU_NAMESPACE::activation_precision>(activation_precision);
+        }
+        CONSTEXPR npu_set_ofm_precision_t &set_activation_precision(NPU_NAMESPACE::activation_precision value)
+        {
+            activation_precision = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::activation_format get_activation_format() const
+        {
+            return static_cast<NPU_NAMESPACE::activation_format>(activation_format);
+        }
+        CONSTEXPR npu_set_ofm_precision_t &set_activation_format(NPU_NAMESPACE::activation_format value)
+        {
+            activation_format = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::ofm_scale_mode get_scale_mode() const
+        {
+            return static_cast<NPU_NAMESPACE::ofm_scale_mode>(scale_mode);
+        }
+        CONSTEXPR npu_set_ofm_precision_t &set_scale_mode(NPU_NAMESPACE::ofm_scale_mode value)
+        {
+            scale_mode = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::round_mode get_round_mode() const
+        {
+            return static_cast<NPU_NAMESPACE::round_mode>(round_mode);
+        }
+        CONSTEXPR npu_set_ofm_precision_t &set_round_mode(NPU_NAMESPACE::round_mode value)
+        {
+            round_mode = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "activation_type",
+                (activation_type < (sizeof(activation_type_str) / sizeof(activation_type_str[0])) ?
+                     activation_type_str[activation_type] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "activation_precision",
+                (activation_precision < (sizeof(activation_precision_str) / sizeof(activation_precision_str[0])) ?
+                     activation_precision_str[activation_precision] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "activation_format",
+                (activation_format < (sizeof(activation_format_str) / sizeof(activation_format_str[0])) ?
+                     activation_format_str[activation_format] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "scale_mode",
+                (scale_mode < (sizeof(ofm_scale_mode_str) / sizeof(ofm_scale_mode_str[0])) ?
+                     ofm_scale_mode_str[scale_mode] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "round_mode",
+                (round_mode < (sizeof(round_mode_str) / sizeof(round_mode_str[0])) ? round_mode_str[round_mode] :
+                                                                                     "****")));
+        }
+#endif
+#endif
+    };
+    // OFM block width
+    struct npu_set_ofm_blk_width_m1_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;  //  control
+        uint32_t width_m1 : 6; //  OFM block width
+        uint32_t reserved1 : 10;
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_blk_width_m1_t(uint32_t _width_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_WIDTH_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            width_m1(static_cast<uint8_t>(_width_m1) & ((1U << 6) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_ofm_blk_width_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_WIDTH_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), width_m1(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_WIDTH_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_WIDTH_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_blk_width_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_blk_width_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_width_m1() const
+        {
+            return static_cast<uint32_t>(width_m1);
+        }
+        CONSTEXPR npu_set_ofm_blk_width_m1_t &set_width_m1(uint32_t value)
+        {
+            width_m1 = static_cast<uint8_t>(value) & ((1U << 6) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("width_m1", std::to_string(width_m1)));
+        }
+#endif
+#endif
+    };
+    // OFM block height
+    struct npu_set_ofm_blk_height_m1_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;   //  control
+        uint32_t height_m1 : 5; //  OFM block height
+        uint32_t reserved1 : 11;
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_blk_height_m1_t(uint32_t _height_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_HEIGHT_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            height_m1(static_cast<uint8_t>(_height_m1) & ((1U << 5) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_ofm_blk_height_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_HEIGHT_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), height_m1(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_HEIGHT_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_HEIGHT_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_blk_height_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_blk_height_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_height_m1() const
+        {
+            return static_cast<uint32_t>(height_m1);
+        }
+        CONSTEXPR npu_set_ofm_blk_height_m1_t &set_height_m1(uint32_t value)
+        {
+            height_m1 = static_cast<uint8_t>(value) & ((1U << 5) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("height_m1", std::to_string(height_m1)));
+        }
+#endif
+#endif
+    };
+    // OFM block depth
+    struct npu_set_ofm_blk_depth_m1_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;  //  control
+        uint32_t depth_m1 : 7; //  OFM block depth
+        uint32_t reserved1 : 9;
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_blk_depth_m1_t(uint32_t _depth_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_DEPTH_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            depth_m1(static_cast<uint8_t>(_depth_m1) & ((1U << 7) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_ofm_blk_depth_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_DEPTH_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), depth_m1(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_DEPTH_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_DEPTH_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_blk_depth_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_blk_depth_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_depth_m1() const
+        {
+            return static_cast<uint32_t>(depth_m1);
+        }
+        CONSTEXPR npu_set_ofm_blk_depth_m1_t &set_depth_m1(uint32_t value)
+        {
+            depth_m1 = static_cast<uint8_t>(value) & ((1U << 7) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("depth_m1", std::to_string(depth_m1)));
+        }
+#endif
+#endif
+    };
+    // OFM zero point
+    struct npu_set_ofm_zero_point_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;     //  control
+        uint32_t zero_point : 16; //  Zero point offset
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_zero_point_t(uint32_t _zero_point) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_ZERO_POINT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            zero_point(static_cast<uint16_t>(_zero_point) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ofm_zero_point_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_ZERO_POINT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), zero_point(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_ZERO_POINT) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_ZERO_POINT);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_zero_point_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_zero_point_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_zero_point() const
+        {
+            return static_cast<uint32_t>(zero_point);
+        }
+        CONSTEXPR npu_set_ofm_zero_point_t &set_zero_point(uint32_t value)
+        {
+            zero_point = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("zero_point", std::to_string(zero_point)));
+        }
+#endif
+#endif
+    };
+    // OFM Tile 0 and tile 2 width
+    struct npu_set_ofm_width0_m1_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;   //  control
+        uint32_t width_m1 : 16; //  OFM Tile 0 and tile 2 width
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_width0_m1_t(uint32_t _width_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH0_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            width_m1(static_cast<uint16_t>(_width_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ofm_width0_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH0_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), width_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH0_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH0_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_width0_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_width0_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_width_m1() const
+        {
+            return static_cast<uint32_t>(width_m1);
+        }
+        CONSTEXPR npu_set_ofm_width0_m1_t &set_width_m1(uint32_t value)
+        {
+            width_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("width_m1", std::to_string(width_m1)));
+        }
+#endif
+#endif
+    };
+    // OFM Tile 0 height
+    struct npu_set_ofm_height0_m1_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;    //  control
+        uint32_t height_m1 : 16; //  OFM Tile 0 height
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_height0_m1_t(uint32_t _height_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT0_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            height_m1(static_cast<uint16_t>(_height_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ofm_height0_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT0_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), height_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT0_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT0_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_height0_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_height0_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_height_m1() const
+        {
+            return static_cast<uint32_t>(height_m1);
+        }
+        CONSTEXPR npu_set_ofm_height0_m1_t &set_height_m1(uint32_t value)
+        {
+            height_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("height_m1", std::to_string(height_m1)));
+        }
+#endif
+#endif
+    };
+    // OFM Tile 1 height
+    struct npu_set_ofm_height1_m1_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;    //  control
+        uint32_t height_m1 : 16; //  OFM Tile 1 height
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_height1_m1_t(uint32_t _height_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT1_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            height_m1(static_cast<uint16_t>(_height_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ofm_height1_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT1_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), height_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT1_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT1_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_height1_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_height1_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_height_m1() const
+        {
+            return static_cast<uint32_t>(height_m1);
+        }
+        CONSTEXPR npu_set_ofm_height1_m1_t &set_height_m1(uint32_t value)
+        {
+            height_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("height_m1", std::to_string(height_m1)));
+        }
+#endif
+#endif
+    };
+    // Index n for OFM access
+    struct npu_set_ofm_region_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t region : 3;  //  Index n for OFM access
+        uint32_t reserved1 : 13;
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_region_t(uint32_t _region) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_REGION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            region(static_cast<uint8_t>(_region) & ((1U << 3) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_ofm_region_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_REGION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), region(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_REGION) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_REGION);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_region_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_region_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_region() const
+        {
+            return static_cast<uint32_t>(region);
+        }
+        CONSTEXPR npu_set_ofm_region_t &set_region(uint32_t value)
+        {
+            region = static_cast<uint8_t>(value) & ((1U << 3) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("region", std::to_string(region)));
+        }
+#endif
+#endif
+    };
+    // Kernel width
+    struct npu_set_kernel_width_m1_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;   //  control
+        uint32_t width_m1 : 16; //  Kernel width
+#ifdef __cplusplus
+      public:
+        npu_set_kernel_width_m1_t(uint32_t _width_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_WIDTH_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            width_m1(static_cast<uint16_t>(_width_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_kernel_width_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_WIDTH_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), width_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_WIDTH_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_WIDTH_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_kernel_width_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_kernel_width_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_width_m1() const
+        {
+            return static_cast<uint32_t>(width_m1);
+        }
+        CONSTEXPR npu_set_kernel_width_m1_t &set_width_m1(uint32_t value)
+        {
+            width_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("width_m1", std::to_string(width_m1)));
+        }
+#endif
+#endif
+    };
+    // Kernel height
+    struct npu_set_kernel_height_m1_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;    //  control
+        uint32_t height_m1 : 16; //  Kernel height
+#ifdef __cplusplus
+      public:
+        npu_set_kernel_height_m1_t(uint32_t _height_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_HEIGHT_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            height_m1(static_cast<uint16_t>(_height_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_kernel_height_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_HEIGHT_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), height_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_HEIGHT_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_HEIGHT_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_kernel_height_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_kernel_height_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_height_m1() const
+        {
+            return static_cast<uint32_t>(height_m1);
+        }
+        CONSTEXPR npu_set_kernel_height_m1_t &set_height_m1(uint32_t value)
+        {
+            height_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("height_m1", std::to_string(height_m1)));
+        }
+#endif
+#endif
+    };
+    // Kernel stride
+    struct npu_set_kernel_stride_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;       //  control
+        uint32_t stride_x_lsb : 1;  //  Stride x LSB. (kernel_x_stride - 1)[0]
+        uint32_t stride_y_lsb : 1;  //  Stride y LSB. (kernel_y_stride - 1)[0]
+        uint32_t weight_order : 1;  //  Weight ordering mode
+        uint32_t dilation_x : 1;    //  Kernel x dilation
+        uint32_t dilation_y : 1;    //  Kernel y dilation
+        uint32_t decomposition : 1; //  Kernel decomposition
+        uint32_t stride_x_msb : 1;  //  Stride x MSB. (kernel_x_stride - 1) >> 1
+        uint32_t reserved1 : 2;
+        uint32_t stride_y_msb : 1; //  Stride y MSB. (kernel_y_stride - 1) >> 1
+        uint32_t reserved2 : 6;
+#ifdef __cplusplus
+      public:
+        npu_set_kernel_stride_t(uint32_t _stride_x_lsb,
+                                uint32_t _stride_y_lsb,
+                                NPU_NAMESPACE::weight_order _weight_order,
+                                NPU_NAMESPACE::kernel_dilation _dilation_x,
+                                NPU_NAMESPACE::kernel_dilation _dilation_y,
+                                NPU_NAMESPACE::kernel_decomposition _decomposition,
+                                uint32_t _stride_x_msb,
+                                uint32_t _stride_y_msb) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_STRIDE)),
+            reserved0(0), control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            stride_x_lsb(static_cast<uint8_t>(_stride_x_lsb) & ((1U << 1) - 1)),
+            stride_y_lsb(static_cast<uint8_t>(_stride_y_lsb) & ((1U << 1) - 1)),
+            weight_order(static_cast<uint8_t>(_weight_order) & ((1U << 1) - 1)),
+            dilation_x(static_cast<uint8_t>(_dilation_x) & ((1U << 1) - 1)),
+            dilation_y(static_cast<uint8_t>(_dilation_y) & ((1U << 1) - 1)),
+            decomposition(static_cast<uint8_t>(_decomposition) & ((1U << 1) - 1)),
+            stride_x_msb(static_cast<uint8_t>(_stride_x_msb) & ((1U << 1) - 1)), reserved1(0),
+            stride_y_msb(static_cast<uint8_t>(_stride_y_msb) & ((1U << 1) - 1)), reserved2(0)
+        {
+        }
+        CONSTEXPR npu_set_kernel_stride_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_STRIDE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), stride_x_lsb(0), stride_y_lsb(0),
+            weight_order(0), dilation_x(0), dilation_y(0), decomposition(0), stride_x_msb(0), reserved1(0),
+            stride_y_msb(0), reserved2(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_STRIDE) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_STRIDE);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_kernel_stride_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_kernel_stride_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_stride_x_lsb() const
+        {
+            return static_cast<uint32_t>(stride_x_lsb);
+        }
+        CONSTEXPR npu_set_kernel_stride_t &set_stride_x_lsb(uint32_t value)
+        {
+            stride_x_lsb = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_stride_y_lsb() const
+        {
+            return static_cast<uint32_t>(stride_y_lsb);
+        }
+        CONSTEXPR npu_set_kernel_stride_t &set_stride_y_lsb(uint32_t value)
+        {
+            stride_y_lsb = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::weight_order get_weight_order() const
+        {
+            return static_cast<NPU_NAMESPACE::weight_order>(weight_order);
+        }
+        CONSTEXPR npu_set_kernel_stride_t &set_weight_order(NPU_NAMESPACE::weight_order value)
+        {
+            weight_order = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::kernel_dilation get_dilation_x() const
+        {
+            return static_cast<NPU_NAMESPACE::kernel_dilation>(dilation_x);
+        }
+        CONSTEXPR npu_set_kernel_stride_t &set_dilation_x(NPU_NAMESPACE::kernel_dilation value)
+        {
+            dilation_x = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::kernel_dilation get_dilation_y() const
+        {
+            return static_cast<NPU_NAMESPACE::kernel_dilation>(dilation_y);
+        }
+        CONSTEXPR npu_set_kernel_stride_t &set_dilation_y(NPU_NAMESPACE::kernel_dilation value)
+        {
+            dilation_y = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::kernel_decomposition get_decomposition() const
+        {
+            return static_cast<NPU_NAMESPACE::kernel_decomposition>(decomposition);
+        }
+        CONSTEXPR npu_set_kernel_stride_t &set_decomposition(NPU_NAMESPACE::kernel_decomposition value)
+        {
+            decomposition = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_stride_x_msb() const
+        {
+            return static_cast<uint32_t>(stride_x_msb);
+        }
+        CONSTEXPR npu_set_kernel_stride_t &set_stride_x_msb(uint32_t value)
+        {
+            stride_x_msb = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_stride_y_msb() const
+        {
+            return static_cast<uint32_t>(stride_y_msb);
+        }
+        CONSTEXPR npu_set_kernel_stride_t &set_stride_y_msb(uint32_t value)
+        {
+            stride_y_msb = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("stride_x_lsb", std::to_string(stride_x_lsb)));
+            fields.push_back(std::make_pair<std::string, std::string>("stride_y_lsb", std::to_string(stride_y_lsb)));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "weight_order",
+                (weight_order < (sizeof(weight_order_str) / sizeof(weight_order_str[0])) ?
+                     weight_order_str[weight_order] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "dilation_x",
+                (dilation_x < (sizeof(kernel_dilation_str) / sizeof(kernel_dilation_str[0])) ?
+                     kernel_dilation_str[dilation_x] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "dilation_y",
+                (dilation_y < (sizeof(kernel_dilation_str) / sizeof(kernel_dilation_str[0])) ?
+                     kernel_dilation_str[dilation_y] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "decomposition",
+                (decomposition < (sizeof(kernel_decomposition_str) / sizeof(kernel_decomposition_str[0])) ?
+                     kernel_decomposition_str[decomposition] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>("stride_x_msb", std::to_string(stride_x_msb)));
+            fields.push_back(std::make_pair<std::string, std::string>("stride_y_msb", std::to_string(stride_y_msb)));
+        }
+#endif
+#endif
+    };
+    // Multi-core parallel mode
+    struct npu_set_parallel_mode_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;       //  control
+        uint32_t parallel_mode : 1; //  Multi-core parallel mode
+        uint32_t reserved1 : 15;
+#ifdef __cplusplus
+      public:
+        npu_set_parallel_mode_t(NPU_NAMESPACE::parallel_mode _parallel_mode) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_PARALLEL_MODE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            parallel_mode(static_cast<uint8_t>(_parallel_mode) & ((1U << 1) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_parallel_mode_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_PARALLEL_MODE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), parallel_mode(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_PARALLEL_MODE) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_PARALLEL_MODE);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_parallel_mode_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_parallel_mode_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::parallel_mode get_parallel_mode() const
+        {
+            return static_cast<NPU_NAMESPACE::parallel_mode>(parallel_mode);
+        }
+        CONSTEXPR npu_set_parallel_mode_t &set_parallel_mode(NPU_NAMESPACE::parallel_mode value)
+        {
+            parallel_mode = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "parallel_mode",
+                (parallel_mode < (sizeof(parallel_mode_str) / sizeof(parallel_mode_str[0])) ?
+                     parallel_mode_str[parallel_mode] :
+                     "****")));
+        }
+#endif
+#endif
+    };
+    // Accumulator format
+    struct npu_set_acc_format_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;    //  control
+        uint32_t acc_format : 2; //  Accumulator format
+        uint32_t reserved1 : 14;
+#ifdef __cplusplus
+      public:
+        npu_set_acc_format_t(NPU_NAMESPACE::acc_format _acc_format) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACC_FORMAT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            acc_format(static_cast<uint8_t>(_acc_format) & ((1U << 2) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_acc_format_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACC_FORMAT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), acc_format(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACC_FORMAT) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACC_FORMAT);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_acc_format_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_acc_format_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::acc_format get_acc_format() const
+        {
+            return static_cast<NPU_NAMESPACE::acc_format>(acc_format);
+        }
+        CONSTEXPR npu_set_acc_format_t &set_acc_format(NPU_NAMESPACE::acc_format value)
+        {
+            acc_format = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "acc_format",
+                (acc_format < (sizeof(acc_format_str) / sizeof(acc_format_str[0])) ? acc_format_str[acc_format] :
+                                                                                     "****")));
+        }
+#endif
+#endif
+    };
+    // Activation function and clip range
+    struct npu_set_activation_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;             //  control
+        uint32_t activation_function : 5; //  Activation function (before table lookup)
+        uint32_t reserved1 : 7;
+        uint32_t activation_clip_range : 3; //  Activation clip range. This must be set to 0 if table lookup is not used
+        uint32_t reserved2 : 1;
+#ifdef __cplusplus
+      public:
+        npu_set_activation_t(NPU_NAMESPACE::activation_function _activation_function,
+                             NPU_NAMESPACE::activation_clip_range _activation_clip_range) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION)),
+            reserved0(0), control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            activation_function(static_cast<uint8_t>(_activation_function) & ((1U << 5) - 1)), reserved1(0),
+            activation_clip_range(static_cast<uint8_t>(_activation_clip_range) & ((1U << 3) - 1)), reserved2(0)
+        {
+        }
+        CONSTEXPR npu_set_activation_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), activation_function(0), reserved1(0),
+            activation_clip_range(0), reserved2(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_activation_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_activation_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::activation_function get_activation_function() const
+        {
+            return static_cast<NPU_NAMESPACE::activation_function>(activation_function);
+        }
+        CONSTEXPR npu_set_activation_t &set_activation_function(NPU_NAMESPACE::activation_function value)
+        {
+            activation_function = static_cast<uint8_t>(value) & ((1U << 5) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::activation_clip_range get_activation_clip_range() const
+        {
+            return static_cast<NPU_NAMESPACE::activation_clip_range>(activation_clip_range);
+        }
+        CONSTEXPR npu_set_activation_t &set_activation_clip_range(NPU_NAMESPACE::activation_clip_range value)
+        {
+            activation_clip_range = static_cast<uint8_t>(value) & ((1U << 3) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "activation_function",
+                (activation_function < (sizeof(activation_function_str) / sizeof(activation_function_str[0])) ?
+                     activation_function_str[activation_function] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "activation_clip_range",
+                (activation_clip_range < (sizeof(activation_clip_range_str) / sizeof(activation_clip_range_str[0])) ?
+                     activation_clip_range_str[activation_clip_range] :
+                     "****")));
+        }
+#endif
+#endif
+    };
+    // Lower bound clip
+    struct npu_set_activation_min_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;        //  control
+        uint32_t clip_boundary : 16; //  Clip boundary for OFM activations
+#ifdef __cplusplus
+      public:
+        npu_set_activation_min_t(uint32_t _clip_boundary) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MIN)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            clip_boundary(static_cast<uint16_t>(_clip_boundary) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_activation_min_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MIN)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), clip_boundary(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MIN) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MIN);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_activation_min_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_activation_min_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_clip_boundary() const
+        {
+            return static_cast<uint32_t>(clip_boundary);
+        }
+        CONSTEXPR npu_set_activation_min_t &set_clip_boundary(uint32_t value)
+        {
+            clip_boundary = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("clip_boundary", std::to_string(clip_boundary)));
+        }
+#endif
+#endif
+    };
+    // Upper bound clip
+    struct npu_set_activation_max_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;        //  control
+        uint32_t clip_boundary : 16; //  Clip boundary for OFM activations
+#ifdef __cplusplus
+      public:
+        npu_set_activation_max_t(uint32_t _clip_boundary) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MAX)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            clip_boundary(static_cast<uint16_t>(_clip_boundary) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_activation_max_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MAX)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), clip_boundary(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MAX) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MAX);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_activation_max_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_activation_max_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_clip_boundary() const
+        {
+            return static_cast<uint32_t>(clip_boundary);
+        }
+        CONSTEXPR npu_set_activation_max_t &set_clip_boundary(uint32_t value)
+        {
+            clip_boundary = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("clip_boundary", std::to_string(clip_boundary)));
+        }
+#endif
+#endif
+    };
+    // Index n for weight stream access
+    struct npu_set_weight_region_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t region : 3;  //  Index n for weight stream access
+        uint32_t reserved1 : 13;
+#ifdef __cplusplus
+      public:
+        npu_set_weight_region_t(uint32_t _region) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_WEIGHT_REGION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            region(static_cast<uint8_t>(_region) & ((1U << 3) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_weight_region_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_WEIGHT_REGION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), region(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_WEIGHT_REGION) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_WEIGHT_REGION);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_weight_region_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_weight_region_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_region() const
+        {
+            return static_cast<uint32_t>(region);
+        }
+        CONSTEXPR npu_set_weight_region_t &set_region(uint32_t value)
+        {
+            region = static_cast<uint8_t>(value) & ((1U << 3) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("region", std::to_string(region)));
+        }
+#endif
+#endif
+    };
+    // Index n for scale stream access
+    struct npu_set_scale_region_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t region : 3;  //  Index n for scale stream access
+        uint32_t reserved1 : 13;
+#ifdef __cplusplus
+      public:
+        npu_set_scale_region_t(uint32_t _region) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_SCALE_REGION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            region(static_cast<uint8_t>(_region) & ((1U << 3) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_scale_region_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_SCALE_REGION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), region(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_SCALE_REGION) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_SCALE_REGION);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_scale_region_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_scale_region_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_region() const
+        {
+            return static_cast<uint32_t>(region);
+        }
+        CONSTEXPR npu_set_scale_region_t &set_region(uint32_t value)
+        {
+            region = static_cast<uint8_t>(value) & ((1U << 3) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("region", std::to_string(region)));
+        }
+#endif
+#endif
+    };
+    // Start of ACC0,ACC1 buffers
+    struct npu_set_ab_start_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;  //  control
+        uint32_t ab_start : 6; //  Start of ACC0,ACC1 buffers in the SHRAM in KB units. Multiple of 2
+        uint32_t reserved1 : 10;
+#ifdef __cplusplus
+      public:
+        npu_set_ab_start_t(uint32_t _ab_start) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_AB_START)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            ab_start(static_cast<uint8_t>(_ab_start) & ((1U << 6) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_ab_start_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_AB_START)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), ab_start(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_AB_START) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_AB_START);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ab_start_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ab_start_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_ab_start() const
+        {
+            return static_cast<uint32_t>(ab_start);
+        }
+        CONSTEXPR npu_set_ab_start_t &set_ab_start(uint32_t value)
+        {
+            ab_start = static_cast<uint8_t>(value) & ((1U << 6) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("ab_start", std::to_string(ab_start)));
+        }
+#endif
+#endif
+    };
+    // Block number of blocks dependency
+    struct npu_set_blockdep_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;  //  control
+        uint32_t blockdep : 2; //  Block number of blocks dependency between kernel operations
+        uint32_t reserved1 : 14;
+#ifdef __cplusplus
+      public:
+        npu_set_blockdep_t(uint32_t _blockdep) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_BLOCKDEP)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            blockdep(static_cast<uint8_t>(_blockdep) & ((1U << 2) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_blockdep_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_BLOCKDEP)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), blockdep(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_BLOCKDEP) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_BLOCKDEP);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_blockdep_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_blockdep_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_blockdep() const
+        {
+            return static_cast<uint32_t>(blockdep);
+        }
+        CONSTEXPR npu_set_blockdep_t &set_blockdep(uint32_t value)
+        {
+            blockdep = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("blockdep", std::to_string(blockdep)));
+        }
+#endif
+#endif
+    };
+    // DMA0 source region
+    struct npu_set_dma0_src_region_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t region : 3;  //  Region number
+        uint32_t reserved1 : 5;
+        uint32_t region_mode : 1; //  Region mode
+        uint32_t stride_mode : 2; //  Stride mode
+        uint32_t reserved2 : 5;
+#ifdef __cplusplus
+      public:
+        npu_set_dma0_src_region_t(uint32_t _region,
+                                  NPU_NAMESPACE::dma_region_mode _region_mode,
+                                  NPU_NAMESPACE::dma_stride_mode _stride_mode) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SRC_REGION)),
+            reserved0(0), control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            region(static_cast<uint8_t>(_region) & ((1U << 3) - 1)), reserved1(0),
+            region_mode(static_cast<uint8_t>(_region_mode) & ((1U << 1) - 1)),
+            stride_mode(static_cast<uint8_t>(_stride_mode) & ((1U << 2) - 1)), reserved2(0)
+        {
+        }
+        CONSTEXPR npu_set_dma0_src_region_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SRC_REGION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), region(0), reserved1(0), region_mode(0),
+            stride_mode(0), reserved2(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SRC_REGION) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SRC_REGION);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_dma0_src_region_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_dma0_src_region_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_region() const
+        {
+            return static_cast<uint32_t>(region);
+        }
+        CONSTEXPR npu_set_dma0_src_region_t &set_region(uint32_t value)
+        {
+            region = static_cast<uint8_t>(value) & ((1U << 3) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::dma_region_mode get_region_mode() const
+        {
+            return static_cast<NPU_NAMESPACE::dma_region_mode>(region_mode);
+        }
+        CONSTEXPR npu_set_dma0_src_region_t &set_region_mode(NPU_NAMESPACE::dma_region_mode value)
+        {
+            region_mode = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::dma_stride_mode get_stride_mode() const
+        {
+            return static_cast<NPU_NAMESPACE::dma_stride_mode>(stride_mode);
+        }
+        CONSTEXPR npu_set_dma0_src_region_t &set_stride_mode(NPU_NAMESPACE::dma_stride_mode value)
+        {
+            stride_mode = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("region", std::to_string(region)));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "region_mode",
+                (region_mode < (sizeof(dma_region_mode_str) / sizeof(dma_region_mode_str[0])) ?
+                     dma_region_mode_str[region_mode] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "stride_mode",
+                (stride_mode < (sizeof(dma_stride_mode_str) / sizeof(dma_stride_mode_str[0])) ?
+                     dma_stride_mode_str[stride_mode] :
+                     "****")));
+        }
+#endif
+#endif
+    };
+    // DMA0 destination region
+    struct npu_set_dma0_dst_region_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t region : 3; //  Region number if region_mode is region_mode_external. Else core mask to write to (bit k
+                             //  set for core k=0,1)
+        uint32_t reserved1 : 5;
+        uint32_t region_mode : 1; //  Region mode
+        uint32_t stride_mode : 2; //  Stride mode
+        uint32_t reserved2 : 5;
+#ifdef __cplusplus
+      public:
+        npu_set_dma0_dst_region_t(uint32_t _region,
+                                  NPU_NAMESPACE::dma_region_mode _region_mode,
+                                  NPU_NAMESPACE::dma_stride_mode _stride_mode) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_DST_REGION)),
+            reserved0(0), control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            region(static_cast<uint8_t>(_region) & ((1U << 3) - 1)), reserved1(0),
+            region_mode(static_cast<uint8_t>(_region_mode) & ((1U << 1) - 1)),
+            stride_mode(static_cast<uint8_t>(_stride_mode) & ((1U << 2) - 1)), reserved2(0)
+        {
+        }
+        CONSTEXPR npu_set_dma0_dst_region_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_DST_REGION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), region(0), reserved1(0), region_mode(0),
+            stride_mode(0), reserved2(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_DST_REGION) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_DST_REGION);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_dma0_dst_region_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_dma0_dst_region_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_region() const
+        {
+            return static_cast<uint32_t>(region);
+        }
+        CONSTEXPR npu_set_dma0_dst_region_t &set_region(uint32_t value)
+        {
+            region = static_cast<uint8_t>(value) & ((1U << 3) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::dma_region_mode get_region_mode() const
+        {
+            return static_cast<NPU_NAMESPACE::dma_region_mode>(region_mode);
+        }
+        CONSTEXPR npu_set_dma0_dst_region_t &set_region_mode(NPU_NAMESPACE::dma_region_mode value)
+        {
+            region_mode = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::dma_stride_mode get_stride_mode() const
+        {
+            return static_cast<NPU_NAMESPACE::dma_stride_mode>(stride_mode);
+        }
+        CONSTEXPR npu_set_dma0_dst_region_t &set_stride_mode(NPU_NAMESPACE::dma_stride_mode value)
+        {
+            stride_mode = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("region", std::to_string(region)));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "region_mode",
+                (region_mode < (sizeof(dma_region_mode_str) / sizeof(dma_region_mode_str[0])) ?
+                     dma_region_mode_str[region_mode] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "stride_mode",
+                (stride_mode < (sizeof(dma_stride_mode_str) / sizeof(dma_stride_mode_str[0])) ?
+                     dma_stride_mode_str[stride_mode] :
+                     "****")));
+        }
+#endif
+#endif
+    };
+    // Size of second dimension for 2D/3D transfers
+    struct npu_set_dma0_size0_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t size : 16;   //  Size of second dimension for 2D/3D transfers
+#ifdef __cplusplus
+      public:
+        npu_set_dma0_size0_t(uint32_t _size) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE0)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            size(static_cast<uint16_t>(_size) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_dma0_size0_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE0)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), size(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE0) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE0);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_dma0_size0_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_dma0_size0_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_size() const
+        {
+            return static_cast<uint32_t>(size);
+        }
+        CONSTEXPR npu_set_dma0_size0_t &set_size(uint32_t value)
+        {
+            size = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("size", std::to_string(size)));
+        }
+#endif
+#endif
+    };
+    // Size of third dimension for 3D transfers
+    struct npu_set_dma0_size1_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t size : 16;   //  Size of third dimension for 3D transfers
+#ifdef __cplusplus
+      public:
+        npu_set_dma0_size1_t(uint32_t _size) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            size(static_cast<uint16_t>(_size) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_dma0_size1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), size(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_dma0_size1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_dma0_size1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_size() const
+        {
+            return static_cast<uint32_t>(size);
+        }
+        CONSTEXPR npu_set_dma0_size1_t &set_size(uint32_t value)
+        {
+            size = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("size", std::to_string(size)));
+        }
+#endif
+#endif
+    };
+    // IFM2 broadcast configuration
+    struct npu_set_ifm2_broadcast_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t
+            broadcast_h : 1; //  Broadcast H dimension (if set then any accesses to IFM2 sets y=0 and IFM2 height=1)
+        uint32_t broadcast_w : 1; //  Broadcast W dimension (if set then any accesses to IFM2 sets x=0 and IFM2 width=1)
+        uint32_t broadcast_c : 1; //  Broadcast C dimension (if set then any accesses to IFM2 sets c=0 and IFM2 depth=1)
+        uint32_t reserved1 : 3;
+        uint32_t operand_order : 1;      //  Operand order
+        uint32_t broadcast_constant : 1; //  Broadcast constant given by NPU_SET_IFM2_SCALAR and so ignore BH, BW and BC
+        uint32_t reserved2 : 8;
+#ifdef __cplusplus
+      public:
+        npu_set_ifm2_broadcast_t(NPU_NAMESPACE::broadcast_mode _broadcast_h,
+                                 NPU_NAMESPACE::broadcast_mode _broadcast_w,
+                                 NPU_NAMESPACE::broadcast_mode _broadcast_c,
+                                 NPU_NAMESPACE::ifm2_operand_order _operand_order,
+                                 NPU_NAMESPACE::broadcast_mode _broadcast_constant) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_BROADCAST)),
+            reserved0(0), control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            broadcast_h(static_cast<uint8_t>(_broadcast_h) & ((1U << 1) - 1)),
+            broadcast_w(static_cast<uint8_t>(_broadcast_w) & ((1U << 1) - 1)),
+            broadcast_c(static_cast<uint8_t>(_broadcast_c) & ((1U << 1) - 1)), reserved1(0),
+            operand_order(static_cast<uint8_t>(_operand_order) & ((1U << 1) - 1)),
+            broadcast_constant(static_cast<uint8_t>(_broadcast_constant) & ((1U << 1) - 1)), reserved2(0)
+        {
+        }
+        CONSTEXPR npu_set_ifm2_broadcast_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_BROADCAST)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), broadcast_h(0), broadcast_w(0),
+            broadcast_c(0), reserved1(0), operand_order(0), broadcast_constant(0), reserved2(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_BROADCAST) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_BROADCAST);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm2_broadcast_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm2_broadcast_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::broadcast_mode get_broadcast_h() const
+        {
+            return static_cast<NPU_NAMESPACE::broadcast_mode>(broadcast_h);
+        }
+        CONSTEXPR npu_set_ifm2_broadcast_t &set_broadcast_h(NPU_NAMESPACE::broadcast_mode value)
+        {
+            broadcast_h = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::broadcast_mode get_broadcast_w() const
+        {
+            return static_cast<NPU_NAMESPACE::broadcast_mode>(broadcast_w);
+        }
+        CONSTEXPR npu_set_ifm2_broadcast_t &set_broadcast_w(NPU_NAMESPACE::broadcast_mode value)
+        {
+            broadcast_w = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::broadcast_mode get_broadcast_c() const
+        {
+            return static_cast<NPU_NAMESPACE::broadcast_mode>(broadcast_c);
+        }
+        CONSTEXPR npu_set_ifm2_broadcast_t &set_broadcast_c(NPU_NAMESPACE::broadcast_mode value)
+        {
+            broadcast_c = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::ifm2_operand_order get_operand_order() const
+        {
+            return static_cast<NPU_NAMESPACE::ifm2_operand_order>(operand_order);
+        }
+        CONSTEXPR npu_set_ifm2_broadcast_t &set_operand_order(NPU_NAMESPACE::ifm2_operand_order value)
+        {
+            operand_order = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::broadcast_mode get_broadcast_constant() const
+        {
+            return static_cast<NPU_NAMESPACE::broadcast_mode>(broadcast_constant);
+        }
+        CONSTEXPR npu_set_ifm2_broadcast_t &set_broadcast_constant(NPU_NAMESPACE::broadcast_mode value)
+        {
+            broadcast_constant = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "broadcast_h",
+                (broadcast_h < (sizeof(broadcast_mode_str) / sizeof(broadcast_mode_str[0])) ?
+                     broadcast_mode_str[broadcast_h] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "broadcast_w",
+                (broadcast_w < (sizeof(broadcast_mode_str) / sizeof(broadcast_mode_str[0])) ?
+                     broadcast_mode_str[broadcast_w] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "broadcast_c",
+                (broadcast_c < (sizeof(broadcast_mode_str) / sizeof(broadcast_mode_str[0])) ?
+                     broadcast_mode_str[broadcast_c] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "operand_order",
+                (operand_order < (sizeof(ifm2_operand_order_str) / sizeof(ifm2_operand_order_str[0])) ?
+                     ifm2_operand_order_str[operand_order] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "broadcast_constant",
+                (broadcast_constant < (sizeof(broadcast_mode_str) / sizeof(broadcast_mode_str[0])) ?
+                     broadcast_mode_str[broadcast_constant] :
+                     "****")));
+        }
+#endif
+#endif
+    };
+    // IFM2 scalar value
+    struct npu_set_ifm2_scalar_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t scalar : 16; //  int16 or uint16 depending on ifm2_precision.type
+#ifdef __cplusplus
+      public:
+        npu_set_ifm2_scalar_t(uint32_t _scalar) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_SCALAR)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            scalar(static_cast<uint16_t>(_scalar) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ifm2_scalar_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_SCALAR)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), scalar(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_SCALAR) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_SCALAR);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm2_scalar_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm2_scalar_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_scalar() const
+        {
+            return static_cast<uint32_t>(scalar);
+        }
+        CONSTEXPR npu_set_ifm2_scalar_t &set_scalar(uint32_t value)
+        {
+            scalar = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("scalar", std::to_string(scalar)));
+        }
+#endif
+#endif
+    };
+    // IFM2 Precision
+    struct npu_set_ifm2_precision_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;         //  control
+        uint32_t activation_type : 1; //  IFM type - MUST MATCH IFM
+        uint32_t reserved1 : 1;
+        uint32_t activation_precision : 2; //  IFM precision - MUST MATCH IFM
+        uint32_t reserved2 : 2;
+        uint32_t activation_format : 2; //  IFM format
+        uint32_t reserved3 : 8;
+#ifdef __cplusplus
+      public:
+        npu_set_ifm2_precision_t(NPU_NAMESPACE::activation_type _activation_type,
+                                 NPU_NAMESPACE::activation_precision _activation_precision,
+                                 NPU_NAMESPACE::activation_format _activation_format) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_PRECISION)),
+            reserved0(0), control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            activation_type(static_cast<uint8_t>(_activation_type) & ((1U << 1) - 1)), reserved1(0),
+            activation_precision(static_cast<uint8_t>(_activation_precision) & ((1U << 2) - 1)), reserved2(0),
+            activation_format(static_cast<uint8_t>(_activation_format) & ((1U << 2) - 1)), reserved3(0)
+        {
+        }
+        CONSTEXPR npu_set_ifm2_precision_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_PRECISION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), activation_type(0), reserved1(0),
+            activation_precision(0), reserved2(0), activation_format(0), reserved3(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_PRECISION) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_PRECISION);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm2_precision_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm2_precision_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::activation_type get_activation_type() const
+        {
+            return static_cast<NPU_NAMESPACE::activation_type>(activation_type);
+        }
+        CONSTEXPR npu_set_ifm2_precision_t &set_activation_type(NPU_NAMESPACE::activation_type value)
+        {
+            activation_type = static_cast<uint8_t>(value) & ((1U << 1) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::activation_precision get_activation_precision() const
+        {
+            return static_cast<NPU_NAMESPACE::activation_precision>(activation_precision);
+        }
+        CONSTEXPR npu_set_ifm2_precision_t &set_activation_precision(NPU_NAMESPACE::activation_precision value)
+        {
+            activation_precision = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::activation_format get_activation_format() const
+        {
+            return static_cast<NPU_NAMESPACE::activation_format>(activation_format);
+        }
+        CONSTEXPR npu_set_ifm2_precision_t &set_activation_format(NPU_NAMESPACE::activation_format value)
+        {
+            activation_format = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "activation_type",
+                (activation_type < (sizeof(activation_type_str) / sizeof(activation_type_str[0])) ?
+                     activation_type_str[activation_type] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "activation_precision",
+                (activation_precision < (sizeof(activation_precision_str) / sizeof(activation_precision_str[0])) ?
+                     activation_precision_str[activation_precision] :
+                     "****")));
+            fields.push_back(std::make_pair<std::string, std::string>(
+                "activation_format",
+                (activation_format < (sizeof(activation_format_str) / sizeof(activation_format_str[0])) ?
+                     activation_format_str[activation_format] :
+                     "****")));
+        }
+#endif
+#endif
+    };
+    // IFM2 zero point
+    struct npu_set_ifm2_zero_point_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;     //  control
+        uint32_t zero_point : 16; //  Zero point offset
+#ifdef __cplusplus
+      public:
+        npu_set_ifm2_zero_point_t(uint32_t _zero_point) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_ZERO_POINT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            zero_point(static_cast<uint16_t>(_zero_point) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ifm2_zero_point_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_ZERO_POINT)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), zero_point(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_ZERO_POINT) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_ZERO_POINT);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm2_zero_point_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm2_zero_point_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_zero_point() const
+        {
+            return static_cast<uint32_t>(zero_point);
+        }
+        CONSTEXPR npu_set_ifm2_zero_point_t &set_zero_point(uint32_t value)
+        {
+            zero_point = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("zero_point", std::to_string(zero_point)));
+        }
+#endif
+#endif
+    };
+    // IFM2 Tile 0 and tile 2 width
+    struct npu_set_ifm2_width0_m1_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;   //  control
+        uint32_t width_m1 : 16; //  IFM2 Tile 0 and tile 2 width
+#ifdef __cplusplus
+      public:
+        npu_set_ifm2_width0_m1_t(uint32_t _width_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_WIDTH0_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            width_m1(static_cast<uint16_t>(_width_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ifm2_width0_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_WIDTH0_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), width_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_WIDTH0_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_WIDTH0_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm2_width0_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm2_width0_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_width_m1() const
+        {
+            return static_cast<uint32_t>(width_m1);
+        }
+        CONSTEXPR npu_set_ifm2_width0_m1_t &set_width_m1(uint32_t value)
+        {
+            width_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("width_m1", std::to_string(width_m1)));
+        }
+#endif
+#endif
+    };
+    // IFM2 Tile 0 height
+    struct npu_set_ifm2_height0_m1_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;    //  control
+        uint32_t height_m1 : 16; //  IFM2 Tile 0 height
+#ifdef __cplusplus
+      public:
+        npu_set_ifm2_height0_m1_t(uint32_t _height_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT0_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            height_m1(static_cast<uint16_t>(_height_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ifm2_height0_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT0_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), height_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT0_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT0_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm2_height0_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm2_height0_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_height_m1() const
+        {
+            return static_cast<uint32_t>(height_m1);
+        }
+        CONSTEXPR npu_set_ifm2_height0_m1_t &set_height_m1(uint32_t value)
+        {
+            height_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("height_m1", std::to_string(height_m1)));
+        }
+#endif
+#endif
+    };
+    // IFM2 Tile 1 height
+    struct npu_set_ifm2_height1_m1_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;    //  control
+        uint32_t height_m1 : 16; //  IFM2 Tile 1 height
+#ifdef __cplusplus
+      public:
+        npu_set_ifm2_height1_m1_t(uint32_t _height_m1) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT1_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            height_m1(static_cast<uint16_t>(_height_m1) & ((1U << 16) - 1))
+        {
+        }
+        CONSTEXPR npu_set_ifm2_height1_m1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT1_M1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), height_m1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT1_M1) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT1_M1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm2_height1_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm2_height1_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_height_m1() const
+        {
+            return static_cast<uint32_t>(height_m1);
+        }
+        CONSTEXPR npu_set_ifm2_height1_m1_t &set_height_m1(uint32_t value)
+        {
+            height_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("height_m1", std::to_string(height_m1)));
+        }
+#endif
+#endif
+    };
+    // Start of IB0,IB1 buffers for IFM2
+    struct npu_set_ifm2_ib_start_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2;  //  control
+        uint32_t ib_start : 6; //  Start of IB0,IB1 buffers for IFM2 in the SHRAM in KB units. Multiple of 2
+        uint32_t reserved1 : 10;
+#ifdef __cplusplus
+      public:
+        npu_set_ifm2_ib_start_t(uint32_t _ib_start) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_IB_START)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            ib_start(static_cast<uint8_t>(_ib_start) & ((1U << 6) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_ifm2_ib_start_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_IB_START)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), ib_start(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_IB_START) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_IB_START);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm2_ib_start_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm2_ib_start_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_ib_start() const
+        {
+            return static_cast<uint32_t>(ib_start);
+        }
+        CONSTEXPR npu_set_ifm2_ib_start_t &set_ib_start(uint32_t value)
+        {
+            ib_start = static_cast<uint8_t>(value) & ((1U << 6) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("ib_start", std::to_string(ib_start)));
+        }
+#endif
+#endif
+    };
+    // Index n for IFM2 access
+    struct npu_set_ifm2_region_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t region : 3;  //  Index n for IFM2 access
+        uint32_t reserved1 : 13;
+#ifdef __cplusplus
+      public:
+        npu_set_ifm2_region_t(uint32_t _region) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_REGION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)),
+            region(static_cast<uint8_t>(_region) & ((1U << 3) - 1)), reserved1(0)
+        {
+        }
+        CONSTEXPR npu_set_ifm2_region_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_REGION)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), region(0), reserved1(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_REGION) &&
+                   control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_REGION);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL);
+        }
+        operator uint32_t()
+        {
+            uint32_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ifm2_region_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ifm2_region_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_region() const
+        {
+            return static_cast<uint32_t>(region);
+        }
+        CONSTEXPR npu_set_ifm2_region_t &set_region(uint32_t value)
+        {
+            region = static_cast<uint8_t>(value) & ((1U << 3) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("region", std::to_string(region)));
+        }
+#endif
+#endif
+    };
+    // IFM Tile 0 address
+    struct npu_set_ifm_base0_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_base0_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE0)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_ifm_base0_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE0)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE0) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE0);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_ifm_base0_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // IFM Tile 1 address
+    struct npu_set_ifm_base1_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_base1_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_ifm_base1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE1) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_ifm_base1_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // IFM Tile 2 address
+    struct npu_set_ifm_base2_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_base2_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE2)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_ifm_base2_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE2)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE2) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE2);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_ifm_base2_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // IFM Tile 3 address
+    struct npu_set_ifm_base3_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_base3_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE3)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_ifm_base3_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE3)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE3) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE3);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_ifm_base3_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // IFM byte stride between horizontal values
+    struct npu_set_ifm_stride_x_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_stride_x_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_X)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_ifm_stride_x_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_X)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_X) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_X);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_ifm_stride_x_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // IFM byte stride between vertical values
+    struct npu_set_ifm_stride_y_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_stride_y_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_Y)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_ifm_stride_y_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_Y)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_Y) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_Y);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_ifm_stride_y_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // IFM byte stride between channel blocks (of 16 bytes each block)
+    struct npu_set_ifm_stride_c_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_ifm_stride_c_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_C)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_ifm_stride_c_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_C)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_C) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_C);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_ifm_stride_c_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // OFM Tile 0 address
+    struct npu_set_ofm_base0_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_base0_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE0)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_ofm_base0_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE0)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE0) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE0);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_ofm_base0_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // OFM Tile 1 address
+    struct npu_set_ofm_base1_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_base1_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_ofm_base1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE1) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_ofm_base1_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // OFM Tile 2 address
+    struct npu_set_ofm_base2_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_base2_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE2)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_ofm_base2_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE2)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE2) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE2);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_ofm_base2_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // OFM Tile 3 address
+    struct npu_set_ofm_base3_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_base3_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE3)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_ofm_base3_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE3)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE3) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE3);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_ofm_base3_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // OFM byte stride between horizontal values
+    struct npu_set_ofm_stride_x_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_stride_x_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_X)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_ofm_stride_x_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_X)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_X) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_X);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_ofm_stride_x_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // OFM byte stride between vertical values
+    struct npu_set_ofm_stride_y_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_stride_y_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_Y)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_ofm_stride_y_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_Y)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_Y) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_Y);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_ofm_stride_y_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // OFM byte stride between channel blocks (of 16 bytes each block)
+    struct npu_set_ofm_stride_c_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_stride_c_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_C)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_ofm_stride_c_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_C)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_C) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_C);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_ofm_stride_c_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // Weight stream byte offset in WEIGHT_REGION
+    struct npu_set_weight_base_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_weight_base_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_BASE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_weight_base_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_BASE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_BASE) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_BASE);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_weight_base_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // Weight stream byte length
+    struct npu_set_weight_length_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t length : 32; //  Weight stream byte length
+#ifdef __cplusplus
+      public:
+        npu_set_weight_length_t(uint32_t _length) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_LENGTH)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            length(static_cast<uint32_t>(_length))
+        {
+        }
+        CONSTEXPR npu_set_weight_length_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_LENGTH)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), length(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_LENGTH) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_LENGTH);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_weight_length_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_weight_length_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_length() const
+        {
+            return static_cast<uint32_t>(length);
+        }
+        CONSTEXPR npu_set_weight_length_t &set_length(uint32_t value)
+        {
+            length = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("length", std::to_string(length)));
+        }
+#endif
+#endif
+    };
+    // Scale and bias stream input byte offset from SCALE_REGION
+    struct npu_set_scale_base_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_scale_base_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_BASE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_scale_base_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_BASE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_BASE) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_BASE);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_scale_base_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // Scale and bias stream input byte length
+    struct npu_set_scale_length_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t length : 20; //  Scale and bias stream byte length
+        uint32_t reserved2 : 12;
+#ifdef __cplusplus
+      public:
+        npu_set_scale_length_t(uint32_t _length) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_LENGTH)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            length(static_cast<uint32_t>(_length) & ((1U << 20) - 1)), reserved2(0)
+        {
+        }
+        CONSTEXPR npu_set_scale_length_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_LENGTH)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), length(0), reserved2(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_LENGTH) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_LENGTH);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_scale_length_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_scale_length_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_length() const
+        {
+            return static_cast<uint32_t>(length);
+        }
+        CONSTEXPR npu_set_scale_length_t &set_length(uint32_t value)
+        {
+            length = static_cast<uint32_t>(value) & ((1U << 20) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("length", std::to_string(length)));
+        }
+#endif
+#endif
+    };
+    // OFM scale
+    struct npu_set_ofm_scale_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t shift : 6;   //  Shift
+        uint32_t reserved1 : 10;
+        uint32_t scale : 32; //  Scale. Not applied for 32-bit operations
+#ifdef __cplusplus
+      public:
+        npu_set_ofm_scale_t(uint32_t _shift, uint32_t _scale) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_SCALE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            shift(static_cast<uint8_t>(_shift) & ((1U << 6) - 1)), reserved1(0), scale(static_cast<uint32_t>(_scale))
+        {
+        }
+        CONSTEXPR npu_set_ofm_scale_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_SCALE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), shift(0), reserved1(0), scale(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_SCALE) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_SCALE);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_ofm_scale_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_ofm_scale_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_shift() const
+        {
+            return static_cast<uint32_t>(shift);
+        }
+        CONSTEXPR npu_set_ofm_scale_t &set_shift(uint32_t value)
+        {
+            shift = static_cast<uint8_t>(value) & ((1U << 6) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_scale() const
+        {
+            return static_cast<uint32_t>(scale);
+        }
+        CONSTEXPR npu_set_ofm_scale_t &set_scale(uint32_t value)
+        {
+            scale = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("shift", std::to_string(shift)));
+            fields.push_back(std::make_pair<std::string, std::string>("scale", std::to_string(scale)));
+        }
+#endif
+#endif
+    };
+    // Input operand A scale
+    struct npu_set_opa_scale_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t shift : 6;   //  Shift. Ignored if IFM scale mode is 0
+        uint32_t reserved1 : 10;
+        uint32_t scale : 32; //  Scale. 16-bit if IFM scale mode is 0
+#ifdef __cplusplus
+      public:
+        npu_set_opa_scale_t(uint32_t _shift, uint32_t _scale) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPA_SCALE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            shift(static_cast<uint8_t>(_shift) & ((1U << 6) - 1)), reserved1(0), scale(static_cast<uint32_t>(_scale))
+        {
+        }
+        CONSTEXPR npu_set_opa_scale_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPA_SCALE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), shift(0), reserved1(0), scale(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPA_SCALE) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPA_SCALE);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_opa_scale_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_opa_scale_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_shift() const
+        {
+            return static_cast<uint32_t>(shift);
+        }
+        CONSTEXPR npu_set_opa_scale_t &set_shift(uint32_t value)
+        {
+            shift = static_cast<uint8_t>(value) & ((1U << 6) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_scale() const
+        {
+            return static_cast<uint32_t>(scale);
+        }
+        CONSTEXPR npu_set_opa_scale_t &set_scale(uint32_t value)
+        {
+            scale = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("shift", std::to_string(shift)));
+            fields.push_back(std::make_pair<std::string, std::string>("scale", std::to_string(scale)));
+        }
+#endif
+#endif
+    };
+    // Input operand B scale
+    struct npu_set_opb_scale_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t scale : 16; //  Scale. Not used if IFM scale mode is 1 or 2
+        uint32_t reserved2 : 16;
+#ifdef __cplusplus
+      public:
+        npu_set_opb_scale_t(uint32_t _scale) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPB_SCALE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            scale(static_cast<uint16_t>(_scale) & ((1U << 16) - 1)), reserved2(0)
+        {
+        }
+        CONSTEXPR npu_set_opb_scale_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPB_SCALE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), scale(0), reserved2(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPB_SCALE) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPB_SCALE);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_opb_scale_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_opb_scale_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_scale() const
+        {
+            return static_cast<uint32_t>(scale);
+        }
+        CONSTEXPR npu_set_opb_scale_t &set_scale(uint32_t value)
+        {
+            scale = static_cast<uint16_t>(value) & ((1U << 16) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("scale", std::to_string(scale)));
+        }
+#endif
+#endif
+    };
+    // DMA user channel 0 source byte offset from DMA0_SRC_REGION
+    struct npu_set_dma0_src_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_dma0_src_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SRC)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_dma0_src_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SRC)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SRC) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SRC);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_dma0_src_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // DMA user channel 0 destination byte offset from DMA0_DST_REGION
+    struct npu_set_dma0_dst_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_dma0_dst_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_DST)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_dma0_dst_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_DST)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_DST) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_DST);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_dma0_dst_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // DMA user channel 0 transfer length in bytes for 1D mode
+    struct npu_set_dma0_len_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_dma0_len_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_LEN)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_dma0_len_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_LEN)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_LEN) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_LEN);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_dma0_len_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // byte distance to skip after each inner (1D) transfer (2D/3D mode) (any alignment)
+    struct npu_set_dma0_skip0_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_dma0_skip0_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SKIP0)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_dma0_skip0_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SKIP0)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SKIP0) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SKIP0);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_dma0_skip0_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // byte distance to skip after each 2D transfer (3D mode) (any alignment)
+    struct npu_set_dma0_skip1_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_dma0_skip1_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SKIP1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_dma0_skip1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SKIP1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SKIP1) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SKIP1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_dma0_skip1_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // IFM2 Tile 0 address
+    struct npu_set_ifm2_base0_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_ifm2_base0_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE0)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_ifm2_base0_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE0)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE0) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE0);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_ifm2_base0_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // IFM2 Tile 1 address
+    struct npu_set_ifm2_base1_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_ifm2_base1_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_ifm2_base1_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE1)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE1) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE1);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_ifm2_base1_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // IFM2 Tile 2 address
+    struct npu_set_ifm2_base2_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_ifm2_base2_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE2)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_ifm2_base2_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE2)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE2) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE2);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_ifm2_base2_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // IFM2 Tile 3 address
+    struct npu_set_ifm2_base3_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_ifm2_base3_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE3)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_ifm2_base3_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE3)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE3) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE3);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_ifm2_base3_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // IFM2 byte stride between horizontal values
+    struct npu_set_ifm2_stride_x_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_ifm2_stride_x_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_X)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_ifm2_stride_x_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_X)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_X) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_X);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_ifm2_stride_x_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // IFM2 byte stride between vertical values
+    struct npu_set_ifm2_stride_y_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_ifm2_stride_y_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_Y)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_ifm2_stride_y_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_Y)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_Y) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_Y);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_ifm2_stride_y_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // IFM2 byte stride between channel blocks (of 16 bytes each block)
+    struct npu_set_ifm2_stride_c_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_ifm2_stride_c_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_C)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_ifm2_stride_c_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_C)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_C) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_C);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_ifm2_stride_c_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // Weight stream byte offset in WEIGHT_REGION for core 1
+    struct npu_set_weight1_base_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_weight1_base_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT1_BASE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_weight1_base_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT1_BASE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT1_BASE) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT1_BASE);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_weight1_base_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // Weight stream byte length for core 1
+    struct npu_set_weight1_length_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t length : 32; //  Weight stream byte length
+#ifdef __cplusplus
+      public:
+        npu_set_weight1_length_t(uint32_t _length) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT1_LENGTH)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            length(static_cast<uint32_t>(_length))
+        {
+        }
+        CONSTEXPR npu_set_weight1_length_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT1_LENGTH)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), length(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT1_LENGTH) &&
+                   control >= 1 && control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT1_LENGTH);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_weight1_length_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_weight1_length_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_length() const
+        {
+            return static_cast<uint32_t>(length);
+        }
+        CONSTEXPR npu_set_weight1_length_t &set_length(uint32_t value)
+        {
+            length = static_cast<uint32_t>(value);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("length", std::to_string(length)));
+        }
+#endif
+#endif
+    };
+    // Scale and bias stream input byte offset from SCALE_REGION for core 1
+    struct npu_set_scale1_base_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t addr_hi : 8; //  address extension
+        uint32_t reserved1 : 8;
+        uint32_t addr_lo : 32; //  address offset
+#ifdef __cplusplus
+      public:
+        npu_set_scale1_base_t(uint64_t _addr) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE1_BASE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)),
+            addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))),
+            reserved1(0),
+            addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())))
+        {
+        }
+        CONSTEXPR npu_set_scale1_base_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE1_BASE)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE1_BASE) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE1_BASE);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR uint64_t get_addr() const
+        {
+            return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo;
+        }
+        CONSTEXPR npu_set_scale1_base_t &set_addr(uint64_t value)
+        {
+            addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()));
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            std::stringstream saddr;
+            saddr << std::hex << "0x" << get_addr();
+            fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str()));
+        }
+#endif
+#endif
+    };
+    // Scale and bias stream input byte length for core 1
+    struct npu_set_scale1_length_t
+    {
+#ifdef __cplusplus
+      private:
+#endif
+        uint32_t opcode : 10; //  opcode
+        uint32_t reserved0 : 4;
+        uint32_t control : 2; //  control
+        uint32_t reserved1 : 16;
+        uint32_t length : 20; //  Scale and bias stream byte length
+        uint32_t reserved2 : 12;
+#ifdef __cplusplus
+      public:
+        npu_set_scale1_length_t(uint32_t _length) :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE1_LENGTH)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0),
+            length(static_cast<uint32_t>(_length) & ((1U << 20) - 1)), reserved2(0)
+        {
+        }
+        CONSTEXPR npu_set_scale1_length_t() :
+            opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE1_LENGTH)), reserved0(0),
+            control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), length(0), reserved2(0)
+        {
+        }
+        CONSTEXPR bool valid() const
+        {
+            return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE1_LENGTH) && control >= 1 &&
+                   control <= 2;
+        }
+        CONSTEXPR void init()
+        {
+            opcode  = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE1_LENGTH);
+            control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL);
+        }
+        operator uint64_t()
+        {
+            uint64_t word;
+            std::memcpy(&word, this, sizeof(word));
+            return word;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode);
+        }
+        CONSTEXPR npu_set_scale1_length_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value)
+        {
+            opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1);
+            return *this;
+        }
+        CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const
+        {
+            return static_cast<NPU_NAMESPACE::cmd_ctrl>(control);
+        }
+        CONSTEXPR npu_set_scale1_length_t &set_control(NPU_NAMESPACE::cmd_ctrl value)
+        {
+            control = static_cast<uint8_t>(value) & ((1U << 2) - 1);
+            return *this;
+        }
+        CONSTEXPR uint32_t get_length() const
+        {
+            return static_cast<uint32_t>(length);
+        }
+        CONSTEXPR npu_set_scale1_length_t &set_length(uint32_t value)
+        {
+            length = static_cast<uint32_t>(value) & ((1U << 20) - 1);
+            return *this;
+        }
+#ifdef NPU_DISASSEMBLE
+        void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const
+        {
+            fields.push_back(std::make_pair<std::string, std::string>("length", std::to_string(length)));
+        }
+#endif
+#endif
+    };
+#ifdef __cplusplus
+};
+#endif
+#define NPU_OP_STRUCTS                                                                                                 \
+    NPU_OP_(stop)                                                                                                      \
+    NPU_OP_(irq)                                                                                                       \
+    NPU_OP_(conv)                                                                                                      \
+    NPU_OP_(depthwise)                                                                                                 \
+    NPU_OP_(pool)                                                                                                      \
+    NPU_OP_(elementwise)                                                                                               \
+    NPU_OP_(dma_start)                                                                                                 \
+    NPU_OP_(dma_wait)                                                                                                  \
+    NPU_OP_(kernel_wait)                                                                                               \
+    NPU_OP_(pmu_mask)
+
+#define NPU_SET_STRUCTS                                                                                                \
+    NPU_SET_(ifm_pad_top)                                                                                              \
+    NPU_SET_(ifm_pad_left)                                                                                             \
+    NPU_SET_(ifm_pad_right)                                                                                            \
+    NPU_SET_(ifm_pad_bottom)                                                                                           \
+    NPU_SET_(ifm_depth_m1)                                                                                             \
+    NPU_SET_(ifm_precision)                                                                                            \
+    NPU_SET_(ifm_upscale)                                                                                              \
+    NPU_SET_(ifm_zero_point)                                                                                           \
+    NPU_SET_(ifm_width0_m1)                                                                                            \
+    NPU_SET_(ifm_height0_m1)                                                                                           \
+    NPU_SET_(ifm_height1_m1)                                                                                           \
+    NPU_SET_(ifm_ib_end)                                                                                               \
+    NPU_SET_(ifm_region)                                                                                               \
+    NPU_SET_(ofm_width_m1)                                                                                             \
+    NPU_SET_(ofm_height_m1)                                                                                            \
+    NPU_SET_(ofm_depth_m1)                                                                                             \
+    NPU_SET_(ofm_precision)                                                                                            \
+    NPU_SET_(ofm_blk_width_m1)                                                                                         \
+    NPU_SET_(ofm_blk_height_m1)                                                                                        \
+    NPU_SET_(ofm_blk_depth_m1)                                                                                         \
+    NPU_SET_(ofm_zero_point)                                                                                           \
+    NPU_SET_(ofm_width0_m1)                                                                                            \
+    NPU_SET_(ofm_height0_m1)                                                                                           \
+    NPU_SET_(ofm_height1_m1)                                                                                           \
+    NPU_SET_(ofm_region)                                                                                               \
+    NPU_SET_(kernel_width_m1)                                                                                          \
+    NPU_SET_(kernel_height_m1)                                                                                         \
+    NPU_SET_(kernel_stride)                                                                                            \
+    NPU_SET_(parallel_mode)                                                                                            \
+    NPU_SET_(acc_format)                                                                                               \
+    NPU_SET_(activation)                                                                                               \
+    NPU_SET_(activation_min)                                                                                           \
+    NPU_SET_(activation_max)                                                                                           \
+    NPU_SET_(weight_region)                                                                                            \
+    NPU_SET_(scale_region)                                                                                             \
+    NPU_SET_(ab_start)                                                                                                 \
+    NPU_SET_(blockdep)                                                                                                 \
+    NPU_SET_(dma0_src_region)                                                                                          \
+    NPU_SET_(dma0_dst_region)                                                                                          \
+    NPU_SET_(dma0_size0)                                                                                               \
+    NPU_SET_(dma0_size1)                                                                                               \
+    NPU_SET_(ifm2_broadcast)                                                                                           \
+    NPU_SET_(ifm2_scalar)                                                                                              \
+    NPU_SET_(ifm2_precision)                                                                                           \
+    NPU_SET_(ifm2_zero_point)                                                                                          \
+    NPU_SET_(ifm2_width0_m1)                                                                                           \
+    NPU_SET_(ifm2_height0_m1)                                                                                          \
+    NPU_SET_(ifm2_height1_m1)                                                                                          \
+    NPU_SET_(ifm2_ib_start)                                                                                            \
+    NPU_SET_(ifm2_region)                                                                                              \
+    NPU_SET_(ifm_base0)                                                                                                \
+    NPU_SET_(ifm_base1)                                                                                                \
+    NPU_SET_(ifm_base2)                                                                                                \
+    NPU_SET_(ifm_base3)                                                                                                \
+    NPU_SET_(ifm_stride_x)                                                                                             \
+    NPU_SET_(ifm_stride_y)                                                                                             \
+    NPU_SET_(ifm_stride_c)                                                                                             \
+    NPU_SET_(ofm_base0)                                                                                                \
+    NPU_SET_(ofm_base1)                                                                                                \
+    NPU_SET_(ofm_base2)                                                                                                \
+    NPU_SET_(ofm_base3)                                                                                                \
+    NPU_SET_(ofm_stride_x)                                                                                             \
+    NPU_SET_(ofm_stride_y)                                                                                             \
+    NPU_SET_(ofm_stride_c)                                                                                             \
+    NPU_SET_(weight_base)                                                                                              \
+    NPU_SET_(weight_length)                                                                                            \
+    NPU_SET_(scale_base)                                                                                               \
+    NPU_SET_(scale_length)                                                                                             \
+    NPU_SET_(ofm_scale)                                                                                                \
+    NPU_SET_(opa_scale)                                                                                                \
+    NPU_SET_(opb_scale)                                                                                                \
+    NPU_SET_(dma0_src)                                                                                                 \
+    NPU_SET_(dma0_dst)                                                                                                 \
+    NPU_SET_(dma0_len)                                                                                                 \
+    NPU_SET_(dma0_skip0)                                                                                               \
+    NPU_SET_(dma0_skip1)                                                                                               \
+    NPU_SET_(ifm2_base0)                                                                                               \
+    NPU_SET_(ifm2_base1)                                                                                               \
+    NPU_SET_(ifm2_base2)                                                                                               \
+    NPU_SET_(ifm2_base3)                                                                                               \
+    NPU_SET_(ifm2_stride_x)                                                                                            \
+    NPU_SET_(ifm2_stride_y)                                                                                            \
+    NPU_SET_(ifm2_stride_c)                                                                                            \
+    NPU_SET_(weight1_base)                                                                                             \
+    NPU_SET_(weight1_length)                                                                                           \
+    NPU_SET_(scale1_base)                                                                                              \
+    NPU_SET_(scale1_length)
+
+#define EXPAND_ACC_FORMAT(FUNC, SEP) FUNC(acc_format, I32) SEP FUNC(acc_format, I40) SEP FUNC(acc_format, F16)
+
+#define EXPAND_ACTIVATION_CLIP_RANGE(FUNC, SEP)                                                                        \
+    FUNC(activation_clip_range, OFM_PRECISION)                                                                         \
+    SEP FUNC(activation_clip_range, FORCE_UINT8) SEP FUNC(activation_clip_range, FORCE_INT8)                           \
+        SEP FUNC(activation_clip_range, FORCE_INT16)
+
+#define EXPAND_ACTIVATION_FORMAT(FUNC, SEP) FUNC(activation_format, NHWC) SEP FUNC(activation_format, NHCWB16)
+
+#define EXPAND_ACTIVATION_FUNCTION(FUNC, SEP)                                                                          \
+    FUNC(activation_function, RELU)                                                                                    \
+    SEP FUNC(activation_function, TANH) SEP FUNC(activation_function, SIGMOID) SEP FUNC(activation_function, TABLE_0)  \
+        SEP FUNC(activation_function, TABLE_1) SEP FUNC(activation_function, TABLE_2)                                  \
+            SEP FUNC(activation_function, TABLE_3) SEP FUNC(activation_function, TABLE_4)                              \
+                SEP FUNC(activation_function, TABLE_5) SEP FUNC(activation_function, TABLE_6)                          \
+                    SEP FUNC(activation_function, TABLE_7)
+
+#define EXPAND_ACTIVATION_PRECISION(FUNC, SEP)                                                                         \
+    FUNC(activation_precision, B8)                                                                                     \
+    SEP FUNC(activation_precision, B16) SEP FUNC(activation_precision, B32) SEP FUNC(activation_precision, B64)
+
+#define EXPAND_ACTIVATION_TYPE(FUNC, SEP) FUNC(activation_type, UNSIGNED) SEP FUNC(activation_type, SIGNED)
+
+#define EXPAND_AXI_MEM_ENCODING(FUNC, SEP)                                                                             \
+    FUNC(axi_mem_encoding, DEVICE_NON_BUFFERABLE)                                                                      \
+    SEP FUNC(axi_mem_encoding, DEVICE_BUFFERABLE) SEP FUNC(axi_mem_encoding, NORMAL_NON_CACHEABLE_NON_BUFFERABLE)      \
+        SEP FUNC(axi_mem_encoding, NORMAL_NON_CACHEABLE_BUFFERABLE)                                                    \
+            SEP FUNC(axi_mem_encoding, WRITE_THROUGH_NO_ALLOCATE)                                                      \
+                SEP FUNC(axi_mem_encoding, WRITE_THROUGH_READ_ALLOCATE)                                                \
+                    SEP FUNC(axi_mem_encoding, WRITE_THROUGH_WRITE_ALLOCATE)                                           \
+                        SEP FUNC(axi_mem_encoding, WRITE_THROUGH_READ_AND_WRITE_ALLOCATE)                              \
+                            SEP FUNC(axi_mem_encoding, WRITE_BACK_NO_ALLOCATE)                                         \
+                                SEP FUNC(axi_mem_encoding, WRITE_BACK_READ_ALLOCATE)                                   \
+                                    SEP FUNC(axi_mem_encoding, WRITE_BACK_WRITE_ALLOCATE)                              \
+                                        SEP FUNC(axi_mem_encoding, WRITE_BACK_READ_AND_WRITE_ALLOCATE)
+
+#define EXPAND_BROADCAST_MODE(FUNC, SEP) FUNC(broadcast_mode, DISABLE) SEP FUNC(broadcast_mode, ENABLE)
+
+#define EXPAND_CMD0_OPCODE(FUNC, SEP)                                                                                  \
+    FUNC(cmd0_opcode, NPU_OP_STOP)                                                                                     \
+    SEP FUNC(cmd0_opcode, NPU_OP_IRQ) SEP FUNC(cmd0_opcode, NPU_OP_CONV) SEP FUNC(                                     \
+        cmd0_opcode, NPU_OP_DEPTHWISE) SEP FUNC(cmd0_opcode, NPU_OP_POOL) SEP FUNC(cmd0_opcode, NPU_OP_ELEMENTWISE)    \
+        SEP FUNC(cmd0_opcode, NPU_OP_DMA_START) SEP FUNC(cmd0_opcode, NPU_OP_DMA_WAIT) SEP FUNC(                       \
+            cmd0_opcode, NPU_OP_KERNEL_WAIT) SEP FUNC(cmd0_opcode, NPU_OP_PMU_MASK) SEP FUNC(cmd0_opcode,              \
+                                                                                             NPU_SET_IFM_PAD_TOP)      \
+            SEP FUNC(cmd0_opcode, NPU_SET_IFM_PAD_LEFT) SEP FUNC(cmd0_opcode, NPU_SET_IFM_PAD_RIGHT) SEP FUNC(         \
+                cmd0_opcode, NPU_SET_IFM_PAD_BOTTOM) SEP FUNC(cmd0_opcode,                                             \
+                                                              NPU_SET_IFM_DEPTH_M1) SEP FUNC(cmd0_opcode,              \
+                                                                                             NPU_SET_IFM_PRECISION)    \
+                SEP FUNC(cmd0_opcode, NPU_SET_IFM_UPSCALE) SEP FUNC(cmd0_opcode, NPU_SET_IFM_ZERO_POINT) SEP FUNC(     \
+                    cmd0_opcode, NPU_SET_IFM_WIDTH0_M1) SEP FUNC(cmd0_opcode, NPU_SET_IFM_HEIGHT0_M1)                  \
+                    SEP FUNC(cmd0_opcode, NPU_SET_IFM_HEIGHT1_M1) SEP FUNC(cmd0_opcode, NPU_SET_IFM_IB_END) SEP FUNC(  \
+                        cmd0_opcode, NPU_SET_IFM_REGION) SEP FUNC(cmd0_opcode, NPU_SET_OFM_WIDTH_M1)                   \
+                        SEP FUNC(cmd0_opcode, NPU_SET_OFM_HEIGHT_M1) SEP FUNC(cmd0_opcode, NPU_SET_OFM_DEPTH_M1)       \
+                            SEP FUNC(cmd0_opcode, NPU_SET_OFM_PRECISION) SEP FUNC(                                     \
+                                cmd0_opcode, NPU_SET_OFM_BLK_WIDTH_M1) SEP FUNC(cmd0_opcode,                           \
+                                                                                NPU_SET_OFM_BLK_HEIGHT_M1)             \
+                                SEP FUNC(cmd0_opcode, NPU_SET_OFM_BLK_DEPTH_M1) SEP FUNC(                              \
+                                    cmd0_opcode, NPU_SET_OFM_ZERO_POINT) SEP FUNC(cmd0_opcode, NPU_SET_OFM_WIDTH0_M1)  \
+                                    SEP FUNC(cmd0_opcode, NPU_SET_OFM_HEIGHT0_M1) SEP FUNC(                            \
+                                        cmd0_opcode,                                                                   \
+                                        NPU_SET_OFM_HEIGHT1_M1) SEP FUNC(cmd0_opcode, NPU_SET_OFM_REGION)              \
+                                        SEP FUNC(cmd0_opcode, NPU_SET_KERNEL_WIDTH_M1) SEP FUNC(                       \
+                                            cmd0_opcode,                                                               \
+                                            NPU_SET_KERNEL_HEIGHT_M1) SEP FUNC(cmd0_opcode, NPU_SET_KERNEL_STRIDE)     \
+                                            SEP FUNC(cmd0_opcode, NPU_SET_PARALLEL_MODE) SEP FUNC(                     \
+                                                cmd0_opcode,                                                           \
+                                                NPU_SET_ACC_FORMAT) SEP FUNC(cmd0_opcode, NPU_SET_ACTIVATION)          \
+                                                SEP FUNC(cmd0_opcode,                                                  \
+                                                         NPU_SET_ACTIVATION_MIN) SEP FUNC(cmd0_opcode,                 \
+                                                                                          NPU_SET_ACTIVATION_MAX)      \
+                                                    SEP FUNC(cmd0_opcode, NPU_SET_WEIGHT_REGION) SEP FUNC(             \
+                                                        cmd0_opcode,                                                   \
+                                                        NPU_SET_SCALE_REGION) SEP FUNC(cmd0_opcode, NPU_SET_AB_START)  \
+                                                        SEP FUNC(cmd0_opcode, NPU_SET_BLOCKDEP)                        \
+                                                            SEP FUNC(cmd0_opcode, NPU_SET_DMA0_SRC_REGION) SEP FUNC(   \
+                                                                cmd0_opcode,                                           \
+                                                                NPU_SET_DMA0_DST_REGION) SEP FUNC(cmd0_opcode,         \
+                                                                                                  NPU_SET_DMA0_SIZE0)  \
+                                                                SEP FUNC(cmd0_opcode, NPU_SET_DMA0_SIZE1) SEP FUNC(    \
+                                                                    cmd0_opcode,                                       \
+                                                                    NPU_SET_IFM2_BROADCAST) SEP                        \
+                                                                    FUNC(cmd0_opcode, NPU_SET_IFM2_SCALAR) SEP FUNC(   \
+                                                                        cmd0_opcode,                                   \
+                                                                        NPU_SET_IFM2_PRECISION) SEP                    \
+                                                                        FUNC(cmd0_opcode, NPU_SET_IFM2_ZERO_POINT) SEP \
+                                                                            FUNC(cmd0_opcode,                          \
+                                                                                 NPU_SET_IFM2_WIDTH0_M1) SEP           \
+                                                                                FUNC(cmd0_opcode,                      \
+                                                                                     NPU_SET_IFM2_HEIGHT0_M1) SEP      \
+                                                                                    FUNC(cmd0_opcode,                  \
+                                                                                         NPU_SET_IFM2_HEIGHT1_M1)      \
+                                                                                        SEP FUNC(                      \
+                                                                                            cmd0_opcode,               \
+                                                                                            NPU_SET_IFM2_IB_START)     \
+                                                                                            SEP FUNC(                  \
+                                                                                                cmd0_opcode,           \
+                                                                                                NPU_SET_IFM2_REGION)
+
+#define EXPAND_CMD1_OPCODE(FUNC, SEP)                                                                                  \
+    FUNC(cmd1_opcode, NPU_SET_IFM_BASE0)                                                                               \
+    SEP FUNC(cmd1_opcode, NPU_SET_IFM_BASE1) SEP FUNC(cmd1_opcode, NPU_SET_IFM_BASE2)                                  \
+        SEP FUNC(cmd1_opcode, NPU_SET_IFM_BASE3) SEP FUNC(cmd1_opcode, NPU_SET_IFM_STRIDE_X)                           \
+            SEP FUNC(cmd1_opcode, NPU_SET_IFM_STRIDE_Y) SEP FUNC(cmd1_opcode, NPU_SET_IFM_STRIDE_C) SEP FUNC(          \
+                cmd1_opcode, NPU_SET_OFM_BASE0) SEP FUNC(cmd1_opcode, NPU_SET_OFM_BASE1)                               \
+                SEP FUNC(cmd1_opcode, NPU_SET_OFM_BASE2) SEP FUNC(cmd1_opcode, NPU_SET_OFM_BASE3) SEP FUNC(            \
+                    cmd1_opcode, NPU_SET_OFM_STRIDE_X) SEP FUNC(cmd1_opcode, NPU_SET_OFM_STRIDE_Y)                     \
+                    SEP FUNC(cmd1_opcode, NPU_SET_OFM_STRIDE_C) SEP FUNC(cmd1_opcode, NPU_SET_WEIGHT_BASE) SEP FUNC(   \
+                        cmd1_opcode, NPU_SET_WEIGHT_LENGTH) SEP FUNC(cmd1_opcode, NPU_SET_SCALE_BASE)                  \
+                        SEP FUNC(cmd1_opcode, NPU_SET_SCALE_LENGTH) SEP FUNC(cmd1_opcode, NPU_SET_OFM_SCALE)           \
+                            SEP FUNC(cmd1_opcode, NPU_SET_OPA_SCALE) SEP FUNC(cmd1_opcode, NPU_SET_OPB_SCALE)          \
+                                SEP FUNC(cmd1_opcode, NPU_SET_DMA0_SRC) SEP FUNC(cmd1_opcode, NPU_SET_DMA0_DST)        \
+                                    SEP FUNC(cmd1_opcode, NPU_SET_DMA0_LEN) SEP FUNC(cmd1_opcode, NPU_SET_DMA0_SKIP0)  \
+                                        SEP FUNC(cmd1_opcode, NPU_SET_DMA0_SKIP1) SEP FUNC(                            \
+                                            cmd1_opcode, NPU_SET_IFM2_BASE0) SEP FUNC(cmd1_opcode, NPU_SET_IFM2_BASE1) \
+                                            SEP FUNC(cmd1_opcode, NPU_SET_IFM2_BASE2) SEP FUNC(cmd1_opcode,            \
+                                                                                               NPU_SET_IFM2_BASE3)     \
+                                                SEP FUNC(cmd1_opcode, NPU_SET_IFM2_STRIDE_X)                           \
+                                                    SEP FUNC(cmd1_opcode, NPU_SET_IFM2_STRIDE_Y)                       \
+                                                        SEP FUNC(cmd1_opcode, NPU_SET_IFM2_STRIDE_C)                   \
+                                                            SEP FUNC(cmd1_opcode, NPU_SET_WEIGHT1_BASE)                \
+                                                                SEP FUNC(cmd1_opcode, NPU_SET_WEIGHT1_LENGTH)          \
+                                                                    SEP FUNC(cmd1_opcode, NPU_SET_SCALE1_BASE)         \
+                                                                        SEP FUNC(cmd1_opcode, NPU_SET_SCALE1_LENGTH)
+
+#define EXPAND_CMD_CTRL(FUNC, SEP) FUNC(cmd_ctrl, CMD0_CTRL) SEP FUNC(cmd_ctrl, CMD1_CTRL)
+
+#define EXPAND_CUSTOM_DMA(FUNC, SEP) FUNC(custom_dma, NOT_IMPLEMENTED) SEP FUNC(custom_dma, IMPLEMENTED)
+
+#define EXPAND_DMA_FAULT_SRC(FUNC, SEP) FUNC(dma_fault_src, AXI_M0) SEP FUNC(dma_fault_src, AXI_M1)
+
+#define EXPAND_DMA_REGION_MODE(FUNC, SEP) FUNC(dma_region_mode, EXTERNAL) SEP FUNC(dma_region_mode, INTERNAL)
+
+#define EXPAND_DMA_STRIDE_MODE(FUNC, SEP)                                                                              \
+    FUNC(dma_stride_mode, D1) SEP FUNC(dma_stride_mode, D2) SEP FUNC(dma_stride_mode, D3)
+
+#define EXPAND_ELEMENTWISE_MODE(FUNC, SEP)                                                                             \
+    FUNC(elementwise_mode, MUL)                                                                                        \
+    SEP FUNC(elementwise_mode, ADD) SEP FUNC(elementwise_mode, SUB) SEP FUNC(elementwise_mode, MIN)                    \
+        SEP FUNC(elementwise_mode, MAX) SEP FUNC(elementwise_mode, LRELU) SEP FUNC(elementwise_mode, ABS)              \
+            SEP FUNC(elementwise_mode, CLZ) SEP FUNC(elementwise_mode, SHR) SEP FUNC(elementwise_mode, SHL)
+
+#define EXPAND_FUNCTIONAL_SAFETY(FUNC, SEP)                                                                            \
+    FUNC(functional_safety, NOT_IMPLEMENTED) SEP FUNC(functional_safety, IMPLEMENTED)
+
+#define EXPAND_IFM2_OPERAND_ORDER(FUNC, SEP) FUNC(ifm2_operand_order, ORDER_B) SEP FUNC(ifm2_operand_order, ORDER_A)
+
+#define EXPAND_IFM_SCALE_MODE(FUNC, SEP)                                                                               \
+    FUNC(ifm_scale_mode, OPA_OPB_16) SEP FUNC(ifm_scale_mode, OPA_32) SEP FUNC(ifm_scale_mode, OPB_32)
+
+#define EXPAND_IFM_UPSCALE_MODE(FUNC, SEP)                                                                             \
+    FUNC(ifm_upscale_mode, NONE) SEP FUNC(ifm_upscale_mode, NEAREST) SEP FUNC(ifm_upscale_mode, ZEROS)
+
+#define EXPAND_KERNEL_DECOMPOSITION(FUNC, SEP) FUNC(kernel_decomposition, D8X8) SEP FUNC(kernel_decomposition, D4X4)
+
+#define EXPAND_KERNEL_DILATION(FUNC, SEP) FUNC(kernel_dilation, NONE) SEP FUNC(kernel_dilation, X2)
+
+#define EXPAND_MAX_BEATS(FUNC, SEP) FUNC(max_beats, B64) SEP FUNC(max_beats, B128) SEP FUNC(max_beats, B256)
+
+#define EXPAND_MEM_ATTR(FUNC, SEP)                                                                                     \
+    FUNC(mem_attr, AXI0_OUTSTANDING_COUNTER0)                                                                          \
+    SEP FUNC(mem_attr, AXI0_OUTSTANDING_COUNTER1) SEP FUNC(mem_attr, AXI1_OUTSTANDING_COUNTER2)                        \
+        SEP FUNC(mem_attr, AXI1_OUTSTANDING_COUNTER3)
+
+#define EXPAND_OFM_SCALE_MODE(FUNC, SEP) FUNC(ofm_scale_mode, PER_CHANNEL) SEP FUNC(ofm_scale_mode, GLOBAL)
+
+#define EXPAND_PARALLEL_MODE(FUNC, SEP) FUNC(parallel_mode, SINGLE_CORE) SEP FUNC(parallel_mode, DUAL_CORE_DEPTH)
+
+#define EXPAND_PMU_AXI_CHANNEL(FUNC, SEP)                                                                              \
+    FUNC(pmu_axi_channel, RD_CMD)                                                                                      \
+    SEP FUNC(pmu_axi_channel, RD_IFM) SEP FUNC(pmu_axi_channel, RD_WEIGHTS) SEP FUNC(pmu_axi_channel, RD_SCALE_BIAS)   \
+        SEP FUNC(pmu_axi_channel, RD_MEM2MEM) SEP FUNC(pmu_axi_channel, WR_OFM) SEP FUNC(pmu_axi_channel, WR_MEM2MEM)
+
+#define EXPAND_PMU_EVENT(FUNC, SEP)                                                                                                    \
+    FUNC(pmu_event, NO_EVENT)                                                                                                          \
+    SEP FUNC(pmu_event, CYCLE) SEP FUNC(pmu_event, NPU_IDLE) SEP FUNC(pmu_event, CC_STALLED_ON_BLOCKDEP) SEP FUNC(                     \
+        pmu_event, CC_STALLED_ON_SHRAM_RECONFIG) SEP FUNC(pmu_event, NPU_ACTIVE) SEP FUNC(pmu_event, MAC_ACTIVE)                       \
+        SEP FUNC(pmu_event, MAC_ACTIVE_8BIT) SEP FUNC(pmu_event, MAC_ACTIVE_16BIT) SEP FUNC(                                           \
+            pmu_event, MAC_DPU_ACTIVE) SEP FUNC(pmu_event, MAC_STALLED_BY_WD_ACC) SEP FUNC(pmu_event,                                  \
+                                                                                           MAC_STALLED_BY_WD)                          \
+            SEP FUNC(pmu_event, MAC_STALLED_BY_ACC) SEP FUNC(pmu_event, MAC_STALLED_BY_IB) SEP FUNC(                                   \
+                pmu_event,                                                                                                             \
+                MAC_ACTIVE_32BIT) SEP FUNC(pmu_event,                                                                                  \
+                                           MAC_STALLED_BY_INT_W) SEP FUNC(pmu_event,                                                   \
+                                                                          MAC_STALLED_BY_INT_ACC) SEP FUNC(pmu_event,                  \
+                                                                                                           AO_ACTIVE)                  \
+                SEP FUNC(pmu_event, AO_ACTIVE_8BIT) SEP FUNC(pmu_event, AO_ACTIVE_16BIT) SEP FUNC(                                     \
+                    pmu_event, AO_STALLED_BY_OFMP_OB) SEP FUNC(pmu_event, AO_STALLED_BY_OFMP) SEP                                      \
+                    FUNC(pmu_event, AO_STALLED_BY_OB) SEP FUNC(pmu_event, AO_STALLED_BY_ACC_IB) SEP FUNC(                              \
+                        pmu_event, AO_STALLED_BY_ACC) SEP FUNC(pmu_event, AO_STALLED_BY_IB) SEP                                        \
+                        FUNC(pmu_event, WD_ACTIVE) SEP FUNC(pmu_event, WD_STALLED) SEP FUNC(pmu_event, WD_STALLED_BY_WS) SEP FUNC(     \
+                            pmu_event, WD_STALLED_BY_WD_BUF) SEP FUNC(pmu_event,                                                       \
+                                                                      WD_PARSE_ACTIVE) SEP                                             \
+                            FUNC(pmu_event, WD_PARSE_STALLED) SEP FUNC(pmu_event, WD_PARSE_STALLED_IN) SEP FUNC(                       \
+                                pmu_event, WD_PARSE_STALLED_OUT) SEP FUNC(pmu_event,                                                   \
+                                                                          WD_TRANS_WS) SEP                                             \
+                                FUNC(pmu_event, WD_TRANS_WB) SEP FUNC(pmu_event, WD_TRANS_DW0) SEP FUNC(                               \
+                                    pmu_event, WD_TRANS_DW1) SEP FUNC(pmu_event,                                                       \
+                                                                      AXI0_RD_TRANS_ACCEPTED) SEP                                      \
+                                    FUNC(pmu_event, AXI0_RD_TRANS_COMPLETED) SEP FUNC(pmu_event, AXI0_RD_DATA_BEAT_RECEIVED) SEP FUNC( \
+                                        pmu_event, AXI0_RD_TRAN_REQ_STALLED) SEP FUNC(pmu_event,                                       \
+                                                                                      AXI0_WR_TRANS_ACCEPTED) SEP                      \
+                                        FUNC(pmu_event, AXI0_WR_TRANS_COMPLETED_M) SEP FUNC(                                           \
+                                            pmu_event, AXI0_WR_TRANS_COMPLETED_S) SEP                                                  \
+                                            FUNC(pmu_event, AXI0_WR_DATA_BEAT_WRITTEN) SEP FUNC(                                       \
+                                                pmu_event, AXI0_WR_TRAN_REQ_STALLED) SEP                                               \
+                                                FUNC(pmu_event, AXI0_WR_DATA_BEAT_STALLED) SEP FUNC(                                   \
+                                                    pmu_event,                                                                         \
+                                                    AXI0_ENABLED_CYCLES) SEP FUNC(pmu_event,                                           \
+                                                                                  AXI0_RD_STALL_LIMIT) SEP                             \
+                                                    FUNC(pmu_event, AXI0_WR_STALL_LIMIT) SEP FUNC(                                     \
+                                                        pmu_event,                                                                     \
+                                                        AXI_LATENCY_ANY) SEP FUNC(pmu_event,                                           \
+                                                                                  AXI_LATENCY_32) SEP                                  \
+                                                        FUNC(pmu_event,                                                                \
+                                                             AXI_LATENCY_64) SEP FUNC(pmu_event,                                       \
+                                                                                      AXI_LATENCY_128) SEP                             \
+                                                            FUNC(pmu_event, AXI_LATENCY_256) SEP FUNC(                                 \
+                                                                pmu_event,                                                             \
+                                                                AXI_LATENCY_512) SEP FUNC(pmu_event,                                   \
+                                                                                          AXI_LATENCY_1024) SEP                        \
+                                                                FUNC(pmu_event, ECC_DMA) SEP FUNC(                                     \
+                                                                    pmu_event,                                                         \
+                                                                    ECC_SB0) SEP FUNC(pmu_event,                                       \
+                                                                                      AXI1_RD_TRANS_ACCEPTED) SEP                      \
+                                                                    FUNC(pmu_event, AXI1_RD_TRANS_COMPLETED) SEP FUNC(                 \
+                                                                        pmu_event, AXI1_RD_DATA_BEAT_RECEIVED) SEP                     \
+                                                                        FUNC(pmu_event, AXI1_RD_TRAN_REQ_STALLED) SEP FUNC(            \
+                                                                            pmu_event, AXI1_WR_TRANS_ACCEPTED) SEP                     \
+                                                                            FUNC(pmu_event, AXI1_WR_TRANS_COMPLETED_M) SEP FUNC(       \
+                                                                                pmu_event,                                             \
+                                                                                AXI1_WR_TRANS_COMPLETED_S) SEP                         \
+                                                                                FUNC(pmu_event,                                        \
+                                                                                     AXI1_WR_DATA_BEAT_WRITTEN) SEP                    \
+                                                                                    FUNC(pmu_event,                                    \
+                                                                                         AXI1_WR_TRAN_REQ_STALLED) SEP                 \
+                                                                                        FUNC(                                          \
+                                                                                            pmu_event,                                 \
+                                                                                            AXI1_WR_DATA_BEAT_STALLED) SEP             \
+                                                                                            FUNC(                                      \
+                                                                                                pmu_event,                             \
+                                                                                                AXI1_ENABLED_CYCLES) SEP               \
+                                                                                                FUNC(                                  \
+                                                                                                    pmu_event,                         \
+                                                                                                    AXI1_RD_STALL_LIMIT) SEP           \
+                                                                                                    FUNC(                              \
+                                                                                                        pmu_event,                     \
+                                                                                                        AXI1_WR_STALL_LIMIT)           \
+                                                                                                        SEP FUNC(                      \
+                                                                                                            pmu_event,                 \
+                                                                                                            ECC_SB1)
+
+#define EXPAND_POOLING_MODE(FUNC, SEP)                                                                                 \
+    FUNC(pooling_mode, MAX) SEP FUNC(pooling_mode, AVERAGE) SEP FUNC(pooling_mode, REDUCE_SUM)
+
+#define EXPAND_PRIVILEGE_LEVEL(FUNC, SEP) FUNC(privilege_level, USER) SEP FUNC(privilege_level, PRIVILEGED)
+
+#define EXPAND_ROUND_MODE(FUNC, SEP) FUNC(round_mode, DBL) SEP FUNC(round_mode, TRUNCATE) SEP FUNC(round_mode, NATURAL)
+
+#define EXPAND_SECURITY_LEVEL(FUNC, SEP) FUNC(security_level, SECURE) SEP FUNC(security_level, NON_SECURE)
+
+#define EXPAND_STATE(FUNC, SEP) FUNC(state, STOPPED) SEP FUNC(state, RUNNING)
+
+#define EXPAND_WD_CORE_SLICE_STATE(FUNC, SEP)                                                                          \
+    FUNC(wd_core_slice_state, HEADER) SEP FUNC(wd_core_slice_state, PALETTE) SEP FUNC(wd_core_slice_state, WEIGHTS)
+
+#define EXPAND_WD_CTRL_STATE(FUNC, SEP)                                                                                \
+    FUNC(wd_ctrl_state, IDLE)                                                                                          \
+    SEP FUNC(wd_ctrl_state, DRAIN) SEP FUNC(wd_ctrl_state, OFD_INIT) SEP FUNC(wd_ctrl_state, OFD_RUN)
+
+#define EXPAND_WEIGHT_ORDER(FUNC, SEP) FUNC(weight_order, DEPTH_FIRST) SEP FUNC(weight_order, PART_KERNEL_FIRST)
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/src/ethosu_common.h b/src/ethosu_common.h
deleted file mode 100644
index 90cc6da..0000000
--- a/src/ethosu_common.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * Copyright (c) 2019-2021 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef ETHOSU_COMMON_H
-#define ETHOSU_COMMON_H
-
-/******************************************************************************
- * Includes
- ******************************************************************************/
-
-/******************************************************************************
- * Defines
- ******************************************************************************/
-
-#define UNUSED(x) ((void)x)
-
-#define MASK_0_31_BITS (0xFFFFFFFF)
-#define MASK_32_47_BITS (0xFFFF00000000)
-
-#endif // ETHOSU_COMMON_H
diff --git a/src/ethosu_device.h b/src/ethosu_device.h
new file mode 100644
index 0000000..2f41d5c
--- /dev/null
+++ b/src/ethosu_device.h
@@ -0,0 +1,137 @@
+/*
+ * Copyright (c) 2019-2021 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef ETHOSU_DEVICE_H
+#define ETHOSU_DEVICE_H
+
+/******************************************************************************
+ * Includes
+ ******************************************************************************/
+#include "ethosu_types.h"
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/******************************************************************************
+ * Defines
+ ******************************************************************************/
+
+#ifndef ETHOSU_PMU_NCOUNTERS
+#define ETHOSU_PMU_NCOUNTERS 4
+#endif
+
+/******************************************************************************
+ * Types
+ ******************************************************************************/
+struct NPU_REG; // Forward declare, to be implemented by each device
+
+struct ethosu_device
+{
+    volatile struct NPU_REG *reg; // Register map
+    uint32_t secure;
+    uint32_t privileged;
+};
+
+/******************************************************************************
+ * Prototypes
+ ******************************************************************************/
+
+/**
+ * Initialize the device.
+ */
+struct ethosu_device *ethosu_dev_init(const void *base_address, uint32_t secure_enable, uint32_t privilege_enable);
+
+/**
+ * Deinitialize the device.
+ */
+void ethosu_dev_deinit(struct ethosu_device *dev);
+
+/**
+ * Initialize AXI settings for device.
+ */
+enum ethosu_error_codes ethosu_dev_axi_init(struct ethosu_device *dev);
+
+/**
+ * Execute a given command stream on NPU.
+ * \param[in] cmd_stream_ptr   Pointer to the command stream
+ * \param[in] cms_length       Command stream length
+ * \param[in] base_addr        Pointer to array of base addresses
+ *                             - 0: weight tensor
+ *                             - 1: scratch tensor
+ *                             - All input tensors
+ *                             - All output tensors
+ * \param[in] num_base_addr    Number of base addresses.
+ * \return                     \ref ethosu_error_codes
+ */
+enum ethosu_error_codes ethosu_dev_run_command_stream(struct ethosu_device *dev,
+                                                      const uint8_t *cmd_stream_ptr,
+                                                      uint32_t cms_length,
+                                                      const uint64_t *base_addr,
+                                                      int num_base_addr);
+
+/**
+ *  Interrupt handler on device layer
+ * \return                     true if NPU status is OK, otherwise false
+ */
+bool ethosu_dev_handle_interrupt(struct ethosu_device *dev);
+
+/**
+ * Get hardware information from NPU
+ * \param[out] hwinfo          Pointer to the hardware info struct to be filled in.
+ */
+void ethosu_dev_get_hw_info(struct ethosu_device *dev, struct ethosu_hw_info *hwinfo);
+
+/**
+ * Verify that requested security state and privilege mode are active
+ * \return                     32 bit status value
+ */
+bool ethosu_dev_verify_access_state(struct ethosu_device *dev);
+
+/**
+ * Performs a NPU soft reset and waits for the NPU to become ready
+ * \return                     \ref ethosu_error_codes
+ */
+enum ethosu_error_codes ethosu_dev_soft_reset(struct ethosu_device *dev);
+
+/**
+ * Enable/disable clock and power using clock/power q interface.
+ * \param[in] clock_q          Clock q ENABLE/DISABLE \ref clock_q_request.
+ * \param[in] power_q          Power q ENABLE/DISABLE \ref power_q_request.
+ * \return                     \ref ethosu_error_codes
+ */
+enum ethosu_error_codes ethosu_dev_set_clock_and_power(struct ethosu_device *dev,
+                                                       enum ethosu_clock_q_request clock_q,
+                                                       enum ethosu_power_q_request power_q);
+
+/**
+ * Verifies that optimizer parameters from model are compatible with the hardware
+ * \param[in] cfg              Config data from optimizer.
+ * \param[in] id               Id data from optimizer.
+ * \return                     true if parameters match with hardware, false otherwise.
+ */
+bool ethosu_dev_verify_optimizer_config(struct ethosu_device *dev, uint32_t cfg_in, uint32_t id_in);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // ETHOSU_DEVICE_H
diff --git a/src/ethosu_device_u55.c b/src/ethosu_device_u55.c
deleted file mode 100644
index 87add7e..0000000
--- a/src/ethosu_device_u55.c
+++ /dev/null
@@ -1,549 +0,0 @@
-/*
- * Copyright (c) 2019-2021 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#include "ethosu55_interface.h"
-
-#include "ethosu_common.h"
-#include "ethosu_config.h"
-#include "ethosu_device.h"
-#include "ethosu_log.h"
-
-#include <assert.h>
-#include <stddef.h>
-#include <stdio.h>
-
-#define BASEP_OFFSET 4
-#define REG_OFFSET 4
-#define BYTES_1KB 1024
-
-#define ADDRESS_BITS 48
-#define ADDRESS_MASK ((1ull << ADDRESS_BITS) - 1)
-
-enum ethosu_error_codes ethosu_dev_init(struct ethosu_device *dev,
-                                        const void *base_address,
-                                        uint32_t secure_enable,
-                                        uint32_t privilege_enable)
-{
-    dev->base_address = (volatile uintptr_t)base_address;
-    dev->secure       = secure_enable;
-    dev->privileged   = privilege_enable;
-
-    ethosu_dev_save_pmu_config(dev);
-
-    return ETHOSU_SUCCESS;
-}
-
-enum ethosu_error_codes ethosu_dev_get_id(struct ethosu_device *dev, struct ethosu_id *id)
-{
-    struct id_r _id;
-
-    _id.word = ethosu_dev_read_reg(dev, NPU_REG_ID);
-
-    id->version_status = _id.version_status;
-    id->version_minor  = _id.version_minor;
-    id->version_major  = _id.version_major;
-    id->product_major  = _id.product_major;
-    id->arch_patch_rev = _id.arch_patch_rev;
-    id->arch_minor_rev = _id.arch_minor_rev;
-    id->arch_major_rev = _id.arch_major_rev;
-
-    return ETHOSU_SUCCESS;
-}
-
-enum ethosu_error_codes ethosu_dev_get_config(struct ethosu_device *dev, struct ethosu_config *config)
-{
-    struct config_r cfg = {0};
-
-    cfg.word = ethosu_dev_read_reg(dev, NPU_REG_CONFIG);
-
-    config->macs_per_cc        = cfg.macs_per_cc;
-    config->cmd_stream_version = cfg.cmd_stream_version;
-    config->shram_size         = cfg.shram_size;
-    config->custom_dma         = cfg.custom_dma;
-
-    return ETHOSU_SUCCESS;
-}
-
-enum ethosu_error_codes ethosu_dev_run_command_stream(struct ethosu_device *dev,
-                                                      const uint8_t *cmd_stream_ptr,
-                                                      uint32_t cms_length,
-                                                      const uint64_t *base_addr,
-                                                      int num_base_addr)
-{
-    assert(num_base_addr <= ETHOSU_BASEP_INDEXES);
-
-    uint64_t qbase = (uintptr_t)cmd_stream_ptr + BASE_POINTER_OFFSET;
-    assert(qbase <= ADDRESS_MASK);
-    LOG_DEBUG("QBASE=0x%016llx, QSIZE=%u, base_pointer_offset=0x%08x\n", qbase, cms_length, BASE_POINTER_OFFSET);
-
-    ethosu_dev_write_reg(dev, NPU_REG_QBASE0, qbase & 0xffffffff);
-    ethosu_dev_write_reg(dev, NPU_REG_QBASE1, qbase >> 32);
-    ethosu_dev_write_reg(dev, NPU_REG_QSIZE, cms_length);
-
-    for (int i = 0; i < num_base_addr; i++)
-    {
-        uint64_t addr = base_addr[i] + BASE_POINTER_OFFSET;
-        assert(addr <= ADDRESS_MASK);
-        LOG_DEBUG("BASEP%d=0x%016llx\n", i, addr);
-        ethosu_dev_write_reg(dev, NPU_REG_BASEP0 + (2 * i) * BASEP_OFFSET, addr & 0xffffffff);
-        ethosu_dev_write_reg(dev, NPU_REG_BASEP0 + (2 * i + 1) * BASEP_OFFSET, addr >> 32);
-    }
-
-    return ethosu_dev_set_command_run(dev);
-}
-
-enum ethosu_error_codes ethosu_dev_is_irq_raised(struct ethosu_device *dev, uint8_t *irq_raised)
-{
-    struct status_r status;
-
-    status.word = ethosu_dev_read_reg(dev, NPU_REG_STATUS);
-
-    if (status.irq_raised == 1)
-    {
-        *irq_raised = 1;
-    }
-    else
-    {
-        *irq_raised = 0;
-    }
-
-    return ETHOSU_SUCCESS;
-}
-
-enum ethosu_error_codes ethosu_dev_clear_irq_status(struct ethosu_device *dev)
-{
-    struct cmd_r oldcmd;
-    struct cmd_r cmd;
-
-    oldcmd.word = ethosu_dev_read_reg(dev, NPU_REG_CMD);
-
-    cmd.word           = 0;
-    cmd.clear_irq      = 1;
-    cmd.clock_q_enable = oldcmd.clock_q_enable;
-    cmd.power_q_enable = oldcmd.power_q_enable;
-    ethosu_dev_write_reg(dev, NPU_REG_CMD, cmd.word);
-    LOG_DEBUG("CMD=0x%08x\n", cmd.word);
-
-    return ETHOSU_SUCCESS;
-}
-
-enum ethosu_error_codes ethosu_dev_soft_reset(struct ethosu_device *dev)
-{
-    enum ethosu_error_codes return_code = ETHOSU_SUCCESS;
-    struct reset_r reset;
-    struct prot_r prot;
-
-    reset.word        = 0;
-    reset.pending_CPL = dev->privileged ? PRIVILEGE_LEVEL_PRIVILEGED : PRIVILEGE_LEVEL_USER;
-    reset.pending_CSL = dev->secure ? SECURITY_LEVEL_SECURE : SECURITY_LEVEL_NON_SECURE;
-
-    // Reset and set security level
-    LOG_INFO("Soft reset NPU\n");
-    ethosu_dev_write_reg(dev, NPU_REG_RESET, reset.word);
-
-    // Wait for reset to complete
-    return_code = ethosu_dev_wait_for_reset(dev);
-    if (return_code != ETHOSU_SUCCESS)
-    {
-        LOG_ERR("Soft reset timed out\n");
-        return return_code;
-    }
-
-    // Verify that NPU has switched security state and privilege level
-    prot.word = ethosu_dev_read_reg(dev, NPU_REG_PROT);
-    if (prot.active_CPL != reset.pending_CPL || prot.active_CSL != reset.pending_CSL)
-    {
-        LOG_ERR("Failed to switch security state and privilege level\n");
-        // Register access not permitted
-        return ETHOSU_GENERIC_FAILURE;
-    }
-
-    // Save the prot register
-    dev->proto = prot.word;
-
-    // Soft reset will clear the PMU configuration and counters. The shadow PMU counters
-    // are cleared by saving the PMU counters to ram, which will read back zeros.
-    // The PMU configuration will be restored in the invoke function after power save
-    // has been disabled.
-    ethosu_dev_save_pmu_counters(dev);
-
-    return return_code;
-}
-
-enum ethosu_error_codes ethosu_dev_wait_for_reset(struct ethosu_device *dev)
-{
-    struct status_r status;
-
-    // Wait until reset status indicates that reset has been completed
-    for (int i = 0; i < 100000; i++)
-    {
-        status.word = ethosu_dev_read_reg(dev, NPU_REG_STATUS);
-        if (0 == status.reset_status)
-        {
-            break;
-        }
-    }
-
-    if (1 == status.reset_status)
-    {
-        return ETHOSU_GENERIC_FAILURE;
-    }
-
-    return ETHOSU_SUCCESS;
-}
-
-enum ethosu_error_codes ethosu_dev_read_apb_reg(struct ethosu_device *dev,
-                                                uint32_t start_address,
-                                                uint16_t num_reg,
-                                                uint32_t *reg)
-{
-    uint32_t address = start_address;
-
-    assert((start_address + num_reg) < ID_REGISTERS_SIZE);
-
-    for (int i = 0; i < num_reg; i++)
-    {
-        reg[i] = ethosu_dev_read_reg(dev, address);
-        address += REG_OFFSET;
-    }
-
-    return ETHOSU_SUCCESS;
-}
-
-enum ethosu_error_codes ethosu_dev_set_qconfig(struct ethosu_device *dev, enum ethosu_memory_type memory_type)
-{
-    if (memory_type > ETHOSU_AXI1_OUTSTANDING_COUNTER3)
-    {
-        return ETHOSU_INVALID_PARAM;
-    }
-    ethosu_dev_write_reg(dev, NPU_REG_QCONFIG, memory_type);
-    LOG_DEBUG("QCONFIG=0x%08x\n", memory_type);
-
-    return ETHOSU_SUCCESS;
-}
-
-enum ethosu_error_codes ethosu_dev_set_regioncfg(struct ethosu_device *dev,
-                                                 uint8_t region,
-                                                 enum ethosu_memory_type memory_type)
-{
-    struct regioncfg_r regioncfg;
-
-    if (region > 7)
-    {
-        return ETHOSU_INVALID_PARAM;
-    }
-
-    regioncfg.word = ethosu_dev_read_reg(dev, NPU_REG_REGIONCFG);
-    regioncfg.word &= ~(0x3 << (2 * region));
-    regioncfg.word |= (memory_type & 0x3) << (2 * region);
-    ethosu_dev_write_reg(dev, NPU_REG_REGIONCFG, regioncfg.word);
-    LOG_DEBUG("REGIONCFG%u=0x%08x\n", region, regioncfg.word);
-
-    return ETHOSU_SUCCESS;
-}
-
-enum ethosu_error_codes ethosu_dev_set_axi_limit0(struct ethosu_device *dev,
-                                                  enum ethosu_axi_limit_beats max_beats,
-                                                  enum ethosu_axi_limit_mem_type memtype,
-                                                  uint8_t max_reads,
-                                                  uint8_t max_writes)
-{
-    struct axi_limit0_r axi_limit0;
-
-    axi_limit0.word                     = 0;
-    axi_limit0.max_beats                = max_beats;
-    axi_limit0.memtype                  = memtype;
-    axi_limit0.max_outstanding_read_m1  = max_reads - 1;
-    axi_limit0.max_outstanding_write_m1 = max_writes - 1;
-
-    ethosu_dev_write_reg(dev, NPU_REG_AXI_LIMIT0, axi_limit0.word);
-    LOG_DEBUG("AXI_LIMIT0=0x%08x\n", axi_limit0.word);
-
-    return ETHOSU_SUCCESS;
-}
-
-enum ethosu_error_codes ethosu_dev_set_axi_limit1(struct ethosu_device *dev,
-                                                  enum ethosu_axi_limit_beats max_beats,
-                                                  enum ethosu_axi_limit_mem_type memtype,
-                                                  uint8_t max_reads,
-                                                  uint8_t max_writes)
-{
-    struct axi_limit1_r axi_limit1;
-
-    axi_limit1.word                     = 0;
-    axi_limit1.max_beats                = max_beats;
-    axi_limit1.memtype                  = memtype;
-    axi_limit1.max_outstanding_read_m1  = max_reads - 1;
-    axi_limit1.max_outstanding_write_m1 = max_writes - 1;
-
-    ethosu_dev_write_reg(dev, NPU_REG_AXI_LIMIT1, axi_limit1.word);
-    LOG_DEBUG("AXI_LIMIT1=0x%08x\n", axi_limit1.word);
-
-    return ETHOSU_SUCCESS;
-}
-
-enum ethosu_error_codes ethosu_dev_set_axi_limit2(struct ethosu_device *dev,
-                                                  enum ethosu_axi_limit_beats max_beats,
-                                                  enum ethosu_axi_limit_mem_type memtype,
-                                                  uint8_t max_reads,
-                                                  uint8_t max_writes)
-{
-    struct axi_limit2_r axi_limit2;
-
-    axi_limit2.word                     = 0;
-    axi_limit2.max_beats                = max_beats;
-    axi_limit2.memtype                  = memtype;
-    axi_limit2.max_outstanding_read_m1  = max_reads - 1;
-    axi_limit2.max_outstanding_write_m1 = max_writes - 1;
-
-    ethosu_dev_write_reg(dev, NPU_REG_AXI_LIMIT2, axi_limit2.word);
-    LOG_DEBUG("AXI_LIMIT2=0x%08x\n", axi_limit2.word);
-
-    return ETHOSU_SUCCESS;
-}
-
-enum ethosu_error_codes ethosu_dev_set_axi_limit3(struct ethosu_device *dev,
-                                                  enum ethosu_axi_limit_beats max_beats,
-                                                  enum ethosu_axi_limit_mem_type memtype,
-                                                  uint8_t max_reads,
-                                                  uint8_t max_writes)
-{
-    struct axi_limit3_r axi_limit3;
-
-    axi_limit3.word                     = 0;
-    axi_limit3.max_beats                = max_beats;
-    axi_limit3.memtype                  = memtype;
-    axi_limit3.max_outstanding_read_m1  = max_reads - 1;
-    axi_limit3.max_outstanding_write_m1 = max_writes - 1;
-
-    ethosu_dev_write_reg(dev, NPU_REG_AXI_LIMIT3, axi_limit3.word);
-    LOG_DEBUG("AXI_LIMIT3=0x%08x\n", axi_limit3.word);
-
-    return ETHOSU_SUCCESS;
-}
-
-enum ethosu_error_codes ethosu_dev_get_revision(struct ethosu_device *dev, uint32_t *revision)
-{
-    *revision = ethosu_dev_read_reg(dev, NPU_REG_REVISION);
-
-    return ETHOSU_SUCCESS;
-}
-
-uint32_t ethosu_dev_get_qread(struct ethosu_device *dev)
-{
-    return ethosu_dev_read_reg(dev, NPU_REG_QREAD);
-}
-
-uint32_t ethosu_dev_get_status(struct ethosu_device *dev)
-{
-    return ethosu_dev_read_reg(dev, NPU_REG_STATUS);
-}
-
-enum ethosu_error_codes ethosu_dev_get_status_mask(struct ethosu_device *dev, uint16_t *status_mask)
-{
-    struct status_r status;
-
-    status.word  = ethosu_dev_read_reg(dev, NPU_REG_STATUS);
-    *status_mask = status.word & 0xFFFF;
-
-    return ETHOSU_SUCCESS;
-}
-
-enum ethosu_error_codes ethosu_dev_get_irq_history_mask(struct ethosu_device *dev, uint16_t *irq_history_mask)
-{
-    struct status_r status;
-
-    status.word       = ethosu_dev_read_reg(dev, NPU_REG_STATUS);
-    *irq_history_mask = status.irq_history_mask;
-
-    return ETHOSU_SUCCESS;
-}
-
-enum ethosu_error_codes ethosu_dev_clear_irq_history_mask(struct ethosu_device *dev, uint16_t irq_history_clear_mask)
-{
-    struct cmd_r oldcmd;
-    struct cmd_r cmd;
-
-    oldcmd.word = ethosu_dev_read_reg(dev, NPU_REG_CMD);
-
-    cmd.word              = 0;
-    cmd.clock_q_enable    = oldcmd.clock_q_enable;
-    cmd.power_q_enable    = oldcmd.power_q_enable;
-    cmd.clear_irq_history = irq_history_clear_mask;
-
-    ethosu_dev_write_reg(dev, NPU_REG_CMD, cmd.word);
-    LOG_DEBUG("CMD=0x%08x\n", cmd.word);
-
-    return ETHOSU_SUCCESS;
-}
-
-enum ethosu_error_codes ethosu_dev_set_command_run(struct ethosu_device *dev)
-{
-    struct cmd_r oldcmd;
-    struct cmd_r cmd;
-
-    oldcmd.word = ethosu_dev_read_reg(dev, NPU_REG_CMD);
-
-    cmd.word                        = 0;
-    cmd.transition_to_running_state = 1;
-    cmd.clock_q_enable              = oldcmd.clock_q_enable;
-    cmd.power_q_enable              = oldcmd.power_q_enable;
-
-    ethosu_dev_write_reg(dev, NPU_REG_CMD, cmd.word);
-    LOG_DEBUG("CMD=0x%08x\n", cmd.word);
-
-    return ETHOSU_SUCCESS;
-}
-
-enum ethosu_error_codes ethosu_dev_get_shram_data(struct ethosu_device *dev, int section, uint32_t *shram_p)
-{
-    int i            = 0;
-    uint32_t address = NPU_REG_SHARED_BUFFER0;
-
-    ethosu_dev_write_reg(dev, NPU_REG_DEBUG_ADDRESS, section * BYTES_1KB);
-
-    while (address <= NPU_REG_SHARED_BUFFER255)
-    {
-        shram_p[i] = ethosu_dev_read_reg(dev, address);
-        address += REG_OFFSET;
-        i++;
-    }
-
-    return ETHOSU_SUCCESS;
-}
-
-enum ethosu_error_codes ethosu_dev_set_clock_and_power(struct ethosu_device *dev,
-                                                       enum ethosu_clock_q_request clock_q,
-                                                       enum ethosu_power_q_request power_q)
-{
-    struct cmd_r cmd;
-
-    cmd.word           = 0;
-    cmd.clock_q_enable = clock_q;
-    cmd.power_q_enable = power_q;
-    ethosu_dev_write_reg(dev, NPU_REG_CMD, cmd.word);
-    LOG_DEBUG("CMD=0x%08x\n", cmd.word);
-
-    return ETHOSU_SUCCESS;
-}
-
-uint32_t ethosu_dev_read_reg(struct ethosu_device *dev, uint32_t address)
-{
-    assert(dev->base_address != 0);
-    assert(address % 4 == 0);
-
-    volatile uint32_t *reg = (volatile uint32_t *)(dev->base_address + address);
-    return *reg;
-}
-
-void ethosu_dev_write_reg(struct ethosu_device *dev, uint32_t address, uint32_t value)
-{
-    assert(dev->base_address != 0);
-    assert(address % 4 == 0);
-
-    volatile uint32_t *reg = (volatile uint32_t *)(dev->base_address + address);
-    *reg                   = value;
-}
-
-void ethosu_dev_write_reg_shadow(struct ethosu_device *dev, uint32_t address, uint32_t value, uint32_t *shadow)
-{
-    ethosu_dev_write_reg(dev, address, value);
-    *shadow = ethosu_dev_read_reg(dev, address);
-}
-
-enum ethosu_error_codes ethosu_dev_save_pmu_config(struct ethosu_device *dev)
-{
-    // Save the PMU control register
-    dev->pmcr = ethosu_dev_read_reg(dev, NPU_REG_PMCR);
-
-    // Save IRQ control
-    dev->pmint = ethosu_dev_read_reg(dev, NPU_REG_PMINTSET);
-
-    // Save the enabled events mask
-    dev->pmcnten = ethosu_dev_read_reg(dev, NPU_REG_PMCNTENSET);
-
-    // Save start and stop event
-    dev->pmccntr_cfg = ethosu_dev_read_reg(dev, NPU_REG_PMCCNTR_CFG);
-
-    // Save the event settings and counters
-    for (uint32_t i = 0; i < ETHOSU_PMU_NCOUNTERS; i++)
-    {
-        dev->pmu_evtypr[i] = ethosu_dev_read_reg(dev, NPU_REG_PMEVTYPER0 + i * sizeof(uint32_t));
-    }
-
-    return ETHOSU_SUCCESS;
-}
-
-enum ethosu_error_codes ethosu_dev_restore_pmu_config(struct ethosu_device *dev)
-{
-    // Restore PMU control register
-    ethosu_dev_write_reg(dev, NPU_REG_PMCR, dev->pmcr);
-
-    // Restore IRQ control
-    ethosu_dev_write_reg(dev, NPU_REG_PMINTSET, dev->pmint);
-
-    // Restore enabled event mask
-    ethosu_dev_write_reg(dev, NPU_REG_PMCNTENSET, dev->pmcnten);
-
-    // Restore start and stop event
-    ethosu_dev_write_reg(dev, NPU_REG_PMCCNTR_CFG, dev->pmccntr_cfg);
-
-    // Save the event settings and counters
-    for (uint32_t i = 0; i < ETHOSU_PMU_NCOUNTERS; i++)
-    {
-        ethosu_dev_write_reg(dev, NPU_REG_PMEVTYPER0 + i * sizeof(uint32_t), dev->pmu_evtypr[i]);
-    }
-
-    return ETHOSU_SUCCESS;
-}
-
-enum ethosu_error_codes ethosu_dev_save_pmu_counters(struct ethosu_device *dev)
-{
-    // Save the cycle counter
-    dev->pmccntr[0] = ethosu_dev_read_reg(dev, NPU_REG_PMCCNTR_LO);
-    dev->pmccntr[1] = ethosu_dev_read_reg(dev, NPU_REG_PMCCNTR_HI);
-
-    // Save the event settings and counters
-    for (uint32_t i = 0; i < ETHOSU_PMU_NCOUNTERS; i++)
-    {
-        dev->pmu_evcntr[i] = ethosu_dev_read_reg(dev, NPU_REG_PMEVCNTR0 + i * sizeof(uint32_t));
-    }
-
-    return ETHOSU_SUCCESS;
-}
-
-bool ethosu_dev_prot_has_changed(struct ethosu_device *dev)
-{
-    if (dev->proto != ethosu_dev_read_reg(dev, NPU_REG_PROT))
-    {
-        return true;
-    }
-
-    return false;
-}
-
-bool ethosu_dev_status_has_error(struct ethosu_device *dev)
-{
-    bool status_error = false;
-    struct status_r status;
-
-    status.word  = ethosu_dev_read_reg(dev, NPU_REG_STATUS);
-    status_error = ((1 == status.bus_status) || (1 == status.cmd_parse_error) || (1 == status.wd_fault) ||
-                    (1 == status.ecc_fault));
-
-    return status_error;
-}
diff --git a/src/ethosu_device_u55_u65.c b/src/ethosu_device_u55_u65.c
new file mode 100644
index 0000000..080bfe8
--- /dev/null
+++ b/src/ethosu_device_u55_u65.c
@@ -0,0 +1,353 @@
+/*
+ * Copyright (c) 2019-2021 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#include "ethosu_interface.h"
+
+#include "ethosu_config.h"
+#include "ethosu_device.h"
+#include "ethosu_log.h"
+
+#include <assert.h>
+#include <inttypes.h>
+#include <stdbool.h>
+#include <stddef.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+#define BASEP_OFFSET 4
+
+#ifdef ETHOSU65
+#define ADDRESS_BITS 40
+#else
+#define ADDRESS_BITS 32
+#endif
+
+#define ADDRESS_MASK ((1ull << ADDRESS_BITS) - 1)
+
+#define NPU_CMD_PWR_CLK_MASK (0xC)
+
+struct ethosu_device *ethosu_dev_init(const void *base_address, uint32_t secure_enable, uint32_t privilege_enable)
+{
+    struct ethosu_device *dev = malloc(sizeof(struct ethosu_device));
+    if (!dev)
+    {
+        LOG_ERR("Failed to allocate memory for Ethos-U device\n");
+        return NULL;
+    }
+
+    dev->reg        = (volatile struct NPU_REG *)base_address;
+    dev->secure     = secure_enable;
+    dev->privileged = privilege_enable;
+
+    // Make sure the NPU is in a known state
+    if (ethosu_dev_soft_reset(dev) != ETHOSU_SUCCESS)
+    {
+        free(dev);
+        return NULL;
+    }
+
+    return dev;
+}
+
+void ethosu_dev_deinit(struct ethosu_device *dev)
+{
+    free(dev);
+}
+
+enum ethosu_error_codes ethosu_dev_axi_init(struct ethosu_device *dev)
+{
+    struct regioncfg_r rcfg = {0};
+    struct axi_limit0_r l0  = {0};
+    struct axi_limit1_r l1  = {0};
+    struct axi_limit2_r l2  = {0};
+    struct axi_limit3_r l3  = {0};
+
+    dev->reg->QCONFIG.word = NPU_QCONFIG;
+
+    rcfg.region0             = NPU_REGIONCFG_0;
+    rcfg.region1             = NPU_REGIONCFG_1;
+    rcfg.region2             = NPU_REGIONCFG_2;
+    rcfg.region3             = NPU_REGIONCFG_3;
+    rcfg.region4             = NPU_REGIONCFG_4;
+    rcfg.region5             = NPU_REGIONCFG_5;
+    rcfg.region6             = NPU_REGIONCFG_6;
+    rcfg.region7             = NPU_REGIONCFG_7;
+    dev->reg->REGIONCFG.word = rcfg.word;
+
+    l0.max_beats                = AXI_LIMIT0_MAX_BEATS_BYTES;
+    l0.memtype                  = AXI_LIMIT0_MEM_TYPE;
+    l0.max_outstanding_read_m1  = AXI_LIMIT0_MAX_OUTSTANDING_READS - 1;
+    l0.max_outstanding_write_m1 = AXI_LIMIT0_MAX_OUTSTANDING_WRITES - 1;
+
+    l1.max_beats                = AXI_LIMIT1_MAX_BEATS_BYTES;
+    l1.memtype                  = AXI_LIMIT1_MEM_TYPE;
+    l1.max_outstanding_read_m1  = AXI_LIMIT1_MAX_OUTSTANDING_READS - 1;
+    l1.max_outstanding_write_m1 = AXI_LIMIT1_MAX_OUTSTANDING_WRITES - 1;
+
+    l2.max_beats                = AXI_LIMIT2_MAX_BEATS_BYTES;
+    l2.memtype                  = AXI_LIMIT2_MEM_TYPE;
+    l2.max_outstanding_read_m1  = AXI_LIMIT2_MAX_OUTSTANDING_READS - 1;
+    l2.max_outstanding_write_m1 = AXI_LIMIT2_MAX_OUTSTANDING_WRITES - 1;
+
+    l3.max_beats                = AXI_LIMIT3_MAX_BEATS_BYTES;
+    l3.memtype                  = AXI_LIMIT3_MEM_TYPE;
+    l3.max_outstanding_read_m1  = AXI_LIMIT3_MAX_OUTSTANDING_READS - 1;
+    l3.max_outstanding_write_m1 = AXI_LIMIT3_MAX_OUTSTANDING_WRITES - 1;
+
+    dev->reg->AXI_LIMIT0.word = l0.word;
+    dev->reg->AXI_LIMIT1.word = l1.word;
+    dev->reg->AXI_LIMIT2.word = l2.word;
+    dev->reg->AXI_LIMIT3.word = l3.word;
+
+    return ETHOSU_SUCCESS;
+}
+
+enum ethosu_error_codes ethosu_dev_run_command_stream(struct ethosu_device *dev,
+                                                      const uint8_t *cmd_stream_ptr,
+                                                      uint32_t cms_length,
+                                                      const uint64_t *base_addr,
+                                                      int num_base_addr)
+{
+    assert(num_base_addr <= NPU_REG_BASEP_ARRLEN);
+
+    struct cmd_r cmd;
+    uint64_t qbase = (uintptr_t)cmd_stream_ptr + BASE_POINTER_OFFSET;
+    assert(qbase <= ADDRESS_MASK);
+    LOG_DEBUG("QBASE=0x%016llx, QSIZE=%u, base_pointer_offset=0x%08x\n", qbase, cms_length, BASE_POINTER_OFFSET);
+
+    dev->reg->QBASE.word[0] = qbase & 0xffffffff;
+#ifdef ETHOSU65
+    dev->reg->QBASE.word[1] = qbase >> 32;
+#endif
+    dev->reg->QSIZE.word = cms_length;
+
+    for (int i = 0; i < num_base_addr; i++)
+    {
+        uint64_t addr = base_addr[i] + BASE_POINTER_OFFSET;
+        assert(addr <= ADDRESS_MASK);
+        LOG_DEBUG("BASEP%d=0x%016llx\n", i, addr);
+        dev->reg->BASEP[i].word[0] = addr & 0xffffffff;
+#ifdef ETHOSU65
+        dev->reg->BASEP[i].word[1] = addr >> 32;
+#endif
+    }
+
+    cmd.word                        = dev->reg->CMD.word & NPU_CMD_PWR_CLK_MASK;
+    cmd.transition_to_running_state = 1;
+
+    dev->reg->CMD.word = cmd.word;
+    LOG_DEBUG("CMD=0x%08x\n", cmd.word);
+
+    return ETHOSU_SUCCESS;
+}
+
+bool ethosu_dev_handle_interrupt(struct ethosu_device *dev)
+{
+    struct cmd_r cmd;
+
+    // Clear interrupt
+    cmd.word           = dev->reg->CMD.word & NPU_CMD_PWR_CLK_MASK;
+    cmd.clear_irq      = 1;
+    dev->reg->CMD.word = cmd.word;
+
+    // If a fault has occured, the NPU needs to be reset
+    if (dev->reg->STATUS.bus_status || dev->reg->STATUS.cmd_parse_error || dev->reg->STATUS.wd_fault ||
+        dev->reg->STATUS.ecc_fault)
+    {
+        LOG_DEBUG("NPU fault. status=0x%08x, qread=%" PRIu32 "\n", dev->reg->STATUS.word, dev->reg->QREAD.word);
+        ethosu_dev_soft_reset(dev);
+        ethosu_dev_set_clock_and_power(dev, ETHOSU_CLOCK_Q_UNCHANGED, ETHOSU_POWER_Q_DISABLE);
+        return false;
+    }
+
+    // Verify that the cmd stream finished executing
+    return dev->reg->STATUS.cmd_end_reached ? true : false;
+}
+
+bool ethosu_dev_verify_access_state(struct ethosu_device *dev)
+{
+    if (dev->reg->PROT.active_CSL != (dev->secure ? SECURITY_LEVEL_SECURE : SECURITY_LEVEL_NON_SECURE) ||
+        dev->reg->PROT.active_CPL != (dev->privileged ? PRIVILEGE_LEVEL_PRIVILEGED : PRIVILEGE_LEVEL_USER))
+    {
+        return false;
+    }
+    return true;
+}
+
+enum ethosu_error_codes ethosu_dev_soft_reset(struct ethosu_device *dev)
+{
+    struct reset_r reset;
+
+    reset.word        = 0;
+    reset.pending_CPL = dev->privileged ? PRIVILEGE_LEVEL_PRIVILEGED : PRIVILEGE_LEVEL_USER;
+    reset.pending_CSL = dev->secure ? SECURITY_LEVEL_SECURE : SECURITY_LEVEL_NON_SECURE;
+
+    // Reset and set security level
+    LOG_INFO("Soft reset NPU\n");
+    dev->reg->RESET.word = reset.word;
+
+    // Wait until reset status indicates that reset has been completed
+    for (int i = 0; i < 100000 && dev->reg->STATUS.reset_status != 0; i++)
+    {
+    }
+
+    if (dev->reg->STATUS.reset_status != 0)
+    {
+        LOG_ERR("Soft reset timed out\n");
+        return ETHOSU_GENERIC_FAILURE;
+    }
+
+    // Verify that NPU has switched security state and privilege level
+    if (ethosu_dev_verify_access_state(dev) != true)
+    {
+        LOG_ERR("Failed to switch security state and privilege level\n");
+        return ETHOSU_GENERIC_FAILURE;
+    }
+
+    // Reinitialize AXI settings
+    ethosu_dev_axi_init(dev);
+
+    return ETHOSU_SUCCESS;
+}
+
+void ethosu_dev_get_hw_info(struct ethosu_device *dev, struct ethosu_hw_info *hwinfo)
+{
+    struct config_r cfg;
+    struct id_r id;
+
+    cfg.word = dev->reg->CONFIG.word;
+    id.word  = dev->reg->ID.word;
+
+    hwinfo->cfg.cmd_stream_version = cfg.cmd_stream_version;
+    hwinfo->cfg.custom_dma         = cfg.custom_dma;
+    hwinfo->cfg.macs_per_cc        = cfg.macs_per_cc;
+
+    hwinfo->version.arch_major_rev = id.arch_major_rev;
+    hwinfo->version.arch_minor_rev = id.arch_minor_rev;
+    hwinfo->version.arch_patch_rev = id.arch_patch_rev;
+    hwinfo->version.product_major  = id.product_major;
+    hwinfo->version.version_major  = id.version_major;
+    hwinfo->version.version_minor  = id.version_minor;
+    hwinfo->version.version_status = id.version_status;
+}
+
+enum ethosu_error_codes ethosu_dev_set_clock_and_power(struct ethosu_device *dev,
+                                                       enum ethosu_clock_q_request clock_q,
+                                                       enum ethosu_power_q_request power_q)
+{
+    struct cmd_r cmd = {0};
+    cmd.word         = dev->reg->CMD.word & NPU_CMD_PWR_CLK_MASK;
+
+    if (power_q != ETHOSU_POWER_Q_UNCHANGED)
+    {
+        cmd.power_q_enable = power_q == ETHOSU_POWER_Q_ENABLE ? 1 : 0;
+    }
+    if (clock_q != ETHOSU_CLOCK_Q_UNCHANGED)
+    {
+        cmd.clock_q_enable = clock_q == ETHOSU_CLOCK_Q_ENABLE ? 1 : 0;
+    }
+
+    dev->reg->CMD.word = cmd.word;
+    LOG_DEBUG("CMD=0x%08x\n", cmd.word);
+
+    return ETHOSU_SUCCESS;
+}
+
+bool ethosu_dev_verify_optimizer_config(struct ethosu_device *dev, uint32_t cfg_in, uint32_t id_in)
+{
+    struct config_r *opt_cfg = (struct config_r *)&cfg_in;
+    struct config_r hw_cfg;
+    struct id_r *opt_id = (struct id_r *)&id_in;
+    struct id_r hw_id;
+    bool ret = true;
+
+    hw_cfg.word = dev->reg->CONFIG.word;
+    hw_id.word  = dev->reg->ID.word;
+
+    LOG_INFO("Optimizer config cmd_stream_version: %" PRIu32 " macs_per_cc: %" PRIu32 " shram_size: %" PRIu32
+             " custom_dma: %" PRIu32 "\n",
+             opt_cfg->cmd_stream_version,
+             opt_cfg->macs_per_cc,
+             opt_cfg->shram_size,
+             opt_cfg->custom_dma);
+    LOG_INFO("Optimizer config Ethos-U version: %" PRIu32 ".%" PRIu32 ".%" PRIu32 "\n",
+             opt_id->arch_major_rev,
+             opt_id->arch_minor_rev,
+             opt_id->arch_patch_rev);
+
+    LOG_INFO("Ethos-U config cmd_stream_version: %" PRIu32 " macs_per_cc: %" PRIu32 " shram_size: %" PRIu32
+             " custom_dma: %" PRIu32 "\n",
+             hw_cfg.cmd_stream_version,
+             hw_cfg.macs_per_cc,
+             hw_cfg.shram_size,
+             hw_cfg.custom_dma);
+    LOG_INFO("Ethos-U version: %" PRIu32 ".%" PRIu32 ".%" PRIu32 "\n",
+             hw_id.arch_major_rev,
+             hw_id.arch_minor_rev,
+             hw_id.arch_patch_rev);
+
+    if (opt_cfg->word != hw_cfg.word)
+    {
+        if (hw_cfg.macs_per_cc != opt_cfg->macs_per_cc)
+        {
+            LOG_ERR("NPU config mismatch: npu.macs_per_cc=%" PRIu32 " optimizer.macs_per_cc=%" PRIu32 "\n",
+                    hw_cfg.macs_per_cc,
+                    opt_cfg->macs_per_cc);
+            ret = false;
+        }
+
+        if (hw_cfg.shram_size != opt_cfg->shram_size)
+        {
+            LOG_ERR("NPU config mismatch: npu.shram_size=%" PRIu32 " optimizer.shram_size=%" PRIu32 "\n",
+                    hw_cfg.shram_size,
+                    opt_cfg->shram_size);
+            ret = false;
+        }
+
+        if (hw_cfg.cmd_stream_version != opt_cfg->cmd_stream_version)
+        {
+            LOG_ERR("NPU config mismatch: npu.cmd_stream_version=%" PRIu32 " optimizer.cmd_stream_version=%" PRIu32
+                    "\n",
+                    hw_cfg.cmd_stream_version,
+                    opt_cfg->cmd_stream_version);
+            ret = false;
+        }
+
+        if (!hw_cfg.custom_dma && opt_cfg->custom_dma)
+        {
+            LOG_ERR("NPU config mismatch: npu.custom_dma=%" PRIu32 " optimizer.custom_dma=%" PRIu32 "\n",
+                    hw_cfg.custom_dma,
+                    opt_cfg->custom_dma);
+            ret = false;
+        }
+    }
+
+    if ((hw_id.arch_major_rev != opt_id->arch_major_rev) || (hw_id.arch_minor_rev < opt_id->arch_minor_rev))
+    {
+        LOG_ERR("NPU arch mismatch: npu.arch=%" PRIu32 ".%" PRIu32 ".%" PRIu32 " optimizer.arch=%" PRIu32 ".%" PRIu32
+                ".%" PRIu32 "\n",
+                hw_id.arch_major_rev,
+                hw_id.arch_minor_rev,
+                hw_id.arch_patch_rev,
+                opt_id->arch_major_rev,
+                opt_id->arch_minor_rev,
+                opt_id->arch_patch_rev);
+        ret = false;
+    }
+
+    return ret;
+}
diff --git a/src/ethosu_driver.c b/src/ethosu_driver.c
index 5cf7f39..b5e3973 100644
--- a/src/ethosu_driver.c
+++ b/src/ethosu_driver.c
@@ -21,7 +21,6 @@
  ******************************************************************************/
 
 #include "ethosu_driver.h"
-#include "ethosu_common.h"
 #include "ethosu_config.h"
 #include "ethosu_device.h"
 #include "ethosu_log.h"
@@ -38,19 +37,14 @@
  * Defines
  ******************************************************************************/
 
-#define MACS_PER_CYCLE_LOG2_MASK 0x000F
-#define SHRAM_SIZE_MASK 0xFF00
-#define SHRAM_SIZE_RIGHT_SHIFT 8
+#define UNUSED(x) ((void)x)
+
 #define BYTES_IN_32_BITS 4
-#define CUSTOM_OPTION_LENGTH_32_BIT_WORD 1
-#define DRIVER_ACTION_LENGTH_32_BIT_WORD 1
-#define OPTIMIZER_CONFIG_LENGTH_32_BIT_WORD 2
-#define ETHOSU_FOURCC ('1' << 24 | 'P' << 16 | 'O' << 8 | 'C') // "Custom Operator Payload 1"
-#define APB_START_ADDR_MASK 0x0FFF
-#define APB_NUM_REG_BIT_SHIFT 12
-#define BYTES_1KB 1024
-#define PRODUCT_MAJOR_ETHOSU55 (4)
 #define MASK_16_BYTE_ALIGN (0xF)
+#define OPTIMIZER_CONFIG_LENGTH_32_BIT_WORD 2
+#define DRIVER_ACTION_LENGTH_32_BIT_WORD 1
+#define ETHOSU_FOURCC ('1' << 24 | 'P' << 16 | 'O' << 8 | 'C') // "Custom Operator Payload 1"
+
 #define FAST_MEMORY_BASE_ADDR_INDEX 2
 
 /******************************************************************************
@@ -63,23 +57,18 @@
     RESERVED         = 0,
     OPTIMIZER_CONFIG = 1,
     COMMAND_STREAM   = 2,
-    READ_APB_REG     = 3,
-    DUMP_SHRAM       = 4,
     NOP              = 5,
 };
 
-// Custom data struct
-struct custom_data_s
+// Custom operator payload data struct
+struct cop_data_s
 {
     union
     {
         // Driver action data
         struct
         {
-            // Driver action command (valid values in DRIVER_ACTION_e)
-            uint8_t driver_action_command;
-
-            // reserved
+            uint8_t driver_action_command; // (valid values in DRIVER_ACTION_e)
             uint8_t reserved;
 
             // Driver action data
@@ -99,13 +88,6 @@
                     uint16_t length;
                 };
 
-                // DA_CMD_READAPB
-                struct
-                {
-                    uint16_t start_address : 12;
-                    uint16_t nbr_reg_minus1 : 4;
-                };
-
                 uint16_t driver_action_data;
             };
         };
@@ -117,34 +99,9 @@
 // optimizer config struct
 struct opt_cfg_s
 {
-    struct custom_data_s da_data;
-    union
-    {
-        struct
-        {
-            uint32_t macs_per_cc : 4;
-            uint32_t cmd_stream_version : 4;
-            uint32_t shram_size : 8;
-            uint32_t reserved0 : 11;
-            uint32_t custom_dma : 1;
-            uint32_t product : 4;
-        };
-        uint32_t npu_cfg;
-    };
-    union
-    {
-        struct
-        {
-            uint32_t version_status : 4;
-            uint32_t version_minor : 4;
-            uint32_t version_major : 4;
-            uint32_t product_major : 4;
-            uint32_t arch_patch_rev : 4;
-            uint32_t arch_minor_rev : 8;
-            uint32_t arch_major_rev : 4;
-        };
-        uint32_t ethosu_id;
-    };
+    struct cop_data_s da_data;
+    uint32_t cfg;
+    uint32_t id;
 };
 
 /******************************************************************************
@@ -201,6 +158,11 @@
     return NULL;
 }
 
+void __attribute__((weak)) ethosu_mutex_destroy(void *mutex)
+{
+    UNUSED(mutex);
+}
+
 void __attribute__((weak)) ethosu_mutex_lock(void *mutex)
 {
     UNUSED(mutex);
@@ -219,6 +181,11 @@
     return sem;
 }
 
+void __attribute__((weak)) ethosu_semaphore_destroy(void *sem)
+{
+    free((struct ethosu_semaphore_t *)sem);
+}
+
 // Baremetal simulation of waiting/sleeping for and then taking a semaphore using intrisics
 void __attribute__((weak)) ethosu_semaphore_take(void *sem)
 {
@@ -261,7 +228,7 @@
 {
     while (1)
     {
-        if (drv->irq_triggered || drv->abort_inference)
+        if (drv->irq_triggered)
         {
             drv->irq_triggered = false;
             break;
@@ -271,48 +238,13 @@
     }
 }
 
-static void npu_axi_init(struct ethosu_driver *drv)
-{
-    ethosu_dev_set_qconfig(&drv->dev, NPU_QCONFIG);
-
-    ethosu_dev_set_regioncfg(&drv->dev, 0, NPU_REGIONCFG_0);
-    ethosu_dev_set_regioncfg(&drv->dev, 1, NPU_REGIONCFG_1);
-    ethosu_dev_set_regioncfg(&drv->dev, 2, NPU_REGIONCFG_2);
-    ethosu_dev_set_regioncfg(&drv->dev, 3, NPU_REGIONCFG_3);
-    ethosu_dev_set_regioncfg(&drv->dev, 4, NPU_REGIONCFG_4);
-    ethosu_dev_set_regioncfg(&drv->dev, 5, NPU_REGIONCFG_5);
-    ethosu_dev_set_regioncfg(&drv->dev, 6, NPU_REGIONCFG_6);
-    ethosu_dev_set_regioncfg(&drv->dev, 7, NPU_REGIONCFG_7);
-
-    (void)ethosu_dev_set_axi_limit0(&drv->dev,
-                                    AXI_LIMIT0_MAX_BEATS_BYTES,
-                                    AXI_LIMIT0_MEM_TYPE,
-                                    AXI_LIMIT0_MAX_OUTSTANDING_READS,
-                                    AXI_LIMIT0_MAX_OUTSTANDING_WRITES);
-    (void)ethosu_dev_set_axi_limit1(&drv->dev,
-                                    AXI_LIMIT1_MAX_BEATS_BYTES,
-                                    AXI_LIMIT1_MEM_TYPE,
-                                    AXI_LIMIT1_MAX_OUTSTANDING_READS,
-                                    AXI_LIMIT1_MAX_OUTSTANDING_WRITES);
-    (void)ethosu_dev_set_axi_limit2(&drv->dev,
-                                    AXI_LIMIT2_MAX_BEATS_BYTES,
-                                    AXI_LIMIT2_MEM_TYPE,
-                                    AXI_LIMIT2_MAX_OUTSTANDING_READS,
-                                    AXI_LIMIT2_MAX_OUTSTANDING_WRITES);
-    (void)ethosu_dev_set_axi_limit3(&drv->dev,
-                                    AXI_LIMIT3_MAX_BEATS_BYTES,
-                                    AXI_LIMIT3_MEM_TYPE,
-                                    AXI_LIMIT3_MAX_OUTSTANDING_READS,
-                                    AXI_LIMIT3_MAX_OUTSTANDING_WRITES);
-}
-
 static void ethosu_register_driver(struct ethosu_driver *drv)
 {
     // Register driver as new HEAD of list
     drv->next          = registered_drivers;
     registered_drivers = drv;
 
-    LOG_INFO("New NPU driver registered (handle: 0x%p, NPU: 0x%x)\n", drv, drv->dev.base_address);
+    LOG_INFO("New NPU driver registered (handle: 0x%p, NPU: 0x%p)\n", drv, drv->dev->reg);
 }
 
 static int ethosu_deregister_driver(struct ethosu_driver *drv)
@@ -358,100 +290,18 @@
     return NULL;
 }
 
-static int ethosu_soft_reset_and_restore(struct ethosu_driver *drv)
+static int handle_optimizer_config(struct ethosu_driver *drv, struct opt_cfg_s *opt_cfg_p)
 {
+    LOG_INFO("Optimizer release nbr: %d patch: %d\n", opt_cfg_p->da_data.rel_nbr, opt_cfg_p->da_data.patch_nbr);
 
-    if (ETHOSU_SUCCESS != ethosu_dev_soft_reset(&drv->dev))
+    if (ethosu_dev_verify_optimizer_config(drv->dev, opt_cfg_p->cfg, opt_cfg_p->id) != true)
     {
         return -1;
     }
 
-    set_clock_and_power_request(drv, ETHOSU_INFERENCE_REQUEST, ETHOSU_CLOCK_Q_ENABLE, ETHOSU_POWER_Q_DISABLE);
-
-    npu_axi_init(drv);
-    ethosu_dev_restore_pmu_config(&drv->dev);
-
     return 0;
 }
 
-static int handle_optimizer_config(struct ethosu_driver *drv, struct opt_cfg_s *opt_cfg_p)
-{
-    struct ethosu_config cfg;
-    struct ethosu_id id;
-    int return_code = 0;
-
-    LOG_INFO("Optimizer release nbr: %d patch: %d\n", opt_cfg_p->da_data.rel_nbr, opt_cfg_p->da_data.patch_nbr);
-    LOG_INFO("Optimizer config cmd_stream_version: %d macs_per_cc: %d shram_size: %d custom_dma: %d\n",
-             opt_cfg_p->cmd_stream_version,
-             opt_cfg_p->macs_per_cc,
-             opt_cfg_p->shram_size,
-             opt_cfg_p->custom_dma);
-    LOG_INFO("Optimizer config Ethos-U version: %d.%d.%d\n",
-             opt_cfg_p->arch_major_rev,
-             opt_cfg_p->arch_minor_rev,
-             opt_cfg_p->arch_patch_rev);
-
-    (void)ethosu_dev_get_config(&drv->dev, &cfg);
-    (void)ethosu_dev_get_id(&drv->dev, &id);
-    LOG_INFO("Ethos-U config cmd_stream_version: %" PRIu32 " macs_per_cc: %" PRIu32 " shram_size: %" PRIu32
-             " custom_dma: %" PRIu32 "\n",
-             cfg.cmd_stream_version,
-             cfg.macs_per_cc,
-             cfg.shram_size,
-             cfg.custom_dma);
-    LOG_INFO("Ethos-U version: %" PRIu32 ".%" PRIu32 ".%" PRIu32 "\n",
-             id.arch_major_rev,
-             id.arch_minor_rev,
-             id.arch_patch_rev);
-
-    if ((cfg.macs_per_cc != opt_cfg_p->macs_per_cc) || (cfg.shram_size != opt_cfg_p->shram_size) ||
-        (cfg.cmd_stream_version != opt_cfg_p->cmd_stream_version) || (!cfg.custom_dma && opt_cfg_p->custom_dma))
-    {
-        if (cfg.macs_per_cc != opt_cfg_p->macs_per_cc)
-        {
-            LOG_ERR("NPU config mismatch: npu.macs_per_cc=%" PRIu32 " optimizer.macs_per_cc=%d\n",
-                    cfg.macs_per_cc,
-                    opt_cfg_p->macs_per_cc);
-        }
-        if (cfg.shram_size != opt_cfg_p->shram_size)
-        {
-            LOG_ERR("NPU config mismatch: npu.shram_size=%" PRIu32 " optimizer.shram_size=%d\n",
-                    cfg.shram_size,
-                    opt_cfg_p->shram_size);
-        }
-        if (cfg.cmd_stream_version != opt_cfg_p->cmd_stream_version)
-        {
-            LOG_ERR("NPU config mismatch: npu.cmd_stream_version=%" PRIu32 " optimizer.cmd_stream_version=%d\n",
-                    cfg.cmd_stream_version,
-                    opt_cfg_p->cmd_stream_version);
-        }
-        if (!cfg.custom_dma && opt_cfg_p->custom_dma)
-        {
-            LOG_ERR("NPU config mismatch: npu.custom_dma=%" PRIu32 " optimize.custom_dma=%d\n",
-                    cfg.custom_dma,
-                    opt_cfg_p->custom_dma);
-        }
-        return_code = -1;
-    }
-
-    if ((id.arch_major_rev != opt_cfg_p->arch_major_rev) || (id.arch_minor_rev < opt_cfg_p->arch_minor_rev))
-    {
-        LOG_ERR("NPU arch mismatch: npu.arch=%" PRIu32 ".%" PRIu32 ".%" PRIu32 " optimizer.arch=%d.%d.%d\n",
-                id.arch_major_rev,
-                id.arch_minor_rev,
-                id.arch_patch_rev,
-                opt_cfg_p->arch_major_rev,
-                opt_cfg_p->arch_minor_rev,
-                opt_cfg_p->arch_patch_rev);
-        return_code = -1;
-    }
-
-#if !defined(LOG_ENABLED)
-    UNUSED(opt_cfg_p);
-#endif
-    return return_code;
-}
-
 static int handle_command_stream(struct ethosu_driver *drv,
                                  const uint8_t *cmd_stream,
                                  const int cms_length,
@@ -459,7 +309,6 @@
                                  const size_t *base_addr_size,
                                  const int num_base_addr)
 {
-    uint32_t qread           = 0;
     uint32_t cms_bytes       = cms_length * BYTES_IN_32_BITS;
     ptrdiff_t cmd_stream_ptr = (ptrdiff_t)cmd_stream;
 
@@ -471,22 +320,17 @@
         return -1;
     }
 
-    bool base_addr_invalid = false;
+    // Verify 16 byte alignment for base address'
     for (int i = 0; i < num_base_addr; i++)
     {
         if (0 != (base_addr[i] & MASK_16_BYTE_ALIGN))
         {
             LOG_ERR("Base addr %d: 0x%llx not aligned to 16 bytes\n", i, base_addr[i]);
-            base_addr_invalid = true;
+            return -1;
         }
     }
 
-    if (base_addr_invalid)
-    {
-        return -1;
-    }
-
-    /* Flush the cache if available on our CPU.
+    /* Flush the cache if available on CPU.
      * The upcasting to uin32_t* is ok since the pointer never is dereferenced.
      * The base_addr_size is null if invoking from prior to invoke_V2, in that case
      * the whole cache is being flushed.
@@ -505,13 +349,15 @@
         ethosu_flush_dcache(NULL, 0);
     }
 
-    if (ETHOSU_SUCCESS != ethosu_dev_run_command_stream(&drv->dev, cmd_stream, cms_bytes, base_addr, num_base_addr))
+    // Execute the command stream
+    if (ETHOSU_SUCCESS != ethosu_dev_run_command_stream(drv->dev, cmd_stream, cms_bytes, base_addr, num_base_addr))
     {
         return -1;
     }
 
     wait_for_irq(drv);
 
+    // Check if any error occured
     if (drv->status_error)
     {
         return -1;
@@ -529,74 +375,6 @@
         ethosu_invalidate_dcache(NULL, 0);
     }
 
-    qread = ethosu_dev_get_qread(&drv->dev);
-    if (qread != cms_bytes)
-    {
-        LOG_WARN("IRQ received but qread (%" PRIu32 ") not at end of stream (%" PRIu32 ").\n", qread, cms_bytes);
-        return -1;
-    }
-
-    return 0;
-}
-
-static int read_apb_reg(struct ethosu_driver *drv, uint16_t da_data)
-{
-    uint32_t *reg_p;
-    uint32_t start_address = (uint32_t)(da_data & APB_START_ADDR_MASK);
-    uint16_t num_reg       = (da_data >> APB_NUM_REG_BIT_SHIFT) + 1;
-
-    reg_p = (uint32_t *)malloc(num_reg * sizeof(uint32_t));
-    if (reg_p == NULL)
-    {
-        LOG_ERR("Memory allocation failed\n");
-        return -1;
-    }
-
-    if (ETHOSU_SUCCESS == ethosu_dev_read_apb_reg(&drv->dev, start_address, num_reg, reg_p))
-    {
-        for (int i = 0; i < num_reg; i++)
-        {
-            LOG_INFO(
-                "NPU_REG ADDR 0x%04" PRIu32 " = 0x%08" PRIu32 "\n", (start_address + (i * BYTES_IN_32_BITS)), reg_p[i]);
-        }
-    }
-    else
-    {
-        free(reg_p);
-        return -1;
-    }
-
-    free(reg_p);
-    return 0;
-}
-
-static int dump_shram(struct ethosu_driver *drv)
-{
-    struct ethosu_config cfg;
-    uint32_t *shram_p;
-    (void)ethosu_dev_get_config(&drv->dev, &cfg);
-
-    LOG_INFO("dump_shram size = %" PRIu32 " KB\n", cfg.shram_size);
-
-    shram_p = (uint32_t *)malloc(BYTES_1KB);
-    if (shram_p == NULL)
-    {
-        LOG_ERR("Memory allocation failed for shram data\n");
-        return -1;
-    }
-
-    for (uint32_t i = 0; i < cfg.shram_size; i++)
-    {
-        ethosu_dev_get_shram_data(&drv->dev, i, (uint32_t *)shram_p);
-        // Output 1KB of SHRAM
-        LOG_INFO("***SHRAM SECTION %" PRIu32 "***\n", i);
-        for (int j = 0; j < (BYTES_1KB / BYTES_IN_32_BITS); j++)
-        {
-            LOG_INFO("[0x%04" PRIx32 "] %" PRIx32 "\n", (i * 1024 + j * 4), shram_p[j]);
-        }
-    }
-    free(shram_p);
-
     return 0;
 }
 
@@ -605,29 +383,13 @@
  ******************************************************************************/
 void __attribute__((weak)) ethosu_irq_handler(struct ethosu_driver *drv)
 {
-    uint8_t irq_raised = 0;
+    LOG_DEBUG("Got interrupt from Ethos-U\n");
 
-    LOG_DEBUG(
-        "Interrupt. status=0x%08x, qread=%d\n", ethosu_dev_get_status(&drv->dev), ethosu_dev_get_qread(&drv->dev));
-
-    // Verify that interrupt has been raised
-    (void)ethosu_dev_is_irq_raised(&drv->dev, &irq_raised);
-    assert(irq_raised == 1);
     drv->irq_triggered = true;
-
-    // Clear interrupt
-    (void)ethosu_dev_clear_irq_status(&drv->dev);
-
-    // Verify that interrupt has been successfully cleared
-    (void)ethosu_dev_is_irq_raised(&drv->dev, &irq_raised);
-    assert(irq_raised == 0);
-
-    if (ethosu_dev_status_has_error(&drv->dev))
+    if (!ethosu_dev_handle_interrupt(drv->dev))
     {
-        ethosu_soft_reset_and_restore(drv);
         drv->status_error = true;
     }
-
     ethosu_semaphore_give(drv->semaphore);
 }
 
@@ -642,8 +404,6 @@
                 uint32_t secure_enable,
                 uint32_t privilege_enable)
 {
-    int return_code = 0;
-
     LOG_INFO("Initializing NPU: base_address=%p, fast_memory=%p, fast_memory_size=%zu, secure=%" PRIu32
              ", privileged=%" PRIu32 "\n",
              base_address,
@@ -665,42 +425,41 @@
     drv->fast_memory      = (uint32_t)fast_memory;
     drv->fast_memory_size = fast_memory_size;
     drv->irq_triggered    = false;
-    drv->semaphore        = ethosu_semaphore_create();
 
-    if (ETHOSU_SUCCESS != ethosu_dev_init(&drv->dev, base_address, secure_enable, privilege_enable))
+    // Initialize the device and set requested security state and privilege mode
+    drv->dev = ethosu_dev_init(base_address, secure_enable, privilege_enable);
+
+    if (drv->dev == NULL)
     {
         LOG_ERR("Failed to initialize Ethos-U device\n");
         return -1;
     }
 
-    if (ETHOSU_SUCCESS !=
-        set_clock_and_power_request(drv, ETHOSU_INFERENCE_REQUEST, ETHOSU_CLOCK_Q_DISABLE, ETHOSU_POWER_Q_DISABLE))
+    // Power always ON requested
+    if (drv->dev_power_always_on)
     {
-        LOG_ERR("Failed to disable clock-q & power-q for Ethos-U\n");
-        return -1;
+        if (set_clock_and_power_request(drv, ETHOSU_INFERENCE_REQUEST, ETHOSU_CLOCK_Q_ENABLE, ETHOSU_POWER_Q_DISABLE) !=
+            ETHOSU_SUCCESS)
+        {
+            LOG_ERR("Failed to disable power-q for Ethos-U\n");
+            return -1;
+        }
     }
 
-    if (ETHOSU_SUCCESS != ethosu_dev_soft_reset(&drv->dev))
-    {
-        return -1;
-    }
-
-    if (ETHOSU_SUCCESS != ethosu_dev_wait_for_reset(&drv->dev))
-    {
-        LOG_ERR("Failed reset of Ethos-U\n");
-        return -1;
-    }
-
+    drv->semaphore    = ethosu_semaphore_create();
     drv->status_error = false;
 
     ethosu_register_driver(drv);
 
-    return return_code;
+    return 0;
 }
 
 void ethosu_deinit(struct ethosu_driver *drv)
 {
     ethosu_deregister_driver(drv);
+    ethosu_semaphore_destroy(drv->semaphore);
+    ethosu_dev_deinit(drv->dev);
+    drv->dev = NULL;
 }
 
 void ethosu_get_driver_version(struct ethosu_driver_version *ver)
@@ -714,9 +473,7 @@
 void ethosu_get_hw_info(struct ethosu_driver *drv, struct ethosu_hw_info *hw)
 {
     assert(hw != NULL);
-
-    (void)ethosu_dev_get_id(&drv->dev, &hw->version);
-    (void)ethosu_dev_get_config(&drv->dev, &hw->cfg);
+    ethosu_dev_get_hw_info(drv->dev, hw);
 }
 
 int ethosu_invoke(struct ethosu_driver *drv,
@@ -726,9 +483,9 @@
                   const size_t *base_addr_size,
                   const int num_base_addr)
 {
-    const struct custom_data_s *data_ptr = custom_data_ptr;
-    const struct custom_data_s *data_end = custom_data_ptr + custom_data_size;
-    int return_code                      = 0;
+    const struct cop_data_s *data_ptr = custom_data_ptr;
+    const struct cop_data_s *data_end = custom_data_ptr + custom_data_size;
+    int return_code                   = 0;
 
     // First word in custom_data_ptr should contain "Custom Operator Payload 1"
     if (data_ptr->word != ETHOSU_FOURCC)
@@ -762,21 +519,28 @@
         *fast_memory = drv->fast_memory;
     }
 
+    // NPU might have lost power and thus its settings and state
     if (!drv->dev_power_always_on)
     {
+        bool axi_reinit = true;
         // Only soft reset if security state or privilege level needs changing
-        if (ethosu_dev_prot_has_changed(&drv->dev))
+        if (ethosu_dev_verify_access_state(drv->dev) != true)
         {
-            if (ETHOSU_SUCCESS != ethosu_dev_soft_reset(&drv->dev))
+            if (ethosu_dev_soft_reset(drv->dev) != ETHOSU_SUCCESS)
             {
                 return -1;
             }
+            axi_reinit = false;
         }
 
-        drv->status_error = false;
+        // Set power ON during the inference
         set_clock_and_power_request(drv, ETHOSU_INFERENCE_REQUEST, ETHOSU_CLOCK_Q_ENABLE, ETHOSU_POWER_Q_DISABLE);
-        ethosu_dev_restore_pmu_config(&drv->dev);
-        npu_axi_init(drv);
+
+        // If a soft reset occured, AXI reinit has already been performed
+        if (axi_reinit)
+        {
+            ethosu_dev_axi_init(drv->dev);
+        }
     }
 
     drv->status_error = false;
@@ -796,39 +560,26 @@
             break;
         case COMMAND_STREAM:
             LOG_DEBUG("COMMAND_STREAM\n");
-            void *command_stream = (uint8_t *)(data_ptr) + sizeof(struct custom_data_s);
+            void *command_stream = (uint8_t *)(data_ptr) + sizeof(struct cop_data_s);
             int cms_length       = (data_ptr->reserved << 16) | data_ptr->length;
 
-            drv->abort_inference = false;
             // It is safe to clear this flag without atomic, because npu is not running.
             drv->irq_triggered = false;
 
             ret = handle_command_stream(drv, command_stream, cms_length, base_addr, base_addr_size, num_base_addr);
-
-            if (return_code == -1 && drv->abort_inference)
+            if (ret < 0)
             {
-                LOG_ERR("NPU timeout. qread=%" PRIu32 "\n", ethosu_dev_get_qread(&drv->dev));
-                dump_shram(drv);
+                LOG_ERR("Inference failed.\n");
             }
 
             data_ptr += DRIVER_ACTION_LENGTH_32_BIT_WORD + cms_length;
             break;
-        case READ_APB_REG:
-            LOG_DEBUG("READ_APB_REG\n");
-            ret = read_apb_reg(drv, data_ptr->driver_action_data);
-            data_ptr += DRIVER_ACTION_LENGTH_32_BIT_WORD;
-            break;
-        case DUMP_SHRAM:
-            LOG_DEBUG("DUMP_SHRAM\n");
-            ret = dump_shram(drv);
-            data_ptr += DRIVER_ACTION_LENGTH_32_BIT_WORD;
-            break;
         case NOP:
             LOG_DEBUG("NOP\n");
             data_ptr += DRIVER_ACTION_LENGTH_32_BIT_WORD;
             break;
         default:
-            LOG_ERR("UNSUPPORTED driver_action_command: %d \n", data_ptr->driver_action_command);
+            LOG_ERR("UNSUPPORTED driver_action_command: %d\n", data_ptr->driver_action_command);
             ret = -1;
             break;
         }
@@ -838,30 +589,33 @@
             break;
         }
     }
+
     ethosu_inference_end(drv, custom_data_ptr);
 
     if (!drv->status_error && !drv->dev_power_always_on)
     {
-        ethosu_dev_save_pmu_counters(&drv->dev);
         set_clock_and_power_request(drv, ETHOSU_INFERENCE_REQUEST, ETHOSU_CLOCK_Q_ENABLE, ETHOSU_POWER_Q_ENABLE);
     }
 
     return return_code;
 }
 
-void ethosu_abort(struct ethosu_driver *drv)
-{
-    drv->abort_inference = true;
-}
-
 void ethosu_set_power_mode(struct ethosu_driver *drv, bool always_on)
 {
     drv->dev_power_always_on = always_on;
 
-    if (always_on)
+    if (always_on && ethosu_dev_verify_access_state(drv->dev) == false)
     {
-        npu_axi_init(drv);
+        // Reset to enter correct security state/privilege mode
+        if (ethosu_dev_soft_reset(drv->dev) == false)
+        {
+            LOG_ERR("Failed to set power mode for Ethos-U\n");
+            return;
+        }
     }
+
+    ethosu_dev_set_clock_and_power(
+        drv->dev, ETHOSU_CLOCK_Q_UNCHANGED, always_on ? ETHOSU_POWER_Q_DISABLE : ETHOSU_POWER_Q_ENABLE);
 }
 
 struct ethosu_driver *ethosu_reserve_driver(void)
@@ -904,32 +658,52 @@
                                                     enum ethosu_clock_q_request clock_request,
                                                     enum ethosu_power_q_request power_request)
 {
-    // Set clock request bit for client
+    // Keep track of which client requests clock gating to be disabled
     if (clock_request == ETHOSU_CLOCK_Q_DISABLE)
     {
         drv->clock_request |= (1 << client);
     }
-    else
+    else if (clock_request == ETHOSU_CLOCK_Q_ENABLE) // Remove client from bitmask
     {
         drv->clock_request &= ~(1 << client);
     }
-    // Get current clock request (ENABLE if both PMU and INFERENCE asks for clock request, else DISABLE)
+
+    // Only enable clock gating when no client has asked for it to be disabled
     clock_request = drv->clock_request == 0 ? ETHOSU_CLOCK_Q_ENABLE : ETHOSU_CLOCK_Q_DISABLE;
 
-    // Set power request bit for client
+    // Keep track of which client requests power gating to be disabled
     if (power_request == ETHOSU_POWER_Q_DISABLE)
     {
         drv->power_request |= (1 << client);
     }
-    else
+    else if (power_request == ETHOSU_CLOCK_Q_ENABLE)
     {
         drv->power_request &= ~(1 << client);
     }
-    // Get current power request (ENABLE if both PMU and INFERENCE asks for power request, else DISABLE)
-    power_request = drv->power_request == 0 ? ETHOSU_POWER_Q_ENABLE : ETHOSU_POWER_Q_DISABLE;
 
+    // Override if power has been requested to be always on
+    if (drv->dev_power_always_on == true)
+    {
+        power_request = ETHOSU_POWER_Q_DISABLE;
+    }
+    else
+    {
+        // Only enable power gating when no client has asked for it to be disabled
+        power_request = drv->power_request == 0 ? ETHOSU_POWER_Q_ENABLE : ETHOSU_POWER_Q_DISABLE;
+    }
+
+    // Verify security state and privilege mode if power is requested to be on
+    if (power_request == ETHOSU_POWER_Q_DISABLE)
+    {
+        if (ethosu_dev_verify_access_state(drv->dev) == false)
+        {
+            if (ethosu_dev_soft_reset(drv->dev) != ETHOSU_SUCCESS)
+            {
+                LOG_ERR("Failed to set clock and power q channels for Ethos-U\n");
+                return ETHOSU_GENERIC_FAILURE;
+            }
+        }
+    }
     // Set clock and power
-    enum ethosu_error_codes ret = ethosu_dev_set_clock_and_power(&drv->dev, clock_request, power_request);
-
-    return ret;
+    return ethosu_dev_set_clock_and_power(drv->dev, clock_request, power_request);
 }
diff --git a/src/ethosu_interface.h b/src/ethosu_interface.h
new file mode 100644
index 0000000..2409cb4
--- /dev/null
+++ b/src/ethosu_interface.h
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2020-2021 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+// clang-format off
+#ifndef ETHOSU_INTERFACE_WRAPPER_
+#define ETHOSU_INTERFACE_WRAPPER_
+
+#define xstr(a) str(a)
+#define str(a)  #a
+
+#define catm(a, b)  catm_(a, b)
+#define catm_(a, b) a##b
+
+#define ETHOSU_INTERFACE_FILE xstr(catm(ethos, ETHOSU_ARCH)_interface.h)
+
+#include ETHOSU_INTERFACE_FILE
+
+#endif // ETHOSU_INTERFACE_WRAPPER_
diff --git a/src/ethosu_pmu.c b/src/ethosu_pmu.c
index d1cd79c..8059010 100644
--- a/src/ethosu_pmu.c
+++ b/src/ethosu_pmu.c
@@ -20,9 +20,9 @@
  * Includes
  *****************************************************************************/
 
-#include "ethosu55_interface.h"
-#include "ethosu_common.h"
+#include "ethosu_device.h"
 #include "ethosu_driver.h"
+#include "ethosu_interface.h"
 #include "ethosu_log.h"
 #include "pmu_ethosu.h"
 
@@ -34,23 +34,23 @@
  * Defines
  *****************************************************************************/
 
+#define MASK_0_31_BITS (0xFFFFFFFF)
+#define MASK_32_47_BITS (0xFFFF00000000)
+
 #define COMMA ,
 #define SEMICOLON ;
 
 #define EVTYPE(A, name)                                                                                                \
-    case PMU_EVENT_TYPE_##name:                                                                                        \
+    case PMU_EVENT_##name:                                                                                             \
         return ETHOSU_PMU_##name
 
-#define EVID(A, name) (PMU_EVENT_TYPE_##name)
-
-#define NPU_REG_PMEVCNTR(x) (NPU_REG_PMEVCNTR0 + ((x) * sizeof(uint32_t)))
-#define NPU_REG_PMEVTYPER(x) (NPU_REG_PMEVTYPER0 + ((x) * sizeof(uint32_t)))
+#define EVID(A, name) (PMU_EVENT_##name)
 
 /*****************************************************************************
  * Variables
  *****************************************************************************/
 
-static const enum pmu_event_type eventbyid[] = {EXPAND_PMU_EVENT_TYPE(EVID, COMMA)};
+static const enum pmu_event eventbyid[] = {EXPAND_PMU_EVENT(EVID, COMMA)};
 
 /*****************************************************************************
  * Static functions
@@ -60,7 +60,7 @@
 {
     switch (id)
     {
-        EXPAND_PMU_EVENT_TYPE(EVTYPE, SEMICOLON);
+        EXPAND_PMU_EVENT(EVTYPE, SEMICOLON);
     default:
         LOG_ERR("Unknown PMU event id: 0x%" PRIx32 "\n", id);
     }
@@ -88,21 +88,17 @@
 void ETHOSU_PMU_Enable(struct ethosu_driver *drv)
 {
     LOG_DEBUG("Enable PMU\n");
-    struct pmcr_r pmcr;
-    pmcr.word   = drv->dev.pmcr;
-    pmcr.cnt_en = 1;
+    struct pmcr_r pmcr = {0};
+    pmcr.cnt_en        = 1;
     set_clock_and_power_request(drv, ETHOSU_PMU_REQUEST, ETHOSU_CLOCK_Q_DISABLE, ETHOSU_POWER_Q_DISABLE);
-    ethosu_dev_write_reg_shadow(&drv->dev, NPU_REG_PMCR, pmcr.word, &drv->dev.pmcr);
+    drv->dev->reg->PMCR.word = pmcr.word;
 }
 
 void ETHOSU_PMU_Disable(struct ethosu_driver *drv)
 {
     LOG_DEBUG("Disable PMU\n");
-    struct pmcr_r pmcr;
-    pmcr.word   = drv->dev.pmcr;
-    pmcr.cnt_en = 0;
     set_clock_and_power_request(drv, ETHOSU_PMU_REQUEST, ETHOSU_CLOCK_Q_ENABLE, ETHOSU_POWER_Q_ENABLE);
-    ethosu_dev_write_reg_shadow(&drv->dev, NPU_REG_PMCR, pmcr.word, &drv->dev.pmcr);
+    drv->dev->reg->PMCR.word = 0;
 }
 
 void ETHOSU_PMU_Set_EVTYPER(struct ethosu_driver *drv, uint32_t num, enum ethosu_pmu_event_type type)
@@ -110,13 +106,13 @@
     assert(num < ETHOSU_PMU_NCOUNTERS);
     uint32_t val = pmu_event_value(type);
     LOG_DEBUG("num=%u, type=%d, val=%u\n", num, type, val);
-    ethosu_dev_write_reg_shadow(&drv->dev, NPU_REG_PMEVTYPER(num), val, &drv->dev.pmu_evtypr[num]);
+    drv->dev->reg->PMEVTYPER[num].word = val;
 }
 
 enum ethosu_pmu_event_type ETHOSU_PMU_Get_EVTYPER(struct ethosu_driver *drv, uint32_t num)
 {
     assert(num < ETHOSU_PMU_NCOUNTERS);
-    uint32_t val                    = drv->dev.pmu_evtypr[num];
+    uint32_t val                    = drv->dev->reg->PMEVTYPER[num].word;
     enum ethosu_pmu_event_type type = pmu_event_type(val);
     LOG_DEBUG("num=%u, type=%d, val=%u\n", num, type, val);
     return type;
@@ -124,66 +120,48 @@
 
 void ETHOSU_PMU_CYCCNT_Reset(struct ethosu_driver *drv)
 {
-    LOG_DEBUG("Reset PMU\n");
+    LOG_DEBUG("Reset PMU cycle counter\n");
     struct pmcr_r pmcr;
-    pmcr.word          = drv->dev.pmcr;
-    pmcr.cycle_cnt_rst = 1;
-    ethosu_dev_write_reg_shadow(&drv->dev, NPU_REG_PMCR, pmcr.word, &drv->dev.pmcr);
-    drv->dev.pmccntr[0] = 0;
-    drv->dev.pmccntr[1] = 0;
+    pmcr.word                = drv->dev->reg->PMCR.word;
+    pmcr.cycle_cnt_rst       = 1;
+    drv->dev->reg->PMCR.word = pmcr.word;
 }
 
 void ETHOSU_PMU_EVCNTR_ALL_Reset(struct ethosu_driver *drv)
 {
     LOG_DEBUG("Reset all events\n");
     struct pmcr_r pmcr;
-    pmcr.word          = drv->dev.pmcr;
-    pmcr.event_cnt_rst = 1;
-    ethosu_dev_write_reg_shadow(&drv->dev, NPU_REG_PMCR, pmcr.word, &drv->dev.pmcr);
-
-    for (uint32_t i = 0; i < ETHOSU_PMU_NCOUNTERS; i++)
-    {
-        drv->dev.pmu_evcntr[i] = 0;
-    }
+    pmcr.word                = drv->dev->reg->PMCR.word;
+    pmcr.event_cnt_rst       = 1;
+    drv->dev->reg->PMCR.word = pmcr.word;
 }
 
 void ETHOSU_PMU_CNTR_Enable(struct ethosu_driver *drv, uint32_t mask)
 {
     LOG_DEBUG("mask=0x%08x\n", mask);
-    ethosu_dev_write_reg_shadow(&drv->dev, NPU_REG_PMCNTENSET, mask, &drv->dev.pmcnten);
+    drv->dev->reg->PMCNTENSET.word = mask;
 }
 
 void ETHOSU_PMU_CNTR_Disable(struct ethosu_driver *drv, uint32_t mask)
 {
     LOG_DEBUG("mask=0x%08x\n", mask);
-    ethosu_dev_write_reg_shadow(&drv->dev, NPU_REG_PMCNTENCLR, mask, &drv->dev.pmcnten);
+    drv->dev->reg->PMCNTENCLR.word = mask;
 }
 
 uint32_t ETHOSU_PMU_CNTR_Status(struct ethosu_driver *drv)
 {
-    LOG_DEBUG("mask=0x%08x\n", drv->dev.pmcnten);
-    return drv->dev.pmcnten;
+    uint32_t pmcntenset = drv->dev->reg->PMCNTENSET.word;
+    LOG_DEBUG("mask=0x%08x\n", pmcntenset);
+    return pmcntenset;
 }
 
 uint64_t ETHOSU_PMU_Get_CCNTR(struct ethosu_driver *drv)
 {
-    uint32_t val_lo = ethosu_dev_read_reg(&drv->dev, NPU_REG_PMCCNTR_LO);
-    uint32_t val_hi = ethosu_dev_read_reg(&drv->dev, NPU_REG_PMCCNTR_HI);
+    uint32_t val_lo = drv->dev->reg->PMCCNTR.CYCLE_CNT_LO;
+    uint32_t val_hi = drv->dev->reg->PMCCNTR.CYCLE_CNT_HI;
     uint64_t val    = ((uint64_t)val_hi << 32) | val_lo;
-    uint64_t shadow = ((uint64_t)drv->dev.pmccntr[1] << 32) | drv->dev.pmccntr[0];
 
-    LOG_DEBUG("val=%" PRIu64 ", shadow=%" PRIu64 "\n", val, shadow);
-
-    // Return the shadow variable in case the NPU was powered off and lost the cycle count
-    if (shadow > val)
-    {
-        return shadow;
-    }
-
-    // Update the shadow variable
-    drv->dev.pmccntr[0] = val_lo;
-    drv->dev.pmccntr[1] = val_hi;
-
+    LOG_DEBUG("val=%" PRIu64 "\n", val);
     return val;
 }
 
@@ -198,8 +176,8 @@
         ETHOSU_PMU_CNTR_Disable(drv, ETHOSU_PMU_CCNT_Msk);
     }
 
-    ethosu_dev_write_reg_shadow(&drv->dev, NPU_REG_PMCCNTR_LO, val & MASK_0_31_BITS, &drv->dev.pmccntr[0]);
-    ethosu_dev_write_reg_shadow(&drv->dev, NPU_REG_PMCCNTR_HI, (val & MASK_32_47_BITS) >> 32, &drv->dev.pmccntr[1]);
+    drv->dev->reg->PMCCNTR.CYCLE_CNT_LO = val & MASK_0_31_BITS;
+    drv->dev->reg->PMCCNTR.CYCLE_CNT_HI = (val & MASK_32_47_BITS) >> 32;
 
     if (active)
     {
@@ -210,17 +188,8 @@
 uint32_t ETHOSU_PMU_Get_EVCNTR(struct ethosu_driver *drv, uint32_t num)
 {
     assert(num < ETHOSU_PMU_NCOUNTERS);
-    uint32_t val = ethosu_dev_read_reg(&drv->dev, NPU_REG_PMEVCNTR(num));
-    LOG_DEBUG("num=%u, val=%u, shadow=%u\n", num, val, drv->dev.pmu_evcntr[num]);
-
-    // Return the shadow variable in case the NPU was powered off and lost the event count
-    if (drv->dev.pmu_evcntr[num] > val)
-    {
-        return drv->dev.pmu_evcntr[num];
-    }
-
-    // Update the shadow variable
-    drv->dev.pmu_evcntr[num] = val;
+    uint32_t val = drv->dev->reg->PMEVCNTR[num].word;
+    LOG_DEBUG("num=%u, val=%u\n", num, val);
 
     return val;
 }
@@ -229,37 +198,38 @@
 {
     assert(num < ETHOSU_PMU_NCOUNTERS);
     LOG_DEBUG("num=%u, val=%u\n", num, val);
-    ethosu_dev_write_reg(&drv->dev, NPU_REG_PMEVCNTR(num), val);
+    drv->dev->reg->PMEVCNTR[num].word = val;
 }
 
 uint32_t ETHOSU_PMU_Get_CNTR_OVS(struct ethosu_driver *drv)
 {
     LOG_DEBUG("");
-    return ethosu_dev_read_reg(&drv->dev, NPU_REG_PMOVSSET);
+    return drv->dev->reg->PMOVSSET.word;
 }
 
 void ETHOSU_PMU_Set_CNTR_OVS(struct ethosu_driver *drv, uint32_t mask)
 {
     LOG_DEBUG("");
-    ethosu_dev_write_reg(&drv->dev, NPU_REG_PMOVSCLR, mask);
+    drv->dev->reg->PMOVSCLR.word = mask;
 }
 
 void ETHOSU_PMU_Set_CNTR_IRQ_Enable(struct ethosu_driver *drv, uint32_t mask)
 {
     LOG_DEBUG("mask=0x%08x\n", mask);
-    ethosu_dev_write_reg_shadow(&drv->dev, NPU_REG_PMINTSET, mask, &drv->dev.pmint);
+    drv->dev->reg->PMINTSET.word = mask;
 }
 
 void ETHOSU_PMU_Set_CNTR_IRQ_Disable(struct ethosu_driver *drv, uint32_t mask)
 {
     LOG_DEBUG("mask=0x%08x\n", mask);
-    ethosu_dev_write_reg_shadow(&drv->dev, NPU_REG_PMINTCLR, mask, &drv->dev.pmint);
+    drv->dev->reg->PMINTCLR.word = mask;
 }
 
 uint32_t ETHOSU_PMU_Get_IRQ_Enable(struct ethosu_driver *drv)
 {
-    LOG_DEBUG("mask=0x%08x\n", drv->dev.pmint);
-    return drv->dev.pmint;
+    uint32_t pmint = drv->dev->reg->PMINTSET.word;
+    LOG_DEBUG("mask=0x%08x\n", pmint);
+    return pmint;
 }
 
 void ETHOSU_PMU_CNTR_Increment(struct ethosu_driver *drv, uint32_t mask)
@@ -273,17 +243,17 @@
     // Increment cycle counter
     if (mask & ETHOSU_PMU_CCNT_Msk)
     {
-        uint64_t val = ETHOSU_PMU_Get_CCNTR(drv) + 1;
-        ethosu_dev_write_reg_shadow(&drv->dev, NPU_REG_PMCCNTR_LO, val & MASK_0_31_BITS, &drv->dev.pmccntr[0]);
-        ethosu_dev_write_reg_shadow(&drv->dev, NPU_REG_PMCCNTR_HI, (val & MASK_32_47_BITS) >> 32, &drv->dev.pmccntr[1]);
+        uint64_t val                        = ETHOSU_PMU_Get_CCNTR(drv) + 1;
+        drv->dev->reg->PMCCNTR.CYCLE_CNT_LO = val & MASK_0_31_BITS;
+        drv->dev->reg->PMCCNTR.CYCLE_CNT_HI = (val & MASK_32_47_BITS) >> 32;
     }
 
     for (int i = 0; i < ETHOSU_PMU_NCOUNTERS; i++)
     {
         if (mask & (1 << i))
         {
-            uint32_t val = ETHOSU_PMU_Get_EVCNTR(drv, i);
-            ethosu_dev_write_reg_shadow(&drv->dev, NPU_REG_PMEVCNTR(i), val + 1, &drv->dev.pmu_evcntr[i]);
+            uint32_t val                    = ETHOSU_PMU_Get_EVCNTR(drv, i);
+            drv->dev->reg->PMEVCNTR[i].word = val + 1;
         }
     }
 
@@ -296,9 +266,9 @@
     LOG_DEBUG("start_event=%u\n", start_event);
     uint32_t val = pmu_event_value(start_event);
     struct pmccntr_cfg_r cfg;
-    cfg.word                = drv->dev.pmccntr_cfg;
-    cfg.CYCLE_CNT_CFG_START = val;
-    ethosu_dev_write_reg_shadow(&drv->dev, NPU_REG_PMCCNTR_CFG, cfg.word, &drv->dev.pmccntr_cfg);
+    cfg.word                        = drv->dev->reg->PMCCNTR_CFG.word;
+    cfg.CYCLE_CNT_CFG_START         = val;
+    drv->dev->reg->PMCCNTR_CFG.word = cfg.word;
 }
 
 void ETHOSU_PMU_PMCCNTR_CFG_Set_Stop_Event(struct ethosu_driver *drv, enum ethosu_pmu_event_type stop_event)
@@ -306,7 +276,7 @@
     LOG_DEBUG("stop_event=%u\n", stop_event);
     uint32_t val = pmu_event_value(stop_event);
     struct pmccntr_cfg_r cfg;
-    cfg.word               = drv->dev.pmccntr_cfg;
-    cfg.CYCLE_CNT_CFG_STOP = val;
-    ethosu_dev_write_reg_shadow(&drv->dev, NPU_REG_PMCCNTR_CFG, cfg.word, &drv->dev.pmccntr_cfg);
-}
\ No newline at end of file
+    cfg.word                        = drv->dev->reg->PMCCNTR_CFG.word;
+    cfg.CYCLE_CNT_CFG_STOP          = val;
+    drv->dev->reg->PMCCNTR_CFG.word = cfg.word;
+}