Set default configuration
Base address 1 points at the TFLM arena and is by default routed
over AXI 0. For the spilling use case with both model and arena in
DRAM it would make more sense to route base addresses 0 and 1
over AXI 1.
For Ethos-U65 the default settings should correspond to the spilling
use case.
The AXI limits should have different max values depending on the NPU
architecture.
Change-Id: Icd317097e2cfdbfb39886e13c2cb2202651e5357
diff --git a/src/ethosu_config.h b/src/ethosu_config_u55.h
similarity index 97%
rename from src/ethosu_config.h
rename to src/ethosu_config_u55.h
index 7a9fae2..afb75bc 100644
--- a/src/ethosu_config.h
+++ b/src/ethosu_config_u55.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019-2020 Arm Limited. All rights reserved.
+ * Copyright (c) 2019-2020,2022 Arm Limited.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -60,12 +60,15 @@
#ifndef AXI_LIMIT0_MAX_BEATS_BYTES
#define AXI_LIMIT0_MAX_BEATS_BYTES 0x0
#endif
+
#ifndef AXI_LIMIT0_MEM_TYPE
#define AXI_LIMIT0_MEM_TYPE 0x0
#endif
+
#ifndef AXI_LIMIT0_MAX_OUTSTANDING_READS
#define AXI_LIMIT0_MAX_OUTSTANDING_READS 32
#endif
+
#ifndef AXI_LIMIT0_MAX_OUTSTANDING_WRITES
#define AXI_LIMIT0_MAX_OUTSTANDING_WRITES 16
#endif
@@ -73,12 +76,15 @@
#ifndef AXI_LIMIT1_MAX_BEATS_BYTES
#define AXI_LIMIT1_MAX_BEATS_BYTES 0x0
#endif
+
#ifndef AXI_LIMIT1_MEM_TYPE
#define AXI_LIMIT1_MEM_TYPE 0x0
#endif
+
#ifndef AXI_LIMIT1_MAX_OUTSTANDING_READS
#define AXI_LIMIT1_MAX_OUTSTANDING_READS 32
#endif
+
#ifndef AXI_LIMIT1_MAX_OUTSTANDING_WRITES
#define AXI_LIMIT1_MAX_OUTSTANDING_WRITES 16
#endif
@@ -86,24 +92,31 @@
#ifndef AXI_LIMIT2_MAX_BEATS_BYTES
#define AXI_LIMIT2_MAX_BEATS_BYTES 0x0
#endif
+
#ifndef AXI_LIMIT2_MEM_TYPE
#define AXI_LIMIT2_MEM_TYPE 0x0
#endif
+
#ifndef AXI_LIMIT2_MAX_OUTSTANDING_READS
#define AXI_LIMIT2_MAX_OUTSTANDING_READS 32
#endif
+
#ifndef AXI_LIMIT2_MAX_OUTSTANDING_WRITES
#define AXI_LIMIT2_MAX_OUTSTANDING_WRITES 16
#endif
+
#ifndef AXI_LIMIT3_MAX_BEATS_BYTES
#define AXI_LIMIT3_MAX_BEATS_BYTES 0x0
#endif
+
#ifndef AXI_LIMIT3_MEM_TYPE
#define AXI_LIMIT3_MEM_TYPE 0x0
#endif
+
#ifndef AXI_LIMIT3_MAX_OUTSTANDING_READS
#define AXI_LIMIT3_MAX_OUTSTANDING_READS 32
#endif
+
#ifndef AXI_LIMIT3_MAX_OUTSTANDING_WRITES
#define AXI_LIMIT3_MAX_OUTSTANDING_WRITES 16
#endif
diff --git a/src/ethosu_config.h b/src/ethosu_config_u65.h
similarity index 84%
copy from src/ethosu_config.h
copy to src/ethosu_config_u65.h
index 7a9fae2..d662886 100644
--- a/src/ethosu_config.h
+++ b/src/ethosu_config_u65.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019-2020 Arm Limited. All rights reserved.
+ * Copyright (c) 2019-2020,2022 Arm Limited.
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -30,7 +30,7 @@
#endif
#ifndef NPU_REGIONCFG_1
-#define NPU_REGIONCFG_1 0
+#define NPU_REGIONCFG_1 2
#endif
#ifndef NPU_REGIONCFG_2
@@ -60,52 +60,65 @@
#ifndef AXI_LIMIT0_MAX_BEATS_BYTES
#define AXI_LIMIT0_MAX_BEATS_BYTES 0x0
#endif
+
#ifndef AXI_LIMIT0_MEM_TYPE
#define AXI_LIMIT0_MEM_TYPE 0x0
#endif
+
#ifndef AXI_LIMIT0_MAX_OUTSTANDING_READS
-#define AXI_LIMIT0_MAX_OUTSTANDING_READS 32
+#define AXI_LIMIT0_MAX_OUTSTANDING_READS 64
#endif
+
#ifndef AXI_LIMIT0_MAX_OUTSTANDING_WRITES
-#define AXI_LIMIT0_MAX_OUTSTANDING_WRITES 16
+#define AXI_LIMIT0_MAX_OUTSTANDING_WRITES 32
#endif
#ifndef AXI_LIMIT1_MAX_BEATS_BYTES
#define AXI_LIMIT1_MAX_BEATS_BYTES 0x0
#endif
+
#ifndef AXI_LIMIT1_MEM_TYPE
#define AXI_LIMIT1_MEM_TYPE 0x0
#endif
+
#ifndef AXI_LIMIT1_MAX_OUTSTANDING_READS
-#define AXI_LIMIT1_MAX_OUTSTANDING_READS 32
+#define AXI_LIMIT1_MAX_OUTSTANDING_READS 64
#endif
+
#ifndef AXI_LIMIT1_MAX_OUTSTANDING_WRITES
-#define AXI_LIMIT1_MAX_OUTSTANDING_WRITES 16
+#define AXI_LIMIT1_MAX_OUTSTANDING_WRITES 32
#endif
#ifndef AXI_LIMIT2_MAX_BEATS_BYTES
#define AXI_LIMIT2_MAX_BEATS_BYTES 0x0
#endif
+
#ifndef AXI_LIMIT2_MEM_TYPE
#define AXI_LIMIT2_MEM_TYPE 0x0
#endif
+
#ifndef AXI_LIMIT2_MAX_OUTSTANDING_READS
-#define AXI_LIMIT2_MAX_OUTSTANDING_READS 32
+#define AXI_LIMIT2_MAX_OUTSTANDING_READS 64
#endif
+
#ifndef AXI_LIMIT2_MAX_OUTSTANDING_WRITES
-#define AXI_LIMIT2_MAX_OUTSTANDING_WRITES 16
+#define AXI_LIMIT2_MAX_OUTSTANDING_WRITES 32
#endif
+
#ifndef AXI_LIMIT3_MAX_BEATS_BYTES
#define AXI_LIMIT3_MAX_BEATS_BYTES 0x0
#endif
+
#ifndef AXI_LIMIT3_MEM_TYPE
#define AXI_LIMIT3_MEM_TYPE 0x0
#endif
+
#ifndef AXI_LIMIT3_MAX_OUTSTANDING_READS
-#define AXI_LIMIT3_MAX_OUTSTANDING_READS 32
+#define AXI_LIMIT3_MAX_OUTSTANDING_READS 64
#endif
+
#ifndef AXI_LIMIT3_MAX_OUTSTANDING_WRITES
-#define AXI_LIMIT3_MAX_OUTSTANDING_WRITES 16
+#define AXI_LIMIT3_MAX_OUTSTANDING_WRITES 32
#endif
/*
diff --git a/src/ethosu_device_u55_u65.c b/src/ethosu_device_u55_u65.c
index f16f9f8..54d2a79 100644
--- a/src/ethosu_device_u55_u65.c
+++ b/src/ethosu_device_u55_u65.c
@@ -18,10 +18,15 @@
#include "ethosu_interface.h"
-#include "ethosu_config.h"
#include "ethosu_device.h"
#include "ethosu_log.h"
+#ifdef ETHOSU55
+#include "ethosu_config_u55.h"
+#else
+#include "ethosu_config_u65.h"
+#endif
+
#include <assert.h>
#include <inttypes.h>
#include <stdbool.h>
diff --git a/src/ethosu_driver.c b/src/ethosu_driver.c
index ee9d08c..11c51f6 100644
--- a/src/ethosu_driver.c
+++ b/src/ethosu_driver.c
@@ -21,10 +21,15 @@
******************************************************************************/
#include "ethosu_driver.h"
-#include "ethosu_config.h"
#include "ethosu_device.h"
#include "ethosu_log.h"
+#ifdef ETHOSU55
+#include "ethosu_config_u55.h"
+#else
+#include "ethosu_config_u65.h"
+#endif
+
#include <assert.h>
#include <cmsis_compiler.h>
#include <inttypes.h>