Configure write-through caching for Corstone-310 BRAM
Change-Id: I5e0fc2ecbbf416ca07be6b9d65e989c1c116b219
diff --git a/targets/corstone-310/target.cpp b/targets/corstone-310/target.cpp
index 3b2820f..a91bc67 100644
--- a/targets/corstone-310/target.cpp
+++ b/targets/corstone-310/target.cpp
@@ -389,7 +389,7 @@
1, // Non-Privileged
0), // eXecute Never disabled
ARM_MPU_RLAR(0x213fffff, // Limit
- Mpu::WBWARA_index) // Attribute index - Write-Back, Write-Allocate, Read-allocate
+ Mpu::WTWARA_index) // Attribute index - Write-Through, Write-Allocate, Read-allocate
},
{
// SSE-300 internal SRAM (S)
@@ -399,7 +399,7 @@
1, // Non-Privileged
0), // eXecute Never disabled
ARM_MPU_RLAR(0x313fffff, // Limit
- Mpu::WBWARA_index) // Attribute index - Write-Back, Write-Allocate, Read-allocate
+ Mpu::WTWARA_index) // Attribute index - Write-Through, Write-Allocate, Read-allocate
},
{
// DDR (NS)