diff --git a/targets/corstone-300/CMakeLists.txt b/targets/corstone-300/CMakeLists.txt
index 62205bb..9f8ed36 100644
--- a/targets/corstone-300/CMakeLists.txt
+++ b/targets/corstone-300/CMakeLists.txt
@@ -1,6 +1,5 @@
 #
-# SPDX-FileCopyrightText: Copyright 2020-2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
-#
+# SPDX-FileCopyrightText: Copyright 2020-2024 Arm Limited and/or its affiliates <open-source-office@arm.com>
 # SPDX-License-Identifier: Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the License); you may
@@ -27,8 +26,6 @@
 endif()
 
 set(ETHOSU_TARGET_NPU_CONFIG "ethos-u55-128" CACHE STRING "NPU configuration")
-set(ETHOSU_TARGET_NPU_COUNT 1 CACHE INTERNAL "Number of NPUs")
-set(ETHOSU_TARGET_NPU_TA_COUNT 2 CACHE INTERNAL "Number of timing adapters per NPU")
 
 set(ETHOSU_PMU_EVENT_0 -1 CACHE STRING "PMU Event #0")
 set(ETHOSU_PMU_EVENT_1 -1 CACHE STRING "PMU Event #1")
@@ -81,10 +78,6 @@
 add_subdirectory(${CMAKE_CURRENT_SOURCE_DIR}/../common target)
 
 target_compile_definitions(ethosu_target_common INTERFACE
-    # Configure NPU architecture and number of timing adapters
-    ETHOSU_NPU_COUNT=${ETHOSU_TARGET_NPU_COUNT}
-    ETHOSU_NPU_TA_COUNT=${ETHOSU_TARGET_NPU_TA_COUNT}
-
     # Configure PMU events
     ETHOSU_PMU_EVENT_0=${ETHOSU_PMU_EVENT_0}
     ETHOSU_PMU_EVENT_1=${ETHOSU_PMU_EVENT_1}
diff --git a/targets/corstone-300/target.cpp b/targets/corstone-300/target.cpp
index f52a5db..46d6a77 100644
--- a/targets/corstone-300/target.cpp
+++ b/targets/corstone-300/target.cpp
@@ -1,6 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright 2020-2021, 2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
- *
+ * SPDX-FileCopyrightText: Copyright 2020-2021, 2023-2024 Arm Limited and/or its affiliates <open-source-office@arm.com>
  * SPDX-License-Identifier: Apache-2.0
  *
  * Licensed under the Apache License, Version 2.0 (the License); you may
@@ -45,8 +44,10 @@
 #define ETHOSU_IRQ          56
 #define ETHOSU_IRQ_PRIORITY 5
 
-#define ETHOSU0_TA0_BASE_ADDRESS 0x48103000
-#define ETHOSU0_TA1_BASE_ADDRESS 0x48103200
+#define ETHOSU_TA0_BASE_ADDRESS 0x48103000
+#define ETHOSU_TA1_BASE_ADDRESS 0x48103200
+
+#define ETHOSU_NUM_TA 2
 
 /****************************************************************************
  * Variables
@@ -173,37 +174,36 @@
 #define ETHOSU_TA_HISTCNT_1 0
 #endif
 
-static uintptr_t ethosu_ta_base_addrs[ETHOSU_NPU_COUNT][ETHOSU_NPU_TA_COUNT] = {
-    {ETHOSU0_TA0_BASE_ADDRESS, ETHOSU0_TA1_BASE_ADDRESS}};
-struct timing_adapter ethosu_ta[ETHOSU_NPU_COUNT][ETHOSU_NPU_TA_COUNT];
-struct timing_adapter_settings ethosu_ta_settings[ETHOSU_NPU_TA_COUNT] = {{ETHOSU_TA_MAXR_0,
-                                                                           ETHOSU_TA_MAXW_0,
-                                                                           ETHOSU_TA_MAXRW_0,
-                                                                           ETHOSU_TA_RLATENCY_0,
-                                                                           ETHOSU_TA_WLATENCY_0,
-                                                                           ETHOSU_TA_PULSE_ON_0,
-                                                                           ETHOSU_TA_PULSE_OFF_0,
-                                                                           ETHOSU_TA_BWCAP_0,
-                                                                           ETHOSU_TA_PERFCTRL_0,
-                                                                           ETHOSU_TA_PERFCNT_0,
-                                                                           ETHOSU_TA_MODE_0,
-                                                                           0, // Read only register
-                                                                           ETHOSU_TA_HISTBIN_0,
-                                                                           ETHOSU_TA_HISTCNT_0},
-                                                                          {ETHOSU_TA_MAXR_1,
-                                                                           ETHOSU_TA_MAXW_1,
-                                                                           ETHOSU_TA_MAXRW_1,
-                                                                           ETHOSU_TA_RLATENCY_1,
-                                                                           ETHOSU_TA_WLATENCY_1,
-                                                                           ETHOSU_TA_PULSE_ON_1,
-                                                                           ETHOSU_TA_PULSE_OFF_1,
-                                                                           ETHOSU_TA_BWCAP_1,
-                                                                           ETHOSU_TA_PERFCTRL_1,
-                                                                           ETHOSU_TA_PERFCNT_1,
-                                                                           ETHOSU_TA_MODE_1,
-                                                                           0, // Read only register
-                                                                           ETHOSU_TA_HISTBIN_1,
-                                                                           ETHOSU_TA_HISTCNT_1}};
+static uintptr_t ethosu_ta_base_addrs[ETHOSU_NUM_TA] = {ETHOSU_TA0_BASE_ADDRESS, ETHOSU_TA1_BASE_ADDRESS};
+struct timing_adapter ethosu_ta[ETHOSU_NUM_TA];
+struct timing_adapter_settings ethosu_ta_settings[ETHOSU_NUM_TA] = {{ETHOSU_TA_MAXR_0,
+                                                                     ETHOSU_TA_MAXW_0,
+                                                                     ETHOSU_TA_MAXRW_0,
+                                                                     ETHOSU_TA_RLATENCY_0,
+                                                                     ETHOSU_TA_WLATENCY_0,
+                                                                     ETHOSU_TA_PULSE_ON_0,
+                                                                     ETHOSU_TA_PULSE_OFF_0,
+                                                                     ETHOSU_TA_BWCAP_0,
+                                                                     ETHOSU_TA_PERFCTRL_0,
+                                                                     ETHOSU_TA_PERFCNT_0,
+                                                                     ETHOSU_TA_MODE_0,
+                                                                     0, // Read only register
+                                                                     ETHOSU_TA_HISTBIN_0,
+                                                                     ETHOSU_TA_HISTCNT_0},
+                                                                    {ETHOSU_TA_MAXR_1,
+                                                                     ETHOSU_TA_MAXW_1,
+                                                                     ETHOSU_TA_MAXRW_1,
+                                                                     ETHOSU_TA_RLATENCY_1,
+                                                                     ETHOSU_TA_WLATENCY_1,
+                                                                     ETHOSU_TA_PULSE_ON_1,
+                                                                     ETHOSU_TA_PULSE_OFF_1,
+                                                                     ETHOSU_TA_BWCAP_1,
+                                                                     ETHOSU_TA_PERFCTRL_1,
+                                                                     ETHOSU_TA_PERFCNT_1,
+                                                                     ETHOSU_TA_MODE_1,
+                                                                     0, // Read only register
+                                                                     ETHOSU_TA_HISTBIN_1,
+                                                                     ETHOSU_TA_HISTCNT_1}};
 
 #endif
 
@@ -289,14 +289,12 @@
 
 #ifdef ETHOSU
     // Initialize timing adapter(s)
-    for (int i = 0; i < ETHOSU_NPU_COUNT; i++) {
-        for (int j = 0; j < ETHOSU_NPU_TA_COUNT; j++) {
-            if (ta_init(&ethosu_ta[i][j], ethosu_ta_base_addrs[i][j])) {
-                printf("Failed to initialize timing-adapter %d for NPU %d\n", j, i);
-            } else {
-                // Set the updated configuration
-                ta_set_all(&ethosu_ta[i][j], &ethosu_ta_settings[j]);
-            }
+    for (int i = 0; i < ETHOSU_NUM_TA; i++) {
+        if (ta_init(&ethosu_ta[i], ethosu_ta_base_addrs[i])) {
+            printf("Failed to initialize M%d timing-adapter\n", i);
+        } else {
+            // Set the updated configuration
+            ta_set_all(&ethosu_ta[i], &ethosu_ta_settings[i]);
         }
     }