Simplify timing-adapter settings
The targets only have one NPU so simplify the timing adapters settings
by removing unnecessary nesting and complexity.
Corstone-310 does not have timing adapters in the NPU model, so remove
that dead timing adapter code completely.
Change-Id: Iabe95c5e6354f5168beefa3ddfff4a348c4a7021
Signed-off-by: Jonny Svärd <jonny.svaerd@arm.com>
diff --git a/targets/demo/CMakeLists.txt b/targets/demo/CMakeLists.txt
index 1bb97cc..675521b 100644
--- a/targets/demo/CMakeLists.txt
+++ b/targets/demo/CMakeLists.txt
@@ -1,5 +1,5 @@
#
-# SPDX-FileCopyrightText: Copyright 2022-2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
+# SPDX-FileCopyrightText: Copyright 2022-2024 Arm Limited and/or its affiliates <open-source-office@arm.com>
#
# SPDX-License-Identifier: Apache-2.0
#
@@ -44,8 +44,6 @@
message("Configuring target ${ETHOSU_TARGET}")
set(ETHOSU_TARGET_NPU_CONFIG "<TODO> e.g. ethos-u65-256" CACHE STRING "NPU configuration")
-set(ETHOSU_TARGET_NPU_COUNT 1 CACHE INTERNAL "Number of NPUs")
-set(ETHOSU_TARGET_NPU_TA_COUNT 0 CACHE INTERNAL "Number of timing adapters per NPU")
# Fast memory size
# If the TFLM model and arena are placed in Flash/DRAM, and if the NPU is Ethos-U65,
@@ -81,10 +79,6 @@
# Common defines
target_compile_definitions(ethosu_target_common INTERFACE
- # Configure NPU architecture and number of timing adapters
- ETHOSU_NPU_COUNT=${ETHOSU_TARGET_NPU_COUNT}
- ETHOSU_NPU_TA_COUNT=${ETHOSU_TARGET_NPU_TA_COUNT}
-
# Placement or TLFu model and area. 0 = SRAM, 1 = DRAM
# The scatter file and linker script must be designed to switch on these defines
ETHOSU_FAST_MEMORY_SIZE=${FAST_MEMORY_SIZE}