tree 2c6a99f938eb5842e65561dcb1d6bac82f6b4483
parent 908a07c61db978679a11a0f4ee023dc3c6aabffd
author Jonny Svärd <jonny.svaerd@arm.com> 1618500661 +0200
committer Jonny Svärd <jonny.svaerd@arm.com> 1619098006 +0200

Enable MPU and CPU cache for Corstone-300

- Enable CPU instruction- and data cache by default.
- Add a CMake option to turn CPU cache on/off.

- Add basic MPU configuration for memory areas. Make the code
  segment RO (NS address' are reachable from secure state,
  hence MPU config entries for both S and NS address of ITCM).

- Target latest NPU API version
Change-Id: Ie9bf2f02e5ad534375d146804fdc66b9f2f6770f

Change-Id: I9def430d1e61d18e521798db4f48ed0a8c58380e