Fix SEI CERT coding standard warnings
Change-Id: I47fdf29a50440c82fd9ccf111a846bf87e8a9e29
diff --git a/drivers/mhu_v2/src/mhu_v2.cpp b/drivers/mhu_v2/src/mhu_v2.cpp
index cdeb90b..1c2e2f6 100644
--- a/drivers/mhu_v2/src/mhu_v2.cpp
+++ b/drivers/mhu_v2/src/mhu_v2.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2020-2021 Arm Limited. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright 2020-2021, 2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -112,9 +112,9 @@
void MHUv2::setCombinedClearInterrupt(bool enable) {
uint32_t val = txRead(MHUv2_SND_INT_EN_OFFS);
if (enable) {
- val |= (1 << 2);
+ val |= (1u << 2);
} else {
- val &= ~(1 << 2);
+ val &= ~(1u << 2);
}
txWrite(MHUv2_SND_INT_EN_OFFS, val);
}
@@ -126,9 +126,9 @@
void MHUv2::setCombinedRecvInterrupt(bool enable) {
uint32_t val = rxRead(MHUv2_RCV_INT_EN_OFFS);
if (enable) {
- val |= (1 << 2);
+ val |= (1u << 2);
} else {
- val &= ~(1 << 2);
+ val &= ~(1u << 2);
}
rxWrite(MHUv2_SND_INT_EN_OFFS, val);
}
@@ -137,9 +137,9 @@
void MHUv2::setReadyNotReadyInterrupts(bool enable) {
uint32_t val = txRead(MHUv2_SND_INT_EN_OFFS);
if (enable) {
- val |= (1 << 0 | 1 << 1);
+ val |= (1u << 0 | 1u << 1);
} else {
- val &= ~(1 << 0 | 1 << 1);
+ val &= ~(1u << 0 | 1u << 1);
}
txWrite(MHUv2_SND_INT_EN_OFFS, val);
}
@@ -197,12 +197,12 @@
if (tx) {
aidr = getTxAIDR();
a = reinterpret_cast<struct aidr_t *>(&aidr);
- LOG("TX MHUv2 reports: Major rev: %d, Minor rev: %d", a->ARCH_MAJOR_REV, a->ARCH_MINOR_REV);
+ LOG("TX MHUv2 reports: Major rev: %u, Minor rev: %u", a->ARCH_MAJOR_REV, a->ARCH_MINOR_REV);
}
if (rx) {
aidr = getRxAIDR();
a = reinterpret_cast<struct aidr_t *>(&aidr);
- LOG("RX MHUv2 reports: Major rev: %d, Minor rev: %d", a->ARCH_MAJOR_REV, a->ARCH_MINOR_REV);
+ LOG("RX MHUv2 reports: Major rev: %u, Minor rev: %u", a->ARCH_MAJOR_REV, a->ARCH_MINOR_REV);
}
}