commit 049c59b6cc05c3bc586f237505664c929bfa5258
author Per Åstrand <per.astrand@arm.com> Tue Nov 02 15:23:18 2021 +0100
committer Per Åstrand <per.astrand@arm.com> Tue Nov 02 16:48:46 2021 +0100
tree fb9a2099af0eb0f7aa9795d8e992ba44949561d4
parent bb17527d86cececba9c15f072fb5a4ab76aae0ba

Add support for ID 0x20112 of FPGA reset ctrl

Change-Id: I5a87686aa2b4ebf7d9d6202a6c4852d34be5f9e4

remoteproc/juno_fpga_reset.c

diff --git a/remoteproc/juno_fpga_reset.c b/remoteproc/juno_fpga_reset.c
index 5cc6bae..fab90cf 100644
--- a/remoteproc/juno_fpga_reset.c
+++ b/remoteproc/juno_fpga_reset.c
@@ -56,7 +56,9 @@
 
 	if (id != 0x2010f &&
                 id != 0x20110 &&
-                id != 0x20111) {
+                id != 0x20111 &&
+                id != 0x20112) {
+                dev_err(dev, "ID not matching");
 		return IOMEM_ERR_PTR(-EINVAL);
         }
 
@@ -122,8 +124,10 @@
 	reset->base = verify_and_remap(dev, res);
 	reset->dev = dev;
 
-	if (IS_ERR(reset->base))
+	if (IS_ERR(reset->base)) {
+                dev_err(dev, "Failed to verify and remap base address (%ld)", PTR_ERR(reset->base));
 		return PTR_ERR(reset->base);
+        }
 
 	platform_set_drvdata(pdev, reset);
 
@@ -132,7 +136,7 @@
 	reset->rst.ops = &juno_fpga_reset_ops;
 	reset->rst.of_node = pdev->dev.of_node;
 
-	dev_dbg(dev, "registering to reset controller core");
+	dev_info(dev, "registering to reset controller core");
 
 	return devm_reset_controller_register(dev, &reset->rst);
 }