Change PMU event counter values to use 64-bit
The PMU event counter value is an accumulation of 32-bit values during
the inference and to ensure the total value fits in the rpmsg message
and UAPI, the variable holding the value has been changed to 64-bit.
The driver library, Python wrapper and inference runner have been
changed accordingly to support the 64-bit values.
Change-Id: I09a8e45eb75800c8a787f83abff5a3693148cc15
Signed-off-by: Mikael Olsson <mikael.olsson@arm.com>
diff --git a/kernel/ethosu_inference.c b/kernel/ethosu_inference.c
index ac617c3..5fbad58 100644
--- a/kernel/ethosu_inference.c
+++ b/kernel/ethosu_inference.c
@@ -457,7 +457,7 @@
inf->pmu_cycle_counter_count = rsp->pmu_cycle_counter_count;
dev_dbg(dev,
- "PMU events. config=[%u, %u, %u, %u], count=[%u, %u, %u, %u]\n",
+ "PMU events. config=[%u, %u, %u, %u], count=[%llu, %llu, %llu, %llu]\n",
inf->pmu_event_config[0], inf->pmu_event_config[1],
inf->pmu_event_config[2], inf->pmu_event_config[3],
inf->pmu_event_count[0], inf->pmu_event_count[1],