commit 016b827ad722aecd4338d1d6c7b1b004760490b7
author Diqing Zhong <diqing.zhong@arm.com> Wed Dec 16 16:46:06 2020 +0100
committer patrik.gustavsson <patrik.gustavsson@arm.com> Tue Dec 22 14:44:09 2020 +0000
tree 7a26bfdf670e8885693bc7db531ea647e24d571b
parent 3d73717f793100ba6705441fb42514f938780c1e

MLBEDSW-1493: Optimise strided conv

  - Reshape/rearrange IFM and weight tensor for better HW utilization
  - Update estimator to cover this case

Change-Id: I4be70a69fa600a1951bf1c247f9973e6cc9b03f4
Signed-off-by: Diqing Zhong <diqing.zhong@arm.com>

ethosu/vela/shared_buffer_allocation.py

diff --git a/ethosu/vela/shared_buffer_allocation.py b/ethosu/vela/shared_buffer_allocation.py
index d8faf36..2043864 100644
--- a/ethosu/vela/shared_buffer_allocation.py
+++ b/ethosu/vela/shared_buffer_allocation.py
@@ -172,7 +172,11 @@
 
 
 def is_acc_40bits_used(npu_block_type, ifm_tensor, ofm_tensor, ifm2_tensor=None):
-    return npu_block_type != NpuBlockType.Pooling and _all_fms_have_quant(ifm_tensor, ofm_tensor, ifm2_tensor)
+    return (
+        ifm_tensor.dtype.size_in_bits() == 16
+        and npu_block_type != NpuBlockType.Pooling
+        and _all_fms_have_quant(ifm_tensor, ofm_tensor, ifm2_tensor)
+    )
 
 
 def shared_buffer_allocation_for_pass(arch, ps) -> SharedBufferAllocation: