MLBEDSW-1970: Add stride 3 support
This patch adds support for strides of size 3.
It removes some obsolete code for a corner case that
no longer exists.
It also changes the setting of the bitfield in
NPU_SET_KERNEL_STRIDE so that it matches the specification.
Change-Id: I7dabcf72b7826ca0b3c98e9d23209027204079a8
Signed-off-by: Dwight Lidman <dwight.lidman@arm.com>
diff --git a/ethosu/vela/register_command_stream_generator.py b/ethosu/vela/register_command_stream_generator.py
index a2b2f4d..120cf8b 100644
--- a/ethosu/vela/register_command_stream_generator.py
+++ b/ethosu/vela/register_command_stream_generator.py
@@ -569,8 +569,15 @@
emit.cmd0_with_param(cmd0.NPU_SET_IFM_PAD_BOTTOM, explicit_padding[2])
emit.cmd0_with_param(cmd0.NPU_SET_IFM_PAD_RIGHT, explicit_padding[3])
- stride = primary_op.attrs["strides"][2] - 1
- stride |= (primary_op.attrs["strides"][1] - 1) << 1
+ # set kernel x stride low bit
+ stride = primary_op.attrs["strides"][2] - 1 & 1
+ # set kernel y stride low bit
+ stride |= (primary_op.attrs["strides"][1] - 1 & 1) << 1
+ # set kernel x stride extension bits
+ stride |= (primary_op.attrs["strides"][2] - 1 >> 1) << 6
+ # set kernel y stride extension bits
+ stride |= (primary_op.attrs["strides"][1] - 1 >> 1) << 9
+
if npu_block_type == NpuBlockType.Pooling:
k_height, k_width = primary_op.attrs["ksize"][1:3]