commit 2b60ce93e1f404340e1be5c88f064cf75a4bad6f
author Fredrik Svedberg <fredrik.svedberg@arm.com> Tue Sep 15 17:18:40 2020 +0200
committer patrik.gustavsson <patrik.gustavsson@arm.com> Thu Sep 17 08:31:01 2020 +0000
tree 04714f6b19d14770aa8d12192ab5aaec69841a16
parent 1a66697b80a527af6d6dd1ed235199264696767e

[MLBEDSW-2638] Do not use 40bit ACC for softmax int16

Added logic for not using 40bit ACC for softmax int16.

Change-Id: I02b376040e19b48e8aaa65d48ffc7c47a0b9b187
Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>

ethosu/vela/shared_buffer_allocation.py

diff --git a/ethosu/vela/shared_buffer_allocation.py b/ethosu/vela/shared_buffer_allocation.py
index 55cc34c..63e2268 100644
--- a/ethosu/vela/shared_buffer_allocation.py
+++ b/ethosu/vela/shared_buffer_allocation.py
@@ -37,6 +37,8 @@
         self.banks_required = np.zeros(SharedBufferArea.Size)
 
         ifm_tensor, ifm2_tensor, weight_tensor, ofm_tensor = ps.get_primary_op_ifm_ifm2_weights_ofm()
+        tensors = [t for t in (ifm_tensor, ifm2_tensor, ofm_tensor) if t is not None]
+        has_scale = None not in (t.quantization.scale_f32 for t in tensors)
 
         strides = (1, 1, 1, 1)
         dilation = (1, 1, 1, 1)
@@ -84,7 +86,7 @@
             else:
                 self.ifm_depth = ifm_tensor.shape[-1]
             if self.ifm_bits == 16:
-                if ps.npu_block_type != NpuBlockType.Pooling:
+                if ps.npu_block_type != NpuBlockType.Pooling and has_scale:
                     self.use_accumulator_element = SHRAMElements.Acc40
                 self.use_ifm_element = self.use_ifm_element + 1
                 assert (self.use_ifm_element == SHRAMElements.IFM16) or (