TOSA: Added support for ADD, SUB and MUL
Added support for ADD, SUB and MUL
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: I52acdc126b16e2cf4096bcf7a77023ea7d204998
diff --git a/ethosu/vela/high_level_command_to_npu_op.py b/ethosu/vela/high_level_command_to_npu_op.py
index c5d0646..67d1cd9 100644
--- a/ethosu/vela/high_level_command_to_npu_op.py
+++ b/ethosu/vela/high_level_command_to_npu_op.py
@@ -86,6 +86,7 @@
# Maps an elementwise op type to an elementwise_mode enum value used by NPU_OP_ELEMENTWISE
elementwise_op_map = {
Op.Mul: NpuElementWiseOp.MUL,
+ Op.RescaleMul: NpuElementWiseOp.MUL,
Op.Add: NpuElementWiseOp.ADD,
Op.RescaleAdd: NpuElementWiseOp.ADD,
Op.Sub: NpuElementWiseOp.SUB,
@@ -460,7 +461,7 @@
output_scale = npu_op.ifm.quantization.scale_f32 / npu_op.ofm.quantization.scale_f32
if op.type == Op.LeakyRelu:
output_scale = op.attrs["alpha"]
- if op.type == Op.RescaleAdd:
+ if op.type in (Op.RescaleAdd, Op.RescaleMul):
assert op.rescale is not None, f"{op.type} must have rescale"
npu_op.rescale = op.rescale
if op.type in (Op.Add, Op.Mul, Op.Sub):