Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 1 | # Copyright (C) 2020 Arm Limited or its affiliates. All rights reserved. |
| 2 | # |
| 3 | # SPDX-License-Identifier: Apache-2.0 |
| 4 | # |
| 5 | # Licensed under the Apache License, Version 2.0 (the License); you may |
| 6 | # not use this file except in compliance with the License. |
| 7 | # You may obtain a copy of the License at |
| 8 | # |
| 9 | # www.apache.org/licenses/LICENSE-2.0 |
| 10 | # |
| 11 | # Unless required by applicable law or agreed to in writing, software |
| 12 | # distributed under the License is distributed on an AS IS BASIS, WITHOUT |
| 13 | # WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 14 | # See the License for the specific language governing permissions and |
| 15 | # limitations under the License. |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 16 | # Description: |
Tim Hall | c8a7386 | 2020-10-27 12:43:14 +0000 | [diff] [blame] | 17 | # Holds a container for Ethos-U and System architecture parameters. |
Diego Russo | ea6111a | 2020-04-14 18:41:58 +0100 | [diff] [blame] | 18 | import enum |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 19 | from collections import namedtuple |
| 20 | from configparser import ConfigParser |
Diego Russo | ea6111a | 2020-04-14 18:41:58 +0100 | [diff] [blame] | 21 | |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 22 | import numpy as np |
Diego Russo | ea6111a | 2020-04-14 18:41:58 +0100 | [diff] [blame] | 23 | |
Louis Verhaard | aeae567 | 2020-11-02 18:04:27 +0100 | [diff] [blame] | 24 | from .api import NpuAccelerator |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 25 | from .errors import CliOptionError |
| 26 | from .errors import ConfigOptionError |
Dwight Lidman | a9390f7 | 2020-05-13 12:00:08 +0200 | [diff] [blame] | 27 | from .ethos_u55_regs.ethos_u55_regs import resampling_mode |
Louis Verhaard | 69b3176 | 2020-11-17 09:45:20 +0100 | [diff] [blame] | 28 | from .numeric_util import full_shape |
Diego Russo | e8a1045 | 2020-04-21 17:39:10 +0100 | [diff] [blame] | 29 | from .numeric_util import round_up |
| 30 | from .numeric_util import round_up_divide |
Tim Hall | 4ed38bc | 2020-10-20 18:54:20 +0100 | [diff] [blame] | 31 | from .operation import Kernel |
Diego Russo | ea6111a | 2020-04-14 18:41:58 +0100 | [diff] [blame] | 32 | from .operation import NpuBlockType |
Tim Hall | 4ed38bc | 2020-10-20 18:54:20 +0100 | [diff] [blame] | 33 | from .operation import PointXYZ |
Diego Russo | ea6111a | 2020-04-14 18:41:58 +0100 | [diff] [blame] | 34 | from .supported_operators import SupportedOperators |
Diego Russo | e8a1045 | 2020-04-21 17:39:10 +0100 | [diff] [blame] | 35 | from .tensor import MemArea |
Patrik Gustavsson | eca2e95 | 2020-05-27 09:15:11 +0200 | [diff] [blame] | 36 | from .tensor import MemType |
Diego Russo | e8a1045 | 2020-04-21 17:39:10 +0100 | [diff] [blame] | 37 | from .tensor import TensorFormat |
| 38 | from .tensor import TensorPurpose |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 39 | |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 40 | |
| 41 | class Block: |
| 42 | def __init__(self, w, h, d): |
| 43 | self.width = w |
| 44 | self.height = h |
| 45 | self.depth = d |
| 46 | |
| 47 | def __eq__(self, other): |
| 48 | if self.width == other.width and self.height == other.height and self.depth == other.depth: |
| 49 | return True |
| 50 | else: |
| 51 | return False |
| 52 | |
| 53 | def __repr__(self): |
| 54 | return "<Block: {0},{1},{2}>".format(self.width, self.height, self.depth) |
| 55 | |
| 56 | @classmethod |
| 57 | def from_string(cls, s): |
| 58 | w, h, c = (int(v) for v in s.split("x")) |
| 59 | return cls(w, h, c) |
| 60 | |
Louis Verhaard | 69b3176 | 2020-11-17 09:45:20 +0100 | [diff] [blame] | 61 | @classmethod |
| 62 | def from_shape(cls, shape) -> "Block": |
| 63 | """Converts the shape to a Block""" |
| 64 | shp = full_shape(3, shape, 1) |
| 65 | # Note: index from end, as len(shp) may be > 3 |
| 66 | return Block(shp[-2], shp[-3], shp[-1]) |
| 67 | |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 68 | |
| 69 | class Rect: |
| 70 | def __init__(self, x, y, z, x2, y2, z2): |
| 71 | self.x = x |
| 72 | self.y = y |
| 73 | self.z = z |
| 74 | self.x2 = x2 |
| 75 | self.y2 = y2 |
| 76 | self.z2 = z2 |
| 77 | |
| 78 | def start(self): |
| 79 | return PointXYZ(self.x, self.y, self.z) |
| 80 | |
| 81 | def end(self): |
| 82 | return PointXYZ(self.x2, self.y2, self.z2) |
| 83 | |
| 84 | def size(self): |
| 85 | return Block(self.x2 - self.x + 1, self.y2 - self.y + 1, self.z2 - self.z + 1) |
| 86 | |
| 87 | def __repr__(self): |
| 88 | return "<Rect: ({0},{1},{2}) ({3},{4},{5})>".format(self.x, self.y, self.z, self.x2, self.y2, self.z2) |
| 89 | |
| 90 | |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 91 | class SHRAMElements: |
| 92 | IFM8 = 0 |
| 93 | IFM16 = 1 |
| 94 | IFM8_Elementwise = 2 |
| 95 | IFM16_Elementwise = 3 |
Fredrik Svedberg | 597fd3f | 2020-08-13 10:02:53 +0200 | [diff] [blame] | 96 | IFM32 = 4 |
Fredrik Svedberg | a0c3624 | 2020-06-03 15:43:31 +0200 | [diff] [blame] | 97 | Acc16 = 5 |
| 98 | Acc32 = 6 |
| 99 | Acc40 = 7 |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 100 | Last = Acc40 |
Fredrik Svedberg | a0c3624 | 2020-06-03 15:43:31 +0200 | [diff] [blame] | 101 | BitSizes = np.array([8, 16, 8, 16, 32, 16, 32, 40], np.int32) |
Louis Verhaard | f98c674 | 2020-05-12 14:22:38 +0200 | [diff] [blame] | 102 | ByteSizes = BitSizes // 8 |
Fredrik Svedberg | a0c3624 | 2020-06-03 15:43:31 +0200 | [diff] [blame] | 103 | PostAlign = np.array([8, 8, 8, 8, 8, 1, 1, 1], np.int32) |
| 104 | PreAlign = np.array([1, 1, 1, 1, 1, 8, 8, 8], np.int32) |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 105 | |
| 106 | |
| 107 | class SHRAMBlockConfig: |
| 108 | def __init__(self, sizes, banks): |
| 109 | assert len(banks) == SHRAMElements.Last + 1 |
| 110 | self.sizes = sizes |
| 111 | self.banks = banks |
| 112 | |
| 113 | |
Tim Hall | c8a7386 | 2020-10-27 12:43:14 +0000 | [diff] [blame] | 114 | # Area indices must match Ethos-U SHRAM layout spec |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 115 | class SharedBufferArea(enum.IntEnum): |
| 116 | OFM = 0 |
| 117 | Weights = 1 |
| 118 | IFM = 2 |
| 119 | Accumulators = 3 |
| 120 | Size = Accumulators + 1 |
| 121 | |
| 122 | |
Manupa Karunaratne | d83d2e1 | 2020-07-20 12:05:32 +0100 | [diff] [blame] | 123 | class Accelerator(enum.Enum): |
| 124 | Ethos_U55_32 = "ethos-u55-32" |
| 125 | Ethos_U55_64 = "ethos-u55-64" |
| 126 | Ethos_U55_128 = "ethos-u55-128" |
| 127 | Ethos_U55_256 = "ethos-u55-256" |
Tim Hall | c8a7386 | 2020-10-27 12:43:14 +0000 | [diff] [blame] | 128 | Ethos_U65_256 = "ethos-u65-256" |
| 129 | Ethos_U65_512 = "ethos-u65-512" |
Manupa Karunaratne | d83d2e1 | 2020-07-20 12:05:32 +0100 | [diff] [blame] | 130 | |
| 131 | @classmethod |
| 132 | def member_list(cls): |
| 133 | return [e.value for e in cls] |
| 134 | |
Louis Verhaard | aeae567 | 2020-11-02 18:04:27 +0100 | [diff] [blame] | 135 | @classmethod |
| 136 | def from_npu_accelerator(cls, npu_accelerator: NpuAccelerator) -> "Accelerator": |
| 137 | """Converts the given public API object to Accelerator (used internally)""" |
| 138 | accelerator_map = { |
| 139 | NpuAccelerator.Ethos_U55_32: cls.Ethos_U55_32, |
| 140 | NpuAccelerator.Ethos_U55_64: cls.Ethos_U55_64, |
| 141 | NpuAccelerator.Ethos_U55_128: cls.Ethos_U55_128, |
| 142 | NpuAccelerator.Ethos_U55_256: cls.Ethos_U55_256, |
| 143 | NpuAccelerator.Ethos_U65_256: cls.Ethos_U65_256, |
| 144 | NpuAccelerator.Ethos_U65_512: cls.Ethos_U65_512, |
| 145 | } |
| 146 | assert npu_accelerator in accelerator_map, f"Unsupported accelerator {npu_accelerator}" |
| 147 | return accelerator_map[npu_accelerator] |
| 148 | |
Manupa Karunaratne | d83d2e1 | 2020-07-20 12:05:32 +0100 | [diff] [blame] | 149 | |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 150 | @enum.unique |
| 151 | class MemPort(enum.Enum): |
| 152 | Axi0 = enum.auto() |
| 153 | Axi1 = enum.auto() |
| 154 | |
| 155 | |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 156 | class ArchitectureFeatures: |
Tim Hall | c8a7386 | 2020-10-27 12:43:14 +0000 | [diff] [blame] | 157 | """This class is a container for various parameters of the Ethos-U core |
Diqing Zhong | e8887a3 | 2020-09-24 09:53:48 +0200 | [diff] [blame] | 158 | and system configuration that can be tuned, either by command line |
Tim Hall | c8a7386 | 2020-10-27 12:43:14 +0000 | [diff] [blame] | 159 | parameters or by the Ethos-U architects. The class is often passed |
Diqing Zhong | e8887a3 | 2020-09-24 09:53:48 +0200 | [diff] [blame] | 160 | around to passes that need to do architecture-dependent actions. |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 161 | |
Diqing Zhong | e8887a3 | 2020-09-24 09:53:48 +0200 | [diff] [blame] | 162 | Note the difference between ArchitectureFeatures and CompilerOptions |
Tim Hall | c8a7386 | 2020-10-27 12:43:14 +0000 | [diff] [blame] | 163 | - ArchitectureFeatures is for changing the Ethos-U and system architecture |
Diqing Zhong | e8887a3 | 2020-09-24 09:53:48 +0200 | [diff] [blame] | 164 | - CompilerOptions is for changing the behaviour of the compiler |
| 165 | """ |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 166 | |
| 167 | ArchitectureConfig = namedtuple( |
| 168 | "ArchitectureConfig", "macs cores ofm_ublock ifm_ublock shram_banks shram_granules elem_units" |
| 169 | ) |
| 170 | accelerator_configs = { |
Tim Hall | c8a7386 | 2020-10-27 12:43:14 +0000 | [diff] [blame] | 171 | Accelerator.Ethos_U65_512: ArchitectureConfig( |
Fredrik Svedberg | a0c3624 | 2020-06-03 15:43:31 +0200 | [diff] [blame] | 172 | 256, 2, Block(2, 2, 8), Block(2, 2, 8), 48, [8, 8, 8, 8, 16, 8, 16, 20], 8 |
Manupa Karunaratne | d83d2e1 | 2020-07-20 12:05:32 +0100 | [diff] [blame] | 173 | ), |
Tim Hall | c8a7386 | 2020-10-27 12:43:14 +0000 | [diff] [blame] | 174 | Accelerator.Ethos_U65_256: ArchitectureConfig( |
Fredrik Svedberg | a0c3624 | 2020-06-03 15:43:31 +0200 | [diff] [blame] | 175 | 256, 1, Block(2, 2, 8), Block(2, 2, 8), 48, [8, 8, 8, 8, 16, 8, 16, 20], 8 |
Manupa Karunaratne | d83d2e1 | 2020-07-20 12:05:32 +0100 | [diff] [blame] | 176 | ), |
| 177 | Accelerator.Ethos_U55_256: ArchitectureConfig( |
Fredrik Svedberg | a0c3624 | 2020-06-03 15:43:31 +0200 | [diff] [blame] | 178 | 256, 1, Block(2, 2, 8), Block(2, 2, 8), 48, [8, 8, 8, 8, 16, 8, 16, 20], 8 |
Manupa Karunaratne | d83d2e1 | 2020-07-20 12:05:32 +0100 | [diff] [blame] | 179 | ), |
| 180 | Accelerator.Ethos_U55_128: ArchitectureConfig( |
Fredrik Svedberg | a0c3624 | 2020-06-03 15:43:31 +0200 | [diff] [blame] | 181 | 128, 1, Block(2, 1, 8), Block(2, 2, 8), 24, [4, 4, 4, 4, 8, 4, 8, 12], 4 |
Manupa Karunaratne | d83d2e1 | 2020-07-20 12:05:32 +0100 | [diff] [blame] | 182 | ), |
| 183 | Accelerator.Ethos_U55_64: ArchitectureConfig( |
Fredrik Svedberg | a0c3624 | 2020-06-03 15:43:31 +0200 | [diff] [blame] | 184 | 64, 1, Block(1, 1, 8), Block(1, 1, 8), 16, [2, 2, 2, 2, 4, 4, 4, 8], 2 |
Manupa Karunaratne | d83d2e1 | 2020-07-20 12:05:32 +0100 | [diff] [blame] | 185 | ), |
| 186 | Accelerator.Ethos_U55_32: ArchitectureConfig( |
Fredrik Svedberg | a0c3624 | 2020-06-03 15:43:31 +0200 | [diff] [blame] | 187 | 32, 1, Block(1, 1, 4), Block(1, 1, 8), 16, [2, 2, 2, 2, 4, 4, 4, 4], 1 |
Manupa Karunaratne | d83d2e1 | 2020-07-20 12:05:32 +0100 | [diff] [blame] | 188 | ), |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 189 | } |
| 190 | |
| 191 | OFMSplitDepth = 16 |
Manupa Karunaratne | d83d2e1 | 2020-07-20 12:05:32 +0100 | [diff] [blame] | 192 | SubKernelMax = Block(8, 8, 65536) |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 193 | |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 194 | DEFAULT_CONFIG = "internal-default" |
Louis Verhaard | 1e17018 | 2020-11-26 11:42:04 +0100 | [diff] [blame] | 195 | MAX_BLOCKDEP = 3 |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 196 | |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 197 | def __init__( |
| 198 | self, |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 199 | vela_config_files, |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 200 | accelerator_config, |
| 201 | system_config, |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 202 | memory_mode, |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 203 | override_block_config, |
| 204 | block_config_limit, |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 205 | max_blockdep, |
Patrik Gustavsson | 90831bc | 2020-08-24 16:26:11 +0200 | [diff] [blame] | 206 | weight_estimation_scaling, |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 207 | verbose_config, |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 208 | ): |
| 209 | accelerator_config = accelerator_config.lower() |
Manupa Karunaratne | d83d2e1 | 2020-07-20 12:05:32 +0100 | [diff] [blame] | 210 | if accelerator_config not in Accelerator.member_list(): |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 211 | raise CliOptionError("--accelerator-config", self.accelerator_config, "Unknown accelerator configuration") |
Manupa Karunaratne | d83d2e1 | 2020-07-20 12:05:32 +0100 | [diff] [blame] | 212 | self.accelerator_config = Accelerator(accelerator_config) |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 213 | accel_config = ArchitectureFeatures.accelerator_configs[self.accelerator_config] |
| 214 | self.config = accel_config |
| 215 | |
| 216 | self.system_config = system_config |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 217 | self.memory_mode = memory_mode |
Tim Hall | c8a7386 | 2020-10-27 12:43:14 +0000 | [diff] [blame] | 218 | self.is_ethos_u65_system = self.accelerator_config in (Accelerator.Ethos_U65_256, Accelerator.Ethos_U65_512) |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 219 | |
Tim Hall | c8a7386 | 2020-10-27 12:43:14 +0000 | [diff] [blame] | 220 | self.max_outstanding_dma = 2 if self.is_ethos_u65_system else 1 |
Tim Hall | 289a41d | 2020-08-04 21:40:14 +0100 | [diff] [blame] | 221 | self.max_outstanding_kernels = 3 |
| 222 | |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 223 | self.ncores = accel_config.cores |
| 224 | self.ofm_ublock = accel_config.ofm_ublock |
| 225 | self.ifm_ublock = accel_config.ifm_ublock |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 226 | self.ofm_block_max = Block(64, 32, 128) |
| 227 | self.override_block_config = override_block_config |
| 228 | self.block_config_limit = block_config_limit |
| 229 | |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 230 | self.max_blockdep = max_blockdep |
Patrik Gustavsson | 90831bc | 2020-08-24 16:26:11 +0200 | [diff] [blame] | 231 | self.weight_estimation_scaling = weight_estimation_scaling |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 232 | |
| 233 | dpu_min_height = accel_config.ofm_ublock.height |
| 234 | dpu_min_width = accel_config.ofm_ublock.width |
| 235 | dpu_dot_product_width = 8 |
| 236 | dpu_min_ofm_channels = accel_config.ofm_ublock.depth |
| 237 | |
| 238 | self.num_elem_wise_units = accel_config.elem_units |
| 239 | self.num_macs_per_cycle = dpu_min_height * dpu_min_width * dpu_dot_product_width * dpu_min_ofm_channels |
| 240 | |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 241 | # Get system configuration and memory mode |
| 242 | self._get_vela_config(vela_config_files, verbose_config) |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 243 | |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 244 | self.axi_port_width = 128 if self.is_ethos_u65_system else 64 |
| 245 | self.memory_bandwidths_per_cycle = self.axi_port_width * self.memory_clock_scales / 8 |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 246 | |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 247 | self.memory_bandwidths_per_second = self.memory_bandwidths_per_cycle * self.core_clock |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 248 | |
Diqing Zhong | e8887a3 | 2020-09-24 09:53:48 +0200 | [diff] [blame] | 249 | # Get output/activation performance numbers |
| 250 | self._generate_output_perf_tables(self.accelerator_config) |
| 251 | |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 252 | # sizes as N x H x W x C. we need to round up to these when allocating storage |
| 253 | self.storage_rounding_quantums = { |
| 254 | TensorFormat.Unknown: (1, 1, 1, 1), |
| 255 | TensorFormat.WeightsCompressed: (1, 1, 1, 1), |
| 256 | TensorFormat.NHWC: (1, 1, 1, 1), |
| 257 | TensorFormat.NHCWB16: (1, 1, 1, 16), |
| 258 | } |
| 259 | |
| 260 | # brick sizes as N x H x W x C. We have to fetch whole bricks at a time |
| 261 | self.brick_sizes = { |
| 262 | TensorFormat.Unknown: (1, 1, 1, 1), |
| 263 | TensorFormat.WeightsCompressed: (1, 1, 1, 1), |
| 264 | TensorFormat.NHWC: (1, 1, 1, 1), |
| 265 | TensorFormat.NHCWB16: (1, 1, 1, 16), |
| 266 | } |
| 267 | |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 268 | self.default_weight_format = TensorFormat.WeightsCompressed |
| 269 | self.default_feature_map_format = TensorFormat.NHWC |
| 270 | |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 271 | self.tensor_storage_mem_area = { |
| 272 | # permanent mem_area |
Tim Hall | 465582c | 2020-05-26 09:33:14 +0100 | [diff] [blame] | 273 | TensorPurpose.Unknown: MemArea.Unknown, |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 274 | TensorPurpose.Weights: self.permanent_storage_mem_area, |
| 275 | TensorPurpose.FeatureMap: self.feature_map_storage_mem_area, |
Fredrik Svedberg | a0c3624 | 2020-06-03 15:43:31 +0200 | [diff] [blame] | 276 | TensorPurpose.LUT: self.permanent_storage_mem_area, |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 277 | } |
| 278 | |
Patrik Gustavsson | eca2e95 | 2020-05-27 09:15:11 +0200 | [diff] [blame] | 279 | self.tensor_storage_mem_type = { |
Dwight Lidman | 1a9d20e | 2020-08-11 12:10:36 +0200 | [diff] [blame] | 280 | TensorPurpose.Unknown: MemType.Unknown, |
Patrik Gustavsson | eca2e95 | 2020-05-27 09:15:11 +0200 | [diff] [blame] | 281 | TensorPurpose.Weights: MemType.Permanent_NPU, |
| 282 | TensorPurpose.FeatureMap: MemType.Scratch, |
Fredrik Svedberg | a0c3624 | 2020-06-03 15:43:31 +0200 | [diff] [blame] | 283 | TensorPurpose.LUT: MemType.Scratch, |
Patrik Gustavsson | eca2e95 | 2020-05-27 09:15:11 +0200 | [diff] [blame] | 284 | } |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 285 | |
| 286 | self.min_block_sizes = { |
| 287 | NpuBlockType.Default: (dpu_min_height, dpu_min_width), |
| 288 | NpuBlockType.VectorProduct: (1, 1), |
| 289 | NpuBlockType.ConvolutionMxN: (dpu_min_height, dpu_min_width), |
| 290 | NpuBlockType.Pooling: (dpu_min_height, dpu_min_width), |
| 291 | NpuBlockType.ConvolutionDepthWise: (dpu_min_height, dpu_min_width), |
| 292 | NpuBlockType.ElementWise: (1, 1), |
Fredrik Svedberg | a0c3624 | 2020-06-03 15:43:31 +0200 | [diff] [blame] | 293 | NpuBlockType.ReduceSum: (dpu_min_height, dpu_min_width), |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 294 | } |
| 295 | |
| 296 | self.sub_kernel_limits = { |
| 297 | NpuBlockType.Default: (8, 8), |
| 298 | NpuBlockType.VectorProduct: (1, 1), |
| 299 | NpuBlockType.ConvolutionMxN: (8, 8), |
| 300 | NpuBlockType.Pooling: (8, 8), |
| 301 | NpuBlockType.ConvolutionDepthWise: (8, 8), |
| 302 | NpuBlockType.ElementWise: (1, 1), |
Fredrik Svedberg | a0c3624 | 2020-06-03 15:43:31 +0200 | [diff] [blame] | 303 | NpuBlockType.ReduceSum: (8, 8), |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 304 | } |
| 305 | |
| 306 | # weights for scheduler search |
| 307 | from .npu_performance import make_bandwidth_array |
| 308 | |
| 309 | self.bandwidth_weights = make_bandwidth_array() |
| 310 | self.bandwidth_weights[MemArea.Sram] = 1.0 |
| 311 | self.bandwidth_weights[MemArea.Dram] = 10.0 |
| 312 | self.bandwidth_weights[MemArea.OnChipFlash] = 2.0 |
| 313 | self.bandwidth_weights[MemArea.OffChipFlash] = 20.0 |
| 314 | self.cycles_weight = 40 |
| 315 | self.max_sram_used_weight = 1000 |
| 316 | |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 317 | if self.is_spilling_enabled(): |
Patrik Gustavsson | 3ab9452 | 2020-06-29 17:36:55 +0200 | [diff] [blame] | 318 | self.max_sram_used_weight = 0 |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 319 | |
| 320 | # Shared Buffer Block allocations |
| 321 | self.shram_bank_size = 1024 # bytes |
| 322 | self.shram_size_bytes = accel_config.shram_banks * self.shram_bank_size |
| 323 | self.shram_reserved_output_banks = 2 |
| 324 | self.shram_reserved_weight_banks = 0 |
| 325 | self.shram_reserved_unused_banks = 2 if accel_config.shram_banks > 16 else 0 |
| 326 | self.shram_total_banks = accel_config.shram_banks - self.shram_reserved_unused_banks |
| 327 | self.shram_bank_granules = np.array(accel_config.shram_granules, np.int32) |
Louis Verhaard | 0b8268a | 2020-08-05 16:11:29 +0200 | [diff] [blame] | 328 | self.shram_lut_size = 2048 |
| 329 | # SHRAM base address of the activation lookup table |
| 330 | self.shram_lut_address = self.shram_bank_size * self.available_shram_banks(True) |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 331 | |
| 332 | # Build a map of acceptable IFM/OFM block configurations up to the maximum |
| 333 | # IFM/OFM block size. |
| 334 | ifm_block_max = self.get_ifm_block_size(32, self.ofm_block_max, Kernel(8, 8)) |
| 335 | self.block_config_map = dict() |
| 336 | self.generate_block_config_map(Block(ifm_block_max.width, ifm_block_max.height, 128)) |
| 337 | |
| 338 | # Setup supported operators and restriction checkers class |
Fredrik Svedberg | 880e735 | 2020-08-25 11:31:47 +0200 | [diff] [blame] | 339 | self.supported_operators = SupportedOperators() |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 340 | |
Louis Verhaard | 0b8268a | 2020-08-05 16:11:29 +0200 | [diff] [blame] | 341 | # Returns available number of SHRAM banks depending on activation lookup table |
| 342 | # being used or not |
| 343 | def available_shram_banks(self, uses_activation_lut): |
| 344 | banks = self.shram_total_banks |
| 345 | if uses_activation_lut and self.shram_reserved_unused_banks == 0: |
| 346 | banks -= 2 |
| 347 | return banks |
| 348 | |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 349 | # Calculate block configuration for ALL known IFM operations and |
| 350 | # accumulator sizes. Consumers will need to select their preferred |
| 351 | # operation and bit-width at read-time. |
| 352 | def generate_block_config(self, width, height, depth): |
Louis Verhaard | f98c674 | 2020-05-12 14:22:38 +0200 | [diff] [blame] | 353 | # Number of bytes required for any SHRAM element for a FM of given dimensions. |
| 354 | # For IFM: size = H*W*Align(D*BYTE_WIDTH, 8) |
| 355 | # For ACC: size = H*W*Align(D,8)*BYTE_WIDTH |
| 356 | d1 = round_up(depth, SHRAMElements.PreAlign) |
| 357 | d2 = round_up(d1 * SHRAMElements.ByteSizes, SHRAMElements.PostAlign) |
| 358 | size_bytes = (height * width) * d2 |
| 359 | |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 360 | # Convert byte size (rounded) to size in banks |
| 361 | size_banks = round_up_divide(size_bytes, self.shram_bank_size) |
| 362 | size_banks *= 2 # Double buffer the IFM/Acc (need twice as many banks) |
| 363 | # Round bank requirement to bank granularity |
| 364 | required_banks = round_up(size_banks, self.shram_bank_granules) |
| 365 | return SHRAMBlockConfig(size_bytes, required_banks) |
| 366 | |
| 367 | @staticmethod |
| 368 | def make_block_config_key(width, height, depth): |
| 369 | return (int(height), int(width), int(depth)) |
| 370 | |
| 371 | def get_block_config(self, width, height, depth): |
| 372 | assert depth <= self.ofm_block_max.depth |
| 373 | key = ArchitectureFeatures.make_block_config_key(width, height, depth) |
| 374 | config = self.block_config_map.get(key, None) |
| 375 | return config |
| 376 | |
| 377 | # Generate a key:value map of possible block configurations, where the |
| 378 | # key is compounded from the block dimensions: 0x00HHWWCC |
| 379 | def generate_block_config_map(self, block: Block): |
| 380 | for h in range(1, block.height + 1): |
| 381 | for w in range(1, block.width + 1): |
| 382 | # All possible IFM/OFM depth values |
| 383 | for c in [4, 8, 12, 16, 24, 32, 40, 48, 56, 64, 72, 80, 88, 96, 104, 112, 120, 128]: |
| 384 | key = ArchitectureFeatures.make_block_config_key(w, h, c) |
| 385 | self.block_config_map[key] = self.generate_block_config(w, h, c) |
| 386 | |
Diqing Zhong | e8887a3 | 2020-09-24 09:53:48 +0200 | [diff] [blame] | 387 | def _generate_output_perf_tables(self, accel_config): |
| 388 | if accel_config == Accelerator.Ethos_U55_32: |
| 389 | self.output_cycles_per_elem = (2.0, 3.0, 3.0, 3.0, 4.0, 6.0, 1.0, 2.0) |
| 390 | self.activation_cycles_per_elem = (1.0, 1.0, 0.0) |
| 391 | elif accel_config == Accelerator.Ethos_U55_64: |
| 392 | self.output_cycles_per_elem = (1.0, 1.5, 1.5, 1.5, 2.0, 3.0, 0.5, 1.0) |
| 393 | self.activation_cycles_per_elem = (1.0, 1.0, 0.0) |
| 394 | elif accel_config == Accelerator.Ethos_U55_128: |
| 395 | self.output_cycles_per_elem = (0.75, 1.25, 0.75, 0.75, 1.0, 1.5, 0.25, 0.5) |
| 396 | self.activation_cycles_per_elem = (1.0, 0.5, 0.0) |
Tim Hall | c8a7386 | 2020-10-27 12:43:14 +0000 | [diff] [blame] | 397 | elif accel_config in (Accelerator.Ethos_U55_256, Accelerator.Ethos_U65_256): |
Diqing Zhong | e8887a3 | 2020-09-24 09:53:48 +0200 | [diff] [blame] | 398 | self.output_cycles_per_elem = (0.625, 1.125, 0.5, 0.375, 0.5, 0.75, 0.125, 0.25) |
| 399 | self.activation_cycles_per_elem = (1.0, 0.25, 0.0) |
| 400 | else: |
Tim Hall | c8a7386 | 2020-10-27 12:43:14 +0000 | [diff] [blame] | 401 | assert accel_config == Accelerator.Ethos_U65_512 |
Diqing Zhong | e8887a3 | 2020-09-24 09:53:48 +0200 | [diff] [blame] | 402 | self.output_cycles_per_elem = (0.3125, 0.5625, 0.25, 0.1875, 0.25, 0.375, 0.0625, 0.125) |
| 403 | self.activation_cycles_per_elem = (0.5, 0.125, 0.0) |
| 404 | |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 405 | def calc_ifm_block_depth(self, ifm_depth, ifm_bits): |
Fredrik Svedberg | a0c3624 | 2020-06-03 15:43:31 +0200 | [diff] [blame] | 406 | assert ifm_bits in (8, 16, 32) |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 407 | assert ifm_depth > 0 |
| 408 | ifm_depth = round_up(ifm_depth, self.ifm_ublock.depth) |
Fredrik Svedberg | a0c3624 | 2020-06-03 15:43:31 +0200 | [diff] [blame] | 409 | max_block_depth = 8 * 32 // ifm_bits |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 410 | return min(max_block_depth, ifm_depth) |
| 411 | |
| 412 | # Calculate the size of the IFM block given a depth, target OFM block and a kernel |
Tim Hall | c30f495 | 2020-06-15 20:47:35 +0100 | [diff] [blame] | 413 | def get_ifm_block_size( |
| 414 | self, |
| 415 | ifm_block_depth, |
| 416 | ofm_block: Block, |
| 417 | kernel: Kernel, |
| 418 | subkernel: Block = Block(8, 8, 65536), |
| 419 | ifm_resampling_mode=resampling_mode.NONE, |
| 420 | ): |
Dwight Lidman | a9390f7 | 2020-05-13 12:00:08 +0200 | [diff] [blame] | 421 | upscaling = 1 if ifm_resampling_mode == resampling_mode.NONE else 2 |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 422 | # Height |
| 423 | ifm_odd_2x_height_enable = 0 |
| 424 | dilated_kernel_height = ((kernel.height - 1) * kernel.dilation.y) + 1 |
| 425 | ifm_block_height = ( |
| 426 | (ofm_block.height - 1) * kernel.stride.y |
| 427 | + min(subkernel.height, dilated_kernel_height) |
| 428 | + ifm_odd_2x_height_enable |
| 429 | ) // upscaling |
| 430 | |
Dwight Lidman | 0538a77 | 2020-05-06 14:09:17 +0200 | [diff] [blame] | 431 | ifm_block_height = round_up(ifm_block_height, self.ofm_ublock.height) |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 432 | |
| 433 | # Width |
| 434 | ifm_odd_2x_width_enable = 0 |
| 435 | dilated_kernel_width = ((kernel.width - 1) * kernel.dilation.x) + 1 |
| 436 | ifm_block_width = ( |
| 437 | (ofm_block.width - 1) * kernel.stride.x |
| 438 | + min(subkernel.width, dilated_kernel_width) |
| 439 | + ifm_odd_2x_width_enable |
| 440 | ) // upscaling |
| 441 | |
Dwight Lidman | 0538a77 | 2020-05-06 14:09:17 +0200 | [diff] [blame] | 442 | ifm_block_width = round_up(ifm_block_width, self.ofm_ublock.width) |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 443 | |
| 444 | return Block(ifm_block_width, ifm_block_height, ifm_block_depth) |
| 445 | |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 446 | def is_spilling_enabled(self): |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 447 | """ |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 448 | Spilling is a feature that allows the Ethos-U to use a dedicated SRAM as a cache for various types of data |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 449 | """ |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 450 | return ( |
| 451 | self._mem_port_mapping(self.cache_mem_area) == MemArea.Sram and self.cache_mem_area != self.arena_mem_area |
| 452 | ) |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 453 | |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 454 | def _mem_port_mapping(self, mem_port): |
| 455 | mem_port_mapping = {MemPort.Axi0: self.axi0_port, MemPort.Axi1: self.axi1_port} |
| 456 | return mem_port_mapping[mem_port] |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 457 | |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 458 | def _set_default_sys_config(self): |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 459 | # ArchitectureFeatures.DEFAULT_CONFIG values |
| 460 | if self.is_ethos_u65_system: |
| 461 | # Default Ethos-U65 system configuration |
| 462 | # Ethos-U65 Client-Server: SRAM (16 GB/s) and DRAM (12 GB/s) |
| 463 | self.core_clock = 1e9 |
| 464 | self.axi0_port = MemArea.Sram |
| 465 | self.axi1_port = MemArea.Dram |
| 466 | self.memory_clock_scales[MemArea.Sram] = 1.0 |
| 467 | self.memory_clock_scales[MemArea.Dram] = 0.75 # 3 / 4 |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 468 | else: |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 469 | # Default Ethos-U55 system configuration |
| 470 | # Ethos-U55 High-End Embedded: SRAM (4 GB/s) and Flash (0.5 GB/s) |
| 471 | self.core_clock = 500e6 |
| 472 | self.axi0_port = MemArea.Sram |
| 473 | self.axi1_port = MemArea.OffChipFlash |
| 474 | self.memory_clock_scales[MemArea.Sram] = 1.0 |
| 475 | self.memory_clock_scales[MemArea.OffChipFlash] = 0.125 # 1 / 8 |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 476 | |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 477 | def _set_default_mem_mode(self): |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 478 | # ArchitectureFeatures.DEFAULT_CONFIG values |
| 479 | if self.is_ethos_u65_system: |
| 480 | # Default Ethos-U65 memory mode |
| 481 | # Dedicated SRAM: SRAM is only used by the Ethos-U |
| 482 | self.const_mem_area = MemPort.Axi1 |
| 483 | self.arena_mem_area = MemPort.Axi1 |
| 484 | self.cache_mem_area = MemPort.Axi0 |
| 485 | self.cache_sram_size = 384 * 1024 |
| 486 | else: |
| 487 | # Default Ethos-U65 memory mode |
| 488 | self.const_mem_area = MemPort.Axi1 |
| 489 | self.arena_mem_area = MemPort.Axi0 |
| 490 | self.cache_mem_area = MemPort.Axi0 |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 491 | |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 492 | def _get_vela_config(self, vela_config_files, verbose_config): |
| 493 | """ |
| 494 | Gets the system configuration and memory modes from one or more Vela configuration file(s) or uses some |
| 495 | defaults. |
| 496 | """ |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 497 | |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 498 | # all properties are optional and are initialised to a value of 1 (or the equivalent) |
| 499 | self.core_clock = 1 |
| 500 | self.axi0_port = MemArea(1) |
| 501 | self.axi1_port = MemArea(1) |
| 502 | self.memory_clock_scales = np.ones(MemArea.Size) |
| 503 | self.const_mem_area = MemPort(1) |
| 504 | self.arena_mem_area = MemPort(1) |
| 505 | self.cache_mem_area = MemPort(1) |
| 506 | self.cache_sram_size = 1 |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 507 | |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 508 | # read configuration file(s) |
| 509 | self.vela_config = None |
| 510 | |
| 511 | if vela_config_files is not None: |
| 512 | self.vela_config = ConfigParser() |
| 513 | self.vela_config.read(vela_config_files) |
| 514 | |
| 515 | # read system configuration |
| 516 | sys_cfg_section = "System_Config." + self.system_config |
| 517 | |
| 518 | if self.vela_config is not None and self.vela_config.has_section(sys_cfg_section): |
| 519 | self.core_clock = float(self._read_config(sys_cfg_section, "core_clock", self.core_clock)) |
| 520 | self.axi0_port = MemArea[self._read_config(sys_cfg_section, "axi0_port", self.axi0_port)] |
| 521 | self.axi1_port = MemArea[self._read_config(sys_cfg_section, "axi1_port", self.axi1_port)] |
| 522 | |
| 523 | for mem_area in (self.axi0_port, self.axi1_port): |
| 524 | self.memory_clock_scales[mem_area] = float( |
| 525 | self._read_config( |
| 526 | sys_cfg_section, mem_area.name + "_clock_scale", self.memory_clock_scales[mem_area] |
| 527 | ) |
| 528 | ) |
| 529 | |
| 530 | elif self.system_config == ArchitectureFeatures.DEFAULT_CONFIG: |
| 531 | self._set_default_sys_config() |
| 532 | |
| 533 | elif vela_config_files is None: |
| 534 | raise CliOptionError("--config", vela_config_files, "CLI Option not specified") |
| 535 | |
| 536 | else: |
| 537 | raise CliOptionError( |
| 538 | "--system-config", |
| 539 | self.system_config, |
| 540 | "Section {} not found in Vela config file".format(sys_cfg_section), |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 541 | ) |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 542 | |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 543 | # read the memory mode |
| 544 | mem_mode_section = "Memory_Mode." + self.memory_mode |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 545 | |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 546 | if self.vela_config is not None and self.vela_config.has_section(mem_mode_section): |
| 547 | self.const_mem_area = MemPort[ |
| 548 | self._read_config(mem_mode_section, "const_mem_area", self.const_mem_area.name) |
| 549 | ] |
| 550 | self.arena_mem_area = MemPort[ |
| 551 | self._read_config(mem_mode_section, "arena_mem_area", self.arena_mem_area.name) |
| 552 | ] |
| 553 | self.cache_mem_area = MemPort[ |
| 554 | self._read_config(mem_mode_section, "cache_mem_area", self.cache_mem_area.name) |
| 555 | ] |
| 556 | self.cache_sram_size = int(self._read_config(mem_mode_section, "cache_sram_size", self.cache_sram_size)) |
Patrik Gustavsson | eca2e95 | 2020-05-27 09:15:11 +0200 | [diff] [blame] | 557 | |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 558 | elif self.memory_mode == ArchitectureFeatures.DEFAULT_CONFIG: |
| 559 | self._set_default_mem_mode() |
Patrik Gustavsson | 5f47c05 | 2020-06-25 12:56:04 +0200 | [diff] [blame] | 560 | |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 561 | elif vela_config_files is None: |
| 562 | raise CliOptionError("--config", vela_config_files, "CLI Option not specified") |
Patrik Gustavsson | eca2e95 | 2020-05-27 09:15:11 +0200 | [diff] [blame] | 563 | |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 564 | else: |
| 565 | raise CliOptionError( |
| 566 | "--memory-mode", self.memory_mode, "Section {} not found in Vela config file".format(mem_mode_section), |
| 567 | ) |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 568 | |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 569 | # override sram to onchipflash |
| 570 | if self._mem_port_mapping(self.const_mem_area) == MemArea.Sram: |
| 571 | if self.const_mem_area == self.arena_mem_area == self.cache_mem_area: |
| 572 | print( |
| 573 | "Info: Changing const_mem_area from Sram to OnChipFlash. This will use the same characteristics as" |
| 574 | " Sram." |
| 575 | ) |
| 576 | if self.const_mem_area == MemPort.Axi0: |
| 577 | self.const_mem_area = MemPort.Axi1 |
| 578 | self.axi1_port = MemArea.OnChipFlash |
| 579 | else: |
| 580 | self.const_mem_area = MemPort.Axi0 |
| 581 | self.axi0_port = MemArea.OnChipFlash |
| 582 | self.memory_clock_scales[MemArea.OnChipFlash] = self.memory_clock_scales[MemArea.Sram] |
| 583 | |
| 584 | # check configuration |
| 585 | if self._mem_port_mapping(self.cache_mem_area) != MemArea.Sram: |
| 586 | raise ConfigOptionError("cache_mem_area", self._mem_port_mapping(self.cache_mem_area).name, "Sram") |
| 587 | |
| 588 | if self.is_ethos_u65_system: |
| 589 | if self._mem_port_mapping(self.const_mem_area) not in ( |
| 590 | MemArea.Dram, |
| 591 | MemArea.OnChipFlash, |
| 592 | MemArea.OffChipFlash, |
| 593 | ): |
| 594 | raise ConfigOptionError( |
| 595 | "const_mem_area", |
| 596 | self._mem_port_mapping(self.const_mem_area).name, |
| 597 | "Dram or OnChipFlash or OffChipFlash", |
| 598 | ) |
| 599 | |
| 600 | if self._mem_port_mapping(self.arena_mem_area) not in (MemArea.Sram, MemArea.Dram): |
| 601 | raise ConfigOptionError( |
| 602 | "arena_mem_area", self._mem_port_mapping(self.arena_mem_area).name, "Sram or Dram" |
| 603 | ) |
| 604 | else: |
| 605 | if self._mem_port_mapping(self.const_mem_area) not in (MemArea.OnChipFlash, MemArea.OffChipFlash): |
| 606 | raise ConfigOptionError( |
| 607 | "const_mem_area", self._mem_port_mapping(self.const_mem_area).name, "OnChipFlash or OffChipFlash" |
| 608 | ) |
| 609 | |
| 610 | if self._mem_port_mapping(self.arena_mem_area) != MemArea.Sram: |
| 611 | raise ConfigOptionError("arena_mem_area", self._mem_port_mapping(self.arena_mem_area).name, "Sram") |
| 612 | |
| 613 | # assign existing memory areas |
| 614 | self.permanent_storage_mem_area = self._mem_port_mapping(self.const_mem_area) |
| 615 | self.feature_map_storage_mem_area = self._mem_port_mapping(self.arena_mem_area) |
| 616 | self.fast_storage_mem_area = self._mem_port_mapping(self.cache_mem_area) |
| 617 | |
| 618 | self.sram_size = self.cache_sram_size if self.is_spilling_enabled() else 9999 * 1024 * 1024 |
| 619 | |
| 620 | # display the system configuration and memory mode |
| 621 | if verbose_config: |
| 622 | print(f"System Configuration ({self.system_config}):") |
| 623 | print(f" core_clock = {self.core_clock}") |
| 624 | print(f" axi0_port = {self.axi0_port.name}") |
| 625 | print(f" axi1_port = {self.axi1_port.name}") |
| 626 | for mem in (MemArea.Sram, MemArea.Dram, MemArea.OnChipFlash, MemArea.OffChipFlash): |
| 627 | print(f" {mem.name}_clock_scales = {self.memory_clock_scales[mem]}") |
| 628 | |
| 629 | print(f"Memory Mode ({self.memory_mode}):") |
| 630 | print(f" const_mem_area = {self.const_mem_area.name}") |
| 631 | print(f" arena_mem_area = {self.arena_mem_area.name}") |
| 632 | print(f" cache_mem_area = {self.cache_mem_area.name}") |
| 633 | print(f" cache_sram_size = {self.cache_sram_size}") |
| 634 | |
| 635 | print("Architecture Settings:") |
| 636 | print(f" permanent_storage_mem_area = {self.permanent_storage_mem_area.name}") |
| 637 | print(f" feature_map_storage_mem_area = {self.feature_map_storage_mem_area.name}") |
| 638 | print(f" fast_storage_mem_area = {self.fast_storage_mem_area.name}") |
| 639 | print(f" sram_size = {self.sram_size}") |
| 640 | |
| 641 | def _read_config(self, section, key, current_value): |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 642 | """ |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 643 | Reads a given key from a particular section in the Vela config file. If the section contains the 'inherit' |
| 644 | option then we recurse into the section specified. If inherited sections result in multiple keys for a |
| 645 | particular option then the key from the parent section is used, regardless of the parsing order |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 646 | """ |
Tim Hall | 1bd531d | 2020-11-01 20:59:36 +0000 | [diff] [blame] | 647 | if not self.vela_config.has_section(section): |
| 648 | raise ConfigOptionError( |
| 649 | "section", "{}. The section was not found in the Vela config file(s)".format(section) |
| 650 | ) |
| 651 | |
| 652 | result = str(current_value) |
| 653 | if self.vela_config.has_option(section, "inherit"): |
| 654 | inheritance_section = self.vela_config.get(section, "inherit") |
| 655 | # check for recursion loop |
| 656 | if inheritance_section == section: |
| 657 | raise ConfigOptionError( |
| 658 | "inherit", |
| 659 | "{}. This references its own section and recursion is not allowed".format(inheritance_section), |
| 660 | ) |
| 661 | result = self._read_config(inheritance_section, key, result) |
| 662 | |
| 663 | if self.vela_config.has_option(section, key): |
| 664 | result = self.vela_config.get(section, key) |
| 665 | |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 666 | return result |
Louis Verhaard | 5207830 | 2020-11-18 13:35:06 +0100 | [diff] [blame] | 667 | |
| 668 | |
Louis Verhaard | 061eeb4 | 2020-11-27 08:24:03 +0100 | [diff] [blame] | 669 | # Cache for default arch instances, as these are expensive to create |
| 670 | default_arch_cache = dict() |
| 671 | |
| 672 | |
Louis Verhaard | 5207830 | 2020-11-18 13:35:06 +0100 | [diff] [blame] | 673 | def create_default_arch(accelerator: Accelerator) -> ArchitectureFeatures: |
| 674 | """Creates architecture features object using default settings""" |
Louis Verhaard | 061eeb4 | 2020-11-27 08:24:03 +0100 | [diff] [blame] | 675 | if accelerator not in default_arch_cache: |
| 676 | default_arch_cache[accelerator] = ArchitectureFeatures( |
| 677 | vela_config_files=None, |
| 678 | accelerator_config=accelerator.value, |
| 679 | system_config=ArchitectureFeatures.DEFAULT_CONFIG, |
| 680 | memory_mode=ArchitectureFeatures.DEFAULT_CONFIG, |
| 681 | override_block_config=None, |
| 682 | block_config_limit=None, |
| 683 | max_blockdep=ArchitectureFeatures.MAX_BLOCKDEP, |
| 684 | weight_estimation_scaling=1.0, |
| 685 | verbose_config=False, |
| 686 | ) |
| 687 | return default_arch_cache[accelerator] |