Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 1 | # Copyright (C) 2020 Arm Limited or its affiliates. All rights reserved. |
| 2 | # |
| 3 | # SPDX-License-Identifier: Apache-2.0 |
| 4 | # |
| 5 | # Licensed under the Apache License, Version 2.0 (the License); you may |
| 6 | # not use this file except in compliance with the License. |
| 7 | # You may obtain a copy of the License at |
| 8 | # |
| 9 | # www.apache.org/licenses/LICENSE-2.0 |
| 10 | # |
| 11 | # Unless required by applicable law or agreed to in writing, software |
| 12 | # distributed under the License is distributed on an AS IS BASIS, WITHOUT |
| 13 | # WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 14 | # See the License for the specific language governing permissions and |
| 15 | # limitations under the License. |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 16 | # Description: |
| 17 | # Packs a subgraph with Neural Network Operations into Passes. Each Pass has one or more Operations. |
Diego Russo | ea6111a | 2020-04-14 18:41:58 +0100 | [diff] [blame] | 18 | import collections |
Diego Russo | e8a1045 | 2020-04-21 17:39:10 +0100 | [diff] [blame] | 19 | import enum |
Diego Russo | ea6111a | 2020-04-14 18:41:58 +0100 | [diff] [blame] | 20 | |
Tim Hall | e6ccd87 | 2020-11-09 16:46:37 +0000 | [diff] [blame] | 21 | from .debug_database import DebugDatabase |
Diego Russo | e8a1045 | 2020-04-21 17:39:10 +0100 | [diff] [blame] | 22 | from .nn_graph import Pass |
| 23 | from .nn_graph import PassPlacement |
| 24 | from .operation import NpuBlockType |
Louis Verhaard | aee5d75 | 2020-09-30 09:01:52 +0200 | [diff] [blame] | 25 | from .operation import Op |
Fredrik Svedberg | d9c2c42 | 2020-12-01 16:33:45 +0100 | [diff] [blame] | 26 | from .operation_util import create_avgpool_nop |
Diego Russo | ea6111a | 2020-04-14 18:41:58 +0100 | [diff] [blame] | 27 | from .tensor import TensorPurpose |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 28 | |
| 29 | |
| 30 | class PassFlags(enum.Flag): |
| 31 | Empty = 0 |
| 32 | Pre = 1 |
| 33 | Main = 2 |
| 34 | Post = 4 |
| 35 | Mac = 8 |
| 36 | Dma = 32 |
| 37 | ElementWise = 256 |
| 38 | Npu = 512 |
| 39 | Cpu = 1024 |
| 40 | StartupInit = 2048 |
| 41 | MemoryOnly = 4096 |
| 42 | PostFusingLimited = 8192 |
| 43 | |
| 44 | |
Louis Verhaard | aee5d75 | 2020-09-30 09:01:52 +0200 | [diff] [blame] | 45 | npu_pre_ops = set((Op.SplitSliceRead,)) |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 46 | |
| 47 | mac_main_ops = set( |
| 48 | ( |
| 49 | # convolutions |
Louis Verhaard | aee5d75 | 2020-09-30 09:01:52 +0200 | [diff] [blame] | 50 | Op.Conv2DBias, |
| 51 | Op.Conv2D, |
| 52 | Op.QuantizedConv2D, |
| 53 | Op.Conv2DBackpropInputSwitchedBias, |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 54 | # depth-wise convolutions |
Louis Verhaard | aee5d75 | 2020-09-30 09:01:52 +0200 | [diff] [blame] | 55 | Op.DepthwiseConv2DBias, |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 56 | # FC layers |
Louis Verhaard | aee5d75 | 2020-09-30 09:01:52 +0200 | [diff] [blame] | 57 | Op.QuantizedMatMul, |
| 58 | Op.MatMul, |
| 59 | Op.FullyConnected, |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 60 | # RNN/LSTM/GRU |
Louis Verhaard | aee5d75 | 2020-09-30 09:01:52 +0200 | [diff] [blame] | 61 | Op.BlockLSTM, |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 62 | # pooling |
Louis Verhaard | aee5d75 | 2020-09-30 09:01:52 +0200 | [diff] [blame] | 63 | Op.QuantizedMaxPool, |
| 64 | Op.QuantizedAvgPool, |
| 65 | Op.AvgPool, |
| 66 | Op.MaxPool, |
| 67 | Op.ReduceSum, |
Dwight Lidman | 3ec04ac | 2020-04-30 11:54:48 +0200 | [diff] [blame] | 68 | # deconvolution |
Louis Verhaard | aee5d75 | 2020-09-30 09:01:52 +0200 | [diff] [blame] | 69 | Op.ResizeBilinear, |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 70 | ) |
| 71 | ) |
| 72 | |
Louis Verhaard | aee5d75 | 2020-09-30 09:01:52 +0200 | [diff] [blame] | 73 | binary_elem_wise_main_ops = Op.op_set(Op.is_binary_elementwise_op) |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 74 | |
Michael McGeagh | f3e3ad7 | 2020-12-02 12:39:03 +0000 | [diff] [blame] | 75 | unary_elem_wise_main_ops = Op.op_set(Op.is_unary_elementwise_op) |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 76 | |
| 77 | elem_wise_main_ops = binary_elem_wise_main_ops | unary_elem_wise_main_ops |
| 78 | |
Louis Verhaard | aee5d75 | 2020-09-30 09:01:52 +0200 | [diff] [blame] | 79 | activation_ops = Op.op_set(Op.is_relu_op) |
| 80 | npu_post_ops = activation_ops |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 81 | |
| 82 | npu_post_fuse_limited_ops = set( |
| 83 | # Set of post operators that should not be fused with main/elementwise ops |
Louis Verhaard | aee5d75 | 2020-09-30 09:01:52 +0200 | [diff] [blame] | 84 | (Op.ConcatSliceWrite, Op.Sigmoid, Op.Tanh, Op.Quantize) |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 85 | ) |
| 86 | |
Louis Verhaard | aee5d75 | 2020-09-30 09:01:52 +0200 | [diff] [blame] | 87 | elem_wise_ops = elem_wise_main_ops | activation_ops | set((Op.Sigmoid, Op.Tanh)) |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 88 | |
| 89 | |
Louis Verhaard | aee5d75 | 2020-09-30 09:01:52 +0200 | [diff] [blame] | 90 | quantization_ops = set((Op.Dequantize, Op.Max, Op.Min)) |
| 91 | cpu_ops = set((Op.Softmax, Op.LRN, Op.Shape, Op.Pad, Op.AddN)) | quantization_ops |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 92 | |
Louis Verhaard | aee5d75 | 2020-09-30 09:01:52 +0200 | [diff] [blame] | 93 | npu_dma_ops = set((Op.DMA,)) |
patrik.gustavsson | 1068362 | 2020-10-14 10:57:46 +0000 | [diff] [blame] | 94 | startup_init_ops = set((Op.Const, Op.Placeholder, Op.SubgraphInput)) |
Louis Verhaard | aee5d75 | 2020-09-30 09:01:52 +0200 | [diff] [blame] | 95 | memory_only_ops = set((Op.Squeeze, Op.Reshape, Op.QuantizedReshape, Op.ExpandDims,)) |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 96 | |
| 97 | |
| 98 | test_sequence = [ |
| 99 | ( |
| 100 | # ops_set |
| 101 | npu_post_ops, |
| 102 | # incompatible_pack_flags |
| 103 | PassFlags.Cpu | PassFlags.MemoryOnly | PassFlags.Pre | PassFlags.Main, |
| 104 | # flags_to_set |
| 105 | PassFlags.Npu | PassFlags.Post, |
| 106 | # flags_to_clear |
| 107 | PassFlags.Empty, |
| 108 | ), |
| 109 | ( |
| 110 | # ops_set |
| 111 | npu_post_fuse_limited_ops, |
| 112 | # incompatible_pack_flags |
| 113 | PassFlags.Cpu | PassFlags.MemoryOnly | PassFlags.Pre | PassFlags.Main, |
| 114 | # flags_to_set |
| 115 | PassFlags.Npu | PassFlags.PostFusingLimited, |
| 116 | # flags_to_clear |
| 117 | PassFlags.Empty, |
| 118 | ), |
| 119 | ( |
| 120 | # ops_set |
| 121 | mac_main_ops, |
| 122 | # incompatible_pack_flags |
| 123 | PassFlags.Cpu |
| 124 | | PassFlags.MemoryOnly |
| 125 | | PassFlags.ElementWise |
| 126 | | PassFlags.Pre |
| 127 | | PassFlags.Main |
| 128 | | PassFlags.PostFusingLimited, |
| 129 | # flags_to_set |
| 130 | PassFlags.Npu | PassFlags.Mac | PassFlags.Main, |
| 131 | # flags_to_clear |
| 132 | PassFlags.Empty, |
| 133 | ), |
| 134 | ( |
| 135 | # ops_set |
| 136 | elem_wise_main_ops, |
| 137 | # incompatible_pack_flags |
| 138 | PassFlags.Cpu |
| 139 | | PassFlags.MemoryOnly |
| 140 | | PassFlags.Mac |
| 141 | | PassFlags.Pre |
| 142 | | PassFlags.Main |
| 143 | | PassFlags.PostFusingLimited, |
| 144 | # flags_to_set |
| 145 | PassFlags.Npu | PassFlags.ElementWise | PassFlags.Main, |
| 146 | # flags_to_clear |
| 147 | PassFlags.Empty, |
| 148 | ), |
| 149 | ( |
| 150 | # ops_set |
| 151 | npu_pre_ops, |
| 152 | # incompatible_pack_flags |
| 153 | PassFlags.Cpu | PassFlags.MemoryOnly, |
| 154 | # flags_to_set |
| 155 | PassFlags.Npu | PassFlags.Mac | PassFlags.Pre | PassFlags.ElementWise, |
| 156 | # flags_to_clear |
| 157 | PassFlags.Empty, |
| 158 | ), |
| 159 | ( |
| 160 | # ops_set |
| 161 | npu_dma_ops, |
| 162 | # incompatible_pack_flags |
| 163 | PassFlags.Cpu | PassFlags.MemoryOnly, |
| 164 | # flags_to_set |
| 165 | PassFlags.Npu | PassFlags.Dma, |
| 166 | # flags_to_clear |
Diego Russo | ea6111a | 2020-04-14 18:41:58 +0100 | [diff] [blame] | 167 | PassFlags.Empty, |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 168 | ), |
| 169 | ( |
| 170 | # ops_set |
| 171 | startup_init_ops, |
| 172 | # incompatible_pack_flags |
| 173 | PassFlags.Npu | PassFlags.Cpu | PassFlags.MemoryOnly, |
| 174 | # flags_to_set |
| 175 | PassFlags.StartupInit | PassFlags.Main, |
| 176 | # flags_to_clear |
| 177 | PassFlags.Empty, |
| 178 | ), |
| 179 | ( |
| 180 | # ops_set |
| 181 | memory_only_ops, |
| 182 | # incompatible_pack_flags |
| 183 | PassFlags.Npu | PassFlags.Cpu, |
| 184 | # flags_to_set |
| 185 | PassFlags.MemoryOnly | PassFlags.Main, |
| 186 | # flags_to_clear |
Diego Russo | ea6111a | 2020-04-14 18:41:58 +0100 | [diff] [blame] | 187 | PassFlags.Empty, |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 188 | ), |
| 189 | ( |
| 190 | # ops_set |
| 191 | cpu_ops, |
| 192 | # incompatible_pack_flags |
| 193 | PassFlags.Npu | PassFlags.MemoryOnly | PassFlags.Main, |
| 194 | # flags_to_set |
| 195 | PassFlags.Cpu | PassFlags.Main, |
| 196 | # flags_to_clear |
Diego Russo | ea6111a | 2020-04-14 18:41:58 +0100 | [diff] [blame] | 197 | PassFlags.Empty, |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 198 | ), |
Diego Russo | ea6111a | 2020-04-14 18:41:58 +0100 | [diff] [blame] | 199 | ( # This last one is a fallback for unrecognised operations |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 200 | # ops_set |
| 201 | None, |
| 202 | # incompatible_pack_flags |
| 203 | PassFlags.Npu | PassFlags.MemoryOnly | PassFlags.Main, |
| 204 | # flags_to_set |
| 205 | PassFlags.Cpu | PassFlags.Main, |
| 206 | # flags_to_clear |
Diego Russo | ea6111a | 2020-04-14 18:41:58 +0100 | [diff] [blame] | 207 | PassFlags.Empty, |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 208 | ), |
| 209 | ] |
| 210 | |
| 211 | # Some sanity checking |
| 212 | for (operation_set, incompatible_pack_flags, flags_to_set, flags_to_clear) in test_sequence: |
| 213 | assert not flags_to_clear & flags_to_set |
| 214 | |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 215 | |
| 216 | def pack_into_passes(nng, arch, verbose_packing=False): |
| 217 | def visit_op(op, ignored): |
| 218 | visit_op_refcount[op] += 1 |
| 219 | |
| 220 | if visit_op_refcount[op] == 1: # First-time visit, go and fix up unused output tensors |
| 221 | for tens in op.outputs: |
| 222 | if len(tens.consumers()) == 0: |
| 223 | visit_op_refcount[op] += 1 |
| 224 | |
| 225 | assert visit_op_refcount[op] <= len(op.outputs) |
| 226 | if visit_op_refcount[op] == len(op.outputs): |
| 227 | |
| 228 | if op.type in startup_init_ops: |
| 229 | startup_list.append(op) |
| 230 | else: |
Louis Verhaard | aee5d75 | 2020-09-30 09:01:52 +0200 | [diff] [blame] | 231 | ofm_tensor = op.ofm |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 232 | if ofm_tensor is None: |
| 233 | ofm_tensor = op.outputs[0] |
patrik.gustavsson | df0a590 | 2020-12-21 16:56:26 +0000 | [diff] [blame^] | 234 | build_pass((op,), ofm_tensor) |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 235 | |
patrik.gustavsson | df0a590 | 2020-12-21 16:56:26 +0000 | [diff] [blame^] | 236 | def build_pass(start_ops_to_process, ofm_tensor=None): |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 237 | reverse_ops_list = [] |
| 238 | curr_flags = PassFlags.Empty |
| 239 | npu_block_type = NpuBlockType.Default |
| 240 | |
| 241 | reverse_intermediates = [] |
| 242 | input_set = set() |
| 243 | ifm_tensor = None |
| 244 | primary_op = None |
| 245 | |
| 246 | to_process = collections.deque() |
| 247 | for start_op in start_ops_to_process: |
| 248 | to_process.append((start_op, None)) |
| 249 | |
| 250 | while to_process: |
| 251 | curr_op, tens = to_process.popleft() |
| 252 | |
| 253 | if curr_op in reverse_ops_list: |
| 254 | continue |
| 255 | |
| 256 | for operation_set, incompatible_pack_flags, flags_to_set, flags_to_clear in test_sequence: |
| 257 | if operation_set is None or curr_op.type in operation_set: |
| 258 | if not (curr_flags & incompatible_pack_flags): |
| 259 | if flags_to_set & PassFlags.Npu: |
| 260 | if not curr_op.run_on_npu: |
| 261 | continue |
| 262 | |
| 263 | reverse_ops_list.append(curr_op) |
Louis Verhaard | aee5d75 | 2020-09-30 09:01:52 +0200 | [diff] [blame] | 264 | new_block_type = curr_op.type.npu_block_type |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 265 | if new_block_type != NpuBlockType.Default: |
| 266 | assert npu_block_type == NpuBlockType.Default |
| 267 | npu_block_type = new_block_type # Only one major block type per pass |
| 268 | assert primary_op is None |
| 269 | primary_op = curr_op |
| 270 | |
| 271 | curr_flags &= ~flags_to_clear |
| 272 | curr_flags |= flags_to_set |
| 273 | |
| 274 | if flags_to_set & PassFlags.Npu: |
| 275 | if flags_to_set & ( |
| 276 | PassFlags.Mac | PassFlags.ElementWise | PassFlags.Post | PassFlags.PostFusingLimited |
| 277 | ): |
| 278 | assert len(curr_op.inputs) >= 1 |
Louis Verhaard | aee5d75 | 2020-09-30 09:01:52 +0200 | [diff] [blame] | 279 | ifm_tensor = curr_op.ifm |
Louis Verhaard | 04f8c00 | 2020-10-09 11:40:21 +0200 | [diff] [blame] | 280 | assert ifm_tensor is not None, "IFM missing in {}".format(curr_op) |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 281 | assert ifm_tensor.purpose == TensorPurpose.FeatureMap |
| 282 | |
| 283 | if flags_to_set & PassFlags.Dma: |
| 284 | # DMAs are special - Output buffers need to be preserved as intermediates, |
| 285 | # if the pass consumes the results |
| 286 | if tens is not None: |
| 287 | reverse_intermediates.append(tens) |
| 288 | |
| 289 | if operation_set is None: |
| 290 | print("Warning:", curr_op.type, "operation is unknown or unsupported, placing on CPU") |
| 291 | |
Charles Xu | 600351a | 2020-05-18 08:54:47 +0200 | [diff] [blame] | 292 | for inp in reversed(curr_op.inputs): |
Andreas Nevalainen | d8c032d | 2020-09-11 10:25:09 +0200 | [diff] [blame] | 293 | if inp is None: |
| 294 | continue |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 295 | can_pack = True |
| 296 | if len(inp.ops) == 1: |
| 297 | next_op = inp.ops[0] |
| 298 | for outp in next_op.outputs: |
| 299 | consumers = outp.consumers() |
| 300 | if len(consumers) > 1 or (len(consumers) == 1 and consumers[0] != curr_op): |
| 301 | can_pack = False |
| 302 | break |
| 303 | else: |
| 304 | can_pack = False |
| 305 | |
| 306 | if can_pack: |
| 307 | to_process.append((next_op, inp)) |
| 308 | else: |
| 309 | assert inp is not None |
| 310 | input_set.add(inp) |
| 311 | |
| 312 | break |
| 313 | |
| 314 | else: |
| 315 | # This operation is not compatible with already packed operations, just register the tensor as an input |
| 316 | assert tens is not None |
| 317 | input_set.add(tens) |
| 318 | |
| 319 | if curr_flags & PassFlags.Npu and not curr_flags & (PassFlags.ElementWise | PassFlags.Mac): |
| 320 | # Make the choice that if we don't have a mac operation, the ambidextrous operations go on the |
| 321 | # element wise unit |
| 322 | curr_flags |= PassFlags.ElementWise |
| 323 | |
| 324 | is_element_wise = True |
| 325 | for op in reverse_ops_list: |
Diego Russo | ea6111a | 2020-04-14 18:41:58 +0100 | [diff] [blame] | 326 | if op.type not in elem_wise_ops and op.type not in npu_dma_ops: |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 327 | is_element_wise = False |
| 328 | break |
| 329 | |
| 330 | placement = PassPlacement.Unknown |
| 331 | if curr_flags & PassFlags.Npu: |
| 332 | assert placement == PassPlacement.Unknown |
| 333 | placement = PassPlacement.Npu |
| 334 | if curr_flags & PassFlags.Cpu: |
| 335 | assert placement == PassPlacement.Unknown |
| 336 | placement = PassPlacement.Cpu |
| 337 | if curr_flags & PassFlags.MemoryOnly: |
| 338 | assert placement == PassPlacement.Unknown |
| 339 | placement = PassPlacement.MemoryOnly |
| 340 | if curr_flags & PassFlags.StartupInit: |
| 341 | assert placement == PassPlacement.Unknown |
| 342 | placement = PassPlacement.StartupInit |
| 343 | assert placement != PassPlacement.Unknown |
| 344 | |
| 345 | ops_list = list(reversed(reverse_ops_list)) |
| 346 | intermediates = list(reversed(reverse_intermediates)) |
| 347 | |
Diego Russo | ea6111a | 2020-04-14 18:41:58 +0100 | [diff] [blame] | 348 | if primary_op is None: |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 349 | primary_op = create_primary_op(ops_list) |
Diego Russo | ea6111a | 2020-04-14 18:41:58 +0100 | [diff] [blame] | 350 | if primary_op is not None: |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 351 | visit_tensor_refcount[primary_op.inputs[0]] += 1 |
Louis Verhaard | aee5d75 | 2020-09-30 09:01:52 +0200 | [diff] [blame] | 352 | npu_block_type = primary_op.type.npu_block_type |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 353 | for input_tens in primary_op.inputs: |
| 354 | if input_tens not in input_set: |
| 355 | input_set.add(input_tens) |
| 356 | |
| 357 | ordered_input_list = [] |
Louis Verhaard | 0b8268a | 2020-08-05 16:11:29 +0200 | [diff] [blame] | 358 | # Keep LUT-s in a separate list and add as inputs at the end |
| 359 | # to avoid that they would accidentally be assigned as ifm or ifm2 |
| 360 | lut_list = [] |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 361 | input_refcounts = collections.defaultdict(int) |
Diqing Zhong | 2abd3dd | 2020-08-25 10:40:36 +0200 | [diff] [blame] | 362 | input_ops_list = ops_list.copy() |
| 363 | |
| 364 | # Check primary_op first |
| 365 | if primary_op is not None: |
| 366 | for inp in primary_op.inputs: |
Andreas Nevalainen | d8c032d | 2020-09-11 10:25:09 +0200 | [diff] [blame] | 367 | if inp is None: |
| 368 | continue |
Louis Verhaard | aee5d75 | 2020-09-30 09:01:52 +0200 | [diff] [blame] | 369 | if len(inp.ops) == 1 and inp.ops[0].type == Op.DMA and inp.purpose == TensorPurpose.FeatureMap: |
Diqing Zhong | 2abd3dd | 2020-08-25 10:40:36 +0200 | [diff] [blame] | 370 | src_op = inp.ops[0] |
| 371 | if src_op in input_ops_list: |
| 372 | inp = src_op.inputs[0] |
| 373 | input_ops_list.remove(src_op) |
| 374 | add_input_list(inp, input_set, input_refcounts, lut_list, ordered_input_list) |
| 375 | input_ops_list.remove(primary_op) |
| 376 | |
| 377 | # Check rest of the list |
| 378 | for op in input_ops_list: |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 379 | for inp in op.inputs: |
Diqing Zhong | 2abd3dd | 2020-08-25 10:40:36 +0200 | [diff] [blame] | 380 | add_input_list(inp, input_set, input_refcounts, lut_list, ordered_input_list) |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 381 | |
| 382 | name = ops_list[0].name |
Louis Verhaard | aee5d75 | 2020-09-30 09:01:52 +0200 | [diff] [blame] | 383 | non_dma_ops = [op for op in ops_list if op.type != Op.DMA] |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 384 | if non_dma_ops: |
| 385 | name = non_dma_ops[0].name |
| 386 | ps = Pass(name, placement, is_element_wise, npu_block_type) |
| 387 | ps.ops = ops_list |
| 388 | ps.primary_op = primary_op |
| 389 | ps.inputs = ordered_input_list |
| 390 | ps.intermediates = intermediates |
| 391 | ps.outputs = list(ops_list[-1].outputs) |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 392 | |
| 393 | # ElementWise operation, 2 IFMs |
| 394 | if ps.primary_op and ps.primary_op.type in binary_elem_wise_main_ops: |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 395 | ps.ifm_tensor = ps.inputs[0] |
Fredrik Svedberg | a0c3624 | 2020-06-03 15:43:31 +0200 | [diff] [blame] | 396 | ps.ifm2_tensor = ps.inputs[-1] |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 397 | |
Fredrik Svedberg | a0c3624 | 2020-06-03 15:43:31 +0200 | [diff] [blame] | 398 | if len(ps.inputs) > 2: |
| 399 | ps.ifm_tensor = ps.inputs[-2] |
Patrik Gustavsson | 2349d42 | 2020-12-01 16:02:29 +0100 | [diff] [blame] | 400 | |
| 401 | # Get the corresponding ifm_shapes |
| 402 | for op in input_ops_list + [primary_op]: |
| 403 | if ps.ifm_tensor == op.ifm: |
| 404 | ps.ifm_shapes.append(op.ifm_shapes[0]) |
| 405 | elif ps.ifm_tensor == op.ifm2: |
| 406 | ps.ifm_shapes.append(op.ifm_shapes[1]) |
| 407 | for op in input_ops_list + [primary_op]: |
| 408 | if ps.ifm2_tensor == op.ifm: |
| 409 | ps.ifm_shapes.append(op.ifm_shapes[0]) |
| 410 | elif ps.ifm2_tensor == op.ifm2: |
| 411 | ps.ifm_shapes.append(op.ifm_shapes[1]) |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 412 | else: |
| 413 | ps.ifm_tensor = ifm_tensor |
| 414 | ps.ifm2_tensor = None |
Patrik Gustavsson | 2349d42 | 2020-12-01 16:02:29 +0100 | [diff] [blame] | 415 | if ps.primary_op is not None: |
| 416 | ps.ifm_shapes.append(ps.primary_op.ifm_shapes[0]) |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 417 | |
| 418 | ps.ofm_tensor = ofm_tensor |
patrik.gustavsson | df0a590 | 2020-12-21 16:56:26 +0000 | [diff] [blame^] | 419 | if ps.primary_op is not None: |
| 420 | ps.ofm_shapes.append(ps.primary_op.ofm_shapes[0]) |
Patrik Gustavsson | 2349d42 | 2020-12-01 16:02:29 +0100 | [diff] [blame] | 421 | |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 422 | assert ps.placement != PassPlacement.Npu or ps.ofm_tensor is not None |
| 423 | ps.weight_tensor = ps.get_primary_op_ifm_weights()[1] |
| 424 | ps.scale_tensor = ps.get_primary_op_ifm_weights_biases_ofm()[2] |
Fredrik Svedberg | a0c3624 | 2020-06-03 15:43:31 +0200 | [diff] [blame] | 425 | ps.lut_tensor = ps.get_primary_op_lut() |
Louis Verhaard | 0b8268a | 2020-08-05 16:11:29 +0200 | [diff] [blame] | 426 | ps.inputs.extend(lut_list) |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 427 | |
| 428 | for op in ps.ops: |
| 429 | op.scheduled_pass = ps |
| 430 | |
| 431 | reverse_pass_list.append(ps) |
| 432 | |
| 433 | for inp, refcount in input_refcounts.items(): |
| 434 | for _ in range(refcount): |
| 435 | visit_tensor(inp) |
| 436 | |
| 437 | return ps |
| 438 | |
| 439 | def visit_tensor(tens): |
| 440 | visit_tensor_refcount[tens] += 1 |
| 441 | assert visit_tensor_refcount[tens] <= len(tens.consumers()) |
| 442 | if visit_tensor_refcount[tens] == len(tens.consumers()): |
| 443 | for op in reversed(tens.ops): |
| 444 | visit_op(op, tens) |
| 445 | |
Jacob Bohlin | fb85873 | 2020-08-17 09:42:35 +0200 | [diff] [blame] | 446 | def create_primary_op(op_list): |
| 447 | if any(op.type in (npu_pre_ops | npu_post_ops | npu_post_fuse_limited_ops) and op.run_on_npu for op in op_list): |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 448 | # Configure a 1x1 AvgPool and attach the op onto it |
Jacob Bohlin | fb85873 | 2020-08-17 09:42:35 +0200 | [diff] [blame] | 449 | op = op_list[0] |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 450 | inp = op.inputs[0] |
Michael McGeagh | 8dbf8cf | 2020-09-08 11:09:48 +0100 | [diff] [blame] | 451 | avgpool_op = create_avgpool_nop(op.name + "_avgpool") |
| 452 | avgpool_op.add_input_tensor(inp) |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 453 | avgpool_out = inp.clone("_avgpooled") |
| 454 | avgpool_out.consumer_list.append(op) |
Michael McGeagh | c5b549b | 2020-08-07 11:54:28 +0100 | [diff] [blame] | 455 | avgpool_op.set_output_tensor(avgpool_out) |
patrik.gustavsson | df0a590 | 2020-12-21 16:56:26 +0000 | [diff] [blame^] | 456 | avgpool_op.ifm_shapes = op.ifm_shapes |
| 457 | avgpool_op.ofm_shapes = op.ofm_shapes |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 458 | |
| 459 | op.inputs[0] = avgpool_out |
Jacob Bohlin | fb85873 | 2020-08-17 09:42:35 +0200 | [diff] [blame] | 460 | op_list.insert(0, avgpool_op) |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 461 | |
Tim Hall | e6ccd87 | 2020-11-09 16:46:37 +0000 | [diff] [blame] | 462 | DebugDatabase.add_optimised(op, avgpool_op) |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 463 | return avgpool_op |
| 464 | |
| 465 | return None |
| 466 | |
Diqing Zhong | 2abd3dd | 2020-08-25 10:40:36 +0200 | [diff] [blame] | 467 | def add_input_list(inp_to_add, inp_set, inp_refcnts, lut_list, ordered_inp_list): |
| 468 | if inp_to_add in inp_set: |
| 469 | if inp_refcnts[inp_to_add] == 0: |
| 470 | if inp_to_add.purpose == TensorPurpose.LUT: |
| 471 | lut_list.append(inp_to_add) |
| 472 | else: |
| 473 | ordered_inp_list.append(inp_to_add) |
| 474 | inp_refcnts[inp_to_add] += 1 |
| 475 | |
Tim Hall | 79d07d2 | 2020-04-27 18:20:16 +0100 | [diff] [blame] | 476 | for sg in nng.subgraphs: |
| 477 | reverse_pass_list = [] |
| 478 | visit_op_refcount = collections.defaultdict(int) |
| 479 | visit_tensor_refcount = collections.defaultdict(int) |
| 480 | |
| 481 | startup_list = [] |
| 482 | |
| 483 | for tens in sg.output_tensors: |
| 484 | visit_tensor(tens) |
| 485 | |
| 486 | if startup_list: |
| 487 | startup_ps = build_pass(startup_list) |
| 488 | startup_ps.outputs = [op.outputs[0] for op in startup_list] # Need to fixup the outputs |
| 489 | startup_ps.name = "startup_weight_initialisation" |
| 490 | |
| 491 | sg.passes = list(reversed(reverse_pass_list)) |
| 492 | sg.build_pass_links() |
| 493 | |
| 494 | if verbose_packing: |
| 495 | nng.print_passes() |
| 496 | |
| 497 | return nng |