diff --git a/source/application/hal/platforms/bare-metal/bsp/mem_layout/mps3-sse-300.ld b/source/application/hal/platforms/bare-metal/bsp/mem_layout/mps3-sse-300.ld
index 8bb99cd..46fc2e5 100644
--- a/source/application/hal/platforms/bare-metal/bsp/mem_layout/mps3-sse-300.ld
+++ b/source/application/hal/platforms/bare-metal/bsp/mem_layout/mps3-sse-300.ld
@@ -65,7 +65,14 @@
   .text.at_itcm :
   {
     KEEP(*(.vectors))
-    *(.text*)
+
+    /**
+     * All code goes here, with one exception of
+     * all_ops_resolver object file. This code
+     * instead placed on BRAM. See comment in the
+     * BRAM section for details.
+     **/
+    *(EXCLUDE_FILE(*all_ops_resolver.o) .text*)
 
     KEEP(*(.init))
     KEEP(*(.fini))
@@ -87,11 +94,6 @@
     KEEP(*(.eh_frame*))
   } > ITCM
 
-  .ARM.extab.at_itcm :
-  {
-    *(.ARM.extab* .gnu.linkonce.armextab.*)
-  } > ITCM
-
   __exidx_start = .;
   .ARM.exidx.at_itcm :
   {
@@ -208,6 +210,18 @@
     KEEP(*(.jcr*))
     . = ALIGN(4);
 
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+
+    /**
+     * Place the all ops resolver code data here. This accounts
+     * for ~4k worth of saving on the ITCM load region. It is
+     * only designed to be included (by default) for the inference
+     * runner use case.
+     **/
+    *all_ops_resolver.o (*.text*)
+    . = ALIGN(4);
+
     __data_end__ = .;
   } > BRAM