MLECO-1948: Fix for SysTick init and GNU's stdout
The counter val could have been 0 when read the first time
quickly after the init function. The init function will now
wait for the SysTick counter to start before returning.
Also included are some minor changes to get around GNU's
file stream implementation being line buffered.
Change-Id: I8d51fef5d85f1261a6a5710608349d7ecc19ad62
diff --git a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/timer_mps3.c b/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/timer_mps3.c
index a72103c..c0c3bdf 100644
--- a/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/timer_mps3.c
+++ b/source/application/hal/platforms/bare-metal/bsp/bsp-packs/mps3/timer_mps3.c
@@ -41,12 +41,11 @@
.counter_fpga = MPS3_FPGAIO->COUNTER,
.counter_systick = Get_SysTick_Cycle_Count()
};
- debug("Timestamp:"
- "\n\tCounter 1 Hz: %" PRIu32
- "\n\tCounter 100 Hz: %" PRIu32
- "\n\tCounter FPGA: %" PRIu32
- "\n\tCounter CPU: %" PRIu64 "\n",
- t.counter_1Hz, t.counter_100Hz, t.counter_fpga, t.counter_systick);
+ debug("Timestamp:\n");
+ debug("\tCounter 1 Hz: %" PRIu32 "\n", t.counter_1Hz);
+ debug("\tCounter 100 Hz: %" PRIu32 "\n", t.counter_100Hz);
+ debug("\tCounter FPGA: %" PRIu32 "\n", t.counter_fpga);
+ debug("\tCounter CPU: %" PRIu64 "\n", t.counter_systick);
return t;
}