Cleanup: Timing adapter definitions
The NPU timing adapter base addresses had been defined in mutiple
places, making it difficult to determine which one is actually being
used. This patch cleans up unused definitions from memory-map header
files for different targets and the CMake template files.
The expectation is for component base addresses to be set by platform
specific CMake files that include/wrap the component directories.
Change-Id: Ic39794ffbdb872b4b0c900cbcec8e386bb32c4eb
Signed-off-by: Kshitij Sisodia <kshitij.sisodia@arm.com>
diff --git a/source/hal/source/components/npu/CMakeLists.txt b/source/hal/source/components/npu/CMakeLists.txt
index f2d2b08..eebf235 100644
--- a/source/hal/source/components/npu/CMakeLists.txt
+++ b/source/hal/source/components/npu/CMakeLists.txt
@@ -1,5 +1,6 @@
#----------------------------------------------------------------------------
-# SPDX-FileCopyrightText: Copyright 2022 Arm Limited and/or its affiliates <open-source-office@arm.com>
+# SPDX-FileCopyrightText: Copyright 2022, 2024 Arm Limited and/or its
+# affiliates <open-source-office@arm.com>
# SPDX-License-Identifier: Apache-2.0
#
# Licensed under the Apache License, Version 2.0 (the "License");
@@ -33,7 +34,8 @@
# For the driver, we need to provide the CMSIS_PATH variable
set(CMSIS_PATH ${CMSIS_SRC_PATH} CACHE PATH "Path to CMSIS directory")
-# Definitions that will be set.
+# Definitions that should be overridden by the platform wrapping this project.
+# Otherwise, these defaults will be used.
set(ETHOS_U_BASE_ADDR "0x58102000" CACHE STRING "Ethos-U NPU base address")
set(ETHOS_U_IRQN "56" CACHE STRING "Ethos-U NPU Interrupt")
set(ETHOS_U_SEC_ENABLED "1" CACHE STRING "Ethos-U NPU Security enable")
diff --git a/source/hal/source/components/npu/ethosu_npu_init.c b/source/hal/source/components/npu/ethosu_npu_init.c
index dbee2ff..b7ed9c7 100644
--- a/source/hal/source/components/npu/ethosu_npu_init.c
+++ b/source/hal/source/components/npu/ethosu_npu_init.c
@@ -1,6 +1,6 @@
/*
- * SPDX-FileCopyrightText: Copyright 2022-2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
- * SPDX-License-Identifier: Apache-2.0
+ * SPDX-FileCopyrightText: Copyright 2022-2024 Arm Limited and/or its affiliates
+ * <open-source-office@arm.com> SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -23,7 +23,22 @@
#include "ethosu_mem_config.h" /* Arm Ethos-U memory config */
#include "ethosu_driver.h" /* Arm Ethos-U driver header */
-struct ethosu_driver ethosu_drv; /* Default Ethos-U device driver */
+/* Mandatory definition checks. */
+#if !defined(ETHOS_U_BASE_ADDR)
+#error "NPU base address is undefined."
+#endif /* defnied(ETHOS_U_BASE_ADDR) */
+
+#if !defined(ETHOS_U_IRQN)
+#error "Arm NPU interrupt number is undefined."
+#endif /* !defined(ETHOS_U_IRQN) */
+
+#if !defined(ETHOS_U_SEC_ENABLED)
+#error "Arm NPU security mode is undefined."
+#endif /* !defined(ETHOS_U_SEC_ENABLED) */
+
+#if !defined(ETHOS_U_PRIV_ENABLED)
+#error "Arm NPU privilege mode is undefined."
+#endif /* !defined(ETHOS_U_PRIV_ENABLED) */
#if defined(ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0)
static uint8_t cache_arena[ETHOS_U_CACHE_BUF_SZ] CACHE_BUF_ATTRIBUTE;
@@ -31,6 +46,8 @@
static uint8_t *cache_arena = NULL;
#endif /* defined (ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0) */
+struct ethosu_driver ethosu_drv; /* Default Ethos-U device driver */
+
static uint8_t *get_cache_arena()
{
return cache_arena;
@@ -82,16 +99,15 @@
/* Initialise Ethos-U device */
void* const ethosu_base_address = (void *)(ETHOS_U_BASE_ADDR);
+ info("Initialising Ethos-U device@0x%" PRIx32 "\n", ETHOS_U_BASE_ADDR);
- if (0 != (err = ethosu_init(
- ðosu_drv, /* Ethos-U driver device pointer */
- ethosu_base_address, /* Ethos-U NPU's base address. */
- get_cache_arena(), /* Pointer to fast mem area - NULL for U55. */
- get_cache_arena_size(), /* Fast mem region size. */
- ETHOS_U_SEC_ENABLED, /* Security enable. */
- ETHOS_U_PRIV_ENABLED))) /* Privilege enable. */
- {
- printf_err("failed to initialise Ethos-U device\n");
+ if (0 != (err = ethosu_init(ðosu_drv, /* Ethos-U driver device pointer */
+ ethosu_base_address, /* Ethos-U NPU's base address. */
+ get_cache_arena(), /* Pointer to fast mem area - NULL for U55. */
+ get_cache_arena_size(), /* Fast mem region size. */
+ ETHOS_U_SEC_ENABLED, /* Security enable. */
+ ETHOS_U_PRIV_ENABLED))) /* Privilege enable. */ {
+ printf_err("Failed to initialise Ethos-U device\n");
return err;
}
diff --git a/source/hal/source/components/npu_ta/CMakeLists.txt b/source/hal/source/components/npu_ta/CMakeLists.txt
index 3778a14..9956384 100644
--- a/source/hal/source/components/npu_ta/CMakeLists.txt
+++ b/source/hal/source/components/npu_ta/CMakeLists.txt
@@ -1,5 +1,6 @@
#----------------------------------------------------------------------------
-# SPDX-FileCopyrightText: Copyright 2022 Arm Limited and/or its affiliates <open-source-office@arm.com>
+# SPDX-FileCopyrightText: Copyright 2022, 2024 Arm Limited and/or its
+# affiliates <open-source-office@arm.com>
# SPDX-License-Identifier: Apache-2.0
#
# Licensed under the Apache License, Version 2.0 (the "License");
@@ -30,16 +31,14 @@
DESCRIPTION "Ethos-U NPU timing adapter initialization library"
LANGUAGES C CXX ASM)
+#
# Checks
+#
## Source generated Source path check
if (NOT DEFINED SOURCE_GEN_DIR)
set(SOURCE_GEN_DIR ${CMAKE_BINARY_DIR}/generated/ta)
endif()
-# Base address definitions for the two timing adapters (platform should override these):
-set(TA0_BASE "0x58103000" CACHE STRING "Ethos-U NPU timing adapter 0")
-set(TA1_BASE "0x58103200" CACHE STRING "Ethos-U NPU timing adapter 1")
-
## If a TA config file is provided, we generate a settings file
if (DEFINED TA_CONFIG_FILE)
include(${TA_CONFIG_FILE})
diff --git a/source/hal/source/components/npu_ta/ethosu_ta_init.c b/source/hal/source/components/npu_ta/ethosu_ta_init.c
index 66fa9e7..1ef4ff5 100644
--- a/source/hal/source/components/npu_ta/ethosu_ta_init.c
+++ b/source/hal/source/components/npu_ta/ethosu_ta_init.c
@@ -48,7 +48,7 @@
}
ta_set_all(&ta_0, &ta_0_settings);
- info("TA0 values set\n");
+ info("Configured TA0@0x%" PRIx32 "\n", TA0_BASE);
#endif /* defined (TA0_BASE) */
#if defined(TA1_BASE)
@@ -76,7 +76,7 @@
}
ta_set_all(&ta_1, &ta_1_settings);
- info("TA1 values set\n");
+ info("Configured TA1@0x%" PRIx32 "\n", TA1_BASE);
#endif /* defined (TA1_BASE) */
return 0;