MLECO-2426: Support for new Corstone-300 app note AN552 rev B.
These changes will limit the use of FPGA internal SRAM from a max
of 4MiB to 2MiB and the BRAM from 2MiB to 1MiB.
Change-Id: I69c8e695aee26ff4f235bfe83ffd26efbd66f547
diff --git a/source/use_case/asr/usecase.cmake b/source/use_case/asr/usecase.cmake
index 89a131e..50e7e26 100644
--- a/source/use_case/asr/usecase.cmake
+++ b/source/use_case/asr/usecase.cmake
@@ -71,7 +71,7 @@
USER_OPTION(${use_case}_ACTIVATION_BUF_SZ "Activation buffer size for the chosen model"
- 0x00400000
+ 0x00200000
STRING)
if (ETHOS_U_NPU_ENABLED)